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MVLD507L - Ic-Technology - TH - 1.0 - 73 - MVLD507L - 67 Acp

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Item 67/21 - Annexure - 25

Course Code Course Title L T P C


MVLD507L IC Technology 3 0 0 3
Pre-requisite NIL Syllabus version
1.0
Course Objectives
The course intended to
1. Introduce the process involved in semiconductor manufacturing, lithography and
fabrication.
2. Model the oxidation growth rate & to understand oxidation process and the process
of diffusion and to expound the Ion Implantation process.
3. Explain the thin film deposition process and review the difference between MOS and
Bipolar Process Integration.

Course Outcome
At the end of the course the student will be able to
1. Understand the process involved in semiconductor manufacturing, lithography and
fabrication.
2. Understand the various lithography techniques used for pattern transfer.
3. Apply models for understanding the oxidation growth.
4. Understand the diffusion mechanism in semiconductors.
5. Understand the process involved in thin film deposition.
6. Analyse the difference between MOS and Biploar Process

Module:1 Crystal Growth 5 hours


Introduction to Semiconductor Manufacturing and fabrication, Clean Room types and
Standards, Physics of the Crystal growth, wafer fabrication and basic properties of silicon
wafers.
Module:2 Lithography 7 hours
The Photolithographic Process, Photomask Fabrication, Comparison between positive and
negative photoresists, Exposure Systems, Characteristics of Exposure Systems, E-beam
Lithography, X- ray lithography
Module:3 Thermal Oxidation of Silicon 6 hours
The Oxidation Process, Modeling Oxidation, Masking Properties of Silicon Dioxide,
Technology of Oxidation, Si-SiO2 Interface
Module:4 Diffusion and Ion Implantation 7 hours
The Diffusion Process, Mathematical Model for Diffusion, Constant-, The Diffusion
Coefficient, Successive Diffusions, Diffusion Systems, Implantation Technology,
Mathematical Model for Ion Implantation, Selective Implantation, Channeling, Lattice
Damage and Annealing, Shallow Implantations.
Module:5 Thin film deposition, contacts, packaging 7 hours
and yield
Chemical Vapor Deposition, Physical Vapor Deposition, Epitaxy, Metal Interconnections and
Contact Technology, Silicides and Multilayer-Contact Technology, Copper Interconnects and
Damascene Processes, Wafer Thinning and Die Separation, Die Attachment, Wire Bonding,
Packages, Yield
Module:6 MOS Process Integration 5 hours
Basic MOS Device Considerations, MOS Transistor Layout and Design Rules,
Complementary MOS (CMOS) Technology
Module:7 Bipolar Process Integration 6 hours
Isolation Techniques in BJT fabrication, Advanced Bipolar Structures, Other Bipolar Isolation
Techniques. Deep Submicron Processes, Low-Voltage/Low-Power CMOS/BiCMOS
Processes. Future Trends and Directions of CMOS/BiCMOS Processes
Module:8 Contemporary Issues 2 hours

Proceedings of the 67th Academic Council (08.08.2022) 1355


Item 67/21 - Annexure - 25

Total Lecture hours: 45 hours

Text Book(s)
1. S.M. Sze, VLSI technology, 2017, Second Edition, Tata McGraw-Hill.
2. R.C. Jaeger, Introduction to microelectronic fabrication, 2013, Second Edition, Prentice
Hall.
Reference Books
1. S.A. Campbell, The science and engineering of microelectronics fabrication, 2012,
Second Edition, Oxford University Press, UK.
2. Simon M. Sze, Gary S. May, Fundamentals of Semiconductor Fabrication, 2011,Wiley.

Mode of Evaluation: Continuous Assessment Test, Digital Assignment, Quiz and Final
Assessment Test
Recommended by Board of Studies 28-07-2022
Approved by Academic Council No. 67 Date 08-08-2022

Proceedings of the 67th Academic Council (08.08.2022) 1356

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