System Verilog

This document contains important system Verilog concepts

1.

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LOGIC

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BIT: for faster simulation, less memory consumption, used when x,z values not expected[
for eg length can be 0 to n and not x or z.

INTEGER: no fractional part

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BYTE:shorter version of integer of 8 bits(full code not written)

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STRING

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Creating our own data types in SystemVerilog
To create our own datatypes 3 keywords provided by sv

1. typedef

2. enum 

3. struct 

1. TYPEDEF

Syntax: typedef <base_type> <size> <type_name>;

For this example, let's suppose that we wanted to create an 8 bit wide logic type to use in our code.

Now we can declare a variable which uses the logic8 data type we created using a typedef.

For this example, suppose we wanted to create an array which consists of 4 elements of 8 bit logic
vectors.

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 2. ENUM

In SystemVerilog, we typically use enum types to encode the states of a finite state
machine.

Syntax:

After we have created an enumerated type, we can only assign it to one of the values which are listed
in the <values> field.

if we want to use the enum type in more than one place then we can use a typedef to create a new type
instead.

For example

When we create an enum in SystemVerilog, we are actually creating a group of labels for an
underlying int.

By default, the actual value associated with the enumerated value will be an int. The value of
the underlying int depends on the order of the values in our list.

For example

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 3. Struct and union

We use SystemVerilog structs and unions to group a number of related variables together.

This is a useful feature as it allows us to create more complex data types which represents
related data. For example, we could use a struct to store the three values required in an RGB
type display.

Although unions an structs are very similar to one another, there is an important difference in
the way they work.

When we write a struct in SystemVerilog, each of the different members of the struct
are allocated their own memory space.

As a result of this, we can assign values to each of the different members in the struct
independently.

In contrast to this, when we write a union each of the different members of the union use a
shared memory location.

This means that when we write data to one of the members in the union, all of the other
members will be assigned to this value.

In fact, it is better to think of the members of a union as aliases or pointers to a memory

address. We simply use the different members of the union to determine how the memory
contents are interpreted.

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 ARRAYS
An array is a collection of variables, all of the same type, and accessed using the same name
plus one or more indices. there are different types of arrays, few array declaration examples
are given below.

 Static Arrays: size is known before compilation time

 Dynamic Arrays: unpacked array whose size can be changed at runtime
 Associative Arrays: unpacked array used when size of collection unknown and data space
sparse
 Queues: one dimensional unpacked array which grows and shrinks automatically

Static Arrays

A static array is one whose size is known before compilation time. In the example shown below,
a static array of 8-bit wide is declared.

module tb;
bit [7:0] m_data; // A vector or 1D packed array

initial begin
// 1. Assign a value to the vector
m_data = 8'hA2;

// 2. Iterate through each bit of the vector and print

value
for (int i = 0; i < $size(m_data); i++) begin
$display ("m_data[%0d] = %b", i, m_data[i]);

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 end
end

endmodule

Static arrays are further categorized into

1. packed arrays
2. unpacked arrays.

bit [2:0][7:0] m_data; // Packed

bit [15:0] m_mem [10:0]; // Unpacked

1. MULTIDIMENTIONAL PACKED ARRAY

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Unpacked arrays may be fixed-size arrays, dynamic arrays, associative arrays or
queues.

2. MULTIDIMENTIONAL UNPACKED ARRAY

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3. PACKED+UNPACKED ARRAY

Dynamic Arrays

A dynamic array is one whose size is not known during compilation, but instead is
defined and expanded as needed during runtime. A dynamic array is easily recognized
by its empty square brackets  [ ] .

int m_mem []; // Dynamic array, size unknown but it

holds integer values

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COPYING DYNAMIC ARRAY EXAMPLE

Associative Arrays

An associative array is one where the content is stored with a certain key. This is easily
recognized by the presence of a data type inside its square brackets  [ ] . The key is
represented inside the square brackets.

int m_data [int]; // Key is of type int, and

data is also of type int

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int m_name [string]; // Key is of type string,
and data is of type int

m_name ["Rachel"] = 30;

m_name ["Orange"] = 2;

m_data [32'h123] = 3333;

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Queues

A queue is a data type where data can be either pushed into the queue or popped from
the array. It is easily recognized by the  $  symbol inside square brackets  [ ] .

int m_queue [$]; // Unbound queue, no size

m_queue.push_back(23); // Push into the queue
int data = m_queue.pop_front(); // Pop from the queue

A queue is specified using $ as shown below:

QUEUE SLICE EXPRESSIONS

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QUEUE METHODS EXAMPLES

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QUEUE OF CLASSES IN SYSTEM VERILOG

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QUEUE OF DYNAMIC ARRAYS IN SYSTEM VERILOG

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STRUCTURE
A structure can contain elements of different data types which can be referenced as a
whole or individually by their names. This is quite different from arrays where the
elements are of the same data-type.

A structure is unpacked by default and can be defined using the struct keyword and a
list of member declarations can be provided within the curly brackets followed by the
name of the structure.

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STRUCT USING TYPEDEF

if there's a need to create multiple structure variables with the same constituents, it'll be
better to create a user defined data type of the structure by typedef. Then st_fruit will
become a data-type which can then be used to create variables of that type.

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PACKED STRUCTURES

TYPEDEF

In complex testbenches some variable declarations might have a longer data-type

specification or require to be used in multiple places in the testbench.
In such cases we can use a typedef to give a user-defined name to an existing data
type. The new data-type can then be used throughout the code and hence avoids the
need to edit in multiple places if required.

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SYSTEMVERILOG LOOPS

DO WHILE: This executes the code first and then checks for the condition to see if the
code should be executed again.

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FOREACH: This is best suited to loop through array variables, because you don't have to
find the array size, set up a variable to start from 0 until array_size-1 and increment it on
every iteration.

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BREAK:

CONTINUE:

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IF_ELSE_IF:

SystemVerilog introduced the following if else constructs for violation checks.

 unique-if
 unique0-if
 priority-if

In the following conditions simulator issue a run time error/warning,

 More than one condition is true

 No condition is true or final if doesn’t have corresponding else

Unlike unique-if, unique0-if does not report a violation if none of the conditions match

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NO ELSE BLOCK FOR UNIQUE IF

MULTIPLE MATCHES IN UNIQUEIF

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priority-if
priority-if evaluates all conditions in sequential order and a violation is reported
when:
None of the conditions are true or if there's no else clause to the final if construct
No else clause in priority-if

Exit after first match in priority-if

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CASE
Same as Verilog

Unique case

unique and unique0 ensure that there is no overlapping case items and hence can be
evaluated in parallel. If there are overlapping case items, then a violation is reported.

 If more than one case item is found to match the given expression, then a
violation is reported and the first matching expression is executed
 If no case item is found to match the given expression, then a violation is
reported only for unqiue

unique0 does not report a violation if no items match the expression

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BOCKING AND NON BLOCKING ASSIGNMENTS

BLOCKING

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 1. there are two initial blocks which are executed in parallel
2. Statements are executed sequentially in each block and both blocks finish
at time 0ns.
3. Variable a gets assigned first, followed by the display statement which is
then followed by all other statements.
NON BLOCKING
In above example if we replace ‘=’ with ‘<=’, following output observed
Non-blocking assignment allows assignments to be scheduled without blocking the
execution of following statements.
The RHS of every non-blocking statement of a particular time-step is captured, and
moves onto the next statement. The captured RHS value is assigned to the LHS variable
only at the end of the time-step.

EVENT
An event is a static object handle to synchronize between two or more concurrently
active processes. One process will trigger the event, and another process waits for the
event.

 Can be assigned or compared to other event variables

o Can be assigned to null
o When assigned to another event, both variables point to same
synchronization object
 Can be passed to queues, functions and tasks

How to trigger and wait for an event?

 Named events can be triggered using -> or ->> operator

 Processes can wait for an event using @ operator or .triggered

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What is the difference between @ and .triggered ?
An event's triggered state persists throughout the time step, until simulation advances.
Hence if both wait for the event and trigger of the event happens at the same time there
will be a race condition and the triggered property helps to avoid that.

wait_order
Waits for events to be triggered in the given order, and issues an error if any event
executes out of order.

Merging Events

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When one event variable is assigned to another, all processes waiting for the first event
to trigger will wait until the second variable is triggered.

Functions
The primary purpose of a function is to return a value that can be used in an expression
and cannot consume simulation time.

 A function cannot have time controlled statements like @, #, fork join, or wait
 A function cannot start a task since tasks are allowed to consume simulation time

Often times we find certain pieces of code to be repetitive and called multiple times
In such cases, we can declare a function and place the repetitive code inside the
function and allow it to return the result. This will reduce the amount of lines in the RTL
drastically since all you need to do now is to do a function call and pass data on which
the computation needs to be performed.
Note that a function shall have atleast one input declared and the return type will be void
if the function does not return anything.
Syntax
function [automatic] [return_type] name ([port_list]);
[statements]
endfunction

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DIFFERENCE BETWEEN FUNCTION AND TASK
When we write a function, it performs a calculation and returns a single value.
In contrast, a task executes a number of sequential statements but doesn't return a value.
Instead, the task can have an unlimited number of outputs

In addition to this, functions execute immediately and can't contain time consuming

constructs such as delays, posedge macros or wait statements

A task, on the other hand, can contain time consuming constructs.

The keyword automatic will make the function reentrant and items declared within the
task are dynamically allocated rather than shared between different invocations of the
task. This will be useful for recursive functions and when the same function is executed
concurrently by N processes when forked.
Function declarations
There are two ways to declare inputs to a function:
function [7:0] sum;
input [7:0] a, b;
begin
sum = a + b;
end
endfunction

function [7:0] sum (input [7:0] a, b);

begin
sum = a + b;
end
endfunction

Returning a value from a function

The function definition will implicitly create an internal variable of the same name as that
of the function. Hence it is illegal to declare another variable of the same name inside
the scope of the function. The return value is initialized by assigning the function result to
the internal variable.
sum = a + b;

Calling a function
A function call is an operand with an expression and has a syntax as shown below.
reg [7:0] result;
reg [7:0] a, b;

initial begin
a = 4;
b = 5;
#10 result = sum (a, b); //////////result is a function
end

Function rules

 A function cannot contain any time-controlled statements like #, @, wait,

posedge, negedge

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  A function cannot start a task because it may consume simulation time, but can
call other functions
 A function should have atleast one input
 A function cannot have non-blocking assignments or force-release or assign-
deassign
 A function cannot have any triggers
 A function cannot have an output or inout

Recursive Functions
Functions that call itself are called recursive functions. In the example shown below, a
recursive function is written to compute the factorial of a given number.
module tb;
initial begin
integer result = factorial(4);
$display("factorial(4) = %0d", result);
end

function automatic integer factorial(integer i);

integer result = i;

// This function is called within the body of this

// function with a different argument
if (i) begin
result = i * factorial(i-1);
$display("i=%0d result=%0d", i, result);
end else
result = 1;

return result;
endfunction
endmodule

How to pass arguments by value vs by reference ?

Pass by value is the default mechanism to pass arguments to subroutines. Each

argument is copied into the subroutine area and any changes made to this local variable
in the subroutine area is not visible outside the subroutine.

Arguments that are passed by reference are not copied into the subroutine area, instead
a reference to the original argument is passed to the subroutine. The argument
declaration is preceded by the ref keyword. Any changes made to the variable inside
the subroutine will be reflected in the original variable outside the subroutine.

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Example:pass by value

Example:pass by reference

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