US10264642

US010264642B2
(12) Liang
Unitedet al.
States Patent (10) Patent No.: US 10 ,264,642 B2
(45 ) Date of Patent: * Apr. 16 , 2019
( 54 ) SYSTEMS AND METHODS FOR (56 ) References Cited
INTELLIGENT CONTROL RELATED TO
TRIAC DIMMERS BY USING MODULATION U .S . PATENT DOCUMENTS
SIGNALS 3, 803, 452 A 4 /1974 Goldschmied
(71) Applicant: GUANGZHOU ON -BRIGHT 3 ,899 ,713 A 8 / 1975 Barkan et al.
ELECTRONICS CO ., LTD ., (Continued )
Guangzhou (CN )
(72 ) Inventors: Yuhao Liang, Guangzhou (CN ); Yimu FOREIGN PATENT DOCUMENTS
Liao , Guangzhou (CN ); Zhiliang Chen , CN 1448005 A 10 /2003
Shanghai ( CN ) CN 101657057 A 2 / 2010
(73 ) Assignee : Guangzhou On- Bright Electronics (Continued )
Co., Ltd ., Guangzhou ( CN )
( * ) Notice : Subject to any disclaimer, the term of this OTHER PUBLICATIONS
patent is extended or adjusted under 35 China Patent Office , Office Action dated Aug. 28 , 2015 , in Appli
U . S .C . 154 (b ) by 0 days . cation No. 201410322602 .9 .
This patent is subject to a terminal dis (Continued )
claimer.
(21) Appl. No .: 15/836,478 Primary Examiner — Tung X Le
(22) Filed : Dec. 8 , 2017 Assistant Examiner — Borna Alaeddini
(65) Prior Publication Data (74 ) Attorney, Agent, or Firm — Faegre Baker Daniels
LLP
US 2018/0110104 A1 Apr. 19 , 2018
Related U .S . Application Data (57 ) ABSTRACT
(63 ) Continuation of application No. 15/ 364,100, filed on System controller for a lighting system and method thereof
Nov . 29 , 2016 , now Pat. No. 9 ,883 ,561. according to certain embodiments . For example, the system
(30 ) Foreign Application Priority Data controller includes a first controller terminal configured to
receive a first signal and a transistor including a first
Oct. 17 , 2016 (CN ) ....................... 2016 1 0906129 transistor terminal, a second transistor terminal, and a third
(51) Int. Cl. transistor terminal. Additionally , the system controller
H05B 33 / 08 (2006 . 01) includes a second controller terminal coupled to the first
H05B 37 /02 ( 2006 .01 ) transistor terminal, and a third controller terminal coupled to
(52 ) CPC
U .S. .CI....... H05B 33 /0845 ( 2013 .01); H05B 33 /083 the third transistor terminal. The system controller is con
figured to determine whether the first signal is associated
(2013 .01 ); H05B 33/0803 (2013 .01); with a leading - edge TRIAC dimmer based at least in part on
(Continued ) the first signal, the leading- edge TRIAC dimmer being
configured to receive an AC input voltage associated with at
(58) Field of Classification Search least a first half cycle from a starting time to an ending time.
CPC ............ HO5B 33 /0803 ; HO5B 33 /0809 ; HO5B
33/0815 ; HO5B 33/ 0887 ; H05B 33 /0845 ;
(Continued ) 34 Claims, 8 Drawing Sheets
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US 10 ,Page
264,2642 B2
(52 ) U .S . CI. 2010 /0164406 A1 7 / 2010 Kost et al .

CPC . .. H05B 33 /0809 (2013 . 01 ); H05B 33 /0815 2010 /0176733 A1 7 / 2010 King
2010 /0207536 A1 8 / 2010 Burdalski
( 2013 .01) ; H05B 33/0842 (2013 .01 ); HOSB 2010 /0213859 Al 8 / 2010 Shteynberg
37 /02 (2013.01); H05B 37 /0281 ( 2013 .01) ; 2010 /0231136 A1 9 / 2010 Reisenauer et al.
YO2B 20 /48 (2013.01) 2011/0037399 Al 2 / 2011 Hung et al.
2011 /0080110 A1 4 / 2011 Nuhfer et al.
(58) CPC
Field .of.....Classification Search
..... HO5B 33 /0824 ; HO5B 33 /0818 ; H05B
2011 /0080111 A1 4 /2011 Nuhfer et al.
2011/0101867 A1 5 / 2011 Wang et al.
33/0848; H05B 39/044; HO5B 33/0842; 2011 /0121744 A1 5 / 2011 Salvestrini
HO5B 33 /083 ; HO5B 37 /02 ; H05B 2011/0121754 Al 5 / 2011 Shteynberg
2011/0133662 Al 6 /2011 Yan et al.
37 / 0281; H05B 30 /044; HO5B 41/ 2828 ; 2011/0227490 Al 9 /2011 Huynh
HO5B 41/ 3925 2011 /0260619 A1 10 /2011 Sadwick
See application file for complete search history. 2011/0285301 AL
2011/0291583 AL
11 / 2011 Kuang et al.
12 / 2011 Shen
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US 10 , 264 ,642 B2
SYSTEMS AND METHODS FOR a lighting system , and if a TRIAC dimmer is detected to be
INTELLIGENT CONTROL RELATED TO included in the lighting system , whether the TRIAC dimmer
TRIAC DIMMERS BY USING MODULATION is a leading - edge TRIAC dimmer or a trailing-edge TRIAC
SIGNALS dimmer. In one conventional technology, a rectified output
5 voltage generated by a rectifier is compared with a threshold
1. CROSS-REFERENCES TO RELATED voltage Vth on in order to determine a turn - on time period
APPLICATIONS Ton . If the turn -on time period Ton is equal to the duration of
This application is a continuation of U . S . patent applica
a half cycle of the AC input voltage, no TRIAC dimmer is
determined to be included in the lighting system ; if the
tion Ser. No. 15 / 364 ,100, filed Nov . 29, 2016 , which claims 10
priority to Chinese Patent Application No. 201610906129. 8 , turn -on time period Ton is smaller than the duration of a half
cycle of the AC input voltage , a TRIAC dimmer is deter
filed Oct. 17 , 2016 , both of the above-referenced applica
tions being incorporated by reference herein for all purposes. mined to be included in the lighting system . If a TRIAC
Additionally, this application is related to U .S . patent 15 a turn -onisvoltage
dimmer determined to be included in the lighting system ,
application Ser. Nos . 14 /593 ,734 and 14/451,656 , both of 15 au on . If the turn -Von is compared with the threshold voltage
which are incorporated by reference herein for all purposes. Vth on voltage Von is larger than the threshold
voltage Vth on, the TRIAC dimmer is determined to be a
2 . BACKGROUND OF THE INVENTION leading - edge TRIAC dimmer, if the turn -on voltage Von is
smaller than the threshold voltage Vth on , the TRIAC dim
th On
Certain embodiments of the present invention are directed 20 mer is determined to be a trailing- edge TRIAC dimmer.
to integrated circuits. More particularly , some embodiments In another conventional technology , a rate of change of a
of the invention provide a system and method for intelligent rectified output voltage is used . The rectified output voltage
control related to TRIAC dimmers by using modulation is generated by a rectifier, and its rate of change is deter
signal. Merely by way of example , some embodiments of mined by quickly sampling the rectified voltage twice .
the invention have been applied to driving light emitting 25 Depending on the phase angles atwhich these two sampling
diodes (LEDs). But it would be recognized that the invention actions are taken , a predetermined range for the rate of
has a much broader range of applicability . change is used . If the rate of change falls within this
A conventional lighting system may include or may not predetermined range , no TRIAC dimmer is determined to be
include a TRIAC dimmer that is a dimmer including a included in the lighting system ; if the rate of change falls
Triode for Alternating Current ( TRIAC ). For example , the 30 outside this predetermined range, a TRIAC dimmer is deter
TRIAC dimmer is either a leading- edge TRIAC dimmer or mined to be included in the lighting system . If a TRIAC
a trailing -edge TRIAC dimmer. Often , the leading -edge dimmer is determined to be included in the lighting system ,
TRIAC dimmer and the trailing -edge TRIAC dimmer are whether the rate of change is positive or negative is used to
configured to receive an alternating -current (AC ) input determine the type of the TRIAC dimmer. If the rate of
voltage, process the AC input voltage by clipping part of the 35 change is positive , the TRIAC dimmer is determined to be
waveform of the AC input voltage, and generate an voltage a leading -edge TRIAC dimmer; if the rate of change is
that is then received by a rectifier (e .g., a fullwave rectifying negative , the TRIAC dimmer is determined to be a trailing
bridge ) in order to generate a rectified output voltage . edge TRIAC dimmer.
FIG . 1 shows certain conventional timing diagrams for a If a conventional lighting system includes a TRIAC
leading -edge TRIAC dimmer and a trailing - edge TRIAC 40 dimmer and light emitting diodes (LEDs), the light emitting
dimmer. The waveforms 110 , 120 , and 130 are merely diodes may flicker if the current that flows through the
examples. Each of the waveforms 110 , 120 , and 130 repre - TRIAC dimmer falls below a holding current that is, for
sents a rectified output voltage as a function of time that is example , required by the TRIAC dimmer. As an example , if
generated by a rectifier. For the waveform 110 , the rectifier the current that flows through the TRIAC dimmer falls
receives an AC input voltage without any processing by a 45 below the holding current, the TRIAC dimmer may turn on
TRIAC dimmer. For the waveform 120 , an AC input voltage and off repeatedly , thus causing the LEDs to flicker. As
is received by a leading- edge TRIAC dimmer, and the another example, the various TRIAC dimmers made by
voltage generated by the leading -edge TRIAC dimmer is different manufacturers have differentholding currents rang
received by the rectifier, which then generates the rectified ing from 5 mA to 50 mA.
output voltage . For the waveform 130 , an AC input voltage 50 In order to solve this flickering problem , certain conven
is received by a trailing - edge TRIAC dimmer, and the tional technology uses a bleeder for the conventional light
voltage generated by the trailing- edge TRIAC dimmer is ing system . FIG . 2 is a simplified diagram of a conventional
received by the rectifier, which then generates the rectified lighting system that includes a bleeder. As shown, the
output voltage. lighting system 200 includes a TRIAC dimmer 210 , a
As shown by the waveform 110 , each cycle of the rectified 55 rectifier 220 , a bleeder 230 , an LED driver 240, and LEDs
output voltage has, for example, a phase angel ( e . g ., 0 ) that 250 . The TRIAC dimmer 210 receives an AC input voltage
changes from 0° to 180° and then from 180° to 360°. As 214 (e. g., Vline) and generates a voltage 212 . The voltage
shown by the waveform 120, the leading -edge TRIAC 212 is received by the rectifier 220 (e. g., a full wave
dimmer usually processes the AC input voltage by clipping rectifying bridge ), which then generates a rectified output
part of the waveform that corresponds to the phase angel 60 voltage 222 and a rectified output current 260. The rectified
starting at 0° or starting at 180° . As shown by the waveform output current 260 is equal to the current that flows through
130, the trailing - edge TRIAC dimmer often processes the the TRIAC dimmer 210 , and is also equal to the sum of
AC input voltage by clipping part of the waveform that currents 232 and 242. The current 232 is received by the
corresponds to the phase angel ending at 180° or ending at bleeder 230 , and the current 242 is received by the LED
360°. 65 driver 240. The magnitude of the current 232 may have a
Various conventional technologies have been used to fixed magnitude or may change between two different
detectwhether or not a TRIAC dimmer has been included in predetermined magnitudes.
US 10 ,264 ,642 B2
FIG . 3 is a simplified diagram showing certain conven - According to one embodiment, a system controller for a
tional components of the bleeder as part of the lighting lighting system includes a first controller terminal config
system 200 as shown in FIG . 2. The bleeder 230 includes a ured to receive a first signal and a transistor including a first
resistor 270 and a transistor 280 . The transistor 280 receives transistor terminal, a second transistor terminal, and a third
a drive signal 282 . If the drive signal 282 is at a logic high 5 transistor terminal. Additionally , the system controller
level, the transistor 280 is turned on , and if the drive signal includes a second controller terminal coupled to the first
282 is at a logic low level, the transistor 280 is turned off. transistor terminal, and a third controller terminal coupled to
For example , the TRIAC dimmer 210 is a trailing- edge the third transistor terminal. The system controller is con
TRIAC dimmer, the drive signal 282 remains at the logic figured to determine whether the first signal is associated
low level, and the transistor 280 remains turned off. In 10 with a leading - edge TRIAC dimmer based at least in part on
another example , the TRIAC dimmer 210 is a leading- edge the first signal, the leading - edge TRIAC dimmer being
TRIAC dimmer as shown by a waveform 294 , the drive configured to receive an AC input voltage associated with at
signal 282 changes between the logic low level and the logic least a first half cycle from a starting time to an ending time.
high level as shown by a waveform 292, and the transistor Moreover, the system controller is configured to : in response
280 is turned off and on . 15 to the first signal being determined to be associated with the
As shown in FIG . 3 , the waveform 290 represents the leading - edge TRIAC dimmer, generate a drive signal; and
voltage 212 as a function of time for a leading - edge TRIAC send the drive signal to the second transistor terminal. The
dimmer as the TRIAC dimmer 210 , and the waveform 292 system controller is further configured to : keep the drive
represents the drive signal 282 as a function of time. If the signal at a first logic level to turn on the transistor from a first
rectified output current 260 becomes smaller than the hold - 20 time, the first time being the same or after the starting time;
ing current of the leading - edge TRIAC dimmer as the in response to determining that the first signal satisfies a first
TRIAC dimmer 210 , the drive signal 282 is generated at the condition , start, at a second time,modulating the drive signal
logic high level in order to turn on the transistor 280 and by changing the drive signal between the first logic level and
increase the rectified output current 260 . a second logic level to turn on and off the transistor ; keep
FIG . 4 is a simplified diagram showing some conven - 25 modulating the drive signal for a first predetermined time
tional components of the bleeder as part of the lighting period from the second time to a third time; stop , at the third
system 200 as shown in FIG . 2 . The bleeder 230 includes a time, modulating the drive signal to keep the drive signal at
current detection circuit 310 , a logic control circuit 320, and the second logic level to turn off the transistor ; in response
current sinks 330 and 340. As shown in FIG . 4 , a current 350 to determining that the first signal satisfies a second condi
is configured to follow through a resistor 360 in order to 30 tion , start, at a fourth time, modulating the drive signal by
generate a voltage 370 ( e. g ., V ) . The current 350 equals the changing the drive signal between the first logic level and
rectified output current 260 in magnitude, and the voltage the second logic level to turn on and off the transistor, the
370 represents the magnitude of the current 350. The voltage fourth time being before the ending time; keep modulating
370 is divided by resistors 362 and 364 to generate a voltage the drive signal for a second predetermined time period from
372 (e.g ., V2). The voltage 372 is received by the current 35 the fourth time to a fifth time; and stop, at the fifth time,
detection circuit 310 , which sends detected information to modulating the drive signal to keep the drive signal at the
the logic control circuit 320 . In response , the logic control first logic level to turn on the transistor.
circuit 320 either enables the current sink 330 with a control According to another embodiment, a system controller for
signal 332 or enables the current sink 340 with a control a lighting system includes a first controller terminal config
signal 342. The control signals 332 and 342 are generated by 40 ured to receive a first signal and a transistor including a first
the logic control circuit 320 and are complementary to each transistor terminal, a second transistor terminal, and a third
other. If the current sink 330 is enabled , the current 232 transistor terminal. Additionally, the system controller
received by the bleeder 230 is equal to a current 334; if the includes a second controller terminal coupled to the first
current sink 340 is enabled , the current 232 is equal to a transistor terminal and a third controller terminal coupled to
current 344 . The current 344 is larger than the current 334 45 the third transistor terminal. The system controller is con
in magnitude. figured to determine whether the first signal is associated
Returning to FIG . 2 , the voltage 212 generated by the with a leading - edge TRIAC dimmer based at least in part on
TRIAC dimmer 210 may have waveforms that are not the first signal, the leading - edge TRIAC dimmer being
symmetric between a positive half cycle and a negative half configured to receive an AC input voltage associated with at
cycle of the AC input voltage 214 . This lack of symmetry 50 least a first half cycle , a second half cycle , and a third half
can cause the current that flows through the LEDs 250 to cycle , the first half cycle immediately preceding the second
vary with time; therefore , the LEDs 250 can flicker at a fixed half cycle , the third half cycle following the first half cycle
frequency (e . g ., 50 Hz or 60 Hz). Also , the lighting system and the second half cycle . Moreover, the system controller
200 often has only limited efficiency in energy consumption . is configured to : in response to the first signal being deter
Hence it is highly desirable to improve the techniques of 55 mined to be associated with the leading -edge TRIAC dim
dimming control. mer, generate a drive signal; and send the drive signal to the
second transistor terminal. The system controller is further
3. BRIEF SUMMARY OF THE INVENTION configured to : within the first half cycle , determine a first
time period from a first time when the first signalbecomes
Certain embodiments of the present invention are directed 60 larger than a first threshold to a second time when the first
to integrated circuits. More particularly , some embodiments signal becomes smaller than a second threshold ; within the
of the invention provide a system and method for intelligent second half cycle, determine a second time period from a
control related to TRIAC dimmers by using modulation third time when the first signal becomes larger than the first
signal. Merely by way of example , some embodiments of threshold to a fourth time when the first signal becomes
the invention have been applied to driving light emitting 65 smaller than the second threshold ; and determine a third
diodes (LEDs). But it would be recognized that the invention timeperiod and a fourth time period based at least in part on
has a much broader range of applicability . the first time period and the second time period . The system
US 10 , 264 ,642 B2
controller is further configured to : within the third half cycle, threshold to a fourth time when the first signal becomes
in response to determining that the first signal satisfies a first smaller than the second threshold ; determining a third time
condition , start, at a fifth time, modulating the drive signal period and a fourth time period based at least in part on the
by changing the drive signal between a first logic level and first time period and the second time period; within the third
a second logic level to turn on and off the transistor; keep 5 half cycle, in response to determining that the first signal
modulating the drive signal for the third timeperiod from the satisfies a first condition , starting , at a fifth time,modulating
fifth time; within the third half cycle, in response to deter - the drive signal by changing the drive signal between a first
mining that the first signal satisfies a second condition , start, logic level and a second logic level to turn on and off the
at a sixth time, modulating the drive signalby changing the transistor ; keeping modulating the drive signal for the third
drive signalbetween the first logic level and the second logic 10 time period from the fifth time; within the third half cycle ,
level to turn on and off the transistor ; and keep modulating in response to determining that the first signal satisfies a
the drive signal for the fourth time period from the sixth second condition, starting, at a sixth time, modulating the
time. drive signal by changing the drive signal between the first
According to yet another embodiment, a method for a logic level and the second logic level to turn on and off the
lighting system includes receiving a first signal and deter - 15 transistor ; and keeping modulating the drive signal for the
mining whether the first signal is associated with a leading - fourth time period from the sixth time.
edge TRIAC dimmer based at least in part on the first signal, Depending upon embodiment, one or more benefits may
the leading - edge TRIAC dimmer being configured to be achieved . These benefits and various additional objects,
receive an AC input voltage associated with at least a first features and advantages of the present invention can be fully
half cycle from a starting time to an ending time. Addition - 20 appreciated with reference to the detailed description and
ally , themethod includes : in response to the first signal being accompanying drawings that follow .
determined to be associated with the leading - edge TRIAC
dimmer, generating a drive signal; and sending the drive 4 . BRIEF DESCRIPTION OF THE DRAWINGS
signal to a transistor. The process of in response to the first
signal being determined to be associated with the leading - 25 FIG . 1 shows certain conventional timing diagrams for a
edge TRIAC dimmer, generating a drive signal includes: leading - edge TRIAC dimmer and a trailing- edge TRIAC
keeping the drive signal at a first logic level to turn on the dimmer.
transistor from a first time, the first time being the same or FIG . 2 is a simplified diagram of a conventional lighting
after the starting time; in response to determining that the system that includes a bleeder.
first signal satisfies a first condition, starting, at a second 30 FIG . 3 is a simplified diagram showing certain conven
time, modulating the drive signal by changing the drive tional components of the bleeder as part of the lighting
signal between the first logic level and a second logic level system as shown in FIG . 2.
to turn on and off the transistor ; keeping modulating the FIG . 4 is a simplified diagram showing some conven
drive signal for a first predetermined time period from the tional components of the bleeder as part of the lighting
second time to a third time; stopping, at the third time, 35 system as shown in FIG . 2 .
modulating the drive signal to keep the drive signal at the FIG . 5 is a simplified diagram of a lighting system
second logic level to turn off the transistor; in response to according to an embodiment of the present invention.
determining that the first signal satisfies a second condition , FIG . 6 shows certain timing diagrams for a processing
starting, at a fourth time, modulating the drive signal by component of the system controller as part of the lighting
changing the drive signal between the first logic level and 40 system as shown in FIG . 5 according to an embodiment of
the second logic level to turn on and off the transistor, the the present invention.
fourth time being before the ending time; keeping modulat- FIG . 7 shows certain timing diagrams for two processing
ing the drive signal for a second predetermined time period components and the logic controller and signal generator of
from the fourth time to a fifth time ; and stopping, at the fifth the system controller as part of the lighting system as shown
time, modulating the drive signal to keep the drive signal at 45 in FIG . 5 if the TRIAC dimmer is includes in the lighting
the first logic level to turn on the transistor. system and the TRIAC dimmer is a leading - edge TRIAC
According to yet another embodiment, a method for a dimmer according to an embodiment of the present inven
lighting system includes receiving a first signal and deter - tion .
mining whether the first signal is associated with a leading FIG . 8 shows certain timing diagrams for two processing
edge TRIAC dimmer based at least in part on the first signal, 50 components and the logic controller and signal generator of
the leading - edge TRIAC dimmer being configured to the system controller as part of the lighting system as shown
receive an AC input voltage associated with at least a first in FIG . 5 if the TRIAC dimmer is included in the lighting
half cycle , a second half cycle, and a third half cycle , the first system and the TRIAC dimmer is a leading - edge TRIAC
half cycle immediately preceding the second half cycle , the dimmer according to another embodiment of the present
third half cycle following the first half cycle and the second 55 invention .
half cycle . Additionally , the method includes : in response to
the first signal being determined to be associated with the 5 . DETAILED DESCRIPTION OF THE
leading- edge TRIAC dimmer, generating a drive signal; and INVENTION
sending the drive signal to a transistor. The process of in
response to the first signal being determined to be associated 60 Certain embodiments of the present invention are directed
with the leading - edge TRIAC dimmer, generating a drive to integrated circuits . More particularly, some embodiments
signal includes: within the first half cycle, determining a first of the invention provide a system and method for intelligent
time period from a first time when the first signal becomes control related to TRIAC dimmers by using modulation
larger than a first threshold to a second time when the first signal. Merely by way of example , some embodiments of
signal becomes smaller than a second threshold ; within the 65 the invention have been applied to driving light emitting
second half cycle , determining a second time period from a diodes (LEDs ). But it would be recognized that the invention
third timewhen the first signal becomes larger than the first has a much broader range of applicability .
US 10 , 264 ,642 B2
As discussed earlier, various conventional technologies nism can reliably and automatically detect whether or not a
have been used to detect whether or not a TRIAC dimmer TRIAC dimmer has been included in a lighting system , and
has been included in a lighting system , and if a TRIAC if a TRIAC dimmer is detected to be included in the lighting
dimmer is detected to be included in the lighting system , system , whether the TRIAC dimmer is a leading- edge
whether the TRIAC dimmer is a leading -edge TRIAC dim - 5 TRIAC dimmer or a trailing - edge TRIAC dimmer. For
mer or a trailing - edge TRIAC dimmer. These conventional example , this reliable and automatic detection can help to
technologies have various weaknesses. select appropriate method of dimming control in order to
In one conventional technology, a rectified output voltage improve energy efficiency of the system .
generated by a rectifier is compared with a threshold voltage According to another embodiment, if a TRIAC dimmer is
Vth on in order to determine a turn -on time period Ton . This 10 detected to be included in the lighting system and the
conventional technology , however, often cannot effectively TRIAC dimmer is a leading - edge TRIAC dimmer, the
distinguish the situation where no TRIAC dimmer is intelligent mechanism can provide two separate bursts of
included in a lighting system from the situation where a
trailing - edge TRIAC dimmer is included in a lighting sys modulation signals for each half-cycle of the AC input
tem . In the situation where a trailing - edge TRIAC dimmer is 15 voltage and use these separate bursts ofmodulation signals
included in a lighting system , the voltage generated by the to improve performance and efficiency of a lighting system .
trailing -edge TRIAC dimmer after the dimmer is turned off In one embodiment, one burst of the two separate bursts of
decreases slowly to the threshold voltage Vth on due to modulation signals is used to ensure that a transistor is
charging and / or discharging of one or more capacitors. This modulated between on and off for a sufficiently long period
slow reduction of the voltage makes it difficult to compare 20 of time, so that the current flowing through the TRIAC
the turn - on time period T . ,, and the duration of a half cycle dimmer is not lower than the holding current of the TRIAC
of the AC input voltage ; hence the determination about dimmer. In another embodiment, the other burst of the two
whether a TRIAC dimmer has been included in a lighting separate bursts of modulation signals is used to improve
system and/ or whether a trailing - edge TRIAC dimmer has energy efficiency of dimming control for the lighting system .
been included in a lighting system becomes unreliable. 25 For example, the other burst of the two separate bursts of
In another conventional technology, a rate of change of a modulation signals enables transfer of energy from a capaci
rectified output voltage is used . The rectified output voltage tor to the output, so that the energy stored on the capacitor
is generated by a rectifier, and its rate of change is deter is not consumed through the bleeding mechanism that can
mined by quickly sampling the rectified voltage twice .
Hence this conventional technology needs real-time fast 30 the twoserious
cause heating. In another example, the other burst of
separate bursts of modulation signals reduces the
calculation of rate of change between two successively need for a heat sink for the transistor.
sampled rectified voltage values, and also needs storage of According to another embodiment, the intelligent mecha
various predetermined ranges for the rate of change that
correspond to various phase angles at which these two nism can provide to LEDs a current that is symmetric
sampling actions are taken . Such computation and storage 35 between the positive half cycle and the negative half cycle
often impose significant demand on bit depth of an analog LEDs of an AC input voltage in order to prevent flickering of the
to -digital converter, computational capability of the system , that can be caused by an asymmetric current between
and storage capacity of the system . the positive half cycle and the negative half cycle of the AC
Additionally , referring to FIG . 2 , the current 232 is input voltage.
received by the bleeder 230 . As shown in FIG . 3, if the 40 FIG . 5 is a simplified diagram of a lighting system
rectified output current 260 becomes smaller than the hold according to an embodiment of the present invention . This
ing current of the leading -edge TRIAC dimmer as the diagram is merely an example, which should not unduly
TRIAC dimmer 210 , the drive signal 282 is generated at the limit the scope of the claims. One of ordinary skill in the art
logic high level in order to turn on the transistor 280 and would recognize many variations , alternatives, and modifi
increase the rectified output current 260 . One weakness of 45 cations. The lighting system 400 includes a TRIAC dimmer
this conventional technology as shown in FIGS . 2 and 3 is 410 , a rectifier 420 , one or more LEDs 450 , a diode 452 , a
that the current 232 that flows through the resistor 270 capacitor 454 , a transistor 462, a primary winding 464 , a
generates heat and thus reduces efficiency of the lighting secondary winding 466 , resistors 472 , 474 , 476 , and 478 ,
system 200 . and a system controller 480 . Although the above has been
Also , as shown in FIG . 4 , the magnitude ofthe current 232 50 shown using a selected group of components for the lighting
can change between two different predetermined magni- system 400 , there can be many alternatives , modifications ,
tudes. The current 232 equals the current 334 or the current and variations . For example , the TRIAC dimmer 410 is
344, and the current 344 is larger than the current 334 in removed from the lighting system 400 so that the lighting
magnitude . One weakness of this conventional technology system 400 does not include the TRIAC dimmer 410 .
as shown in FIGS. 2 and 4 is that the currents 334 and 344 55 As shown in FIG . 5 , the TRIAC dimmer 410 receives an
each have a fixed magnitude. If the holding current of the AC input voltage 414 (e.g., Vline ) and generates a voltage
TRIAC dimmer 210 is higher than both the currents 334 and 412 according to one embodiment. For example, the voltage
344 in magnitude , the LEDs 250 may flicker. If the holding 412 is received by the resistor 474 and the rectifier 420 (e. g.,
current of the TRIAC dimmer 210 is lower than the current a full wave rectifying bridge ). In another example, the
344 but higher than the current 334 in magnitude , setting the 60 resistors 474 and 476 in response generate a voltage 424 . In
current 232 equal to the current 334 may cause the LEDs yet another example , the rectifier 420 ( e. g ., a full wave
250 to flicker, but setting the current 232 equal to the current rectifying bridge ) in response generates a rectified output
344 may waster energy and thus lower efficiency of the voltage 422 and a rectified output current 460 . According to
system . another embodiment, the rectifier 420 includes diodes that
Certain embodiments of the present invention provide an 65 are connected at connection nodes 425 , 426 , 427 and 428
intelligentmechanism to match and control a TRIAC dim - respectively, and the capacitor 454 includes capacitor plates
mer. According to one embodiment, the intelligent mecha - 456 and 457 . For example, the connection node 428 and the
US 10 , 264 ,642 B2
10
capacitor plate 456 are connected . In another example, the ( a ) The system controller 480 uses the processing com
connection node 427 and the capacitor plate 457 are biased ponent 492 to detect whether or not the TRIAC dimmer
to the ground voltage . 410 is included in the lighting system 400 , and if the
In one embodiment, the system controller 480 (e. g ., a TRIAC dimmer 410 is detected to be included in the
chip ) includes terminals 482, 484 , 486 , and 488 (e.g ., pins 5 lighting system 400 , whether the TRIAC dimmer 410
482, 484 , 486 , and 488 ), processing components 492 , 494 , is a leading- edge TRIAC dimmer or a trailing - edge
496 , and 498 , a logic controller and signal generator 430 , TRIAC dimmer .
and a transistor 432 . For example , the terminal 482 ( e . g ., the (b ) After the process (a ) as described above , if the process
terminal “ V DET ” ) receives the voltage 424 . In another (a ) determines that the TRIAC dimmer 410 is included
example , the terminal 484 is coupled to the transistor 432 10 in the lighting system 400 and the TRIAC dimmer 410
and the resistor 478 . In yet another example , the terminal is the leading-edge TRIAC dimmer, the system con
486 outputs a control signal 434 to a gate terminal of the troller 480 uses the processing components 494 and
transistor 462 , which also includes a drain terminal and a 496 to perform process (b ) . For example, during the
source terminal. In yet another example , the drain terminal process (b ), the system controller 480 uses the process
of the transistor 462 is connected to the primary winding 15 ing component 494 to perform one or more dimming
464, and the source terminal of the transistor 462 is con control functions with the leading -edge TRIAC dim
nected to the terminal 488. mer. In another example , during the process (b ), the
In another embodiment, the processing components 492 , system controller 480 uses the processing component
494 , 496 , and 498 receive the voltage 424 , and generate 496 to process the voltage 424 that has waveforms not
signals 493 , 495 , 497 , and 499 respectively . For example, 20 symmetric between a positive half cycle and a negative
the signals 493, 495 , 497 , and 499 are received by the logic half cycle of the AC input voltage 414 , so that the
controller and signal generator 430 . In another example , the system controller 480 can provide to the one or more
logic controller and signal generator 430 receives the signal LEDs 450 a current that is symmetric between the
493, the signal 495 , the signal 497, and/ or the signal 499 , positive half cycle and the negative half cycle of the AC
processes information associated with the received signal 25 input voltage 414 . In yet another example , when the
493, the received signal 495 , the received signal 497 , and /or processing components 494 and 496 are performing the
the received signal 499 , generates a signal 436 based on at process (b ) , the logic controller and signal generator
least information associated with the received signal 493 , 430 generates the signal 436 based on at least infor
the received signal 495 , the received signal 497 , and /or the mation associated with the received signal 495 and the
received signal 499 , and outputs the signal 436 to a gate 30 received signal 497 but not based on information
terminal of the transistor 432 . associated with the received signal 499. In yet another
In yet another example , the transistor 432 also includes a example, when the processing components 494 and 496
drain terminal and a source terminal. In yet another example , are performing the process (b ), the processing compo
the drain terminal of the transistor 432 is connected to the nent 498 does not function .
source terminal of the transistor 462 through the terminal 35 ( c ) After the process (a ) as described above , if the process
488, and the source terminal of the transistor 432 is con (a ) determines the TRIAC dimmer 410 is included in
nected to the resistor 478 . In yet another example , when the the lighting system 400 and the TRIAC dimmer 410 is
transistors 462 and 432 are both turned on , a current flows the trailing -edge TRIAC dimmer, the system controller
from the primary winding to the resistor 478 through the 480 uses the processing component 498 to perform
transistor 462, the terminal 488 , the transistor 432 , and the 40 process (C ). For example , during the process ( c ), the
terminal 484 . In yet another example , the current that flows processing component 498 performs one or more dim
through the resistor 478 generates a voltage 479 , which is ming control functions with the trailing -edge TRIAC
received by the terminal 484 . dimmer. In another example , when the processing
In yet another embodiment, the processing component component498 is performing the process ( c ), the logic
492 is configured to detect whether or not the TRIAC 45 controller and signal generator 430 generates the signal
dimmer 410 is included in the lighting system 400 , and if the 436 based on at least information associated with the
TRIAC dimmer 410 is detected to be included in the lighting received signal 499 but not based on information
system 400 , whether the TRIAC dimmer 410 is a leading associated with the received signal 495 and the
edge TRIAC dimmer or a trailing - edge TRIAC dimmer. For received signal 497 . In yet another example, when the
example , the processing component 494 is configured to 50 processing component 498 is performing the process
perform one or more dimming control functions if the (c ), the processing components 494 and 496 do not
TRIAC dimmer 410 is detected to be included in the lighting function .
system 400 and the TRIAC dimmer 410 is a leading -edge According to certain embodiments, if the process (a )
TRIAC dimmer. In another example , the processing com - determines the TRIAC dimmer 410 is included in the
ponent 498 is configured to perform one or more dimming 55 lighting system 400 and the TRIAC dimmer 410 is the
control functions if the TRIAC dimmer 410 is detected to be trailing -edge TRIAC dimmer , the processing component
included in the lighting system 400 and the TRIAC dimmer 498 receives the voltage 424 and generates the signal 499
410 is a trailing- edge TRIAC dimmer. In another example , based at least in part on the voltage 424 , and the logic
the processing component 496 is configured to process the controller and signal generator 430 receives the signal 499
voltage 424 that has waveforms not symmetric between a 60 and generates the signal 436 based at least in part on the
positive half cycle and a negative half cycle of the AC input received signal 499 . For example , if the voltage 424
voltage 414 , so that the system controller 480 can provide to increases and becomes larger than a reference voltage , a
the one or more LEDs 450 a current that is symmetric modulation signal ( e. g., a pulse -width -modulation signal) is
between the positive half cycle and the negative half cycle generated as the signal 436 to turn on and off the transistor
of the AC input voltage 414 . 65 432 , until the voltage 424 becomes smaller than the refer
In yet another embodiment, the following processes ( a ), ence voltage. In another example , if the voltage 424
(b ), and (c ) are performed : becomes smaller than the reference voltage, the signal 436
US 10 ,264 ,642 B2
11 12
is kept at the logic low level to turn off the transistor 432 According to one embodiment, if the detected rising time
until the voltage 424 becomes larger than the reference (e.g., T _ rise) is equal to or approximately equal to the
voltage again . According to some embodiments , during the detected falling time (e . g ., T _ fall), the processing compo
processes (a ), ( b ), and ( c ), the control signal 434 is kept at nent 492 determines that the TRIAC dimmer 410 is not
the logic high level. For example , the control signal 434 is 5 included in the lighting system 400 . According to another
kept at the logic high level, and the transistor 462 is turned embodiment, if the detected rising time (e .g ., T _ rise) is
on when the transistor 432 is turned on . smaller than the detected falling time ( e. g ., T _ fall), the
As discussed above and further emphasized here , FIG . 5 processing component 492 determines that the TRIAC dim
is merely an example , which should not unduly limit the mer 410 is included in the lighting system 400 and the
scope of the claims. One of ordinary skill in the art would 10 TRIAC dimmer 410 is a leading -edge TRIAC dimmer . For
recognize many variations, alternatives , and modifications . example , for the leading - edge TRIAC dimmer, the voltage
In one embodiment, the TRIAC dimmer 410 is removed 424 increases rapidly so that the detected rising time ( e.g.,
from the lighting system 400 , so that the lighting system 400
does not include the TRIAC dimmer 410 and the rectifier T _ rise ) is approximately equal to zero . In another example ,
420 directly receives the AC input voltage 414 and generates 15 comparing the detected rising time ( e . g ., T _ rise ) and the
the rectified output voltage 422 and the rectified output detected falling time ( e.g ., T _ fall ) can reliably detect
current 460 . In another embodiment, one or more compo whether or not the TRIAC dimmer 410 in the lighting
nents (e . g ., one component, two components, or three com system 400 is a leading-edge TRIAC dimmer. According to
ponents ) of the processing components 492 , 494 , 496 , and yet another embodiment, if the detected rising time (e .g .,
498 are removed from the system controller 480 . 20 T _ rise ) is larger than the detected falling time ( e. g., T _ fall),
As shown in FIG . 5 , immediately after the lighting system the processing component 492 determines that the TRIAC
400 is turned on , the system controller 480 uses the pro dimmer 410 is included in the lighting system 400 and the
cessing component 492 to first detect whether or not the TRIAC dimmer 410 is a trailing - edge TRIAC dimmer. For
TRIAC dimmer 410 is included in the lighting system 400 , example , for the trailing -edge TRIAC dimmer, the voltage
and if the TRIAC dimmer 410 is detected to be included in 25 424 decreases slowly due to charging and /or discharging of
the lighting system 400 , whether the TRIAC dimmer 410 is one or more capacitors so that the detected falling time (e.g .,
a leading -edge TRIAC dimmer or a trailing - edge TRIAC T _ fall) is not approximately equal to zero . In another
dimmer, according to certain embodiments . For example , example , comparing the detected rising time ( e .g ., T _ rise )
the processing component 492 uses the received voltage 424 and the detected falling time ( e .g ., T _ fall) can reliably
to detect a rising time period (e.g., T _ rise ) during which the 30 distinguish the situation where the TRIAC dimmer 410 is
voltage 424 increases from a lower threshold voltage (e.g., not included in the lighting system 400 from the situation
Vth _ off) to a higher threshold voltage ( e. g., Vth _ on ) and to where the TRIAC dimmer 410 in the lighting system 400 is
detect a falling time period (e .g., T _ fall ) during which the a trailing - edge TRIAC dimmer .
voltage 424 decreases from the higher threshold voltage According to certain embodiments , where AT is a prede
( e. g., Vth _ on ) to the lower threshold voltage (e .g ., Vth _ off ). 35 termined threshold ,
In another example, the processing component 492 com (i) if IT _ rise _ T _ fall SAT, the processing component 492
pares the detected rising time (e.g ., T _ rise ) and the detected determines that the TRIAC dimmer 410 is not included
falling time (e .g ., T _ fall ) to determine whether or not the in the lighting system 400 ;
TRIAC dimmer 410 is included in the lighting system 400, ( ii ) if T _ fall - T _ rise > AT, the processing component 492
and if the TRIAC dimmer 410 is determined to be included 40 determines that the TRIAC dimmer 410 is included in
in the lighting system 400 , whether the TRIAC dimmer 410 the lighting system 400 and the TRIAC dimmer 410 is
is a leading - edge TRIAC dimmer or a trailing -edge TRIAC a leading - edge TRIAC dimmer; and
dimmer. ( iii ) if T _ rise - T _ fall > AT, the processing component 492
FIG . 6 shows certain timing diagrams for the processing determines that the TRIAC dimmer 410 is included in
component 492 of the system controller 480 as part of the 45 the lighting system 400 and the TRIAC dimmer 410 is
lighting system 400 as shown in FIG . 5 according to an a trailing -edge TRIAC dimmer .
embodiment of the present invention . These diagrams are In one embodiment, after the processing component 492
merely examples, which should not unduly limit the scope has detected that the TRIAC dimmer 410 is included in the
of the claims. One of ordinary skill in the art would lighting system 400 and also determined that the TRIAC
recognize many variations, alternatives, and modifications. 50 dimmer 410 is a leading -edge TRIAC dimmer, the system
In one embodiment, the waveform 510 represents the controller 480 uses the processing component 494 to per
voltage 424 as a function of time during a half cycle of the form one or more dimming control functions with the
AC input voltage 414 ( e . g ., Vlind ) if the lighting system 400 leading -edge TRIAC dimmer , and also uses the processing
does not include the TRIAC dimmer 410 . For example, the component 496 to process the voltage 424 that has wave
lighting system 400 does not include the TRIAC dimmer 55 forms not symmetric between a positive half cycle and a
410 , and the rectifier 420 directly receives the AC input negative half cycle of the AC input voltage 414 so that the
voltage 414 and generates the rectified output voltage 422 system controller 480 can provide to the one or more LEDs
and the rectified output current 460. In another embodiment, 450 a current that is symmetric between the positive half
the waveform 520 represents the voltage 424 as a function cycle and the negative half cycle of the AC input voltage
of time during a half cycle of the AC input voltage 414 ( e.g ., 60 414 .
Vline) if the lighting system 400 includes the TRIAC dimmer In another embodiment, after the processing component
410 and the TRIAC dimmer 410 is a leading - edge TRIAC 492 has detected that the TRIAC dimmer 410 is included in
dimmer. In yet another embodiment, the waveform 530 the lighting system 400 and also determined that the TRIAC
represents the voltage 424 as a function of time during a half dimmer 410 is a trailing -edge TRIAC dimmer , the system
cycle of the AC input voltage 414 (e.g ., Vline ) if the lighting 65 controller 480 uses the processing component 498 to per
system 400 includes the TRIAC dimmer 410 and the TRIAC form one or more dimming control functions with the
dimmer 410 is a trailing - edge TRIAC dimmer. trailing- edge TRIAC dimmer.
US 10 , 264 ,642 B2
13 14
FIG . 7 shows certain timing diagrams for the processing level and a logic low level as shown by the waveform 640 .
components 494 and 496 and the logic controller and signal For example , the time duration from time tz to time t , is
generator 430 of the system controller 480 as part of the equal to T . In another example, the time duration T , is
lighting system 400 as shown in FIG . 5 if the TRIAC determined previously by the processing component 494 . In
dimmer 410 is includes in the lighting system 400 and the 5 yet another example , from time tz to time ta , the energy is
TRIAC dimmer 410 is a leading - edge TRIAC dimmer transferred from the primary winding 464 to the secondary
according to an embodiment of the present invention . These winding 466 , which provides the transferred energy to the
diagrams are merely examples , which should not unduly one or more LEDs 450 .
limit the scope of the claims. One of ordinary skill in the art According to one embodiment, at time ta , the signal 436
would recognize many variations, alternatives, and modifi- 10 is set at the logic low level, and from time t , to time ta , the
cations. According to some embodiments, the waveform 610 signal 436 remains at the logic low level as shown by the
represents the voltage 424 as a function of time, the wave - waveform 640 . For example , time ts represents the time
form 620 represents the voltage 422 as a function of time, when the processing component 496 determines the decreas
the waveform 630 represents the current 460 as a function of ing voltage 424 becomes equalto the threshold voltage ( e. g .,
time, and the waveform 640 represents the signal 436 as a 15 V ) as shown by the waveform 610 . In another example , the
function of time. time duration from time t, to time t , is equal to T , . In yet
As shown in FIGS. 5 and 7 , the processing components another example , during the time duration T2, the transistor
494 and 496 receive the voltage 424 , process information 432 remains turned off. In yet another example , during the
associated with the voltage 424 , generate the signals 495 and time duration T2, no sufficient current flows through the
497 based at least in part on the voltage 424 , and output the 20 TRIAC dimmer 410 and the TRIAC dimmer 410 is turned
signals 495 and 497 to the logic controller and signal off, as shown by the waveform 630 .
generator 430 according to certain embodiments. For A ccording to another embodiment, the processing com
example, the logic controller and signal generator 430 ponent 496 detects that the voltage 424 becomes smaller
generates the signal 436 based on at least information than the threshold voltage ( e .g ., Vth ) at time tz as shown by
associated with the received signal 495 and the received 25 the waveform 610 . For example , at time t , the signal 436
signal 497 . In another example , the logic controller and becomes the modulation signal ( e . g ., the pulse -width -modu
signal generator 430 outputs the signal 436 to the gate lation signal) as shown by the waveform 640 .
terminal of the transistor 432 . In one embodiment, from time t, to time t , the signal 436
As shown in FIG . 7 , the time duration from timet, to time is a modulation signal ( e . g ., a pulse -width -modulation sig
to represents a half cycle of the AC input voltage 414 30 nal), which changes between the logic high level and the
according to certain embodiments . For example, the time logic low level as shown by the waveform 640 . For example ,
duration for the half cycle of the AC input voltage 414 is the time duration from time ts to time t, is equal to Tz. In
represented by Ty . In another example , during the time another example, the time duration Tz is determined previ
duration Th ,the voltage 424 has a pulse width Tp from time ously by the processing component 494. In yet another
ty to time to, as shown by the waveform 610 . 35 example , during the time duration T3 , the energy is trans
In one embodiment, from time to to time t , the TRIAC ferred from the capacitor 454 to the secondary winding 466
dimmer 410 is turned off as shown by the waveform 610 and through the primary winding 464 , and the secondary wind
the signal 436 is a modulation signal ( e. g ., a pulse -width - ing 466 provides the transferred energy to the one or more
modulation signal), which changes between a logic high LEDs 450 . In yet another example, during the time duration
level and a logic low level as shown by the waveform 640 . 40 T3, the voltage 422 of the capacitor 454 drops to zero (e.g.,
For example , time t, is delayed from time to by a time at or after time to but before time ty ) as shown by the
duration T, (e.g ., T, being equal to or larger than zero in waveform 620.
magnitude ). In another embodiment, time t , is delayed from time to by
In another embodiment, from time ti to time t2 , the the time duration T , (e.g., T , being equal to or larger than
TRIAC dimmer 410 is turned off as shown by the waveform 45 zero in magnitude ). For example , the time duration T ,, is
610 and the signal 436 is set at the logic high level as shown equal to the time duration Tr. In another example , the time
by the waveform 640. For example, from time t, to time tz, duration T , is not equal to the time duration Tr. In yet
the transistor 432 is turned on . In another example , from another example , the time duration from time to to time t , is
time t, to time ty, the TRIAC dimmer 410 is turned off , the equal to the time duration from time to to time t , and the
voltage 422 is close to the ground voltage , and limited 50 signal 436 from time to to time t , is the same as the signal
energy is consumed by the transistors 432 and 462 . 436 from time to to time tj .
In yet another embodiment, the processing component As shown in FIG . 7 , a half cycle of the AC input voltage
496 detects that the voltage 424 becomes larger than a 414 is represented by a time duration T , according to one
threshold voltage (e. g., Vin ) at time tz as shown by the embodiment. For example, the time duration from time to to
waveform 610 , and determines that the TRIAC dimmer 410 55 time to is equal to the half cycle Ty of the AC input voltage
becomes turned on at time tz . In yet another embodiment, at 414 . According to another embodiment, a pulse width of the
time tz, the signal 436 becomes a modulation signal (e .g ., a voltage 424 is represented by a time duration Tp. For
pulse -width -modulation signal) as shown by the waveform example , the time duration from time t, to time to is equal to
640 . For example, time tz is delayed from time tz by a time the pulse width Tp of the voltage 424
duration T , ( e . g ., T , being equal to or larger than zero in 60 According to yet another embodiment, as shown by the
magnitude). In another example, during the timeduration Tc waveform 610 , the voltage 424 becomes larger than the
the signal 436 remains at the logic high level as shown by threshold voltage ( e. g ., Vih ) at time t , and becomes smaller
the waveform 640. In yet another example , the time duration than the threshold voltage (e.g ., Vin ) at time ts . For example ,
from time t, to time tz is represented by To . the time duration from time t? to time tz is represented by Tj.
In yet another embodiment, from time tz to time t4, the 65 In another example ,
signal 436 is a modulation signal ( e . g ., a pulse -width
modulation signal), which changes between the logic high Tj= Tx + T1+ T2 (Equation 1 )
US 10 ,264,642 B2
15 16
where T , represents the time duration from time t, to time ts. modulation signal during the time duration T , as shown by
Additionally, T represents the time duration from t , to tz, T . the waveform 640 and the burst of modulation signal during
represents the time duration from time tz to time ty , and T2 the time duration Tz as shown by the waveform 640 ) for
represents the time duration from t4 to ts. each half-cycle of the AC input voltage ( e. g., the half cycle
According to yet another embodiment, the time duration 5 Ty of the AC input voltage 414 as shown by the waveform
from time ta to time t , is equal to the time duration from time 610 ) according to certain embodiments.
to to time ty , and the signal 436 from time to to time t , is the For example, for a specific half-cycle of the AC input
same as the signal 436 from time to to time tj. For example , voltage (e. g ., the half cycle Ty of the AC input voltage 414 ),
at time t , similar to at time t , the signal 436 is set at the the beginning of the burst of modulation signal during the
logic high level. In another example , the signal 436 remains 10 time duration T , is determined by the processing component
at the logic high level until a later time ( e . g ., similar to time 496 , and the beginning of the burst of modulation signal
tz). In yet another example , the later time (e .g ., similar to during the time duration Tz is also determined by the
time tz ) is delayed , by the time duration T , ( e . g ., T , being processing component 496 . In another example , the magni
equal to or larger than zero in magnitude), from a time (e .g., tude of the time duration T , for the burst of modulation
similar to time t , when the processing component 496 15 signal is previously determined by the processing compo
determines that the TRIAC dimmer 410 becomes turned on . nent 494 , and the magnitude of the time duration T? for the
As shown in FIG . 7 , the processing component 496 burst of modulation signal is also previously determined by
detects that the voltage 424 becomes larger than the thresh - the processing component 494 .
old voltage ( e. g ., Vin ) at time t, as shown by the waveform As shown in FIG . 7 , the processing component 494
610 according to certain embodiments. For example, after 20 detects that the voltage 424 becomes larger than the thresh
the predetermined delay of the time duration Tc ( e.g .T, o ld voltage (e .g ., Vth ) at time t , and detects that the voltage
being equal to or larger than zero in magnitude ), the signal 424 becomes smaller than the threshold voltage (e. g ., Vth ) at
436 becomes a modulation signal ( e.g ., a pulse -width time tz as shown by the waveform 610 according to some
modulation signal) at time tz , as shown by the waveform embodiments . For example , the processing component 494
640. In another example , during the time duration T , the 25 determines the magnitude of the time duration T , from time
signal 436 is a modulation signal (e. g ., a pulse -width - tz to time tz for the half cycle of the AC input voltage 414
modulation signal), which changes between the logic high from time to to time to .
level and the logic low level as shown by the waveform 640 . In one embodiment, the processing component 494 pre
In yet another example , the time duration T , is determined viously determines the magnitude of the time duration T , for
previously by the processing component 494 . 30 a previous half cycle of the AC input voltage 414 that ends
Also , as shown in FIG . 7 , the processing component 496 at time to . For example , the time duration T , for the previous
detects that the voltage 424 becomes smaller than the half cycle of the AC input voltage 414 that ends at time to
threshold voltage ( e . g ., V . ) at time ts as shown by the is represented by Typ . In another embodiment, the process
waveform 610 according to some embodiments. For ing component 494 also previously determines the magni
example , at time t , the signal 436 becomes a modulation 35 tude of the time duration T , for another previous half cycle
signal ( e.g ., a pulse -width -modulation signal) as shown by of the AC input voltage 414 , which immediately proceeds
the waveform 640 . In another example, during the time the previous half cycle of the AC input voltage 414 that ends
duration T3, the signal 436 is a modulation signal (e. g., a at timeto. For example , the time duration T , for the another
pulse -width -modulation signal), which changes between the previous half cycle of the AC input voltage 414 is repre
logic high level and the logic low level as shown by the 40 sented by Tyv. In yet another embodiment, the voltage 424
waveform 640 . In yet another example , the time duration Tz has waveforms not symmetric between a positive half cycle
is determined previously by the processing component 494 . and a negative half cycle of the AC input voltage 414 , and
In one embodiment , the processing component 494 pre - the magnitude of the time duration To is not equal to the
viously determines the magnitude of the time duration Ti magnitude of the time duration Tyy .
and the magnitude of the time duration Tz . In another 45 According to one embodiment, the processing component
embodiment, the processing component 496 determines the 494 processes information associated with the time duration
beginning time tz of the time duration T , for the modulation Tjo and the time duration Tjy to determine the magnitude of
signalby deciding time tz, and also determines the beginning the time duration T , and the magnitude of the time duration
time ts of the time duration T , for the modulation signal by T? for the half cycle of the AC input voltage 414 from time
deciding time ts. For example , time tz is delayed from time 50 t, to time to. For example, the processing component 494
tz by the predetermined time duration Tx ( e. g., Tx being equal compares the time duration Tjo and the time duration TjV
to or larger than zero in magnitude). and , if the magnitude of the time duration To is not equal
In yet another embodiment, the processing component to the magnitude of the time duration Ty , uses the smaller
496 is configured to process the voltage 424 that has time duration to determine the magnitude of the time dura
waveforms not symmetric between a positive half cycle and 55 tion T , and the magnitude of the time duration T , for the half
a negative half cycle of the AC input voltage 414 , so that the cycle of the AC input voltage 414 from time to to time to . In
system controller 480 can provide to the one or more LEDs another example , the processing component 494 compares
450 a current that is symmetric between the positive half the time duration Tjo and the time duration Tjy and, if the
cycle and the negative half cycle of the AC input voltage 414 magnitude of the time duration Tjo is equal to the magnitude
according to some embodiments . 60 of the time duration Tyv , uses either the time duration Toor
As shown in FIG . 7 , if a TRIAC dimmer is detected to be the time duration Tyy to determine the magnitude of the time
included in the lighting system and the TRIAC dimmer is a duration T , and the magnitude of the time duration Tz for the
leading -edge TRIAC dimmer, the processing components half cycle of the AC input voltage 414 from time to to time
494 and 496 outputs the signals 495 and 497 to the logic to
controller and signal generator 430 , and in response, the 65 In yet another example , the processing component 494
logic controller and signal generator 430 generates two compares the time duration Two and the time duration T ,
separate bursts of modulation signals ( e .g ., the burst of and uses the larger time duration to determine the magnitude
US 10 ,264,642 B2
17 18
of the time duration T , and the magnitude of the time 410 is the leading- edge TRIAC dimmer, the logic controller
duration Tz for the half cycle of the AC input voltage 414 and signal generator 430 receives the signal 495 from the
from time to to time to. In yet another example , the process processing component 494 , receives the signal 497 from the
ing component 494 calculates the average duration of the processing component 496 , and generates the signal 436
time duration Tyo and the time duration Tyy and uses the 5 based on at least information associated with the received
average duration to determine the magnitude of the time signal 495 and the received signal 497 .
duration T , and themagnitude of the time duration Tz for the According to some embodiments, the processing compo
half cycle of the AC input voltage 414 from time to to time nent 496 is configured to work with the processing compo
nent 494 through the logic controller and signal generator
According to some embodiments , the separate bursts of 10 430 . For example , the processing component 494 performs
modulation signals ( e. g ., the burst of modulation signal one or more dimming control functions with the leading
during the time duration T , as shown by the waveform 640 edge TRIAC dimmer as shown in FIG . 7 . In another
and the burst ofmodulation signal during the time duration example , the processing component 496 processes the volt
Tz as shown by the waveform 640) are used to improve age 424 that has waveforms not symmetric between a
performance and efficiency of a lighting system ( e . g ., the 15 positive half cycle and a negative half cycle of the AC input
lighting system 400 ). In one embodiment, one burst of the voltage 414 , so that the system controller 480 can provide to
two separate bursts of modulation signals ( e.g ., the burst of the one or more LEDs 450 a current that is symmetric
modulation signal during the time duration T , as shown by between the positive half cycle and the negative half cycle
the waveform 640 ) is used to ensure that a transistor ( e. g ., of the AC input voltage 414 as shown in FIG . 7 .
the transistor 432 ) is modulated between on and off for a 20 As shown in FIG . 8 , four half cycles of the AC input
sufficiently long period of time, so that the current flowing voltage 414 are represented by TH , TH , THc, and Tud
through the TRIAC dimmer ( e.g ., the TRIAC dimmer 410 ) respectively according to certain embodiments . For
is not lower than the holding current of the TRIAC dimmer. example, as shown by the waveform 610 , the voltage 424
In another embodiment, the other burst of the two separate has a pulse width Tra during the half cycle Tua of the AC
bursts of modulation signals (e . g ., the burst of modulation 25 input voltage 414 , has a pulse width Tp during the half
signalduring the timeduration Tz as shown by the waveform cycle Tub of the AC input voltage 414 , has a pulse width Tpc
640) is used to improve energy efficiency of dimming during the half cycle Tye of the AC input voltage 414 , and
control for the lighting system (e .g., the lighting system has a pulse width Ted during the half cycle Tha of the AC
400) . For example , the other burst of the two separate bursts input voltage 414 . In another example , the pulse width The
of modulation signals ( e. g., the burst of modulation signal 30 is equal to the pulse width Tpe, and the pulse width Tph is
during the time duration T? as shown by the waveform 640 ) equal to the pulse width Tpt. In yet another example, each
enables transfer of energy from a capacitor (e.g., the capaci pulse width of the pulse width Tpa and the pulse width TPC
tor 454 ) to the output ( e. g ., to the one ormore LEDs 450. In is smaller than each pulse width of the pulse width Tph and
another example , the other burst of the two separate bursts the pulse width Tpd .
of modulation signals (e. g., the burst of modulation signal 35 In one embodiment, the voltage 424 during the half cycle
during the time duration Tz as shown by the waveform 640 ) Tua of the AC input voltage 414 as shown by the waveform
removes the need for adding any heat sink for the transistor 710 is similar to the voltage 424 during the half cycle Ty of
( e . g ., the transistor 432 ). the AC input voltage 414 as shown by the waveform 610 .
As discussed above and further emphasized here , FIG . 7 For example, each of the time duration of Tx and the time
is merely an example , which should not unduly limit the 40 duration of T ,, is equal to zero . In another embodiment, TpQ
scope of the claims. One of ordinary skill in the art would represents the pulse width of the voltage 424 during the half
recognize many variations, alternatives , and modifications. cycle Tha of the AC input voltage 414 as shown by the
For example , time t , is the same as time to with the time waveform 710 . For example , the pulse width TP , is similar
duration of T ,,being equal to zero , time tz is the same as time to the pulse width Tp as shown in FIG . 7 .
t , with the time duration of T , being equal to zero , and time 45 In yet another embodiment, T . , represents a time duration
t , is the same as time to with the time duration of T ,, being during which the signal 436 is at a logic high level as shown
equal to zero . In another example , time t , precedes time to , by the waveform 740 , T , represents a time duration during
and time t , precedes time to . In yet another example , the which the signal 436 is a modulation signal ( e . g ., a pulse
threshold voltage used by the processing component 496 to width -modulation signal) that changes between the logic
determine time t , is not equal to the threshold used by the 50 high level and a logic low level as shown by the waveform
processing component 496 to determine time tz . 740 , T2 , represents a time duration during which the signal
FIG . 8 shows certain timing diagrams for the processing 436 is at the logic low level as shown by the waveform 740 ,
components 494 and 496 and the logic controller and signal and T3a represents a time duration during which the signal
generator 430 of the system controller 480 as part of the 436 is a modulation signal (e .g ., a pulse -width -modulation
lighting system 400 as shown in FIG . 5 if the TRIAC 55 signal) that changes between the logic high level and the
dimmer 410 is included in the lighting system 400 and the logic low level as shown by the waveform 740 . For example ,
TRIAC dimmer 410 is a leading -edge TRIAC dimmer the time duration Toa is similar to the time duration To as
according to another embodiment of the present invention . shown in FIG . 7 , the time duration T , is similar to the time
These diagrams are merely examples, which should not duration T , as shown in FIG . 7, the time duration Tz, is
unduly limit the scope of the claims. One of ordinary skill 60 similar to the time duration T , as shown in FIG . 7 , and the
in the art would recognize many variations, alternatives, and time duration T2 , is similar to the time duration T? as shown
modifications. Waveform 710 represents the voltage 424 as in FIG . 7 .
a function of time, and waveform 740 represents the signal According to one embodiment, the processing component
436 as a function of time. 496 determines the beginning time of the time duration T .
According to certain embodiments , if the processing 65 for the modulation signal by deciding the time when the
component 492 determines that the TRIAC dimmer 410 is voltage 424 becomes larger than the threshold voltage ( e . g .,
included in the lighting system 400 and the TRIAC dimmer Vth ) as shown by the waveform 710 , and also determines the
US 10 , 264 ,642 B2
19 20
beginning time of the time duration T3, for the modulation when the voltage 424 becomes larger than the threshold
signal by deciding the time when the voltage 424 becomes voltage (e . g ., V - ) to the time when the voltage 424 becomes
smaller than the threshold voltage (e. g ., Vth ) as shown by the smaller than the threshold voltage (e. g., Vin ) as shown by the
waveform 710 . According to another embodiment, the mag - waveform 710. For example , the time duration T , is similar
nitude of the time duration T , for the modulation signal and 5 to the time duration T , as shown in FIG . 7 . In another
the magnitude of the time duration Tz, for the modulation example , the time duration T7 is used by the processing
signal are previously determined by the processing compo component 494 to determine the time durations of two
nent 494 . separate bursts of modulation signals for the half cycle The
According to yet another embodiment, during the half of the AC input voltage 414 , and is also used by the
cycle Tua of the AC input voltage 414 , the processing 10 processing component 494 to determine the time durations
component 494 determines a timeduration Ty, from the time of two separate bursts of modulation signals for the half
when the voltage 424 becomes larger than the threshold cycle Tug of the AC input voltage 414 .
voltage (e.g ., Vih ) to the timewhen the voltage 424 becomes In one embodiment, the voltage 424 during the half cycle
smaller than the threshold voltage (e. g ., Vth) as shown by the The of the AC input voltage 414 as shown by the waveform
waveform 710 . For example , the timeduration Ty, is similar 15 710 is similar to the voltage 424 during the half cycle Ty of
to the time duration T , as shown in FIG . 7 . In another the AC input voltage 414 as shown by the waveform 610 .
example, the time duration Tja is used by the processing For example , each of the time duration of Tr and the time
component 494 to determine the time durations of two duration of T ,, is equal to zero . In another embodiment, Tpe
separate bursts of modulation signals for the half cycle Ty represents the pulse width of the voltage 424 during the half
of the AC input voltage 414 , and is also used by the 20 cycle The of the AC input voltage 414 as shown by the
processing component 494 to determine the time durations waveform 710 . For example , the pulse width Tpe is similar
of two separate bursts of modulation signals for the half to the pulse width T , as shown in FIG . 7 .
cycle The of the AC input voltage 414 . In yet another embodiment, Toc represents a timeduration
In one embodiment, the voltage 424 during the half cycle during which the signal 436 is at a logic high level as shown
Ty of the AC input voltage 414 as shown by the waveform 25 by the waveform 740, T represents a time duration during
710 is similar to the voltage 424 during the half cycle Th of which the signal 436 is a modulation signal (e. g., a pulse
the AC input voltage 414 as shown by the waveform 610 . width -modulation signal) that changes between the logic
For example , each of the time duration of T , and the time high level and the logic low level as shown by the waveform
duration of T , is equal to zero . In another embodiment, TP 740, T2, represents a time duration during which the signal
represents the pulse width of the voltage 424 during the half 30 436 is at the logic low level as shown by the waveform 740 ,
cycle Ty of the AC input voltage 414 as shown by the and Tze represents a time duration during which the signal
waveform 710 . For example, the pulse width Tp is similar 436 is a modulation signal ( e .g ., a pulse -width -modulation
to the pulse width Tp as shown in FIG . 7 . signal) that changes between the logic high level and the
In yet another embodiment, Ton represents a time duration logic low level as shown by the waveform 740 . For example ,
during which the signal 436 is at a logic high level as shown 35 the time duration To is similar to the time duration To as
by the waveform 740, T1 , represents a time duration during shown in FIG . 7 , the time duration Ti is similar to the time
which the signal 436 is a modulation signal ( e.g., a pulse duration T , as shown in FIG . 7 , the time duration Tze is
width -modulation signal) that changes between the logic similar to the time duration T , as shown in FIG . 7, and the
high level and the logic low level as shown by the waveform time duration Tz, is similar to the time duration Tz as shown
740, T2, represents a time duration during which the signal 40 in FIG . 7 .
436 is at the logic low level as shown by the waveform 740 , According to one embodiment, the processing component
and Tz, represents a time duration during which the signal 496 determines the beginning time of the time duration T
436 is a modulation signal ( e . g ., a pulse - width -modulation for the modulation signal by deciding the time when the
signal) that changes between the logic high level and the voltage 424 becomes larger than the threshold voltage ( e. g.,
logic low level as shown by the waveform 740 . For example , 45 V ) as shown by the waveform 710 , and also determines the
the time duration Tob is similar to the time duration To as beginning time of the time duration Tze for the modulation
shown in FIG . 7, the time duration T16 is similar to the time signal by deciding the time when the voltage 424 becomes
duration T , as shown in FIG . 7, the time duration T26 is smaller than the threshold voltage (e. g., Vin ) as shown by the
similar to the time duration T , as shown in FIG . 7 , and the waveform 710 .
time duration T3b is similar to the time duration T? as shown 50 According to another embodiment, the magnitude of the
in FIG . 7 . time duration Ti, for the modulation signal and the magni
According to one embodiment, the processing component tude of the time duration Tze for the modulation signal are
496 determines the beginning time of the time duration T16 previously determined by the processing component 494 .
for the modulation signal by deciding the time when the For example , the processing component 494 compares the
voltage 424 becomes larger than the threshold voltage ( e . g ., 55 time duration T , and the time duration T , and uses the
V ) as shown by the waveform 710 , and also determines the smaller time duration ( e. g ., the time duration Tja ) to deter
beginning time of the time duration T3b for the modulation mine the magnitude of the time duration Tle and the mag
signal by deciding the time when the voltage 424 becomes nitude of the time duration Tze for the half cycle The of the
smaller than the threshold voltage (e. g., Vth) as shown by the AC input voltage 414 . In another example , the processing
waveform 710 . According to another embodiment, the mag - 60 component 494 compares the time duration T ,, and the time
nitude of the time duration T , for the modulation signal and duration T7, and uses the larger time duration (e . g ., the time
the magnitude of the time duration T36 for the modulation duration Tyb ) to determine the magnitude of the time dura
signal are previously determined by the processing compo - tion Tle and the magnitude of the time duration Tze for the
nent 494 half cycle Thc of the AC input voltage 414 . In yet another
According to yet another embodiment, during the half 65 example , the processing component 494 calculates the aver
cycle Tub of the AC input voltage 414 , the processing age duration of the time duration Tja and the time duration
component 494 determines a time duration Tgh from the time Tyh and uses the average duration to determine the magni
US 10 , 264 ,642 B2
21 22
tude of the time duration Tie and the magnitude of the time half cycle Tag of the AC input voltage 414 . In yet another
duration Tz. for the half cycle Tue of the AC input voltage example , the processing component 494 calculates the aver
414 . age duration of the time duration T , and the time duration
According to yet another embodiment, during the half Tyc and uses the average duration to determine the magni
cycle Tq . of the AC input voltage 414 , the processing 5 tude of the time duration Tld and the magnitude of the time
component 494 determines a time duration Tye from the time duration Tz , for the half cycle Ty of the AC input voltage
when the voltage 424 becomes larger than the threshold 414 .
voltage ( e . g ., V +b ) to the time when the voltage 424 becomes According to yet another embodiment, during the half
smaller than the threshold voltage ( e. g ., Vin) as shown by the cycle Tud of the AC input voltage 414 , the processing
component 494 determines a time duration Tya from the time
waveform 710 . For example , the time duration Tje is similar 10 when the voltage
to the time duration T , as shown in FIG . 7. In another voltage ( e . g ., Vih ) to424 becomes larger than the threshold
example , the time duration T , is used by the processing smaller than the thresholdtime
the when the voltage 424 becomes
voltage ( e . g ., V -n ) as shown by the
component 494 to determine the time durations of two waveform 710 . For example , the time duration Tja is similar
separate bursts ofmodulation signals for the half cycle Tud to the time duration T , as shown in FIG . 7 . In another
of the AC input voltage 414 , and is also used by the
processing component 494 to determine the time durations 15 component
example , the time duration Tyd is used by the processing
494 to determine the time durations of two
of two separate bursts of modulation signals for the half separate bursts of modulation signals for the half cycle of the
cycle of the AC input voltage 414 immediately after the half AC input voltage 414 that immediately follows the half
cycle Tud of the AC input voltage 414 . cycle Tha of the AC input voltage 414 , and is also used by
In one embodiment, the voltage 424 during the half cycle
Tha of the AC input voltage 414 as shown by the waveform20 the processing component 494 to determine the time dura
tions of two separate bursts of modulation signals for the
710 is similar to the voltage 424 during the half cycle Ty of
the AC input voltage 414 as shown by the waveform 610 . half cycle of the AC input voltage 414 that immediately
For example , each of the time duration of T , and the time follows the half cycle of the AC input voltage 414 imme
duration of T ,, is equal to zero . In another embodiment, TPA diately after the half cycle Ty of the AC input voltage 414 .
25
represents the pulse width of the voltage 424 during the half 25 As shown in FIG . 8 , the pulse width T Pe is smaller than
cycle Ty of the AC input voltage 414 as shown by the the pulse width Tp , according to some embodiments . For
waveform 710 . For example, the pulse width Tea is similar example ,
to the pulse width T , as shown in FIG . 7 . Tpe = T'ps ( Equation 2A )
In yet another embodiment, To , represents a time duration
during which the signal 436 is at a logic high level as shown 30 Tpa = T'PL ( Equation 2B )
by the waveform 740 , T1 , represents a time duration during
which the signal 436 is a modulation signal ( e . g ., a pulse Tpl = T'ps+ATP (Equation 2C )
width -modulation signal) that changes between the logic where Tps represents a small pulse width of the voltage 424 ,
high level and the logic low level as shown by the waveform and Tpu represents a large pulse width of the voltage 424 .
740, Tza represents a time duration during which the signal 3
436 is at the logic low level as shown by the waveform 740-, 35 Additionally, ATp represents the difference between the
small pulse width and the large pulse width .
and T3d represents a time duration during which the signal In another example ,
436 is a modulation signal ( e. g ., a pulse -width -modulation
signal) that changes between the logic high level and the Tra=T10 ( Equation 3A )
logic low level as shown by the waveform 740 . For example , 40
the time duration Tod is similar to the time duration To as 40 T3d = 13€ (Equation 3B )
shown in FIG . 7 , the timeduration T , is similar to the time In yet another example ,
duration T , as shown in FIG . 7 , the time duration T2 is
similar to the time duration T , as shown in FIG . 7 , and the 12c= T28 (Equation 4A )
time duration T3, is similar to the time duration Tz as shown
in FIG . 7 . 45 T2d = 122 (Equation 4B )
According to one embodiment, the processing component
496 determines the beginning time of the time duration Tid T2 = T2s+ AT2 (Equation 4C )
for the modulation signal by deciding the time when the where T2s represents a small gap between two bursts of
voltage 424 becomes larger than the threshold voltage ( e . g .,
Vih ) as shown by thewaveform 710 , and also determines the 50 two bursts ofsignals
modulation , and T2, represents a large gap between
beginning time of the time duration Tzd for the modulation sents the difference betweensignals
modulation . Additionally , AT2 repre
the small gap and the large gap .
signal by deciding the time when the voltage 424 becomes
smaller than the threshold voltage (e.g., Vin ) as shown by the In yet another example ,
waveform 710 . ATp = AT , (Equation 5)
According to another embodiment, the magnitude of the
time duration T , for the modulation signal and the magni 55 where ATP represents the difference between the small pulse
tude of the time duration T3d for the modulation signal are width and the large pulse width , and AT , represents the
previously determined by the processing component 494. difference between the small gap and the large gap .
For example , the processing component 494 compares the In yet another example ,
time duration T , and the time duration T , and uses the (Equation 6A )
smaller time duration ( e . g ., the time duration T . ) to deter - 60 The= Tha
mine the magnitude of the time duration Tid and the mag Tpc = 1px-ATP ( Equation 6B )
nitude of the time duration Tz , for the half cycle Tug of the
AC input voltage 414 . In another example , the processing 12c = T20 + ATP (Equation 6C)
component 494 compares the time duration T7h and the time
duration Tje and uses the larger time duration (e.g ., the time 65 where Thc represents a half cycle of the AC input voltage
duration T , ) to determine the magnitude of the time dura - 414 , and Ty , represents another half cycle of the AC input
tion Tld and the magnitude of the time duration Tzd for the voltage 414 . Additionally , Tpe represents the pulse width of
US 10 ,264,642 B2
23 24
the voltage 424 during the half cycle The of the AC input T pe during the half cycle The of the AC input voltage 414 )
voltage 414 , and Tpu represents the pulse width of the is the same as the total burst time duration ( e . g ., the sum of
voltage 424 during the half cycle Tha of the AC input the time duration Tla and the time duration T3d) for a large
voltage 414 . Moreover, Tze represents a timeduration during pulse width (e .g ., the pulse width Tpa during the half cycle
which the signal 436 is at the logic low level for the half 5 Ty of the AC input voltage 414 ). In yet another example , by
cycle Tue of the AC input voltage 414 , and T20 represents a making the total burst time duration for the small pulse
time duration during which the signal 436 is at the logic low width equal to the total burst time duration for the large pulse
level for the half cycle Tha of the AC input voltage 414 . width , the energy output during a half cycle of the AC input
Also , AT , represents the difference between the small pulse voltage with the small pulse width (e . g ., during the half
width and the large pulse width . 10 cycle Tue of the AC input voltage 414 ) is the same as the
As shown in FIG . 8 , the half cycle Ty , of the AC input energy output during another half cycle of the AC input
voltage 414 , the half cycle Tub of the AC input voltage 414 , voltage with the large pulse width (e.g ., during the half cycle
the half cycle The of the AC input voltage 414 , and the half The of the AC input voltage 414 ), so that the current
cycle Tha of the AC input voltage 414 are equal to each other provided to the one or more LEDs (e. g., the one or more
in time duration according to certain embodiments . In one 15 LEDs 450 ) remain balanced between the different half
embodiment, the pulse width Tra is equal to the pulse width cycles of the AC input voltage , and the one or more LEDs
Tpe, and the pulse width Tph is equal to the pulse width Tpc (e. g ., the one or more LEDs 450) do not flicker.
In yet another example , each pulse width of the pulse width A s discussed above and further emphasized here, FIG . 8
Tra and the pulse width Tre is smaller than each pulse width is merely an example, which should not unduly limit the
of the pulse width Tph and the pulse width Tpd . In another 20 scope of the claims. One of ordinary skill in the art would
embodiment, the time duration T ,, is equal to the time recognize many variations, alternatives, and modifications .
duration Tje , and the time duration Tjh is equal to the time for example , the time duration of T , is not equal to zero , and
duration T.24. For example , each time duration of the time the time duration of T , is not equal to zero . In another
duration Ty, and the time duration T ,, is smaller than each example , the time duration of T ,, is not equal to the time
time duration of the time duration T7h and the time duration 25 duration of Tr . In yet another example , the time duration of
Tja T , is equal to the time duration of Tx.
In yet another embodiment, the time duration To, the In yet another example , the threshold voltage used by the
time duration Tin , the time duration Ti ., and the time processing component 494 to determine the beginning time
duration Tiq are equal to each other. In yet another embodi- of the time duration Tja is not equal to the threshold voltage
ment, the time duration Tz . , the time duration Tz , the time 30 used by the processing component 494 to determine the
duration Tze, and the time duration T3d are equal to each ending time of the timeduration Tja . In yet another example ,
other. In yet another embodiment, the time duration T2a is the threshold voltage used by the processing component 494
equal to the time duration Ty , and the time duration Ty is to determine the beginning time of the time duration This
equal to the time duration T2d. For example , each time not equal to the threshold voltage used by the processing
duration of the time duration T , and the time duration T , 35 component 494 to determine the ending time of the time
is smaller than each time duration of the time duration T26 duration Tyb . In yet another example , the threshold voltage
and the time duration T2d used by the processing component 494 to determine the
As shown in FIG . 8, if a TRIAC dimmer is detected to be beginning time of the time duration Tye is not equal to the
included in the lighting system and the TRIAC dimmer is a threshold voltage used by the processing component 494 to
leading - edge TRIAC dimmer, the intelligent mechanism can 40 determine the ending time of the time duration Tr. In yet
provide two separate bursts of modulation signals (e . g ., the another example , the threshold voltage used by the process
burst of modulation signal during the time duration Tle as ing component 494 to determine the beginning time of the
shown by the waveform 740 and the burst of modulation time duration Ty, is not equal to the threshold voltage used
signal during the time duration Tze as shown by the wave - by the processing component 494 to determine the ending
form 740 ) for the voltage 424 with a small pulse width ( e . g ., 45 time of the time duration T14 .
the pulse width Tpe during the half cycle The of the AC input In yet another example , the ending time of the time
voltage 414 ), and also provide two other separate bursts of duration Tz, is the same, later than , or earlier than the ending
modulation signals ( e . g ., the burst of modulation signal time of the pulse width TP . In yet another example , the
during the time duration T , as shown by the waveform 740 ending time of the time duration Tz , is the same, later than ,
and the burst of modulation signal during the time duration 50 or earlier than the ending time of the pulse width TPh . In yet
Tza as shown by the waveform 740 ) for the voltage 424 with another example, the ending time of the time duration Tze is
a large pulse width (e.g ., the pulse width Tpa during the half the same, later than , or earlier than the ending time of the
cycle Ty of the AC input voltage 414 ). For example , one pulse width Tpc In yet another example , the ending time of
burst of the two separate bursts ofmodulation signals ( e.g ., the time duration Tza is the same, later than , or earlier than
the burst ofmodulation signal during the time duration T 55 the ending time of the pulse width Tpt.
as shown by the waveform 740 ) is the sameas one burst of According to another embodiment, a system controller for
the two other separate bursts of modulation signals ( e .g ., the a lighting system includes a first controller terminal config
burst ofmodulation signal during the time duration Tid as ured to receive a first signal and a transistor including a first
shown by the waveform 740), and the other burst of the two transistor terminal, a second transistor terminal, and a third
separate bursts of modulation signals ( e . g ., the burst of 60 transistor terminal. Additionally, the system controller
modulation signal during the time duration Tz , as shown by includes a second controller terminal coupled to the first
the waveform 740 ) is the same as the other burst of the two transistor terminal, and a third controller terminal coupled to
other separate bursts ofmodulation signals (e. g., the burst of the third transistor terminal. The system controller is con
modulation signal during the time duration Tz , as shown by figured to determine whether the first signal is associated
the waveform 740 ). In another example , the total burst time 65 with a leading - edge TRIAC dimmer based at least in part on
duration ( e . g ., the sum of the time duration T and the time the first signal, the leading - edge TRIAC dimmer being
duration Tze) for a small pulse width (e .g., the pulse width configured to receive an AC input voltage associated with at
US 10 , 264 ,642 B2
25 26
least a first half cycle from a starting time to an ending time. level to turn on and off the transistor ; and keep modulating
Moreover, the system controller is configured to : in response the drive signal for the fourth time period from the sixth
to the first signal being determined to be associated with the time.
leading-edge TRIAC dimmer, generate a drive signal; and According to yet another embodiment, a method for a
send the drive signal to the second transistor terminal. The 5 lighting system includes receiving a first signal and deter
system controller is further configured to : keep the drive mining whether the first signal is associated with a leading
edge TRIAC dimmer based at least in part on the first signal,
signal at a first logic level to turn on the transistor from a first the
time, the first time being the same or after the starting time; receive leading- edge TRIAC dimmer being configured to
in response to determining that the first signal satisfies a first 10 half cyclean from
AC input voltage associated with at least a first
condition , start , at a second time, modulating the drive signal ally , themethod aincludes
starting time to an ending time. Addition
: in response to the first signal being
by changing the drive signalbetween the first logic level and determined to be associated
a second logic level to turn on and off the transistor, keep dimmer, generating a drive with signal
the leading - edge TRIAC
; and sending the drive
modulating the drive signal for a first predetermined time
signal to a transistor. The process of in response to the first
period from the second time to a third time; stop , at the third 15 signal being determined to be associated with the leading
time, modulating the drive signal to keep the drive signal at edge TRIAC dimmer, generating a drive signal includes:
the second logic level to turn off the transistor; in response keeping the drive signal at a first logic level to turn on the
to determining that the first signal satisfies a second condi- transistor from a first time, the first time being the same or
tion , start , at a fourth time, modulating the drive signal by after the starting time; in response to determining that the
changing the drive signal between the first logic level and 20 first signal satisfies a first condition , starting, at a second
the second logic level to turn on and off the transistor, the time, modulating the drive signal by changing the drive
fourth time being before the ending time; keep modulating signal between the first logic level and a second logic level
the drive signal for a second predetermined time period from to turn on and off the transistor , keeping modulating the
the fourth time to a fifth time; and stop , at the fifth time, drive signal for a first predetermined time period from the
modulating the drive signal to keep the drive signal at the 25 second time to a third time; stopping, at the third time,
first logic level to turn on the transistor. modulating the drive signal to keep the drive signal at the
According to yet another embodiment, a system controller second logic level to turn off the transistor; in response to
for a lighting system includes a first controller terminal determining that the first signal satisfies a second condition ,
configured to receive a first signal and a transistor including starting, at a fourth time, modulating the drive signal by
a first transistor terminal, a second transistor terminal , and a 3030 the
changing the drive signal between the first logic level and
second logic level to turn on and off the transistor, the
third transistor terminal. Additionally, the system controller
includes a second controller terminal coupled to the first fourth time being before the ending time; keeping modulat
ing the drive signal for a second predetermined time period
transistor terminal and a third controller terminal coupled to
the third transistor terminal. The system controller is con 35 from
time ,
the fourth time to a fifth time; and stopping, at the fifth
modulating the drive signal to keep the drive signal at
figured to determine whether the first signal is associated the first logic level to turn on the transistor.
with a leading - edge TRIAC dimmer based at least in part on According to vet another embodiment, a method for a
the first signal, the leading -edge TRIAC dimmer being lighting system includes receiving a first signal and deter
configured to receive an AC input voltage associated with at mining whether the first signal is associated with a leading
least a first half cycle , a second half cycle, and a third half 40 edge TRIAC dimmer based at least in part on the first signal,
cycle , the first half cycle immediately preceding the second the leading- edge TRIAC dimmer being configured to
half cycle, the third half cycle following the first half cycle receive an AC input voltage associated with at least a first
and the second half cycle . Moreover, the system controller half cycle , a second half cycle, and a third half cycle, the first
is configured to : in response to the first signal being deter - half cycle immediately preceding the second half cycle , the
mined to be associated with the leading - edge TRIAC dim - 45 third half cycle following the first half cycle and the second
mer, generate a drive signal; and send the drive signal to the half cycle . Additionally, the method includes : in response to
second transistor terminal. The system controller is further the first signal being determined to be associated with the
configured to : within the first half cycle , determine a first leading -edge TRIAC dimmer, generating a drive signal; and
time period from a first time when the first signal becomes sending the drive signal to a transistor. The process of in
larger than a first threshold to a second time when the first 50 response to the first signal being determined to be associated
signal becomes smaller than a second threshold ; within the with the leading- edge TRIAC dimmer, generating a drive
second half cycle , determine a second time period from a signal includes : within the first half cycle , determining a first
third timewhen the first signal becomes larger than the first time period from a first time when the first signal becomes
threshold to a fourth time when the first signal becomes larger than a first threshold to a second time when the first
smaller than the second threshold ; and determine a third 55 signal becomes smaller than a second threshold ; within the
time period and a fourth time period based at least in part on second half cycle , determining a second time period from a
the first time period and the second time period . The system third time when the first signal becomes larger than the first
controller is further configured to : within the third half cycle, threshold to a fourth time when the first signal becomes
in response to determining that the first signal satisfies a first smaller than the second threshold ; determining a third time
condition , start, at a fifth time, modulating the drive signal 60 period and a fourth time period based at least in part on the
by changing the drive signal between a first logic level and first time period and the second timeperiod ; within the third
a second logic level to turn on and off the transistor; keep half cycle , in response to determining that the first signal
modulating the drive signal for the third timeperiod from the satisfies a first condition , starting, at a fifth time, modulating
fifth time; within the third half cycle , in response to deter - the drive signal by changing the drive signal between a first
mining that the first signal satisfies a second condition , start, 65 logic level and a second logic level to turn on and off the
at a sixth time, modulating the drive signalby changing the transistor ; keeping modulating the drive signal for the third
drive signal between the first logic level and the second logic time period from the fifth time; within the third half cycle ,
US 10 ,264 ,642 B2
27 28
in response to determining that the first signal satisfies a stop , at the fifth time, modulating the drive signal to
second condition , starting, at a sixth time, modulating the keep the drive signal at the first logic level to turn on
drive signal by changing the drive signal between the first the switch .
logic level and the second logic level to turn on and off the 2 . The system controller of claim 1 wherein the fifth time
transistor, and keeping modulating the drive signal for the 5 is the same as the ending time.
fourth time period from the sixth time. 3 . The system controller of claim 1 wherein the fifth time
For example , some or all components of various embodi - follows the ending time.
ments of the present invention each are , individually and/ or 4 . The system controller of claim 1 wherein the fifth time
in combination with at least another component, imple precedes the ending time.
mented using one or more software components , one or 10 5 . The system controller of claim 1 is further configured
more hardware components , and/ or one or more combina to , in response to determining that the first signal satisfies the
tions of software and hardware components . In another first condition at a sixth time, start , at the second time,
example , some or all components of various embodiments modulating the drive signal by changing the drive signal
of the present invention each are, individually and/ or in between the first logic level and the second logic level to
combination with at least another component, implemented 15 turn on and off the switch , the sixth timebeing after the first
in one or more circuits, such as one or more analog circuits time but before the second time.
and/ or one or more digital circuits . In yet another example , 6 . The system controller of claim 1 wherein , in response
various embodiments and/ or examples of the present inven to the first signal becoming larger than a first threshold , the
tion can be combined . first signal is determined to satisfy the first condition .
Although specific embodiments of the present invention 20 7 . The system controller of claim 6 wherein , in response
have been described , it will be understood by those of skill to the first signal becoming smaller than a second threshold ,
in the art that there are other embodiments that are equiva - the first signal is determined to satisfy the second condition .
lent to the described embodiments. Accordingly, it is to be 8 . The system controller of claim 7 wherein the first
understood that the invention is not to be limited by the threshold is equal to the second threshold .
specific illustrated embodiments , but only by the scope of 25 9 . The system controller of claim 7 wherein the first
the appended claims. threshold is not equal to the second threshold .
10 . The system controller of claim 1 wherein , in response
What is claimed is: to the first signal becoming smaller than a threshold , the first
1 . A system controller for a lighting system , the system signal is determined to satisfy the second condition .
controller comprising : 30 11 . The system controller of claim 1 is configured to :
a first controller terminal configured to receive a first determine a first time period for the first signal to increase
signal; and from a first threshold to a second threshold ;
a second controller terminal coupled to a first switch determine a second time period for the first signal to
terminal of a switch , the switch further including a decrease from the second threshold to the first thresh
second switch terminal ; 35 old ; and
wherein the system controller is configured to : in response to the second timeperiod minus the first time
in response to the first signal being determined to be period being larger than a predetermined positive
associated with a leading - edge TRIAC dimmer, gen value , determine the first signal to be associated with
erate a drive signal, the leading -edge TRIAC dimmer the leading - edge TRIAC dimmer.
being configured to receive an AC input voltage 40 12 . The system controller of claim 11 is configured to :
associated with at least a first half cycle from a in response to the first time period minus the second time
starting time to an ending time; and period being larger than the predetermined positive
send the drive signal to the second switch terminal; value , determine the first signal to be associate with a
wherein the system controller is further configured to : trailing- edge TRIAC dimmer; and
keep the drive signal at a first logic level to turn on the 45 in response to an absolute value of the first time period
switch from a first time, the first timebeing the same minus the second time period being smaller than the
or after the starting time; predetermined positive value , determine the first signal
in response to determining that the first signal satisfies not to be associated with any TRIAC dimmer.
a first condition , start, at a second time, modulating 13 . A system controller for a lighting system , the system
the drive signal by changing the drive signal between 50 controller comprising :
the first logic level and a second logic level to turn a first controller terminal configured to receive a first
on and off the switch ; signal; and
keep modulating the drive signal for a first predeter a second controller terminal coupled to a first switch
mined time period from the second time to a third terminal of a switch , the switch further including a
time; 55 second switch terminal;
stop , at the third time, modulating the drive signal to wherein the system controller is configured to :
keep the drive signal at the second logic level to turn in response to the first signal being determined to be
off the switch ; associated with a leading -edge TRIAC dimmer , gen
in response to determining that the first signal satisfies erate a drive signal, the leading - edge TRIAC dimmer
a second condition , start, at a fourth time, modulat- 60 being configured to receive an AC input voltage
ing the drive signal by changing the drive signal associated with at least a first half cycle , a second
between the first logic level and the second logic half cycle , and a third half cycle , the first half cycle
level to turn on and off the switch , the fourth time immediately preceding the second half cycle, the
being before the ending time; third half cycle following the first half cycle and the
keep modulating the drive signal for a second prede - 65 second half cycle ; and
termined time period from the fourth time to a fifth send the drive signal to the second switch terminal;
time; and wherein the system controller is further configured to :
US 10 ,264 ,642 B2
29 30
within the first half cycle , determine a first time period being configured to receive an AC input voltage asso
from a first timewhen the first signal becomes larger ciated with at least a first half cycle from a starting time
than a first threshold to a second time when the first to an ending time; and
signal becomes smaller than a second threshold ; sending the drive signal to a switch ;
within the second half cycle , determine a second time 5 wherein the in response to a first signal being determined
period from a third time when the first signal to be associated with a leading - edge TRIAC dimmer ,
becomes larger than the first threshold to a fourth generating a drive signal includes:
time when the first signal becomes smaller than the keeping the drive signal at a first logic level to turn on
second threshold ; and the switch from a first time, the first time being the
determine a third time period and a fourth time period 10 same or after the starting time;
based at least in part on the first time period and the in response to determining that the first signal satisfies
second time period ; a first condition , starting, at a second time, modu
wherein the system controller is further configured to : lating the drive signal by changing the drive signal
within the third half cycle , in response to determining between the first logic level and a second logic level
that the first signal satisfies a first condition , start, at 15 to turn on and off the switch ;
a fifth time, modulating the drive signal by changing keeping modulating the drive signal for a first prede
the drive signal between a first logic level and a termined time period from the second time to a third
second logic level to turn on and off the switch ; time;
keep modulating the drive signal for the third time stopping , at the third time, modulating the drive signal
period from the fifth time; 20 to keep the drive signal at the second logic level to
within the third half cycle , in response to determining turn off the switch ;
that the first signal satisfies a second condition , start, in response to determining that the first signal satisfies
at a sixth time, modulating the drive signal by a second condition , starting, at a fourth time, modu
changing the drive signal between the first logic level lating the drive signal by changing the drive signal
and the second logic level to turn on and off the 25 between the first logic level and the second logic
switch ; and level to turn on and off the switch , the fourth time
keep modulating the drive signal for the fourth time being before the ending time;
period from the sixth time. keeping modulating the drive signal for a second pre
14 . The system controller of claim 13 is further configured determined time period from the fourth time to a fifth
to : 30 time; and
compare the first time period and the second time period ; stopping , at the fifth time, modulating the drive signal
in response to the first time period and the second time to keep the drive signal at the first logic level to turn
period being equal, on the switch .
determine the third time period and the fourth time 19 . The method of claim 18 wherein the fifth time is the
period based at least in part on the first time period ; 35 same as the ending time.
and 20 . The method of claim 18 wherein the fifth time follows
in response to the first time period and the second time the ending time.
period not being equal, 21. The method of claim 18 wherein the fifth time
select a shorter time period from the first time period precedes the ending time.
and the second time period ; and 40 22 . The method of claim 18 wherein the in response to
determine the third time period and the fourth time determining that the first signal satisfies a first condition ,
period based at least in part on the shorter time starting, at a second time, modulating the drive signal by
period . changing the drive signal between the first logic level and a
15 . The system controller of claim 13 is further configured second logic level to turn on and off the switch includes :
to : 45 in response to determining that the first signal satisfies the
compare the first time period and the second timeperiod ; first condition at a sixth time, starting , at the second
in response to the first time period and the second time time, modulating the drive signal by changing the drive
period being equal, signalbetween the first logic level and the second logic
determine the third time period and the fourth time level to turn on and off the switch , the sixth timebeing
period based at least in part on the first time period ; 50 after the first time but before the second time.
and 23 . The method of claim 18 wherein , in response the first
in response to the first time period and the second time signal becoming larger than a first threshold , the first signal
period not being equal, is determined to satisfy the first condition .
select a longer time period from the first time period 24 . The method of claim 23 wherein , in response to the
and the second time period ; and 55 first signal becoming smaller than a second threshold , the
determine the third time period and the fourth time first signal is determined to satisfy the second condition.
period based at least in part on the longer time 25 . The method of claim 24 wherein the first threshold is
period . equal to the second threshold .
16 . The system controller of claim 13 wherein the first 26 . The method of claim 24 wherein the first threshold is
threshold is equal to the second threshold . 60 not equal to the second threshold .
17 . The system controller of claim 13 wherein the first 27. The method of claim 18 wherein , in response to the
threshold is not equal to the second threshold . first signal becoming smaller than a threshold , the first signal
18 . A method for a lighting system , the method compris - is determined to satisfy the second condition .
ing : 28. The method of claim 18 wherein the determining
in response to a first signal being determined to be 65 whether the first signal is associated with a leading -edge
associated with a leading - edge TRIAC dimmer, gener - TRIAC dimmer based at least in part on the first signal
ating a drive signal, the leading-edge TRIAC dimmer includes :
US 10 ,264 ,642 B2
32
determining a first time period for the first signal to keeping modulating the drive signal for the third time
increase from a first threshold to a second threshold ; period from the fifth time;
determining a second time period for the first signal to within the third half cycle, in response to determining
decrease from the second threshold to the first thresh that the first signal satisfies a second condition ,
old ; and 5 starting, at a sixth time, modulating the drive signal
in response to the second time period minus the first time by changing the drive signal between the first logic
period being larger than a predetermined positive level and the second logic level to turn on and off the
value , determining the first signal to be associated with switch ; and
the leading -edge TRIAC dimmer. keeping modulating the drive signal for the fourth time
29 . The method of claim 28 wherein the determining 10 period from the sixth time.
whether the first signal is associated with a leading- edge
TRIAC dimmer based at least in part on the first signal third time period andof aclaim
31 . The method
fourth
30 wherein the determining a
time period based at least in
further includes:
in response to the first time period minus the second time part on the first time period and the second time period
period being larger than the predetermined positive 15 includes:
value , determining the first signal to be associate with comparing the first time period and the second time
a trailing - edge TRIAC dimmer; and period ;
in response to an absolute value of the first time period in response to the first time period and the second time
minus the second time period being smaller than the period being equal,
predetermined positive value, determining the first sig - 20 determining the third time period and the fourth time
nal not to be associated with any TRIAC dimmer. period based at least in part on the first time period ;
30 . A method for a lighting system , the method compris and
ing: in response to the first time period and the second time
in response to a first signal being determined to be period not being equal,
associated with a leading - edge TRIAC dimmer, gener- 25 selecting a shorter time period from the first time period
ating a drive signal, the leading -edge TRIAC dimmer and the second time period ; and
being configured to receive an AC input voltage asso determining the third time period and the fourth time
ciated with at least a first half cycle , a second half cycle , period based at least in part on the shorter time
and a third half cycle, the first half cycle immediately period .
preceding the second half cycle , the third half cycle 302 32 . The method of claim 30 wherein the determining a
following the first half cycle and the second half cycle ; third time period and a fourth time period based at least in
and part on the first time period and the second time period
sending the drive signal to a switch ; includes:
wherein the in response to a first signalbeing determined
to be associated with the leading- edge TRIAC dimmer, 35 comparcomparing the first time period and the second time
generating a drive signal includes: period ;
within the first half cycle , determining a first time in response to the first time period and the second time
period from a first time when the first signal becomes period being equal,
larger than a first threshold to a second time when the determining the third time period and the fourth time
first signalbecomes smaller than a second threshold ; 40 period based at least in part on the first time period ;
within the second half cycle , determining a second time and
period from a third time when the first signal in response to the first time period and the second time
becomes larger than the first threshold to a fourth period not being equal,
time when the first signal becomes smaller than the selecting a longer time period from the first timeperiod
second threshold ; 45 and the second time period ; and
determining a third timeperiod and a fourth timeperiod determining the third time period and the fourth time
based at least in part on the first time period and the period based at least in part on the longer time
second time period ; period .
within the third half cycle , in response to determining 33. The method of claim 30 wherein the first threshold is
that the first signal satisfies a first condition , starting , 50 €equal to the second threshold .
34 . The method of claim 30 wherein the first threshold is
at a fifth time, modulating the drive signal by chang
ing the drive signal between a first logic level and a not equal to the second threshold .
second logic level to turn on and off the switch ;

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US010264642B2

464 456 452 -

TRIAC BUT 496 -

498 478 Current +

(52 ) U .S . CI. 2010 /0164406 A1 7 / 2010 Kost et al .

Vinput Voutp Voutp

200 2504 25047

ENW 332 3421320 372o310

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