The Higher Institute of Engineering Electrical Power and Machines

El-Shorouk City Department

Power system analysis (1)

Chapter 1
Network Equations and Solutions

Lecture No. 4
Node Elimination Using Matrix Algebra Method

By
Dr. Mohamed A. Tawfiek
and
Dr. Ahmed Sayed

1
4. Node Elimination Using Matrix Algebra Method
For a network contains 4-nodes, the node voltage equations can be written in matrix form
as follows :
𝐾 𝐿
𝑌 13 𝑌 14
𝐼𝐴
} 𝐼1
𝐼2
=
𝑌 11
𝑌 21
𝑌 12
𝑌 22 𝑌 23 𝑌 24
𝑉1
𝑉2 }𝑉 𝐴

0 = 𝐼𝑋
} 𝐼3
𝐼4
𝑌 31
𝑌 41
𝑌 32
𝑌 42
𝑌 33
𝑌 43
𝑌 34
𝑌 44
𝑉3
𝑉4 }𝑉 𝑋

𝑁 𝑀

Thus, the node voltage equations can be written also as:

𝐼𝐴 𝐾 𝐿 𝑉𝐴
𝐼𝑋 = 0 Currents of =
eliminated nodes 𝐼𝑋 𝑁 𝑀 𝑉𝑋

Now, it is required to eliminate two nodes 3 and 4. Remark: Nodes at which current
So, we have: does not enter or leave the network
only can be eliminated

𝐼𝐴 = 𝐾 𝑉𝐴 + 𝐿 𝑉𝑋 (1)

𝐼𝑋 = 0 = 𝑁 𝑉𝐴 + 𝑀 𝑉𝑋 (2)
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4. Node Elimination Using Matrix Algebra Method
𝐼𝐴 = 𝐾 𝑉𝐴 + 𝐿 𝑉𝑋 (1)

𝐼𝑋 = 0 = 𝑁 𝑉𝐴 + 𝑀 𝑉𝑋 (2)
From Equation (2), we get:
−1
𝑀 𝑉𝑋 = − 𝑁 𝑉𝐴 𝑉𝑋 = − 𝑀 𝑁 𝑉𝐴 (3)

From Equation (3) into Equation (1) yields:

−1
𝐼𝐴 = 𝐾 𝑉𝐴 + 𝐿 − 𝑀 𝑁 𝑉𝐴
−1
𝐼𝐴 = 𝐾 − 𝐿 𝑀 𝑁 𝑉𝐴

𝐼𝐴 = 𝑌𝐴 𝑉𝐴
Where:
−1
𝑌𝐴 = 𝑌𝑟𝑒𝑑𝑢𝑐𝑒𝑑 = 𝐾 − 𝐿 𝑀 𝑁
Thus, the new node voltage equations can be written as:

𝐼1 𝑌11 \ 𝑌12 \ 𝑉1
=
𝐼2 𝑌21 \ 𝑌22 \ 𝑉2 3
4. Node Elimination Using Matrix Algebra Method
Example 1.4:
a) For the circuit shown in the figure 1.4, eliminate nodes 3 and 4 by using Matrix
algebra method and then deduce and draw the reduced circuit between nodes 1
and 2and calculate the power outputs of the two sources at nodes 1 and 2.
b) eliminate nodes 3 and 4 by using star-delta transformation.
c) Compare the reduced circuit (a) with star-delta transformation (b).

𝑗 0.1

𝑗 0.05 3 𝑗 0.02 4 𝑗 0.05

1 2

𝑗 0.05 𝑗 0.025
𝑗 0.5 𝑗1
0
+ + 𝐸 = 1උ00
𝐸1 = 1උ60 2
− −
Figure 1.4. PU Impedance diagram

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4. Node Elimination Using Matrix Algebra Method
Solution
∵ 𝑤𝑒 ℎ𝑎𝑣𝑒 4 − 𝑛𝑜𝑑𝑒𝑠, 𝑡ℎ𝑒𝑛 𝑤𝑒 ℎ𝑎𝑣𝑒 4 − 𝑒𝑞𝑢𝑎𝑡𝑖𝑜𝑛𝑠
1 − 𝑇𝑟𝑦 𝑡𝑜 𝑐𝑜𝑛𝑣𝑒𝑟𝑡 𝑎𝑛𝑦 𝑉𝑆 𝑡𝑜 𝐶𝑆 −𝑗 10
2 − 𝐶𝑜𝑛𝑣𝑒𝑟𝑡 𝑎𝑛𝑦 𝑥 𝑡𝑜 𝑦
−𝑗 20 3 −𝑗 50 4 −𝑗 20
1 2
40
20
උ−900
උ−300
−𝑗 20 −𝑗 2 −𝑗 1 −𝑗 40

PU admittance diagram

𝑌 11 𝑌 12 𝑌 13 𝑌 14 −𝑗50 𝑗10 𝑗20 0 𝑦 10

𝐾 𝐿 𝑦 20
𝑌 21 𝑌 22 𝑌 23 𝑌 24 𝑗10 −𝑗70 0 𝑗20
𝑌 𝑏𝑢𝑠 = = 𝑦 30
𝑌 31 𝑌 32 𝑌 33 𝑌 34 𝑗20 𝑁 0 −𝑗72 𝑗50
𝑀
𝑌 41 𝑌 42 𝑌 43 𝑌 44 0 𝑗20 𝑗50 −𝑗71 𝑦 40
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4. Node Elimination Using Matrix Algebra Method
Solution
−1
𝑌𝑟𝑒𝑑𝑢𝑐𝑒𝑑 = 𝐾 − 𝐿 𝑀 𝑁

−1
−𝑗50 𝑗10 𝑗20 0 −𝑗72 𝑗50 𝑗20 0
𝑌𝑟𝑒𝑑𝑢𝑐𝑒𝑑 = −
𝑗10 −𝑗70 0 𝑗20 𝑗50 −𝑗71 0 𝑗20

−𝑗71 −𝑗50
−𝑗50 𝑗10 𝑗20 0 −𝑗50 −𝑗72 𝑗20 0
𝑌𝑟𝑒𝑑𝑢𝑐𝑒𝑑 = −
𝑗10 −𝑗70 0 𝑗20 −𝑗72 𝑗50 0 𝑗20
𝑗50 −𝑗71

−𝑗71 −𝑗50
−𝑗50 𝑗10 𝑗20 0 −𝑗50 −𝑗72 𝑗20 0
𝑌𝑟𝑒𝑑𝑢𝑐𝑒𝑑 = −
𝑗10 −𝑗70 0 𝑗20 (−𝑗72) × −𝑗71 − −𝑗50 × −𝑗50 0 𝑗20

71 50
𝑗20 0 −𝑗
𝑌𝑟𝑒𝑑𝑢𝑐𝑒𝑑 =
−𝑗50 𝑗10
− 50 72 𝑗20 0
𝑗10 −𝑗70 0 𝑗20 𝑗 2 2612 0 𝑗20

−50 10 𝑗 20 0 71 50 20 0
𝑌𝑟𝑒𝑑𝑢𝑐𝑒𝑑 = 𝑗 +
10 −70 2612 0 20 50 72 0 20
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4. Node Elimination Using Matrix Algebra Method
Solution

−50 10 𝑗 20 0 71 50 20 0
𝑌𝑟𝑒𝑑𝑢𝑐𝑒𝑑 = 𝑗 +
10 −70 2612 0 20 50 72 0 20

−50 10 𝑗 20 0 71 × 20 + 50 × 0 71 × 0 + 50 × 20
𝑌𝑟𝑒𝑑𝑢𝑐𝑒𝑑 = 𝑗 +
10 −70 2612 0 20 50 × 20 + 72 × 0 50 × 0 + 72 × 20

−50 10 𝑗 20 0 1420 1000

𝑌𝑟𝑒𝑑𝑢𝑐𝑒𝑑 = 𝑗 +
10 −70 2612 0 20 1000 1440

−50 10 𝑗 28400 20000

𝑌𝑟𝑒𝑑𝑢𝑐𝑒𝑑 = 𝑗 +
10 −70 2612 20000 28800

−50 10 10.872 7.667 1 1

𝑌𝑟𝑒𝑑𝑢𝑐𝑒𝑑 = 𝑗 +
10 −70 7.66 11.03 𝑧10 \ = = = 𝑗0.0466
𝑦10 \ 𝑗 −39.128 + 17.667
−39.128 17.667 𝑦10 \ 1 1
𝑌𝑟𝑒𝑑𝑢𝑐𝑒𝑑 =𝑗 𝑧20 \ = = = 𝑗0.024
17.667 −58.97 𝑦20 \ 𝑦20 \ 𝑗 17.667 − 58.97
1 1 1
𝑌11 \ 𝑌12 \ 𝑧12 \ = = = = 𝑗0.0566
𝑌𝑟𝑒𝑑𝑢𝑐𝑒𝑑 = 𝑦12 \ −𝑌12 \ −𝑗17.667
𝑌21 \ 𝑌22 \ 7
 4. Node Elimination Using Matrix Algebra Method
Solution

Thus, the node voltage equations of the reduced circuit: 1 𝑗 0.0566 2

20 උ−300 −39.128 17.667 𝑉1
=𝑗 𝑗0.0466
40 උ−900 17.667 −58.97 𝑉2
𝑗0.024
20 40
𝑉1 −39.128 17.667 −1 20 උ−300
= 𝑗 උ−300 උ−900
𝑉2 17.667 −58.97 40 උ−900
Reduced circuit
0
𝑉1 0.5151473උ36.51
= 𝑗 0.1
𝑉2 0.712425උ−12.420

𝐸1 − 𝑉1 𝑗 0.05 3 𝑗 0.02 4 𝑗 0.05

𝐼1 = 1 2
𝑗0.05
𝑗 0.05 𝐼1 𝐼2 𝑗 0.025
𝐸2 − 𝑉2 𝑗 0.5 𝑗1
𝐼2 = + + 𝐸 = 1උ00
𝑗0.025
𝐸1 = 1උ600 2
− −
𝑆1 = 𝐸1 𝐼1 ∗ = 6.129295 + 𝑗11.719277 𝑃𝑈 PU Impedance diagram
𝑆2 = 𝐸2 𝐼2 ∗ = −6.128856 + 𝑗12.169995 𝑃𝑈
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Thank You