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MTH 122.
3 Mathematical Foundation of Computer Science (3-2-1)
Evaluation:
Theory Practical Total
Sessional 50 - 50
Final 50 - 50
Total 80 - 100
Course Objectives:
1. The main objective of this course is to buildup the mathematical foundation for the study of
computational science and computer technology.
2. This course introduces the student to discrete mathematics and finite state automata
through an algorithmic approach and focuses on various problems solving technique.
3. It helps the target student in gaining fundamental and conceptual clarity in the area of
Logic Reasoning. Algorithms, Recurrence relation. Graph Theory, and Theory of
Automata.
Course Contents:
1. Graph Theory (15 hrs)

Definitions, Directed and Undirected Graphs. Walk, Path, Circuits, Connected
Components. Connected Component Algorithm, Shortest –Path Algorithm.
Computer representation a graph (Static Representation only, like Adjacency Matrix,
Incidence Matrix, Path Matrix): Bi-partite graphs. Regular graphs, Planar graphs. Euler
graph. Hamilton graph and their properties and characterization.
Application of graph theory in computer science (with example).
2. Logic and Induction (8 hrs)

Propositions and Truth functions, Predicates and Quantification, Propositional and
Predicate Logic, Expressing statement in the language of Logic. Deduction in Predicate
Logic, Elementary Step-wise Induction and Complete Induction.
3. Introduction to Mathematical Reasoning (7 hrs)

Formal Languages and Inductive Definitions: Axioms, Rules of Inference and Proofs,
Direct Proof and Indirect Proof. Formal Proof and Informal Proof.
4. Recurrence Relations (7 hrs)

Recursive Definition of Sequences. Differencing and Summation, Solution of Linear
Recursive Relation, Solution of Non-linear Recurrence Relation.
5. Finite State Automata (8 hrs)

Alphabets and Language, Notion of a State. State Machine (FSM and DFA). Regular
Expression, Equivalence Relation.
Reference Books:
1. Richard Johnsonbaugh, Discrete Mathematics, Fifth Edition, Addison Wesley,
Pearson Education Asia (LPE), ISBN: 81-780-82799, 2000
2. Mott, Joe L., Kandel Abraham and Baker, Theodoe P., Discrete Mathematics for
Computer Scientists and Mathematicians, Second Edition, Prentice-Hall, ISBN: 81-
203-1502-2
3. Liu, C.L., Elements of Discrete Mathematics, TMH, 2000, ISBN: 0-07-043476-X
4. Trus, J., Discrete Mathematics for Computer Scientists, Second Edition, Addision
Wesley ISBN: 0-201-36061,1999
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ELX 212.3 Logic Circuits (3-1-3)
Evaluation:
Theory Practical Total
Sessional 30 20 50
Final 50 - 50
Total 80 20 100
Course Objectives:
1. To provide basic of logic systems.
2. To design a basic digital computer.
3. .........
Course Contents:
1. Introduction (3 hrs)
Numerical representation, Digital number system, Digital and analog system, ..........
2. Number System and Codes (6 hrs)

Binary to decimal and decimal to binary conversions, Octal, hexadecimal number
system and conversions, Binary Arithmetic 1's complement and 9's complements,
gray code, Instruction codes, Alphanumeric characters, Modulo2 system and 2's
complement, Binary Coded Decimal (BCD) and hexadecimal codes, Parity method
for error detection.
3. Boolean Algebra and Logic Gates (4 hrs)

Basic definition, Basic properties and theorem of Boolean algebra, DeMorgan's
Theorem, Logic gates and truth tables, Universality of NAND and NOR gates.
Tristate logic.
4. Simplification of Boolean Function (5 hrs)

Venn diagram and test vectors, Karnaugh maps up to five variables, Minimum
realization, don't care conditions, Logic gates implementation, practical design
steps.
5. Combination Logic (4 hrs)

Design procedure, Adders and subtractors, Code conversion, Analysis procedure.
Multilevel NAND and NOR circuits, Parity generation and checking.
6. MSI and LSI Components in Combinational Logic Design (5 hrs)

Binary adder and subtractor, Decimal adder, Magnitude comparator, Decoder and
encoder, Multiplexer and demultiplexer, Read-only memory (ROM), Programmable
Logic Array (PLA).
7. Sequential Logic (6 hrs)

Event driven model and state diagram, flip-flops and their types. Analysis of
clocked sequential circuits, Decoder as memory devices, State reduction and
assignment, Synchronous and asynchronous logic, Edge triggered device. Master
slave flip-flops, JK and T flip-flops.
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8. Registers, Counters and Memory Unit (6 hrs)
Registers, shift registers, Superposition of registers, generation of codes using
registers, Ripple, Synchronous and Johnson Counters, Design of multiple input
circuits, Random Access Memory (RAM). Memory decoding, error-correction code,
Output hazards races.
9. Arithmetic Logic Units (5 hrs)

Nibble adder, Adder/ substrata unit, Design of arithmetic logic unit. Status register,
Design of shifter, Processor unit, Design of accumulator.
Laboratory Work:
1. Familiarization with logic gates.
2. Encodes and decodes
3. Multiplexer and demultiplexer
4. Design of simple combination circuits.
5. Design of adder/subtractor
6. Design of flip-flop
7. Design of counter
8. Clock driven sequential circuits
9. Conversion of parallel data into serial format.
10. Generation of timing signal for sequential system.
Reference Books:
1. M. Mano, Digital Logic and Computer Design, Prentice Hall of India 1998.
2. M. Mano, Computer System Architecture, Prentice Hall of India, 1998.
3. M. Mano, Digital Design, Prentice Hall of India, 1998.
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MTH 122.

3 Mathematical Foundation of Computer Science (3-2-1)

1. Graph Theory (15 hrs)

2. Logic and Induction (8 hrs)

3. Introduction to Mathematical Reasoning (7 hrs)

4. Recurrence Relations (7 hrs)

5. Finite State Automata (8 hrs)

2. Number System and Codes (6 hrs)

3. Boolean Algebra and Logic Gates (4 hrs)

4. Simplification of Boolean Function (5 hrs)

5. Combination Logic (4 hrs)

6. MSI and LSI Components in Combinational Logic Design (5 hrs)

7. Sequential Logic (6 hrs)

9. Arithmetic Logic Units (5 hrs)

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