DSPF USERGuide
DSPF USERGuide
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are the property of their respective holders.
Contents
Purpose ....................................................................................................................... 4
Audience ...................................................................................................................... 4
Terms .......................................................................................................................... 4
Prerequisites ................................................................................................................ 4
Introduction .................................................................................................................. 5
General Introduction to DSPF ...................................................................................... 5
DSPF Syntax............................................................................................................ 6
Guidelines while generating DSPF file for EM analysis ............................................ 7
How to include DSPF file ....................................................................................... 14
Use models of AMS UNL DSPF support ................................................................... 16
Use models of AMS UNL Testcase ........................................................................... 16
Including DSPF from ADE when the DUT is bound to schematic view in HED ...... 16
Including DSPF from ADE when the DUT is bound to spectre/other spice view in
HED ....................................................................................................................... 28
DUT bound to DSPF view in HED .......................................................................... 36
Specifying DSPF source file in HED ...................................................................... 43
Summary ................................................................................................................... 52
References ................................................................................................................ 52
Support ...................................................................................................................... 52
Feedback ......................................................................Error! Bookmark not defined.
Purpose
This document describes an overview about how to replace one of the block with its
corresponding DSPF netlist and run AMS simulations.
Audience
This document intended for all the users who run AMS tools and want to include DSPF
netlist to add detailed network of RC parasitics of every net during AMS simulations.
Terms
DSPF - Detailed standard parasitic format
Prerequisites
- A basic understanding of DSPF netlist
Introduction
Cadence Analog Simulator, Spectre delivers a powerful EMIR solution with its APS and
XPS binaries. The Spectre EMIR solution provides a set of advanced features including
power gate support, design resistor EM calculation, signal net IR drop analysis, macro
model generation, block boxing, what-if analysis and static EMIR analysis. The flow is
fully integrated into the Cadence ADE environment and same flow is extended to AMS in
ADE with UNL netlister.
To activate the EMIR analysis, user needs to create a complete simulation test bench
with DSPF files containing the post layout data of the design. There are different ways to
include DSPF files in AMS in ADE flow.
This RAK mainly demonstrates the different ways of including DSPF file in AMS in ADE
environment.
DSPF has two sections: a net section and an instance section. The net section consists
of a series of net description blocks. Each net description block corresponds to a net in
the physical design. A net description block begins with a net statement followed by pins,
instance pins, subnodes, and parasitic resistor/capacitor (R/C) components that
characterize the electrical behavior of the net. The instance section consists of a series
of SPICE instance statements. SPICE instance statements begin with an X.
The DSPF format is as generic and as much like SPICE as possible. While native SPICE
statements describe the R/C sections, some non-native SPICE statements complete the
net descriptions. These nonnative SPICE statements start with the notation "*|" to
differentiate them from native SPICE statements. For native SPICE statements, a
continuation line begin with the conventional "+" sign in the first column.
Each file consists of hierarchical cells and interconnects only. When the data also
contains designed devices, the DSPF excludes these extracted devices (MOSFETs,
bipolar transistors, and so on). These devices are not reported in DSPF.
The native SPICE statements used by the SPF are listed below:
DSPF Syntax
<end_subckt>
To do AMS APS EMIR Simulation, we need a dspf file that have some requirements for
EM analysis. These are listed below.
Below is the example DSPF file extracted from Quantus QRC and the highlighted parts
are explained with comment added on the top of each line for easy understanding.
*
*|DSPF 1.5
*
*|DATE "Fri May 27 08:52:16 2016"
*|VENDOR "Cadence Design Systems"
*|PROGRAM "Cadence Quantus QRC Extraction"
*|VERSION "15.2.2 Linux 64 bit - (Wed Mar 23 17:12:05 PDT 2016)"
*|DESIGN "DiffOpAmp"
*|DIVIDER /
*|DELIMITER #
*|DeviceFingerDelim "@"
*|BUSBIT []
** caps2d version: 10
*
* Subcircuit definition
.SUBCKT DiffOpAmp AVSS outp Ibias inm AVDD outm inp
*
*Net Section
*Power ground nets extracted
*|GROUND_NET 0
*
*|NET AVSS 4.66499e-14
*|P (AVSS X 0 0.0400 2.1500)
*|I (MM7@5#s MM7@5 s X 0 34.9255 13.6850)
...
*|S (AVSS#3 13.6750 12.8200)
*|S (AVSS#4 13.6750 14.8200)
...
*Layer information of resistor L/W of wire coordinates of parasitic resistor
Rk28 AVSS#3 AVSS#4 0.421492 $metal1_conn $L=2 $W=0.3 $X=13.675 $Y=13.82
...
C1507 outp#160 net17#73 8.05414e-18
...
*
*Instance Section
*MOSFET instances
MNM0@5 MNM0@5#d MNM0@5#g MNM0@5#s AVSS g45n2svt
+ L=1.5e-07 W=5e-06
+ AD=1.6e-12 AS=1.45e-12 PD=1.064e-05 PS=1.058e-05
SPF Checker
DSPF files are created with parasitic extraction tools, such as QRC. However, the content
and format of DSPF files is dependent on the extraction tool and runset. Often, simulation
problems occur due to problems in the DSPF file.
The SPF Checker from SPCTRE or MMSIM installation is a utility which analyses a DSPF
file, reports problems which may cause simulation problems, and creates an EMIR
configuration file with the recommended mapping statements for EMIR analysis. In
addition, it creates a configuration file for the Spectre DSPF parasitic back annotation flow
(SPF).
For EMIR analysis, it is highly recommended to run the SPEF checker and include the
configuration file created by the checker into the EMIR configuration file. For more
information please refer spectre user guide. We will be discussing some of the basic
errors issued during SPF checker in the below section
To generate a dspf file for AMS APS EM analysis, do the following from Quantus.
1. From your layout window, in main Menu, QRC Run PVS-Quantus QRC, in
Quantus QRC (PVS) Parasitic Extraction Run Form, in Setup tab Select
Output as “Transistor Dspf” and specify the dspf file name.
Selecting “EM Analysis” is very easy setting for generating a dspf file from Quantus. But
“EM Analysis” makes split pins in a dspf file and spfchecker makes an error at split
pins if you used virtual connect for LVS.
*|NET AVSS
*|P (AVSS X 0 1.5 169.3)
*|P (AVSS%1 X 0 1.5 52.1)
spfchecker error :
If you don’t want to see the error from spfchecker, you need to do following things to
uncheck split pins.
AMSD will support dspf_include statement in both AMS-ADE and AMS simulator.
The subcircuit description is taken from the DSPF file even if the same
subcircuit description is available in the schematic netlist.
Depending on the port_order option, the port order of the subcircuit definition is
taken from the pre-layout schematic netlist or from the DSPF file subcircuit
definition, as shown below:
By default, the extra ports in the DSPF or schematic subcircuit definition cause the
simulation to stop. However, the extra_port option enables a special handling of
extra subcircuit ports.
- extra_port=false (Default) The port number in the schematic and the DSPF
file needs to be the same. If not, the simulation will stop.
- extra_port=true The extra ports in the DSPF subcircuit call are changed to
internal nodes. In addition, the extra ports in the schematic subcircuit definition
are connected to nodes with the same name in the DSPF netlist, otherwise, they
will be floating. A report is issued in the log file containing information on the
subcircuit ports that do not match and how to handle them.
The bus_delim option enables you to map the bus delimiter between the
schematic and DSPF|SPEF files. This option defines the bus delimiter in the
schematic netlist, and optionally the bus delimiter in the DSPF file. By default, the
bus delimiter of the DSPF file is automatically taken from the DSPF file header (that
is, *|BUSBIT [] or *|BUS_DELIMITER []). If the bus delimiter is not defined in
the parasitic file header, you need specify it in the dspf_include bus_delim
statement. If both are specified, then the parasitic file bus delimiter is taken from the
dspf_include bus_delim option.
- bus_delim="<>" A <1> is mapped to A_1 in the DSPF file, if the bus delimiter
in the DSPF file is _.
For more details you can refer to Voltus-Fi Custom Power Integrity Solution User Guide,
section “xDSPF Requirements”
https://support.cadence.com/apex/techpubDocViewerPage?xmlName=voltusFIXL.xml&sq=005d000
00043KqVAAU_2016122091722999&path=voltusFIXL/voltusFIXLIC6.1.7/voltusFIXLTOC.html#
There are three possible ways for DSPF support in AMS UNL environment.
1. Including DSPF from ADE when the DUT is bound to schematic view in HED
2. Including DSPF from ADE when the DUT is bound to spectre/other spice view in
HED
Note: use mode 1 is the recommended use model followed by use model 2 and use
model 3.
Including DSPF from ADE when the DUT is bound to schematic view in HED
In this use model, we need to specify a dspf file via DSPF include UI of AMS ADE and
bound DUT to schematic stop view in HED. UNL netlister will treat this instance as WDU.
UNL netlister will generate module definition for DUT and also print dspf_include
statement into spiceModels.scs file. AMS simulator will replace the module definition
with the definition in dspf file. The main requirement for this use model is that DUT
should have schematic view. Otherwise UNL netlister will not get ports and port order
information.
This is the recommended use model because there is no need to modify HED
configuration of pre-layout or schematic but just specify dspf include to enable post-
layout simulation.
4) From the CIW window navigate to Tools -> Library Manager to open the
Library Manager.
5) Open design.
Library: dspf_test
Cell: adc_sample_hold_sim
View: config_dspf_include
6) Open both the config and schematic view by selecting “yes” in Open
Configuration form and click Ok.
The schematic and config view will open. Below shown is the top level test bench
for adc_sample_hold circuit.
In this test bench we are going to replace the schematic view of adc_sample_hold
(highlighted in RED) block with its DSPF netlist. Let us see how to do it.
8) Click on ADE Explorer and launch Explorer by create new view and click OK.
Learn more at Cadence Online Support - https://support.cadence.com
© 2017 Cadence Design Systems, Inc. All rights reserved worldwide. Page 19
Various methods to include DSPF netlist in AMS in ADE simulations
9) Specify the view name, for example “maestro_um1” and click OK.
10) Select SetupSimulator, in the Choose Simulator form and check if the
simulator is “ams” and click OK.
12) Set the connect rules, SetupConnect Rules/IE Setup. In the opened
Interface Element Setup form, enable the IE card option for “1.8V” supply
value and click OK.
13) Under Analyses Choose option, set Transient analysis with stop
time=1u and click OK.
15) Under Parasitic Files (DSPF) AMS UNL only option browse the path to
the dspf netlist “adc_sample_hold.dspf” file.
In the lower section of the form, i.e. DSPF options provide advance functionality such
as:
Port Order option: The port order of the subcircuit definition is taken from the pre-
layout schematic netlist or from the DSPF file subcircuit definition.
Extra Port option: The extra ports in DSPF or schematic subcircuit definition
cause simulation to stop. This extra port option enables a special handing of extra
subcircuit ports.
Bus Delimiter option: This enables you to map the bus delimiter between the
schematic and DSPF files.
16) Under Simulation Netlist and Run Options, set the AMS netlister
to AMS Unified Netlister with irun (UNL).
17) Run the simulations using Simulations Netlist and Run option.
18) After the simulation complete access the simulation output log file (irun.log) from
the Simulation Output Log Irun Log.
19) Let’s analyze the irun.log file, under the irunArgs section, open the
hyperlinked file ./spiceModels.scs file.
In the spiceModels.scs file notice that the dspf file is included using the
“dspf_include” command. The spiceModels.scs file present in the simulation
netlist directory
(~/simulation/dspf_test/adc_sample_hold_sim/maestro_dspf_include/
results/maestro/ExplorerRun.0/1/dspf_test:adc_sample_hold_sim:1/
netlist/spiceModels.scs)
Again referring the irun.log look at the bindings of the adc_sample_hold block, it
shows schematic. This is because the, the binding’s information is read from HED.
Coming to the simulator section of the log file, you will find a message saying that the
dspf file is being read.
Now to assure that the simulator replaced the schematic definition of the
adc_sample_hold block with the dspf netlist, look for the below notice (highlighted
in RED) in the Irun.log file:
This ensures that the DSPF netlist has replaced the schematic definition. We can also
notice the parasitic resistors and capacitors added from dspf file from the circuit
inventory.
20) Save state if required then close the ADE Explorer, config_dspf_include HED and
schematic to move on to the next use model.
Including DSPF from ADE when the DUT is bound to spectre/other spice view in
HED
Library: dspf_test
Cell: adc_sample_hold_sim
View: config_spectre_bound
2) Open both the config and schematic view by selecting “yes” in Open
Configuration form and click Ok.
4) Click on ADE Explorer and launch Explorer by create new view and click OK.
5) Specify the view name, for example “maestro_um2” and click OK.
11) Under Parasitic Files (DSPF) AMS UNL only option browse the path to
the dspf netlist “adc_sample_hold.dspf” file.
12) Under Simulation Netlist and Run Options, set the AMS netlister
to AMS Unified Netlister with irun (UNL).
13) Run the simulations using Simulations Netlist and Run option.
14) After the simulation complete access the simulation output log file (irun.log) from
the Simulation Output Log Irun Log.
From the irun.log file, open the hyperlinked spiceModels.scs file. In the
spiceModels.scs file notice that the dspf file is included using the
“dspf_include” command.
Now to assure that the simulator replaced the schematic definition of the
adc_sample_hold block with the dspf netlist, look for the below notice (highlighted
in RED) in the Irun.log file:
This ensures that the DSPF netlist has replaced the schematic definition. Now you can
analyze your results.
15) Save the state if required then close all virtuoso sessions to move on to the next use
model.
In this use model, we can directly use DSPF views for the required instances in HED.
These DSPF views are the textual views which we can create for the cell views like
Verilog, verilogams, etc views. UNL netlister will treat this instance as BDU and will
generate binding line with “analogtext” for the instance and print dspf_include
statement into spiceModels.scs file.
The advantages of this use model is
No need to specify dspf file via DSPF Include GUI.
Netlister uses termOrder saved in dspf viewInfo inside the master cell's
CDF to print net connections in the corresponding instance line. Because dspf
viewInfo gets created based on dspf definition during dspf view
generation, netlister could make the netlisting instantiation port list order aligned
with the subckt definition port order in dspf file.
The limitations of this use model is
DSPF options can’t be easily specified like use model 1 and use model 2.
DPSF file doesn’t support soft-link yet, therefore, it’s not practical for most of
postlayout case as the DSPF file could reach as large as 10+ GB.
1) Set the below environmental variable in UNIX shell. Currently this variable is
required for the instance bound to DSPF view simulations flow.
3) From the CIW window navigate to Tools -> Library Manager to open the
Library Manager.
4) Create DSPF view for adc_sample_hold cell, for which we requires to use DSPF
netlist.
In the Library Manager select the Library and do File -> New -> Cell_View
5) Select the Cell which you want to create DSPF view and select Type as DSPF
from drop down list and Click OK.
6) RMB (right mouse button) on dspf view and click on open to open DSPF text editor.
7) Copy and Paste the text from exiting DSPF netlist file (adc_sample_hold.dspf)
to DSPF text editor.
Do Check and Save, to build a database of instance, nets and pins found in file.
Once you do check and save you will be able to see the complete design
hierarchy expanded in the Navigator pane.
This step is necessary as it will make sure that .oa file is created for the view which
is required by the netlister to netlist the design.
Library: dspf_test
Cell: adc_sample_hold_sim
View: config_dspf_view_bound
The schematic and config view opens. Let us see how to bind cell adc_sample_hold
to the newly created dspf view.
10) In the Hierarchy Editor window set “View To Use” to dspf for
adc_sample_hold block. Right click on cell Set Cell View dspf.
11) Click on ADE Explorer and launch Explorer by create new view and click OK.
12) Choose any view name and click ok to open ADE explorer window.
15) Set the connect rules, SetupConnect Rules/IE Setup. In the opened
Interface Element Setup form, enable the IE card option for “1.8V” supply
value and click OK.
16) Under Analyses Choose option, set Transient analysis with stop
time=1u and click OK.
17) Under Simulation Netlist and Run Options, set the AMS netlister
to AMS Unified Netlister with irun (UNL).
18) Run the simulations using Simulations Netlist and Run option.
19) After the simulation completes access the simulation output log file (irun.log)
from the Simulation Output Log Irun Log.
From the irun.log file, open the hyperlinked spiceModels.scs file. In the
spiceModels.scs file notice that the dspf file is included using the
“dspf_include” command.
Notice this time the path for dspf file is under the dspf view named “design.dspf”.
20) Close all virtuoso sessions and unset the CDS_ENABLE_DSPF variable (unsetenv
CDS_ENABLE_DSPF) to proceed to the next use model.
Note:
Next use model is “Specifying DSPF source file in HED” where the DSPF file
specified as external spice file will be treated as pure spice file. This flow is
significantly difference from dspf_include flow in corner case. This use model is
tough to use and most error prone. So this is not the recommended use model.
In this use model, we need to bind dspf file for the required instance via the HED
“Specify SPICE Source File” option. Like above two use models, we can’t use
DSPF Option UI but we can specify some of the properties like port order, port map, bus
delimiter, etc via sourcefile_opts property. Other options like extra port, block box
need to take care manually.
The drawback of this flow is, we need to create a new hierarchy configuration for post-
layout simulation unlike above two use models.
2) From the CIW window navigate to Tools -> Library Manager to open the
Library Manager.
Library: dspf_test
Cell: adc_sample_hold_sim
View: config_hed_include
5) Now specify the dspf netlist via HED “Specify SPICE Source File” option.
Analyze that the cell adc_sample_hold is now binded to external dspf text file.
Note: Drawback of this method is that you can’t utilize the advance DSPF options form.
7) Though we can set some of the options using sourcefile_opts property in HED.
In the main menu click view -> Properties
A new column “sourcefile_opts” is added to the Table view. Here you can
specify the extra ports, case sensitivity and port order in dspf file. All these have to be
manually taken care off.
8) Click on ADE Explorer and launch Explorer by create new view and click OK.
11) Select SetupModel Libraries, and select “gpdk090.scs” as model file and
Section as “NN” in Model Library Setup form.
12) Set the connect rules, SetupConnect Rules/IE Setup. In the opened
Interface Element Setup form, enable the IE card option for “1.8V” supply
value and click OK.
13) Under Analyses Choose option, set Transient analysis with stop
time=1u and click OK.
14) Under Simulation Netlist and Run Options, set the AMS netlister
to AMS Unified Netlister with irun (UNL).
15) Run the simulations using Simulations Netlist and Run option.
16) After the simulation complete access the simulation output log file (irun.log) from
the Simulation Output Log Irun Log.
The DSPF file to which the adc_sample_hold cell is binded is included in this file
with binding definition for the cell in the amsd block. Open this file, its present in your
netlist directory.
After reading the binding definition from “amsd” block, tool will generate the port
binding file, in this case its “adc_sample_hold.pb”. Analysis the below notice in
the irun.log file:
amsspice: *Notice
(/export/home/priyanka/MY_TEST/DSPF/dspf_include_rak/adc_sampl
e_hold.dspf): Creating and using port-bind file:
'/home/priyanka/simulation/dspf_test/adc_sample_hold_sim/maest
ro_ams/results/maestro/ExplorerRun.0/1/dspf_test:adc_sample_ho
ld_sim:1/netlist/INCA_libs/AMSD/portbind_files/adc_sample_hold
.pb'
And finally the message from analog simulator that it’s reading the dspf netlist
17) Save state if required then close all previously opened virtuoso sessions.
Summary
References
AMS User guide:
https://support.cadence.com/apex/techpubDocViewerPage?xmlName=amssimug.x
ml&sq=005d00000043KqVAAU_2016122065658138&path=amssimug/amssimug15.
2/amssimugTOC.html#
Below Article contains the PDF on Cadence Standard Parasitic Format (SPF)
Version IC1.5.1
https://support.cadence.com/apex/ArticleAttachmentPortal?id=a1Od0000000nVFIEA
2&pageName=ArticleContent&sq=005d00000043KqVAAU_2016122073015489
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