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    MPC5748GEVBUG

    Uploaded by

    BaCres
    This document provides a user guide for the MPC5748G EVB (Evaluation Board) made by Freescale Semiconductor. It describes the board features and components including peripheral daughtercards, power supply configuration, reset and clock controls, communications and memory interfaces, audio/video interfaces, user I/O, and port pin functions. Jumpers and connectors are explained to set up the board for initial use and configuration.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd

    MPC5748GEVBUG

    Uploaded by

    BaCres
    47 views88 pages
    This document provides a user guide for the MPC5748G EVB (Evaluation Board) made by Freescale Semiconductor. It describes the board features and components including peripheral daughtercards, power supply configuration, reset and clock controls, communications and memory interfaces, audio/video interfaces, user I/O, and port pin functions. Jumpers and connectors are explained to set up the board for initial use and configuration.

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    © © All Rights Reserved

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    This document provides a user guide for the MPC5748G EVB (Evaluation Board) made by Freescale Semiconductor. It describes the board features and components including peripheral daughtercards, power supply configuration, reset and clock controls, communications and memory interfaces, audio/video interfaces, user I/O, and port pin functions. Jumpers and connectors are explained to set up the board for initial use and configuration.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    47 views88 pages

    MPC5748GEVBUG

    Uploaded by

    BaCres
    This document provides a user guide for the MPC5748G EVB (Evaluation Board) made by Freescale Semiconductor. It describes the board features and components including peripheral daughtercards, power supply configuration, reset and clock controls, communications and memory interfaces, audio/video interfaces, user I/O, and port pin functions. Jumpers and connectors are explained to set up the board for initial use and configuration.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    You are on page 1of 88

    Freescale Semiconductor, Inc.

    Document Number: MPC5748GEVBUG


    User Guide Rev. 0, 08/2015

    MPC5748G EVB User Guide


    By: Alasdair Robertson

    © 2015 Freescale Semiconductor, Inc. All rights reserved.


    Contents
    1. INTRODUCTION ................................................................................................................................................................................. 3
    1.1. Peripheral Daughtercards............................................................................................................................................................. 3
    2. EVB FEATURES .................................................................................................................................................................................. 3
    3. CONFIGURATION OVERVIEW ......................................................................................................................................................... 5
    4. MCU DAUGHTERCARD INFORMATION ........................................................................................................................................ 6
    4.1. Fitting a daughtercard .................................................................................................................................................................. 6
    4.2. Removing a daughtercard ............................................................................................................................................................ 6
    5. INITIAL CONFIGURATION ............................................................................................................................................................... 7
    5.1. Power Supply Configuration ....................................................................................................................................................... 7
    5.1.1. Power Supply Connectors (P21, P23) .................................................................................................................................... 7
    5.1.2. Power Switch (SW5) .............................................................................................................................................................. 8
    5.1.3. Regulator Power Jumper (J23) ............................................................................................................................................... 8
    5.1.4. Power Status LED’s and Fuse ................................................................................................................................................ 8
    5.1.5. MCU Power Supply Jumpers (J18, J19, J20, J21, J22, J23) .................................................................................................. 9
    5.1.6. Daughtercard Power Jumpers (J3 to J11) ............................................................................................................................. 10
    5.1.7. Peripheral Power Supply Jumpers (J24, J25) ....................................................................................................................... 11
    5.1.8. EVB Voltage Regulators ...................................................................................................................................................... 11
    5.2. Reset Control (J9, SW1) ............................................................................................................................................................ 13
    Note that removing jumper J9 will mean that an external reset source will not reset the MCU. This will impact most debuggers
    which will typically issue a reset before establishing a debug connection. .......................................................................................... 13
    5.2.1. Reset LEDs........................................................................................................................................................................... 13
    5.3. MCU Clock Configuration ........................................................................................................................................................ 14
    5.3.1. External Clock Input (P7) ..................................................................................................................................................... 15
    5.3.2. MCU Clock Configuration (J1, J2 on Daughtercard) ........................................................................................................... 15
    5.4. Debug Connectors (P8, P10) ..................................................................................................................................................... 16
    5.4.1. Debug Connector Pinouts ..................................................................................................................................................... 16
    6. COMMUNICATIONS & MEMORY INTERFACES: ........................................................................................................................ 17
    6.1. CAN Interfaces (P14, P15, J14, J15) ......................................................................................................................................... 17
    6.2. LIN Interfaces (P9, P11, J10, J12) ............................................................................................................................................. 18
    6.3. USB RS232 Serial Interface (P17, J16) ..................................................................................................................................... 19
    6.4. USB HOST / OTG Interfaces .................................................................................................................................................... 20
    6.5. Ethernet (P6, J5, J6, J7, J8, R45, R80)....................................................................................................................................... 20
    6.6. FlexRay (P2, P3, J1, J2, J3, J4).................................................................................................................................................. 22
    6.7. SD Card Socket (P200).............................................................................................................................................................. 23
    7. AV INTERFACE CONNECTORS...................................................................................................................................................... 23
    7.1. SAI Audio Connectors (P24, P25) ............................................................................................................................................. 23
    7.2. TWRPI Connectors (P26, P27) .................................................................................................................................................. 25
    7.3. MLB Daughtercard Connector (P16)......................................................................................................................................... 25
    8. USER INTERFACE (I/O) .................................................................................................................................................................... 26
    8.1. GPIO Matrix .............................................................................................................................................................................. 26
    8.2. User Switches (SW3, SW4, SW6, SW7, P22) ........................................................................................................................... 27
    8.3. Hex Encoder Switch (SW2, J26, P20) ....................................................................................................................................... 28
    8.4. User LED’s (DS2, DS3, DS7, DS8, P19) .................................................................................................................................. 29
    8.5. ADC Input Potentiometer (J17, RV1) ....................................................................................................................................... 29
    9. MCU PORT PIN EVB FUNCTIONS .................................................................................................................................................. 30
    10. DEFAULT JUMPER SUMMARY TABLE ........................................................................................................................................ 31
    11. DEFAULT JUMPER DIAGRAM ....................................................................................................................................................... 33
    12. REVISION HISTORY ......................................................................................................................................................................... 33
    13. APPENDIX .......................................................................................................................................................................................... 34

    MPC5748G EVB User Guide, User Guide, Rev. 0, 08/2015


    2 Freescale Semiconductor, Inc.
    1. Introduction
    This user guide details the setup and configuration of the Freescale MPC5748G customer Evaluation
    Board (hereafter referred to as the EVB). The EVB is intended to provide a mechanism for easy
    evaluation of the MPC5748G family of microcontrollers, and to facilitate hardware and software
    development. Various daughtercards are available which connect to the EVB via two high density
    connectors. Please consult your Freescale representative for more details on daughtercard pricing and
    availability.
    The EVB is intended for bench / laboratory use and has been designed using normal temperature
    specified components (+70°C).
    This product contains components that may be damaged by electrostatic discharge. Observe precautions
    for handling electrostatic sensitive devices when using this EVB and associated microcontroller.
    The user manual is intended to be read alongside the respective MCU documentation available at
    www.freescale.com and includes:
     Reference Manuals
     Product Data Sheets
     Application notes
     Chip Errata

    1.1. Peripheral Daughtercards


    The EVB has connectors for various peripheral daughtercards (for example MLB) that provide
    additional peripheral functionality. These are not supplied with the EVB and must be sourced separately.
    Please contact your Freescale representative for pricing and availability.

    2. EVB Features
    The EVB provides the following key features:
     Single 10-14 V DC external power supply input with on-board regulators to provide all of the
    necessary EVB and MCU voltages. Power may be supplied to the EVB via a 2.1 mm barrel style
    power jack or a 2-way screw type connector. 12 V operation allows in-car use if desired.
     Master power switch and regulator status LED’s.
     USB Serial interface
     2 x High Speed CAN transceiver routed to 3-way headers
     2 x LIN interfaces routed to standard Molex headers
     Main clock supplied from on board crystal or SMA connector
     User reset switch with reset status LED’s
     Ethernet PHY and RJ45 socket configurable as RMII or MII
     USB Type A Host interface
     USB Type AB (micro USB) OTG interface

    MPC5748G EVB User Guide, User Guide, Rev. 0, 08/2015


    3 Freescale Semiconductor, Inc.
     2 x FlexRay interfaces with standard 2-pin connectors
     14-pin JTAG and 50 pin Nexus (Trace) connectors
     2 x High Density daughter card connectors allowing an MCU specific daughtercard to be fitted1
     MLB daughtercard connector
     SAI Audio board connectors (2 x 0.1 inch pitch headers and 2 x TWRPI style headers)
     SD connector (mounted to the underside of the board) supporting hardware write protect and
    card detection
     4 user LEDs wired to MCU ports, also available at a user header
     4 user pushbutton switches wired to MCU ports, also available at a user header
     Hexadecimal encoded switch wired to 4 MCU ports, also available at a user header
     Simple potentiometer connected to analogue input channel

    NOTE
    To alleviate confusion between jumpers and connector headers, all EVB
    jumpers are 2 mm pitch whereas headers are 0.1 inch (2.54 mm). This
    prevents inadvertently fitting a jumper to a header.

    1
    There is no MCU fitted to the EVB. A daughtercard must be fitted before the EVB can be used.

    MPC5748G EVB User Guide, User Guide, Rev. 0, 08/2015


    4 Freescale Semiconductor, Inc.
    Configuration Overview

    3. Configuration Overview
    Throughout this document, all of the default jumper and switch settings are clearly marked with “(D)”
    and are shown in blue text. This allows a more rapid return to the default state of the EVB if required.
    Note that the default configuration for 3-way jumpers is a header fitted between pins 1 and 2. On the
    EVB, 2-way, and 3-way jumpers have been aligned such that pin1 is either to the top or to the left of the
    jumper. On 2-way jumpers, the source of the signal is connected to pin1.
    The EVB has been designed with ease of use in mind and has been segmented into functional blocks as
    shown below. Detailed silkscreen legend has been used throughout the board to identify all switches,
    jumpers and user connectors.

    Figure 1. EVB Functional Blocks

    MPC5748G EVB User Guide, User Guide, Rev. 0, 08/2015


    Freescale Semiconductor, Inc. 5
    4. MCU Daughtercard information
    In order to use the EVB, an MCU daughtercard must be fitted as described in the following section.
    Before fitting or removing a daughtercard, ensure the EVB is powered OFF

    4.1. Fitting a daughtercard


    Gently place the daughtercard on the EVB connectors ensuring the correct orientation as shown in the
    following figure. The connectors are polarized so the daughtercard will only fit in one orientation (with
    the jumpers at the bottom of the daughtercard). Once the connectors have been located correctly, firmly
    push down all four corners of the daughter card simultaneously in order to ensure the connectors are
    mated. (The following picture also shows the default jumper positions for the 256BGA daughtercard)

    Figure 2. Daughtercard Fitted to EVB

    4.2. Removing a daughtercard


    In order to prevent damage to the daughtercard connectors, it is important to remove the daughtercard
    correctly. Carefully lift either the top or bottom edge of the daughtercard and it should easily lift off as
    shown in the following figure (viewed from the left side of the EVB).

    Figure 3. Removing a daughtercard

    CAUTION
    Do not attempt to lift the left or right edge of the daughtercard as this will
    result in connector damage.

    MPC5748G EVB User Guide, User Guide, Rev. 0, 08/2015


    6 Freescale Semiconductor, Inc.
    Initial Configuration

    5. Initial Configuration
    This section details the power, reset, clocks, and debug configuration which is the minimum
    configuration needed in order to power ON the EVB.

    The Power supply


    5.1. Power Supply Configuration section is located in
    the bottom left
    corner of the EVB

    The EVB requires an external power supply voltage of between 10 V-14 V DC (nominal 12 V),
    minimum 2 A. This allows the EVB to be used in a vehicle if required. The 12 V input is regulated on
    the EVB using two switching and three linear regulators to provide the required voltages of 5.0 V, 3.3 V
    (both linear and switcher) and 1.25 V (linear). For flexibility, there are two power supply input
    connectors on the EVB as detailed below:

    5.1.1. Power Supply Connectors (P21, P23)


     2.1 mm Barrel Connector – P21
    This connector should be used to connect the supplied wall-plug mains adapter. Note – if a
    replacement or alternative adapter is used, care must be taken to ensure the 2.1 mm plug uses the
    correct polarisation as shown below:

    Figure 4. 2.1mm Power Connector

     2-Way Screw Type Connector – P23


    This can be used to connect a bare wire lead to the EVB, typically from a laboratory power supply.
    The polarisation of the connectors is clearly marked on the EVB. Care must be taken to ensure
    correct connection.

    Figure 5. 2-Lever Power Connector

    MPC5748G EVB User Guide, User Guide, Rev. 0, 08/2015


    Freescale Semiconductor, Inc. 7
    5.1.2. Power Switch (SW5)
    Slide switch SW5 can be used to isolate the power supply input from the EVB voltage regulators if
    required.
     Moving the slide switch to the right (away from the fuse) will turn the EVB OFF.
     Moving the slide switch to the left (towards the fuse) will turn the EVB ON.

    5.1.3. Regulator Power Jumper (J23)


    All of the regulators are permanently powered from the main 12 V supply line and active with the
    exception of the 1.25 V linear regulator which has a 3-way jumper to allow selection of the input
    voltage.
    The table below details the jumper configurations for the linear 1.25 V regulator source voltage. By
    default, the regulator is powered from the 12 V supply line.

    Table 1. 1.25 V Linear Regulator Source Select (J23)


    Jumper Position PCB Legend Description
    1-2 (D) 12V 1.25V Linear regulator is powered from main 12V
    J23 2-3 5V 1.25V Linear regulator is powered from 5V switching regulator output
    (INPUT SEL)
    Removed 1.25V Linear regulator is not powered (disabled)

    5.1.4. Power Status LED’s and Fuse


    When power is applied to the EVB, five green LED’s adjacent to the voltage regulators show the
    presence of the supply voltages as follows:
     LED DS4 – Indicates that the 1.25V linear regulator is enabled and working correctly
     LED DS5 – Indicates that the 5.0V linear regulator is enabled and working correctly
     LED DS6 – Indicates that the 3.3V linear regulator is enabled and working correctly
     LED DS9 – Indicates that the 5.0V switching regulator is enabled and working correctly
     LED DS10 – Indicates that the 3.3V switching regulator is enabled and working correctly
    If no LED’s are illuminated when power is applied to the EVB and the regulators are correctly enabled
    using the appropriate jumpers, it is possible that either power switch SW5 is in the “OFF” position or
    that the fuse F1 has blown. The fuse is provided to protect the external power supply and for EVB
    circuitry reverse-bias protection. If the fuse has blown, check the polarity of your power supply and
    replace the fuse with a 20 mm 1.5 A fast blow fuse.
    Note that the fuse will not protect against one of the EVB regulators being shorted. If this happens,
    damage is likely to occur to the EVB and / or components.
    CAUTION
    In the event of a short in the regulator output, the regulator and/or the
    shorted component may be hot

    MPC5748G EVB User Guide, User Guide, Rev. 0, 08/2015


    8 Freescale Semiconductor, Inc.
    Initial Configuration

    5.1.5. MCU Power Supply Jumpers The MCU Daughtercard


    power jumpers are in the
    (J18, J19, J20, J21, J22, J23) bottom left quarter of the
    EVB, above the power
    area

    All of the regulated power supplies are routed to the MCU daughtercard via jumpers. This allows each
    power supply to be individually isolated and facilitates current measurement at the respective jumper.
    Note that only the daughtercard is connected to the power lines after the jumpers so MCU current
    measurements are accurate. There are an additional two jumpers that control the voltages used by EVB
    peripherals connected to the VDD_HV_A and VDD_HV_B domains as described in section 5.1.7.

    Figure 6. Power Supply Jumper Schematic

    MPC5748G EVB User Guide, User Guide, Rev. 0, 08/2015


    Freescale Semiconductor, Inc. 9
    The power supply jumper description table is shown in the following table:

    Table 2. Daughter Card Power Supply Jumpers (on main board)


    Jumper Position PCB Legend Description
    J18 Fitted (D) 1.25V Linear regulator output is routed to daughter card
    1V25L Removed 1.25V Linear regulator output is disconnected from daughtercard
    J19 Fitted (D) 5.0V Switching regulator output is routed to daughter card
    5V0S Removed 5.0V Switching regulator output is disconnected from daughtercard
    J20 Fitted (D) 3.3V Linear regulator output is routed to daughter card
    3V3L Removed 3.3V Linear regulator output is disconnected from daughtercard
    J21 Fitted (D) 5.0V Linear regulator output is routed to daughter card
    5V0L Removed 5.0V Linear regulator output is disconnected from daughtercard
    J22 Fitted (D) 3.3V Switching regulator output is routed to daughter card
    3V3S Removed 3.3V Switching regulator output is disconnected from daughtercard
    J23 1-2 (D) 12V 1.25v Linear regulator is powered by main 12V input
    INPUT SEL 2-3 5V 1.25v Linear regulator is powered by output from 5.0V switching reg
    (Above Power
    Jack) Removed 1.25v Linear regulator is not powered (disabled)

    5.1.6. Daughtercard Power Jumpers (J3 to J11)


    The following power control jumpers are located on the MCU daughtercard. Note that not all of the
    jumpers will be on each daughtercard variant.

    Table 3. MCU Power Supply Jumpers (on daughtercard)


    Jumper Position PCB Legend Description
    1-2 (D) 3V3 MCU ADC0 pin is connected to 3.3V (Linear)
    J3
    ADC0 2-3 5V0 MCU ADC0 pin is connected to 5.0V (Linear)
    Removed MCU ADC0 pin is not connected to power
    1-2 (D) 3V3 MCU ADC1 pin is connected to 3.3V (Linear)
    J4
    ADC1 2-3 5V0 MCU ADC1 pin is connected to 5.0V (Linear)
    Removed MCU ADC1 pin is not connected to power
    1-2 (D) 3V3 MCU VDD_HV_A domain is connected to 3.3V (Switching Regulator)
    J5
    HVA 2-3 5V0 MCU VDD_HV_A domain is connected to 5.0V (Switching Regulator)
    Removed MCU VDD_HV_A domain is not connected to power
    1-2 (D) 3V3 MCU VDD_HV_B domain is connected to 3.3V (Switching Regulator)
    J6
    HVB 2-3 5V0 MCU VDD_HV_B domain is connected to 5.0V (Switching Regulator)
    Removed MCU VDD_HV_B domain is not connected to power
    1-2 (D) 3V3 MCU VDD_HV_C domain is connected to 3.3V (Switching Regulator)
    J7
    HVC 2-3 5V0 MCU VDD_HV_C domain is connected to 5.0V (Switching Regulator)
    Removed MCU VDD_HV_C domain is not connected to power

    MPC5748G EVB User Guide, User Guide, Rev. 0, 08/2015


    10 Freescale Semiconductor, Inc.
    Initial Configuration

    Jumper Position PCB Legend Description


    J8 2 Fitted (D) MCU VDD_HV_FLA pin is connected to 3.3v (Switching Regulator)
    FLA Removed MCU VDD_HV_C domain is connected to 5.0V (Switching Regulator)
    1-2 (D) 3V3 MCU ballast transistor collector is connected to 3.3V (Switching)
    J9
    REG 2-3 5V0 MCU ballast transistor collector is connected to 5.0V(Switching)
    Removed MCU ballast transistor collector is not connected to power
    1-2 (D) REG MCU VDD_LV domain is powered from ballast transistor
    J10
    VDDLV 2-3 1V25L MCU VDD_LV domain is powered from 1.25V Linear regulator
    Removed MCU VDD_LV domain is not powered
    1-2 (D) HVA MCU VIN1_CMP_REF is powered from VDD_HV_A
    J11
    DAC 2-3 USR MCU VIN1_CMP_REF is powered from user testpoint (TPH3)
    Removed MCU VIN1_CMP_REF is not powered

    The peripheral power


    5.1.7. Peripheral Power Supply Jumpers (J24, J25) jumpers are in the bottom
    left quarter of the EVB,
    above the power area

    There are two additional power supply jumpers controlling the I/O voltage for the peripherals on the
    EVB in the HVA and HVB voltage domains.
    The settings on these jumpers must match the VDD_HV_A and VDD_HV_B jumper voltage setting on
    the MCU daughtercard.
    The default configuration matches the MCU daughtercard default configuration with both jumpers set to
    3.3V.

    Table 4. Peripheral Power Control (J24, J25)


    Jumper Position PCB Legend Description
    1-2 (D) 3V3 EVB peripherals in HVA domain are set to use I/O voltage of 3.3V
    J24
    2-3 5V0 EVB peripherals in HVA domain are set to use I/O voltage of 5.0V
    HVA
    Removed Invalid Configuration, avoid!
    1-2 (D) 3V3 EVB peripherals in HVB domain are set to use I/O voltage of 3.3V
    J25
    2-3 5V0 EVB peripherals in HVB domain are set to use I/O voltage of 5.0V
    HVB
    Removed Invalid Configuration, avoid!

    5.1.8. EVB Voltage Regulators


    The following table shows the usage of each EVB voltage regulator. This provides a useful cross
    reference point should any regulator be disabled. In addition, the distribution of the peripheral voltages
    HVA (J24) and HVB (J25) are shown.

    2
    Note that jumper J8 (FLA) jumper must only be fitted when VDD_HV_A (J5) is connected to 3.3V.

    MPC5748G EVB User Guide, User Guide, Rev. 0, 08/2015


    Freescale Semiconductor, Inc. 11
    Table 5. Power Supply Distribution
    Regulator Used On
    All voltage regulators (switching and Linear, jumper selectable on 1.25V linear)
    12V 1.25V linear regulator LED supply via FET
    (Unregulated) MCU Daughtercard connector
    P12V MLB Daughtercard connector
    FlexRay transceiver VBAT pin
    Daughtercard connector (post daughtercard power jumper)
    Daughtercard connector (direct feed via zero ohm link)
    Peripheral power control jumpers (position 2-3)
    CAN transceivers VCC (main power)
    5.0V
    USB RS232 (FTDI) transceiver (main power and protection diode)
    Switcher
    USB Host / OTG transceiver power (VBAT) pin
    5V0_SR
    FlexRay Transceiver power pins (VCC / VBUF)
    SAI Audio connector
    Input to 1.25V linear regulator (in alternate jumper configuration)

    Daughtercard connector (post daughtercard power jumper)


    Daughtercard connector (direct feed via zero ohm link)
    Peripheral power control jumpers (position 1-2)
    Reset LED’s (user and target)
    USB HOST / OTG transceiver I/O voltage (USB operation is fixed at 3.3V)3
    3.3V
    Ethernet Transceiver supply and I/O (Ethernet operation is fixed at 3.3V) 3
    Switcher
    SAI Audio connector
    3V3_SR
    MLB Daughtercard connector
    SD Card power supply / pullup resistors (SD Card operation is fixed at 3.3V)3
    User LED’s supply voltage
    Hex encoder switch supply voltage
    User pushbutton switches supply voltage
    5.0V
    Daughtercard connector (post daughtercard power jumper)
    Linear
    Daughtercard connector (direct feed via zero ohm link)
    5V0_LR
    Daughtercard connector (post daughtercard power jumper)
    3.3V
    Daughtercard connector (direct feed via zero ohm link)
    Linear
    MLB Daughtercard connector
    3V3_LR
    ADC Input Pot (user variable resistor)
    1.25V
    Daughtercard connector (post daughtercard power jumper)
    Linear
    Daughtercard connector (direct feed via zero ohm link)
    1V25_LR
    Reset control circuitry (including reset pullup)
    JTAG Pullup resistors & reference voltage
    CAN Transceiver I/O Voltage select
    J24 PER_HVA
    LIN Transceiver Enable (and I/O voltage select)
    USB RS232 (FTDI) transceiver I/O voltage select
    FlexRay Transceiver I/O Voltage select (and pullups)
    J25 PER_HVB Nexus Connector reference voltage and Pullups

    3
    These voltages are fixed due to device specifications and cannot be changed.

    MPC5748G EVB User Guide, User Guide, Rev. 0, 08/2015


    12 Freescale Semiconductor, Inc.
    Initial Configuration

    Note that the JTAG pins are in domain VDD_HV_A whereas the Nexus pins are VDD_HV_B.
    Normally this would mean that for trace, the HVA and HVB domains should be at the same voltage
    however some development tools can automatically adapt to the voltages on the trace signals. Please
    consult your tools vendor for further details.

    The reset circuitry and


    5.2. Reset Control (J9, SW1) switch are located in the
    top left quarter of the
    EVB next to theRJ45
    connector
    The MCU has a single bi-directional open drain Reset pin. Rather than connect multiple devices to the
    reset pin directly, a reset-in and reset-out buffering scheme has been implemented on the EVB as shown
    in Figure 7 below. The reset “in” from the reset switch (SW1) and the debug connectors are logically
    OR’d together using an AND gate and then connected to the buffer to provide an open-drain output.
    The “reset-out” circuitry provides a buffered reset signal that can be used to drive any circuitry requiring
    a reset control from the MCU.

    Figure 7. EVB Reset Control

    Jumper J9 is used to disconnect the reset signal from the external reset sources if required.

    Table 6. Reset Control (J9)


    Jumper Position PCB Legend Description
    Fitted (D) Reset from reset switch and debug connectors is active
    J9 (EN)
    Removed Reset from reset switch and debug connectors is inactive

    Note that removing jumper J9 will mean that an external reset source will not reset the MCU. This will
    impact most debuggers which will typically issue a reset before establishing a debug connection.

    5.2.1. Reset LEDs


    As can be seen in Figure 7 above, there are two reset LED’s that can be used to identify the source /
    cause of a reset:

    MPC5748G EVB User Guide, User Guide, Rev. 0, 08/2015


    Freescale Semiconductor, Inc. 13
    RED LED D1 (titled “MCU”) will illuminate if:
     The MCU issues a reset (in this condition ONLY this LED will be illuminated and LED DS1
    will be off)
     There is a target reset (ie from the reset switch or from the debugger in which case LED DS1
    will be ON)
    YELLOW LED DS1 (titled “USR”) will illuminate when an external hardware device issues a reset to
    the MCU:
     The reset switch is pressed
     There is a reset being driven from one of the debug connectors

    Table 7. Reset LED Decoding


    LED DS1 (Yellow) LED D1 (Red) Description
    OFF OFF No Reset being issued from MCU or external logic
    OFF ON MCU has issued a reset
    External reset issued from switch or debug BUT not being issued to MCU
    ON OFF
    (check J9 is fitted on the EVB)
    ON ON External reset issued from reset switch or debug and has been issued to MCU.

    5.3. MCU Clock Configuration


    There are 2 clock configuration jumpers on the daughtercard and an external clock input connector on
    the main board to allow an externally generated clock to be supplied if desired. See Figure 8 below.

    Figure 8. EVB Clock Selection

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    14 Freescale Semiconductor, Inc.
    Initial Configuration

    5.3.1. External Clock Input (P7) The external SMA


    clock connector is
    located in the top left
    corner of the EVB

    The external clock input on the EVB is applied via SMA connector P7. When driving an external clock
    into the SMA connector, the jumpers on the daughtercard must be reconfigured to route the external
    clock to the MCU.
    Note that the following conditions must be met when supplying an external clock:
     The clock frequency must be between 8MHz and 40MHz
     The amplitude of the clock input should not exceed the voltage being driven into the
    VDD_HV_A pins. This is selectable between 3.3V and 5.0V on the daughtercard.

    5.3.2. MCU Clock Configuration (J1, J2 on Daughtercard)


    There are two external clock crystals on the MPC5748G daughtercards:
     40MHz fast external crystal for clocking the main system clock
     32KHz slow external crystal for accurate time of day keeping
    The 40MHz crystal is connected to the MCU XTAL and EXTAL pins via 3-way jumper headers as
    shown in the diagram above. These jumpers allow an external clock to be routed from the SMA
    connector (P7) on the main board if desired. The default configuration is with both daughtercard
    jumpers (J1 and J2) set to position 1-2 which routes the external 40MHz crystal to the MCU pins. If you
    wish to supply a clock via the SMA connector on the main EVB, move the daughtercard jumpers J1 and
    J2 to position 2-3.
    The 32 KHz external crystal is permanently connected to the MCU EXTAL32 and XTAL32 pins and
    has no configuration options.

    Table 8. EXTAL Clock Source Selection (J1, J2 Daughtercard)


    Jumper Position PCB Legend Description
    1-2 (D) Y1 MCU XTAL signal is routed to crystal Y1
    J1 (XTAL)
    2-3 GND MCU XTAL signal is Grounded (for ext clock mode)4
    1-2 (D) Y1 MCU EXTAL signal is routed to crystal Y1
    J2 (EXTAL)
    2-3 EXT MCU EXTAL signal is routed from EVB SMA P7

    4
    Note that the XTAL pin is left open by default with J1 in position 2-3. Resistor R34 must be populated with a zero
    ohm resistor in order to ground the XTAL pin.

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    Freescale Semiconductor, Inc. 15
    The JTAG and
    5.4. Debug Connectors (P8, P10) Nexus debug
    connectors are in
    The EVB provides two debug connectors: the top right corner
    of the EVB
     Standard 14 pin JTAG
     50 Pin Nexus connector (Samtec ASP-148422-01, Nexus Standard HP50 connector)
    There is no user configuration required to use the connectors however the following points should be
    noted:
     The JTAG connector is routed to the JTAG signals in the default position which are powered
    from the MCU VDD_HV_A power domain. The Nexus signals are located in the VDD_HV_B
    power domain. If you are using Nexus, you may have to ensure that the VDD_HV_A and
    VDD_HV_B domains are at the same voltage. Consult your tools vendor for specific information
     The Nexus signals are not bonded out in every MCU package. Before using Nexus, please ensure
    the MCU fitted to the EVB (via the daughtercard) supports the Nexus signals.

    5.4.1. Debug Connector Pinouts


    The following tables list the pinouts for each of the debug connectors used on the EVB

    Table 9. 14-Pin JTAG Debug Connector Pinout


    Pin No Function Connection Pin No Function Connection
    1 TDI PC0 2 GND GND
    3 TDO PC1 4 GND GND
    5 TCLK PH9 6 GND GND
    7 EVTI PL8 8 N/C ---
    9 RESET JTAG-RSTx 10 TMS PH10
    11 VREF PER_HVA 12 GND GND
    13 RDY --- 14 JCOMP 10K Pulldown

    Table 10. 50-pin Samtec (Nexus) Debug Connector Pinout


    Pin No Function Connection Pin No Function Connection
    1 MSEO_0 PL9 2 VREF PER_HVB
    3 MSEO_1 PL11 4 TCK PH9
    5 GND GND 6 TMS PH10
    7 MDO0 PL2 8 TDI PC0
    9 MDO1 PL3 10 TDO PC1
    11 GND GND 12 JCOMP 10K Pulldown
    13 MDO2 PL4 14 RDY ---
    15 MDO3 PL5 16 EVTI PL8
    17 GND GND 18 EVTO PL12
    19 MCKO PL10 20 RESET DBUG_RST
    21 MDO4 PL6 22 RST_OUT MCU_RST
    23 GND GND 24 GND GND
    25 MDO5 PL7 26 CLKOUT Test Point
    27 MDO6 PL13 28 TD/WT ---
    29 GND GND 30 GND GND

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    16 Freescale Semiconductor, Inc.
    Communications & Memory Interfaces:

    Pin No Function Connection Pin No Function Connection


    31 MDO7 PL14 32 DAI1 ---
    33 MDO8 PL15 34 DAI2 ---
    35 GND GND 36 GND GND
    37 MDO9 PM0 38 ARBREQ ---
    39 MDO10 PM1 40 ARBGRT ---
    41 GND GND 42 GND GND
    43 MD011 PM2 44 MDO13 PM8
    45 MDO12 PM7 46 MDO14 PM9
    47 GND GND 48 GND GND
    49 MDO15 PM10 50 N/C ---

    6. Communications & Memory Interfaces:


    This section details the communication interface and storage peripherals that are implemented on the
    EVB.

    The CAN Physical


    6.1. CAN Interfaces (P14, P15, J14, J15) interface circuits are
    located on the left
    edge of the EVB

    The EVB incorporates two identical CAN interface circuits connected to MCU CAN0 and CAN1 using
    MC33901 transceivers. Both transceivers are configured for high speed operation by pulling pin 8 to
    GND via a 4.7K Ohm resistor. There are test points to allow the Select pin to be driven high if desired.
    The MC33901 is pin compatible with other CAN transceivers supporting full CAN FD data rates.
    For flexibility, the CAN transceiver I/O is connected to a standard 0.1” connector (P14 for CAN1 / P15
    for CAN0) rather than using non standard DB9 connectors. The pinout of these headers is shown below
    and is also detailed on the PCB silkscreen

    H L GND

    Figure 9. CAN Physical Interface Connectors

    The CAN0 and CAN1 MCU TX/RX signals are jumpered as shown in the table below to allow the
    transceivers to be isolated from the respective MCU pin if desired. The default configuration is with all
    jumper headers fitted routing the TX and RX signals to the MCU.

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    Freescale Semiconductor, Inc. 17
    Table 11. CAN Control Jumpers (J51, J53)
    Jumper Position PCB Legend Description
    J15 (CAN0) FITTED (D) MCU CAN0_TX signal (PB0) is routed to CAN interface
    TX
    Posn 1-2 Removed MCU CAN0_TX signal (PB0) is not routed to CAN interface
    J15 (CAN0) FITTED (D) MCU CAN0_RX signal (PB1) is routed to CAN interface
    RX
    Posn 3-4 Removed MCU CAN0_RX signal (PB1) is not routed to CAN interface
    J14 (CAN1) FITTED (D) MCU CAN1_TX signal (PC10) is routed to CAN interface
    TX
    Posn 1-2 Removed MCU CAN1_TX signal (PC10) is not routed to CAN interface
    J14 (CAN1) FITTED (D) MCU CAN1_RX signal (PC11) is routed to CAN interface
    RX
    Posn 3-4 Removed MCU CAN1_RX signal (PC11) is not routed to CAN interface

    NOTE
    Care should be taken when fitting the jumper headers to the 2x2 jumper
    blocks J14 and J15 as they can easily be fitted in the incorrect orientation.
    Jumper headers should be fitted horizontally.

    The CAN TX / RX MCU pins are powered from the VDD_HV_A domain, which is configured between
    3.3V and 5.0V on the daughtercard using jumper J5. The CAN transceivers I/O voltage is connected to
    the PER_HVA net configured with jumper J24 on the main EVB. Care must be taken to ensure that the
    MCU VDD_HV_A and PER_HVA supplies are the same when using the CAN transceiver.

    The LIN Physical


    6.2. LIN Interfaces (P9, P11, J10, J12) interface circuits are
    located on the left
    edge of the EVB

    The EVB incorporates two identical LIN transceiver circuits connected to MCU LIN0 and LIN1 using a
    Freescale MC33662LEF transceiver supporting both master and slave mode (jumper selectable)
    The output from the LIN transceiver is connected to a standard 4-pin Molex connector as used on most
    other Freescale EVB’s supporting LIN as shown in the following figure:

    Figure 10. LIN Molex Physical Interface Connector

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    18 Freescale Semiconductor, Inc.
    Communications & Memory Interfaces:

    The LIN0 and LIN1 MCU TX/RX signals are jumpered as shown in the following to allow the
    transceivers to be isolated from the respective MCU pin if desired. The default configuration is with all
    jumper headers fitted routing the TX and RX signals to the MCU.
    Each transceiver also has a master mode enable jumper which is fitted by default to configure the
    transceiver for Master mode. To configure the transceiver for slave mode, remove the respective
    “Master_EN” jumper.

    Table 12. LIN Control Jumpers (J10, J11, J12, J13)


    Jumper Position PCB Legend Description
    J10 (LIN0) FITTED (D) MCU LIN0_RX signal (PB3) is routed to LIN0 interface
    RX
    Posn 1-2 Removed MCU LIN0_RX signal (PB3) is not routed to LIN0 interface
    J10 (LIN0) FITTED (D) MCU LIN0_TX signal (PB2) is routed to LIN0 interface
    TX
    Posn 3-4 Removed MCU LIN0_TX signal (PB2) is not routed to LIN0 interface
    J11 FITTED (D) LIN0 is configured in Master Mode
    (Master_EN) Removed LIN0 is configured in Slave Mode
    J12 (LIN1) FITTED (D) MCU LIN1_TX signal (PC7) is routed to LIN1 interface
    RX
    Posn 1-2 Removed MCU LIN1_TX signal (PC7) is not routed to LIN1 interface
    J12 (LIN1) FITTED (D) MCU LIN1_RX signal (PC6) is routed to LIN interface
    TX
    Posn 3-4 Removed MCU LIN1_RX signal (PC6) is not routed to LIN interface
    J13 FITTED (D) LIN1 is configured in Master Mode
    (Master_EN) Removed LIN1 is configured in Slave Mode

    NOTE
    Care should be taken when fitting the jumper headers to the 2x2 jumper
    blocks J10 and J12 as they can easily be fitted in the incorrect orientation.
    Jumper headers should be fitted horizontally
    The LIN TX / RX MCU pins are powered from the VDD_HV_A domain, which is configured between
    3.3V and 5.0V on the daughtercard using jumper J5. The LIN transceivers enable pin is connected to the
    PER_HVA net configured with jumper J24 on the main EVB. Care must be taken to ensure that the
    MCU VDD_HV_A and PER_HVA supplies are the same when using the LIN transceiver.
    Note that in order for the LIN transceiver to function, external power must be supplied via pin 3 of the
    molex connector as detailed in Figure 10.

    6.3. USB RS232 Serial Interface (P17, J16) The USB RS232
    interface is on the
    left hand edge of the
    board (USB Type B
    socket)
    The EVB incorporates a USB RS232 serial interface providing RS232 connectivity via a direct USB
    connection between the PC and the EVB. The circuit contains an FTDI FT2232D USB to Serial
    interface which should automatically install the drivers for two additional COM ports on your PC. Note
    that only one of these is used so you will need to try both (usually the higher numbered COM port is the
    active one). For more information on the USB drivers and general fault finding, consult the FTDI
    website at http://www.ftdichip.com/
    The MCU LIN2 signals are routed to the FTDI transceiver via a 2-way jumper header (J16) allowing the
    transceiver to be isolated from the MCU pin if desired. The default configuration is with the jumper

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    Freescale Semiconductor, Inc. 19
    header fitted, routing the TX and RX signals from the MCU to the FTDI transceiver. No other
    configuration is required.

    Table 13. USB RS232 Control Jumpers


    Jumper Position PCB Legend Description
    J16 FITTED (D) MCU LIN2_RX signal (PC9) is routed to the FTDI interface
    RX
    Posn 1-2 Removed MCU LIN2_RX signal (PC9) is not routed to the FTDI interface
    J16 FITTED (D) MCU LIN2_TX signal (PC8) is routed to the FTDI interface
    TX
    Posn 3-4 Removed MCU LIN2_TX signal (PC8) is not routed to the FTDI interface

    NOTE
    Care should be taken when fitting the jumper headers to the 2x2 jumper
    block J16 as they can easily be fitted in the incorrect orientation. Jumper
    headers should be fitted horizontally.
    The MCU LIN2 (SCI) pins are powered from the VDD_HV_A domain, which is configured between
    3.3V and 5.0V on the daughtercard using jumper J5. The FTDI transceiver I/O voltage pin is connected
    to the PER_HVA net configured with jumper J24 on the main EVB. Care must be taken to ensure that
    the MCU VDD_HV_A and PER_HVA supplies are the same when using the FTDI transceiver.

    The USB interfaces


    6.4. USB HOST / OTG Interfaces are on the top right
    quarter on the board
    on the top edge

    The EVB includes Type A (Host) and Type AB (OTG) USB interfaces, routed to standard and micro
    USB sockets respectively. Each USB circuit contains a USB83340 transceiver with a shared USB power
    switch. There is no user configuration required on either of the USB circuits.
    The USB transceivers have a 3.3V (only) interface. All of the USB0 (connected to the OTG transceiver)
    and USB1 (connected to the HOST transceiver) signals are in the VDD_HV_A domain and must be
    configured as 3.3V via daughtercard jumper J5. If VDD_HV_A is set to 5V, the USB0 and USB1 MCU
    signals should be left tri-stated to prevent damage to the USB transceivers.

    The USB interfaces


    6.5. Ethernet (P6, J5, J6, J7, J8, R45, R80) are on the top right
    quarter on the board
    on the top edge

    The MPC5748G supports both MII and RMII Ethernet interfaces. The EVB incorporates a DP83848c
    transceiver supporting both MII and RMII modes. The transceiver is connected to a pulse J1011F21PNL
    RJ45 connector which includes a built-in isolation transformer.
    The default configuration, with all 2-way jumpers fitted and all 3-way jumpers in position 1-2,
    configures the transceiver for MII mode with the reset signal to the PHY being driven from the MCU
    Reset out (eg any reset causing the MCU Reset line to assert will reset the PHY)
    In order to configure the EVB for RMII mode, jumpers J5, J6 and J7 need to be changed as described in
    Table 14 below. In addition, a surface mount 0Ω resistor needs to be de-soldered and moved as shown in
    the figure below. This option is fitted as a resistor instead of a jumper to maintain signal integrity on the
    Ethernet clock signal.

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    20 Freescale Semiconductor, Inc.
    Communications & Memory Interfaces:

    For MII mode (default) R45 should have a jumper populated as shown. For RMII mode, remove R45
    and fit it between R45 and R80

    For RMII mode


    remove R45 and re-fit
    in this position

    Figure 11. MII / RMII Clock Selection Resistor

    To change the reset routing so that the Ethernet PHY can be reset via MCU pin PI11 (rather than being
    tied to the MCU reset), jumper J8 should be moved to position 2-3

    Table 14. Ethernet Control jumpers (J5, J6, J7, J8, R45, R80)
    Jumper Position PCB Legend Description
    1-2 (D) MII Ethernet PHY is configured in MII mode
    J5
    2-3 R Ethernet PHY is configured in RMII mode
    Removed Invalid Configuration, avoid!
    J6 1-2 (D) Ethernet PHY X2 clock is connected to 25MHz xtal
    (X1) 2-3 Ethernet PHY X2 clock is not connected to 25MHz xtal5, 6
    1-2 (D) Ethernet PHY X1 clock is connected to 25MHz xtal
    J7
    2-3 Ethernet PHY X1 clock is driven from 50MHz xtal
    (X2)
    Removed Ethernet PHY X1 clock is disconnected (invalid configuration, avoid)
    1-2 (D) NORM The Ethernet PHY will be reset along with MCU reset
    J8
    2-3 PI11 The Ethernet PHY reset is controlled via MCU pin PI11 (Pulled high)
    (RST)
    Removed Invalid Configuration, avoid!
    Fitted R45 MII Mode – Clock is supplied from PHY to MCU
    R45 (R80)
    R45 to R80 RMII Mode – Clock is supplied from external 50MHz oscillator to MCU

    The MCU Ethernet signals are all in the VDD_HV_B domain. The Ethernet PHY will ONLY function
    with 3.3V I/O so VDD_HV_B must be set to 3.3V on the MCU daughtercard before the Ethernet is
    used. If VDD_HV_B is set to 5V, the signals routed to the Ethernet PHY (see the EVB schematics) must
    be left as tristate.

    5
    If jumper J7 is in position 1-2 (25MHz XTAL), J6 must be fitted and R45 must be fitted.
    6
    If jumper J7 is in position 2-3 (50MHz oscillator), J6 must be removed and R45 must be removed and placed
    between R45 and R80

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    Freescale Semiconductor, Inc. 21
    The FlexRay
    6.6. FlexRay (P2, P3, J1, J2, J3, J4) interface is in the top
    right corner of the
    EVB on the top edge

    The EVB incorporates two FlexRay TJA1080TS/N interfaces connected to MCU FlexRay channels A
    and B and routed to two Molex 1.25mm pitch PicoBlade shrouded headers (standard on many Freescale
    EVB’s). Jumpers are provided to disconnect the MCU signals from the FlexRay interface if required as
    well as providing general configuration.
    By default, all of the jumper headers are fitted which routes the MCU signals to the FlexRay physical
    interface as well as configuring the controller for a default mode of operation (Transmitter enabled,
    Receiver enabled, not in low power mode). Please consult the FlexRay transceiver and general FlexRay
    specifications before changing any of the mode jumpers.

    Table 15. FlexRay Configuration Jumpers (J1, J2, J3, J4)


    Jumper Position PCB Legend Description

    FlexRay A
    J3 FITTED (D) MCU PC5 is connected to FlexRay A transceiver TX
    TX
    Posn 1-2 Removed MCU PC5 is not connected to FlexRay A transceiver TX
    J3 FITTED (D) MCU PE2 is connected to FlexRay A transceiver TXEN
    TXEN
    Posn 3-4 Removed MCU PE2 is not connected to FlexRay A transceiver TXEN
    J3 FITTED (D) MCU PE3 is connected to FlexRay A transceiver RX
    RX
    Posn 5-6 Removed MCU PE3 is not connected to FlexRay A transceiver RX
    J2 FITTED (D) FlexRay A PHY Bus Guardian Enable (Transmitter is enabled)
    BGE
    Posn 1-2 Removed FlexRay A PHY transmitter is disabled (Receive only mode)
    J2 FITTED (D) FlexRay A PHY is enabled
    EN
    Posn 3-4 Removed FlexRay A PHY is disabled
    J2 FITTED (D) FlexRay A PHY will not enter Standby Mode
    STBN
    Posn 5-6 Removed FlexRay A PHY will enter Standby Mode
    J2 FITTED (D) FlexRay A PHY Wakeup signal pulled low
    WAKE
    Posn 7-8 Removed FlexRay A PHY Wakeup signal pulled high

    FlexRay B
    J4 FITTED (D) MCU PE4 is connected to FlexRay B transceiver TX
    TX
    Posn 1-2 Removed MCU PE4 is not connected to FlexRay B transceiver TX
    J4 FITTED (D) MCU PC4 is connected to FlexRay B transceiver TXEN
    TXEN
    Posn 3-4 Removed MCU PC4 is not connected to FlexRay B transceiver TXEN
    J4 FITTED (D) MCU PE5 is connected to FlexRay B transceiver RX
    RX
    Posn 5-6 Removed MCU PE5 is not connected to FlexRay B transceiver RX

    J1 FITTED (D) FlexRay B PHY Bus Guardian Enable (Transmitter is enabled)


    BGE
    Posn 1-2 Removed FlexRay B PHY transmitter is disabled (Receive only mode)
    J1 FITTED (D) FlexRay B PHY is enabled
    EN
    Posn 3-4 Removed FlexRay B PHY is disabled
    J1 FITTED (D) FlexRay B PHY will not enter Standby Mode
    STBN
    Posn 5-6 Removed FlexRay B PHY will enter Standby Mode
    J1 FITTED (D) FlexRay B PHY Wakeup signal pulled low
    WAKE
    Posn 7-8 Removed FlexRay B PHY Wakeup signal pulled high

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    22 Freescale Semiconductor, Inc.
    AV Interface Connectors

    The MCU FlexRay pins are powered from the VDD_HV_A domain, which is configured between 3.3V
    and 5.0 V on the daughtercard using jumper J5. The FlexRay tranceivers I/O voltage pin is connected to
    the PER_HVA net configured with jumper J24 on the main EVB. Care must be taken to ensure that the
    MCU VDD_HV_A and PER_HVA supplies are the same when using the FlexRay transceiver.

    Important:
    The EVB daughtercards are supplied with a 40 MHz crystal which is a requirement for FlexRay in
    order to generate the correct clock timing. If you have changed the default crystal on the daughtercard
    and wish to use FlexRay, you must ensure a 40 MHz crystal is fitted.

    The SD socket is
    6.7. SD Card Socket (P200) mounted on the
    underside of the
    board in the top left
    corner
    The EVB supports a 4-bit SD interface (note that MPC5748G supports 8-bit SD data) which is routed to
    a full sized SD card connector on the underside of the EVB. There is no user configuration required.
    The SD socket has hardware card detection (routed to PA0) and write protection (routed to PH8) status
    outputs which will be grounded when active.
    The MCU SD card signals are all in the VDD_HV_A domain. The SD card specification is for an
    interface voltage of between 2.7V and 3.6V so the SD card can only be used when VDD_HV_A is set to
    3.3V (PER_HVA has no impact on the voltage on the SD card)
    CAUTION
    If VDD_HV_A is set to 5V, damage may be caused to an SD card if an
    attempt is made to access it in software. If you need to leave the SD card
    in the socket with VDD_HV_A set to 5V, ensure all the SD card pads are
    left as high impedance

    7. AV Interface Connectors
    This section details the Audio / Video interface connectors on the EVB. Each of these connectors can be
    used to add additional daughtercards (not supplied) to add functionality.

    The SAI audio


    7.1. SAI Audio Connectors (P24, P25) connector is on the
    bottom edge of the
    EVB

    The EVB includes two 0.1” headers that can be used to interface to an SAI audio board (available
    separately, please consult your Freescale representative). There is no EVB configuration required when
    using these connectors other than to ensure the EVB is switched off prior to fitting or removing the
    daughtercard.
    The pinout of the connectors is shown below for reference and these connectors can also be used for
    GPIO connectivity

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    Freescale Semiconductor, Inc. 23
    Table 16. 50-pin SAI Audio Daughtercard Connector P24
    Pin No Function Connection Pin No Function Connection
    1 3.3V 3V3_SR 2 GND GND
    3 SAI0_DATA3 PF2 4 GND GND
    5 SAI0_DATA2 PF3 6 GND GND
    7 SAI0_DATA1 PF4 8 GND GND
    9 SAI0_DATA0 PF5 10 GND GND
    11 SAI0_BCLK PF1 12 GND GND
    13 SAI0_SYNC PB10 14 GND GND
    15 SAI0_MCLK PF0 16 GND GND
    17 eMIOS1_7H PH5 18 GND GND
    19 I2C_SCL3 PE11 20 GND GND
    21 I2C_SDA3 PE10 22 GND GND
    23 SAI1_DATA0 PJ2 24 GND GND
    25 SAI1_BCLK PJ3 26 GND GND
    27 eMIOS1_6H PH4 28 GND GND
    29 SAI1_SYNC PF6 30 GND GND
    31 SAI1_MCLK PF7 32 GND GND
    33 I2C_SCL2 PE9 34 GND GND
    35 I2C_SDA2 PE8 36 GND GND
    37 SAI2_DATA0 PI14 38 GND GND
    39 SAI2_BCLK PJ1 40 GND GND
    41 SAI2_SYNC PJ0 42 GND GND
    43 SAI2_MCLK PI15 44 GND GND
    45 eMIOS1_5H PH3 46 GND GND
    47 GPIO Control PA5 48 GND GND
    49 5.0V 5V0_SR 50 GND GND

    Table 17. 20-pin SAI Audio Daughtercard Connector P25


    Pin No Function Connection Pin No Function Connection
    1 N/C N/C 2 GND GND
    3 DSPI0_SIN PA12 4 GND GND
    5 DSPI0_SOUT PA13 6 GND GND
    7 DSPI0_SCK PA14 8 GND GND
    9 DSPI0_SS0 PA15 10 GND GND
    11 DSPI3_SOUT PG2 12 GND GND
    13 DSPI3_SS3 PG3 14 GND GND
    15 DSPI3_SCK PG4 16 GND GND
    17 DSPI3_SIN PG5 18 GND GND
    19 N/C N/C 20 GND GND
    Note that connector P25 is not populated and must be fitted if required

    CAUTION
    Before the daughtercard is installed or removed, the EVB must be
    powered OFF to prevent potential damage to the EVB or daughter card
    components.

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    24 Freescale Semiconductor, Inc.
    AV Interface Connectors

    The TWRPI
    7.2. TWRPI Connectors (P26, P27) connectors are at
    the bottom right
    hand corner

    The EVB includes two fine pitch TWRPI headers that can be used to interface to an SAI audio board
    (available separately, please consult your Freescale representative) along with the 0.1” headers
    mentioned in the section above. There is no EVB configuration required when using these connectors
    other than to ensure the EVB is switched off prior to fitting or removing the daughtercard. The pinout of
    the connectors is shown below for reference.

    Table 18. TWRPI Connector P26


    Pin No Function Connection Pin No Function Connection
    1 5V 5V0_SR 2 3.3V 3V3_SR
    3 GND GND 4 3.3V 3V3_LR
    5 GND GND 6 GND GND
    7 GND GND 8 ADC0 PD5
    9 ADC1 PD6 10 GND GND
    11 GND GND 12 ADC2 PD4
    13 GND GND 14 GND GND
    15 GND GND 16 GND GND
    7
    17 ID0 PD7 18 ID17 PD8
    19 GND GND 20

    Table 19. TWRPI Connector P27


    Pin No Function Connection Pin No Function Connection
    1 GND GND 2 GND GND
    3 I2C0_SCL PO0 4 I2C0_SDA PO1
    5 GND GND 6 GND GND
    7 GND GND 8 GND GND
    9 DSPI0_SIN PA12 10 DSPI0_SOUT PA13
    11 DSPI0_SS0 PA15 12 DSPI0_SCK PA14
    13 GND GND 14 GND GND
    15 GPIO0/IRQ PK3 16 GPIO1 PK0
    17 GPIO2 PK1 18 GPIO3 PK2
    19 GPIO4 PK4 20 N/C N/C

    The MLB
    7.3. MLB Daughtercard Connector (P16) daughtercard
    connector is on the
    RHS of the EVB

    There is a 40-pin interface connector on the EVB for connecting an MLB (Media Local Bus)
    daughtercard. There is no hardware configuration possible at EVB level for this connector.
    MLB Daughtercards are available direct from SMSC
    As with all daughtercards, the EVB must be powered OFF to prevent damage to the EVB or daughter
    card components.

    7
    ID0 and ID1 have a 10K pullup to 3V3

    MPC5748G EVB User Guide, User Guide, Rev. 0, 08/2015


    Freescale Semiconductor, Inc. 25
    8. User Interface (I/O)
    This section details the user I/O available on the EVB and includes the GPIO matrix, switches, LED’s
    and the ADC variable resistor.

    The GPIO matrix is


    8.1. GPIO Matrix on the bottom edge
    of the EVB above
    the SAI audio
    connector
    All of the available GPIO pins (those not already used for existing EVB peripherals) are available at the
    GPIO matrix shown below. The matrix provides an easy to follow, intuitive, space saving grid of 0.1”
    header through-hole pads. Users can solder wires, fit headers or simply insert a scope probe into the
    respective pad.
    To use the matrix, simply read the port letter from the top or bottom row of text then the pad number
    from the columns on the left or right of the matrix. For example, the 1st pad available on Port B is PB5
    as highlighted in green below.

    Figure 12. GPIO Matrix

    If a pad is populated in the matrix, it means this is available for exclusive use as GPIO. The exception to
    this are the port pins detailed below which are also shared with switches or user LED’s (shaded red in
    the matrix diagram above).
    PG2, PG3, PG4, PG5 – User LED’s 1..4
    PD0, PD1, PD2, PD3 – HEX Encoder Switch
    PA1,PA2, PF9, PF11 – User pushbutton Switches
    In addition there are GPIO pins that are shared with the SAI Audio and TWRPI connectors as detailed
    below and shaded orange. These are totally available unless the SAI / TWRPI headers are being used.
    PA[12..15], PD[4..8], PG[2..5], PK[0..4], PO[0..1]

    MPC5748G EVB User Guide, User Guide, Rev. 0, 08/2015


    26 Freescale Semiconductor, Inc.
    User Interface (I/O)

    The user pushbutton


    switches are in the
    8.2. User Switches (SW3, SW4, SW6, SW7, P22) bottom left corner of
    the EVB

    There are 4 active high (pulled low, driven to 3.3V) pushbutton switches (SW3, SW4, SW6, SW7)
    connected to a 4 way header (P22) in a box titled “User Switches”. The switches are also directly
    connected to MCU ports so no additional wiring is required unless you require to route these to a
    different GPIO port.
    The switches are connected as follows:

    Table 20. User Pushbutton Switches (SW3, SW4, SW6, SW7)


    Switch Number MCU Pin P18 Connection Pin
    SW3 1 PA1 Pin1 (UpperMost)
    SW4 2 PA2 Pin2
    SW6 3 PF9 Pin3
    SW7 4 PF11 Pin4

    NOTE
    The MCU ports used on the user pushbutton switches are also routed to
    the GPIO matrix.
    There are zero ohm resistors on the direct connections between each
    switch and the MCU pins. These can be removed if required to isolate the
    switch from the respective MCU pin (useful if the switch is being
    manually routed to another pin on the GPIO matrix).

    MPC5748G EVB User Guide, User Guide, Rev. 0, 08/2015


    Freescale Semiconductor, Inc. 27
    The hex encoder
    8.3. Hex Encoder Switch (SW2, J26, P20) switch is located
    above the user
    pushbutton switches

    There is a single hex encoded 16 position rotary switch on the EVB. This outputs a binary encoded hex
    value (active high) on 4 MCU ports (Port D[0..3]) as well as a 4 pin header P20. There is a jumper J26
    which can be used to isolate the supply to the hex encoder if required. This prevents any voltage being
    asserted on the MCU pins irrespective of the position of the switch

    Table 21. Hex Encoder Switch (SW2)


    HEX_SW4 HEX_SW3 HEX_SW2 HEX_SW1
    Position
    (PD3, P20-4) (PD2, P20-3) (PD1, P20-2) (PD0, P20-1)
    0 0 0 0 0
    1 0 0 0 1
    2 0 0 1 0
    3 0 0 1 1
    4 0 1 0 0
    5 0 1 0 1
    6 0 1 1 0
    7 0 1 1 1
    8 1 0 0 0
    9 1 0 0 1
    A 1 0 1 0
    B 1 0 1 1
    C 1 1 0 0
    D 1 1 0 1
    E 1 1 1 0
    F 1 1 1 1

    Table 22. Hex Encoder Switch Power Jumper (J26)


    Jumper Position PCB Legend Description
    J26 FITTED (D) The hex encoder switch is powered with 3.3V (functional)
    (3V3) Removed The hex encoder switch is not powered and will not drive outputs

    NOTE
    The MCU ports used on the user pushbutton switches are also routed to
    the GPIO matrix.
    There are zero ohm resistors on the direct connections between the switch
    output and the MCU pins. These can be removed if required to isolate the
    switch from the respective MCU pin (useful if the switch is being
    manually routed to another pin on the GPIO matrix).

    MPC5748G EVB User Guide, User Guide, Rev. 0, 08/2015


    28 Freescale Semiconductor, Inc.
    User Interface (I/O)

    The user LED’s are


    8.4. User LED’s (DS2, DS3, DS7, DS8, P19) above the user
    switches in the lower
    right quarter

    There are four active low user LED’s connected directly to 4 MCU ports (PG[2..5]) as well as to a 4 pin
    header.

    Table 23. User LEDs (DS2, DS3, DS7, DS8, P19)


    Switch Number MCU Pin P19 Connection Pin
    DS2 1 PG2 Pin1 (Upper Pin)
    DS3 2 PG3 Pin2
    DS7 3 PG4 Pin3
    DS8 4 PG5 Pin4

    NOTE
    The MCU ports used on the LEDs are also routed to the GPIO matrix.
    There are zero ohm resistors on the direct connections between each LED
    and the MCU pins. These can be removed if required to isolate the LED
    from the respective MCU pin (useful if the LED is being manually routed
    to another pin on the GPIO matrix).

    The ADC Pot is to


    8.5. ADC Input Potentiometer (J17, RV1) the right of the user
    LED’s in the lower
    right corner

    There is a small variable resistor RV1 on the EVB which routes a voltage between 0v and 3.3V to MCU
    pin PB4. This is useful for quick ADC testing. Jumper J17 which is fitted by default can be removed to
    disconnect MCU PB4 from RV1 if desired.

    Table 24. ADC Input Potentiometer Enable (J19)


    Jumper Position PCB Legend Description
    J17 FITTED (D) Output from RV1 is routed to MCU PB4 pin
    Removed MCU PB4 is not connected to RV1

    There is also a test point TP18 connected to the variable resistor output for monitoring purposes.

    MPC5748G EVB User Guide, User Guide, Rev. 0, 08/2015


    Freescale Semiconductor, Inc. 29
    9. MCU Port Pin EVB Functions
    The table below shows what each MCU pin is used for on the EVB. Note that not all MCU pins will be
    available depending on the device package being used.

    Table 25. Port Pin Functions


    No PortA PortB PortC PortD PortE PortF PortG PortH
    0 SD Card CAN0 JTAG GPIO 3 MLB SAI Audio Ethernet Ethernet
    1 GPIO 2 CAN0 JTAG GPIO 3 MLB SAI Audio Ethernet Ethernet
    2 GPIO 2 LIN0 USB1 GPIO 3 FlexA SAI Audio GPIO 4, 5 Ethernet
    3 Ethernet LIN0 USB1 GPIO 3 FlexA SAI Audio GPIO 4 , 5 SAI Audio
    4 GPIO ADC Pot FlexB GPIO 5 FlexB SAI Audio GPIO 4, 5 SAI Audio
    5 SAI Audio GPIO FlexA GPIO 5 FlexB SAI Audio GPIO 4 , 5 SAI Audio
    6 MLB GPIO LIN1 GPIO 5 SD Card SAI Audio GPIO MLB
    7 Ethernet GPIO LIN1 GPIO 5 SD Card SAI Audio GPIO MLB
    8 Ethernet EXTAL32 RS232 GPIO 5 SAI Audio GPIO GPIO SD Card
    9 Ethernet XTAL32 RS232 GPIO SAI Audio GPIO 2 MLB JTAG
    10 Ethernet SAI Audio CAN1 GPIO SAI Audio GPIO USB1 JTAG
    11 Ethernet GPIO CAN1 GPIO SAI Audio GPIO 2 USB1 USB1
    12 GPIO 5 GPIO Flex GPIO Ethernet GPIO Ethernet USB1
    13 GPIO 5 MLB Flex GPIO 1 Ethernet GPIO Ethernet GPIO
    14 GPIO 5 MLB Flex MLB USB1 Ethernet USB1 GPIO
    15 GPIO 5 MLB Flex MLB USB1 Ethernet USB1 GPIO

    No PortI PortJ PortK PortL PortM PortN PortO PortP PortQ


    0 SD Card SAI Audio GPIO 5 GPIO NEXUS GPIO GPIO 5 GPIO USB0
    1 SD Card SAI Audio GPIO 5 GPIO NEXUS GPIO GPIO 5 GPIO USB0
    2 SD Card SAI Audio GPIO 5 NEXUS NEXUS GPIO GPIO GPIO USB0
    3 SD Card SD Card GPIO 5 NEXUS GPIO GPIO GPIO GPIO USB0
    4 USB1 GPIO GPIO 5 NEXUS GPIO GPIO GPIO GPIO USB0
    5 USB1 GPIO GPIO NEXUS GPIO GPIO GPIO GPIO USB0
    6 USB0 GPIO GPIO NEXUS GPIO GPIO GPIO GPIO USB0
    7 USB1 GPIO GPIO NEXUS NEXUS GPIO GPIO GPIO USB0
    8 MLB GPIO GPIO JTAG NEXUS GPIO GPIO GPIO -
    9 GPIO GPIO GPIO NEXUS NEXUS GPIO GPIO GPIO -
    10 GPIO GPIO GPIO NEXUS NEXUS GPIO GPIO GPIO -
    11 Ethernet GPIO GPIO NEXUS GPIO GPIO GPIO GPIO -
    12 GPIO 1 GPIO GPIO NEXUS GPIO GPIO GPIO USB0 -
    13 GPIO 1 GPIO GPIO NEXUS GPIO GPIO GPIO USB0 -
    14 SAI Audio GPIO GPIO NEXUS GPIO GPIO GPIO USB0 -
    15 SAI Audio GPIO GPIO NEXUS GPIO GPIO GPIO USB0 -
    1
    Shared with MLB header (via no populated zero ohm resistors)
    2
    Shared with user switches
    3
    Shared with Hex Encoder Switch
    4
    Shared with user LED’s
    5
    Shared with TWRPI (P26, P27) or SAI Audio P25

    MPC5748G EVB User Guide, User Guide, Rev. 0, 08/2015


    30 Freescale Semiconductor, Inc.
    Default Jumper Summary Table

    10. Default Jumper Summary Table


    The following tables detail the default (D) jumper configuration of the EVB and daughtercards

    Table 26. Default Jumper Positions (Main Board)


    Jumper Default PCB Description
    Posn Legend
    J1 Posn 1-2 Fitted (D) BGE FlexRay B PHY Bus Guardian Enable (Transmitter is enabled)
    J1 Posn 3-4 Fitted (D) EN FlexRay B PHY is enabled
    J1 Posn 5-6 Fitted (D) STBN FlexRay B PHY will not enter Standby Mode
    J1 Posn 7-8 Fitted (D) WAKE FlexRay B PHY Wakeup signal pulled low
    J2 Posn 1-2 Fitted (D) BGE FlexRay A PHY Bus Guardian Enable (Transmitter is enabled)
    J2 Posn 3-4 Fitted (D) EN FlexRay A PHY is enabled
    J2 Posn 5-6 Fitted (D) STBN FlexRay A PHY will not enter Standby Mode
    J2 Posn 7-8 Fitted (D) WAKE FlexRay A PHY Wakeup signal pulled low
    J3 Posn 1-2 Fitted (D) TX MCU PC5 is connected to FlexRay A transceiver TX
    J3 Posn 3-4 Fitted (D) TXEN MCU PE2 is connected to FlexRay A transceiver TXEN
    J3 Posn 5-6 Fitted (D) RX MCU PE3 is connected to FlexRay A transceiver RX
    J4 Posn 1-2 Fitted (D) TX MCU PE4 is connected to FlexRay B transceiver TX
    J4 Posn 3-4 Fitted (D) TXEN MCU PC4 is connected to FlexRay B transceiver TXEN
    J4 Posn 5-6 Fitted (D) RX MCU PE5 is connected to FlexRay B transceiver RX
    J5 1-2 (D) MII Ethernet PHY is configured in MII mode
    J6 (X1) 1-2 (D) Ethernet PHY X2 clock is connected to 25MHz xtal
    J7 (X2) 1-2 (D) Ethernet PHY X1 clock is connected to 25MHz xtal
    J8 (RST) 1-2 (D) NORM The Ethernet PHY will be reset along with MCU reset
    J9 (EN) Fitted (D) Reset from reset switch and debug connectors is active
    J10 (LIN0) 1-2 Fitted (D) RX MCU LIN0_RX signal (PB3) is routed to LIN0 interface
    J10 (LIN0) 3-4 Fitted (D) TX MCU LIN0_TX signal (PB2) is routed to LIN0 interface
    J11 (Master_EN) Fitted (D) LIN0 is configured in Master Mode
    J12 (LIN1) 1-2 Fitted (D) RX MCU LIN1_TX signal (PC7) is routed to LIN1 interface
    J12 (LIN1) 3-4 Fitted (D) TX MCU LIN1_RX signal (PC6) is routed to LIN interface
    J13 (Master_EN) Fitted (D) LIN1 is configured in Master Mode
    J14 (CAN1) 1-2 Fitted (D) TX MCU CAN1_TX signal (PC10) is routed to CAN interface
    J14 (CAN1) 3-4 Fitted (D) RX MCU CAN1_RX signal (PC11) is routed to CAN interface
    J15 (CAN0) 1-2 Fitted (D) TX MCU CAN0_TX signal (PB0) is routed to CAN interface
    J15 (CAN0) 3-4 Fitted (D) RX MCU CAN0_RX signal (PB1) is routed to CAN interface
    J16 Posn 1-2 Fitted (D) RX MCU LIN2_RX signal (PC9) is routed to the FTDI interface
    J16 Posn 3-4 Fitted (D) TX MCU LIN2_TX signal (PC8) is routed to the FTDI interface
    J17 Fitted (D) Output from RV1 is routed to MCU PB4 pin
    J18 (1V25L) Fitted (D) 1.25V Linear regulator output is routed to daughter card
    J19 (5V0S) Fitted (D) 5.0V Switching regulator output is routed to daughter card
    J20 (3V3L) Fitted (D) 3.3V Linear regulator output is routed to daughter card
    J21 (5V0L) Fitted (D) 5.0V Linear regulator output is routed to daughter card
    J22 (3V3S) Fitted (D) 3.3V Switching regulator output is routed to daughter card
    J23 (INPUT SEL) 1-2 (D) 12V 1.25V Linear regulator is powered from main 12V
    J24 (HVA) 1-2 (D) 3V3 EVB peripherals in HVA domain are set to use I/O voltage of 3.3V
    J25 (HVB) 1-2 (D) 3V3 EVB peripherals in HVB domain are set to use I/O voltage of 3.3V
    J26 (3V3) Fitted (D) The hex encoder switch is powered with 3.3V (functional)

    MPC5748G EVB User Guide, User Guide, Rev. 0, 08/2015


    Freescale Semiconductor, Inc. 31
    Table 27. Default Jumper Positions (Daughtercards)
    Jumper Default PCB Description
    Posn Legend
    1 (XTAL) 1-2 (D) Y1 MCU XTAL signal is routed to crystal Y1
    J2 (EXTAL) 1-2 (D) Y1 MCU EXTAL signal is routed to crystal Y1
    J3 (ADC0) 1-2 (D) 3V3 MCU ADC0 pin is connected to 3.3V (Linear)
    J4 (ADC1) 1-2 (D) 3V3 MCU ADC1 pin is connected to 3.3V (Linear)
    J5 (HVA) 1-2 (D) 3V3 MCU VDD_HV_A domain is connected to 3.3V (Switching Regulator)
    J6 (HVB) 1-2 (D) 3V3 MCU VDD_HV_B domain is connected to 3.3V (Switching Regulator)
    J7 (HVC) 1-2 (D) 3V3 MCU VDD_HV_C domain is connected to 3.3V (Switching Regulator)
    J8 (FLA ) Fitted (D) MCU VDD_HV_FLA pin is connected to 3.3v (Switching Regulator)
    J9 (REG) 1-2 (D) 3V3 MCU ballast transistor collector is connected to 3.3V (Switching)
    J10 (VDDLV) 1-2 (D) REG MCU VDD_LV domain is powered from ballast transistor
    J11 (DAC) 1-2 (D) HVA MCU VIN1_CMP_REF is powered from VDD_HV_A
    J12 Fitted (D) Ballast collector supply is enabled (jumper can be used for current measure)
    J13 1-2 (D) ** Only valid on certain devices – External Ballast enabled.
    Note that not all jumpers will be present on all of the daughtercards.

    MPC5748G EVB User Guide, User Guide, Rev. 0, 08/2015


    32 Freescale Semiconductor, Inc.
    Default Jumper Diagram

    11. Default Jumper Diagram


    The diagram below shows the location and configuration of the default jumpers of the main board and
    provides an easy to use cross reference. By default all of the jumpers are fitted to the daughtercard (3
    way jumpers in position 1-2).
    NOTE
    Following figure is of an older board revision however there were no
    additional jumpers and no jumpers have moved position.

    Figure 13. Default Jumper Position

    12. Revision History


    Date Substantial changes
    August 2015 Initial release

    MPC5748G EVB User Guide, User Guide, Rev. 0, 08/2015


    Freescale Semiconductor, Inc. 33
    13. Appendix
    The following EVB schematics are detailed in the following sections:
     Main EVB (motherboards)
     324BGA Daughtercard
     256BGA Daughtercard
     176QFP Daughtercard
     100QFP Daughtercard (MPC5746C only)

    MPC5748G EVB User Guide, User Guide, Rev. 0, 08/2015


    34 Freescale Semiconductor, Inc.
    Main EVB
    5 4 3 2 1

    MPC574xx Customer Evaluation Board (X-MPC574XG-MB)


    Revision Information
    Rev Date Designer Comments
    Table Of Contents: 0.1 01 Feb 2012 Alasdair Robertson Start of capture, Working version
    D D
    Power - Main input and Linear voltage regulators Sheet 2 X1 19 Feb 2012 Alasdair Robertson 1st release for internal review (Complete Board)
    Power - Switching voltage regulators Sheet 3 X2 28 Feb 2012 Alasdair Robertson 2nd release for internal review (split into main board and DC)
    Daughter Card Connectors (Sockets) Sheet 4 X3 11 Mar 2013 Alasdair Robertson Final review (including new USB transceiver)
    Reset and External Clock Input Sheet 5 X4 13 Mar 2013 Alasdair Robertson Version sent to Pre Layout, incorporating fixes from review
    JTAG and Nexus Connectors Sheet 6 X5 14 Mar 2013 Alasdair Robertson Component consolodation, Few minor changes. Sent to Layout
    Comms - CAN and LIN Sheet 7 X6 29 Mar 2013 Alasdair Robertson Changes made during layout to Daughtercard Connectors
    Comms - RS232 (USB FTDI interface) Sheet 8 X7 02 Apr 2013 Alasdair Robertson LAY RefDes Resequence and SCH BackAnnotate
    Comms - USB Interfaces Sheet 9 A 17 Apr 2013 Alasdair Robertson Post Layout (Back Annotated). Matches PCB RevA
    Comms - Ethernet Sheet 10 AX1 24 Jun 2013 Alasdair Robertson Fixes and changes to RevA Prototype design
    Comms - FlexRAY Sheet 11 AX2 10 July 2013 Alasdair Robertson Added CAN Term (DNP)
    Audio - SAI Audio. AVB and TWRPI headers Sheet 12 AX3 12 July 2013 Alasdair Robertson Corrected ground on ADC Pot
    AV - MOST Interface Sheet 13 B 12 July 2013 Alasdair Robertson Production Release
    C C
    Memory - SD Card Slot Sheet 14 BX1 20 Aug 2013 Alasdair Robertson Change to Ethernet 50MHz clock control
    User - Switches, LED's and Potentiometer Sheet 15 C 20 Aug 2013 Alasdair Robertson Production Release
    User - GPIO Pin Matrix Sheet 16 CX1 18 Dec 2013 Alasdair Robertson CAN transceivers -> MC33901, ENET clock in RMII mode
    CX2 05 May 2014 Alasdair Robertson Added comment about LM1117 VREG output
    CX3 25 June 2014 Alasdair Robertson PH3..5 now GPIO matrix (was SAI), PM4, PD13, PM3 to SAI
    CX4 26 June 2014 Alasdair Robertson Minor changes made during layout (no component changes)
    CX5 26 June 2014 Alasdair Robertson Part Manager Tidy up
    Caution: CX6 18 Aug 2014 Alasdair Robertson Added additional connector with DSPI Signals for AVB
    CX7 03 Sept 2014 Alasdair Robertson Added additional TWRPI header (Sheet 12)
    These schematics are provided for reference purposes only. As such, D 24 Sept 2014 Alasdair Robertson Released to Production (RevD PCB)
    Freescale does not make any warranty, implied or otherwise, as to the D1 14 Aug 2015 Alasdair Robertson Tidy up Schematics for UM (RevD PCB)
    suitability of circuit design or component selection (type or value) used in
    B
    these schematics for hardware design using the Freescale MPC574xG family B

    3 Different test points used in design:


    of Microprocessors. Customers using any part of these schematics as a
    TPVx - Through Hole Pad small
    basis for hardware design, do so at their own risk and Freescale does not
    TPHx - Through Hile Pad Large (for standard 0.1" header).
    assume any liability for such a hardware design. Also used on IO Matrix (IOMx)

    TPX - Surface Mount Wire Loop

    Notes:
    - All components and board processes are to be ROHS compliant
    - All small capacitors are 0402 unless otherwise stated
    - All resistors are 0603 5% 0.1w unless otherwise stated. All zero ohm links are 0603
    - All connectors and headers are denoted Px and are 2.54mm pitch unless otherwise stated
    - All jumpers are denoted Jx. Jumpers are 2mm pitch Automotive Microcontroller Applications
    - Jumper default positions are shown in the schematics. For 3 way jumpers, default is always posn 1-2. East Kilbride, Scotland
    2 Pin jumpers generally have the "source" on pin 1. Freescale General Business Use
    - All switches are denoted SWx
    This document contains information proprietary to Freescale and shall not be used for engineering design,
    - All test points (SMT wire loop style) are denoted TPx
    A
    - Test point Vias (just through hole pads) are denoted TPVx Freescale AISG Applications, East Kilbride
    A
    procurement or manufacture in whole or in part without the express written permission of Freescale
    Designer: Drawing Title:
    A. Robertson
    Signals (ports) have not been routed via busses as this makes it harder to determine where each signal goes. MPC574xx Customer EVB Main Board
    Drawn by: Page Title:
    A. Robertson
    User notes are given throughtout the schematics. Index and Title Page
    Specific PCB LAYOUT notes are detailed in ITALICS Approved: Size Document Number Rev
    A. Robertson B SCH-27897 PDF: SPF-27897 D1

    Date: Friday, August 14, 2015 Sheet 1 of 16


    5 4 3 2 1
    5 4 3 2 1

    Power Input and Linear Voltage Regulators


    Input 12V DC nominal (range 10v - 14v)
    See note on schematic sheet 3 regarding 3.3V regulator when running at < 11V)

    D Power Supply Input and Filter Test and reference points D

    SW5 (Power Switch) GND11 GND13


    1 3 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND12 GND14
    4 2
    2.1mm Barrel L5 P12V

    1
    P21 Connector F1 27uH (3A) Main EVB

    5
    1 12V-IN VSwitched 1 2 VFused 1 2 Power In
    2 (10v-14v)

    C
    3 Fuse Holder GND Test Points, Top Side
    + + C32 GND
    C268 C269 D202 C33 1000UF
    P23 0.1UF 1000pF B340A 68UF (c200 rad
    1 (0603 (0402 50V) (3A) (CC7343-43 pol 50V)

    A
    A 50V) 25V) GND15 GND16 GND17 GND18
    2
    B

    1
    (2 Screw GND
    Connector)
    GND GND GND Test Points for underside of board

    C C
    5.0V Linear Regulator (800mA Max **) 3.3V Linear Regulator (800mA Max **)

    P12V U15 5V0_LR P12V U16 3V3_LR

    3 4 3 4
    IN TAB_VOUT 2 IN TAB_VOUT 2
    VOUT 1% resitors VOUT 1% resitors

    1
    + C27 Rfb1 + C30 TP16 + C28 Rfb1 + C31 TP17
    10UF 1 R73 100 R76 0 10UF 10UF 1 R74 100 R77 0 10UF
    (35V ADJ (35V TANT) (35V ADJ (35V TANT)
    TANT) LM1117MPX-ADJ R274 TANT) LM1117MPX-ADJ R273
    Rfb2 560 Rfb2 270
    R70 300 R272 0 R71 158 R271 5.6
    Vout = 1.25(1 + (R2/R1)) Vout = 1.25(1 + (R2/R1))
    = 5.0V DS5 = 3.295V DS6
    C A C A

    LED GREEN LED GREEN


    GND GND
    Could also use 2x82 Ohm resistors for RFB2 but not in agile...
    B B

    1.25V Linear Regulator (800mA Max **)


    Q1 ** Notes on Linear Regulator LM1117
    P12V BSH103

    R283 1.8K DS4 The LM1117 linear regulators provide a maximum output
    A C 3 2 current of 800mA in ideal conditions. The current
    J23
    LED GREEN
    requirement for each regulator is in the region of 10's
    1 U14 GND 1V25_LR of mA (significantly under the maximum rating) so
    P12V
    1

    these regulators will run cool on the EVB.


    2 3 4
    IN TAB_VOUT 2
    3 VOUT 1% resitors
    5V0_SR
    1

    + C26 Rfb1 TP15


    10UF 1 R72 100 R75 0 + C29
    (35V ADJ 10UF R305
    DNP DNP
    TANT) LM1117MPX-ADJ (35V TANT) 1K
    Rfb2 Automotive Microcontroller
    R284 0 R285 0 1K Load Applications
    Vout = 1.25(1 + (R2/R1)) resistor to
    ensure proper East Kilbride, Scotland
    A = 1.25V A
    regulation if Freescale General Business Use
    1.25V MCU
    jumper removed Drawing Title:

    GND MPC574xx Customer EVB Main Board


    Page Title:
    1.25V for External core supply. Simpler to use linear rather than switcher so can safely Power Input and Linear Voltage Regulators
    power from 5V switcher (slight ripple not an issue) for reduced heat dissipation
    Size Document Number Rev
    B SCH-27897 PDF: SPF-27897 D1

    Date: Friday, August 14, 2015 Sheet 2 of 16


    5 4 3 2 1
    5 4 3 2 1

    Switching Voltage Regulators and Supply Jumpers

    5.0v Switching Regulator Global MCU Daughtercard To Daughtercard


    Supply Jumpers and DC power Connectors
    Vout = 1.21(1 + Rfb2/Rfb1) = 4.98V
    (All Resistors 1% 0603_CC) P12V

    D Rfb1 R295 1.0K R294 0 DC_P12V D


    R268 0 DC_P12V 4
    DNP
    5V0_SR
    Rfb2 R296 1.47K R298 1.65K GND J19
    1 2 MCU_5V0_S
    MCU_5V0_S 4
    P12V
    U17 LM2676S-ADJ C265 10nF R266 0 DC_5V0_S 4
    DC_5V0_S
    2 3 DNP
    INPUT C_BOOST
    6 (0603 50V) 5V0_SR 3V3_SR
    FEEDBACK L6 27uH J22
    7 1 1 2 1 2 MCU_3V3_S 4
    C34 C267 ON/OFF SW_OUT MCU_3V3_S

    C
    2

    1
    5 Design requires R263 0 DC_3V3_S

    GND
    NC DC_3V3_S 4

    TAB
    10uF 0.1UF B220A-13-F + C36 TP19 DNP
    (0603 D5 diode. Use3A 150uF
    (1210 version to
    25V) 50V) B340A 5V0_LR

    4
    8
    reduce no of APXE100ARA151MF80G R300
    J27 components J21

    A
    DNP 560 1 2 MCU_5V0_L
    MCU_5V0_L 4
    DS9

    1
    C A R264 0 DC_5V0_L 4
    DC_5V0_L
    DNP
    (12v input, 2.0A Output, 89% Efficient, 11.24w) LED GREEN
    GND 3V3_LR
    C C
    J20
    1 2 MCU_3V3_L 4
    MCU_3V3_L
    R265 0 DC_3V3_L 4
    DC_3V3_L
    DNP

    1V25_LR
    3.3v Switching Regulator Vout = 1.21(1 + Rfb2/Rfb1) = 3.3V
    J18
    (All Resistors 1% 0603_CC) 1 2 MCU_1V25_L
    MCU_1V25_L 4
    Rfb1 R292 1.0K R291 0 DC_1V25_L
    R267 0 DC_1V25_L 4
    DNP

    Rfb2 R293 1.47K R297 261.0 GND

    P12V
    U18 LM2676S-ADJ C264 10nF Peripheral Power Control
    2 3
    INPUT C_BOOST
    6 (0603 50V) 3V3_SR 3V3_SR
    FEEDBACK L7 27uH
    J25
    7 1 1 2 J24
    C35 C266 ON/OFF SW_OUT 1 PER_HVA 1 PER_HVB
    C
    2

    1
    B 5
    GND

    B
    TAB

    10uF 0.1UF NC + C37 TP20 2 2


    (1210 (0603 D6 150uF
    25V) 50V) B340A 3 3
    R299
    4
    8

    J28 5V0_SR
    APXE100ARA151MF80G 270
    A

    DNP
    DS10
    1

    C A These jumpers control the voltage of the


    peripherals connected to MCU pads in the
    (12v input, 2A Output, 83% Efficient) LED GREEN VDD_HV_A / HV_B domains and are required
    GND
    so the respective jumpers at the MCU can
    be used for MCU current measurement.
    Caution The 3.3v regulator design is optimised for an input voltage of 12V. If
    the input voltage drops below approx 11V, the 3.3v output voltage The settings on these jumpers must
    ripple may increase. This can be reduced by increasing the bulk storage mirror the setting of the respective
    capacitor if required. MCU VDD_HV_A / HB_V jumpers

    Automotive Microcontroller
    Using Adjustable version of LM2676 rather than fixed 3.3V / Applications
    East Kilbride, Scotland
    A 5V regulators to reduce number of components in BOM. Freescale General Business Use
    A

    Drawing Title:
    Where possible, components have been shared accross the MPC574xx Customer EVB Main Board
    regulator designs to further reduce component count. Page Title:
    Switching Voltage Regulators
    Size Document Number Rev
    B SCH-27897 PDF: SPF-27897 D1

    Date: Friday, August 14, 2015 Sheet 3 of 16


    5 4 3 2 1
    5 4 3 2 1

    Daughter Card Connectors (Sockets)


    Notes:
    - there was no neat way to fit these connectors onto a B sized sheet so unfortunately the sheet size has been
    increased to C so will need to be printed on larger paper.
    - The MCU Clock circuitry (apart from external clock) is local to the daughtercard so not pinned out on the
    connectors
    - Power is supplied to the daughtercard via MCU specific jumpered supplies (left connector) or direct supplies
    from the regulators (right connector)

    D D

    P12 P13
    (GND) SH1 SH2 (GND) (GND) SH1 SH2 (GND)
    5 EXT-CLK 1 2 (GND)
    16 PM11 1 2 PC1 6
    EXT-CLK (GND) PM11 PC1
    3 4 PH7 13 6 PH10 3 4 PE3 11
    PH7 PH10 PE3
    7 PB2 5 6 PH6 13 16 PH4 5 6 PH5 16
    PB2 PH6 PH4 PH5
    (GND) 7 8 PB3 PE5 7 8 PC0
    PB3 7 11 PE5 PC0 6
    16 PP11 9 10 PH8 14 16 PM12 9 10 PQ3 9
    PP11 PH8 PM12 PQ3
    14 PE6 11 12 PP8 16 9 PI5 11 12 PC3 9
    PE6 PP8 PI5 PC3
    14 PI3 13 14 (GND)
    9 PQ0 13 14 PE4 11
    PI3 PQ0 PE4
    16 PP10 15 16 PP3 16 11 PC5 15 16 PH9 6
    PP10 PP3 PC5 PH9
    PP5 17 18 PE7 (GND) 17 18 PL10
    16 PP5 PE7 14 PL10 6
    14 PI1 19 20 PK9 16 9 PG14 19 20 PE15 9
    PI1 PK9 PG14 PE15
    14 PI2 21 22 (GND)
    9 PH12 21 22 PORSTx 5
    PI2 PH12 PORSTx
    16 PP9 23 24 PC12 11 11 PC4 23 24 PE2 11
    PP9 PC12 PC4 PE2
    11 PC13 25 26 PK11 16
    (GND) 25 26 PL4 6
    PC13 PK11 PL4
    PI0 27 28 (GND) PL9 27 28 PG11
    14 PI0 6 PL9 PG11 9
    16 PK10 29 30 PP4 16 9 PC2 29 30 PQ1 9
    PK10 PP4 PC2 PQ1
    8 PC8 31 32 PK14 16 13 PA6 31 32 (GND)
    PC8 PK14 PA6
    16 PK13 33 34 PK12 16 6 PL3 33 34 PG10 9
    PK13 (GND) PK12 PL3 PG10
    35 36 PC9 8 9 PH11 35 36 PQ2 9
    PC9 PH11 PQ2
    PP2 37 38 PL0 PA5 37 38 PL8
    16 PP2 PL0 16 12 PA5 PL8 6
    16 PK15 39 40 (GND)
    9 PE14 39 40 PQ6 9
    PK15 PE14 PQ6
    11 PC15 41 42 PP1 16 9 PQ4 41 42 (GND)
    PC15 PP1 PQ4
    16 PP7 43 44 (GND)
    9 PG15 43 44 PP13 9
    PP7 (GND) PG15 PP13
    45 46 PC14 11 9 PQ5 45 46 PP12 9
    PC14 PQ5 PP12
    PP6 47 48 PJ4 PQ7 47 48 PI4
    16 PP6 PJ4 16 9 PQ7 PI4 9
    (GND) 49 50 (GND) PP15 49 50 PP14
    9 PP15 PP14 9
    16 PO12 51 52 PO11 16
    (GND) 51 52 (GND)
    PO12 PO11
    16 PO7 53 54 PO8 16 6 PL12 53 54 PL2 6
    PO7 PO8 PL12 PL2
    C 16 PO10 55 56 (GND)
    6 PL11 55 56 PL5 6 C
    PO10 PL11 PL5
    PO4 57 58 PH14 PL6 57 58 PL13
    16 PO4 PH14 16 6 PL6 PL13 6
    16 PO9 59 60 PO13 16 6 PL7 59 60 PM0 6
    PO9 (GND) PO13 PL7 PM0
    SH3 SH4 (GND) (GND) SH3 SH4 (GND)

    (GND) SH5 SH6 (GND) (GND) SH5 SH6 (GND)


    PG5 61 62 PO1 PL15 61 62 PL14
    12,15,16 PG5 PO1 12,16 6 PL15 PL14 6
    16 PO14 63 64 PH13 16 6 PM1 63 64 PM9 6
    PO14 PH13 PM1 PM9
    12,16 PO0 65 66 PG4 12,15,16 6 PM2 65 66 PM7 6
    PO0 PG4 PM2 PM7
    9 PI7 67 68 PH15 16 10 PE12 67 68 PA10 10
    PI7 PH15 PE12 PA10
    16 PP0 69 70 PO15 16 10 PA11 69 70 PA9 10
    PP0 PO15 PA11 PA9
    (GND) 71 72 PE10 12
    (GND) 71 72 PA8 10
    PE10 PA8
    13 PE1 73 74 PE0 13 10 PA7 73 74 PF14 10
    PE1 PE0 PA7 PF14
    9 PI6 75 76 PO6 16 10 PE13 75 76 PG0-R 10
    PI6 PO6 PE13 PG0-R
    16 PO5 77 78 (GND)
    10 PF15 77 78 PH2-R 10
    PO5 PF15 PH2-R
    12 PE11 79 80 PG2 12,15,16 10 PG1 79 80 (GND)
    PE11 PG2 PG1
    PG3 81 82 PA2 PH1-R 81 82 PG12-R
    12,15,16 PG3 PA2 15,16 10 PH1-R PG12-R 10
    (GND) 83 84 PE9 PH0-R 83 84 PG13-R
    PE9 12 10 PH0-R PG13-R 10
    12 PE8 85 86 PA1 15,16 10 PA3 85 86 (GND)
    PE8 (GND) PA1 PA3
    87 88 MCU-RSTx 5,6
    (GND) 87 88 (GND)
    MCU-RSTx
    13 PG9 89 90 PN15 16 6 PM8 89 90 PM10 6
    PG9 PN15 PM8 PM10
    PA0 91 92 PO3 PH3 91 92 PM4
    14 PA0 PO3 16 16 PH3 PM4 12,16
    (GND) 93 94 (GND) PM3 93 94 PL1
    12,16 PM3 PL1 16
    16 PG7 95 96 PG6 16 16 PM6 95 96 (GND)
    PG7 PG6 PM6
    16 PG8 97 98 PC11 7 16 PM13 97 98 PM5 16
    PG8 PC11 PM13 PM5
    7 PC10 99 100 PO2 16 16 PM14 99 100 PI13 13,16
    PC10 PO2 PM14 PI13
    (GND) 101 102 (GND) (GND) 101 102 PB12
    PB12 16
    (GND) 103 104 PB0 PD13 103 104 PD9
    PB0 7 12,13,16 PD13 PD9 16
    7 PB1 105 106 PK1 12,16 16 PD12 105 106 PI12 13,16
    PB1 PK1 PD12 PI12
    12,16 PK2 107 108 PF12 16 10 PI11 107 108 PB7 16
    PK2 (GND) PF12 PI11 PB7
    109 110 (GND)
    16 PD10 109 110 PI15 12
    PD10 PI15
    PF13 111 112 (GND) (GND) 111 112 (GND)
    16 PF13
    PK4 113 114 (GND) MLB_DAT 113 114 MLB_CN
    12,16 PK4 13 MLB_DAT MLB_CN 13
    PK6 115 116 PK3 MLB_SIG 115 116 MLB_CP
    16 PK6 PK3 12,16 13 MLB_SIG MLB_CP 13
    PK8 117 118 PK5 MLB_CLK 117 118 (GND)
    16 PK8 PK5 16 13 MLB_CLK
    16 PN14 119 120 PF11 15,16
    (GND) 119 120 (GND)
    PN14 PF11
    (GND) SH7 SH8 (GND) (GND) SH7 SH8 (GND)
    B (GND) B
    SH9 SH10 (GND) (GND) SH9 SH10 (GND)
    PF9 121 122 PK7 MLB_SN 121 122 MLB_DN
    15,16 PF9 PK7 16 13 MLB_SN MLB_DN 13
    PA14 123 124 PC6 MLB_SP 123 124 MLB_DP
    12,16 PA14 PC6 7 13 MLB_SP MLB_DP 13
    PN13 125 126 PF8 (GND) 125 126 (GND)
    16 PN13 PF8 16
    (GND) 127 128 (GND) (GND) 127 128 (GND)
    16 PN11 129 130 PC7 7 12,16 PD7 129 130 PI14 12
    PN11 PC7 PD7 PI14
    16 PJ11 131 132 PN12 16 16 PJ5 131 132 PJ7 16
    PJ11 PN12 PJ5 PJ7
    16 PJ10 133 134 PJ12 16 12 PJ0 133 134 PD11 16
    PJ10 PJ12 PJ0 PD11
    PK0 135 136 (GND) (GND) 135 136 PJ6
    12,16 PK0 PJ6 16
    16 PJ9 137 138 PJ15 16 12,16 PD5 137 138 PD6 12,16
    PJ9 PJ15 PD5 PD6
    16 PN9 139 140 (GND)
    16 PB5 139 140 PD2 15,16
    PN9 (GND) PB5 PD2
    141 142 PN8 16 16 PB11 141 142 PD3 15,16
    PN8 PB11 PD3
    16 PJ13 143 144 PF10 16 15,16 PD1 143 144 PJ8 16
    PJ13 PF10 PD1 PJ8
    PA4 145 146 PN7 PJ1 145 146 (GND)
    16 PA4 PN7 16 12 PJ1
    (GND) 147 148 PJ14 (GND) 147 148 PB6
    PJ14 16 PB6 16
    16 PN10 149 150 (GND)
    12,16 PD8 149 150 PD0 15,16
    PN10 PD8 PD0
    12,16 PA15 151 152 PN4 16 16 PI9 151 152 PI10 16
    PA15 PN4 PI9 PI10
    16 PN3 153 154 PA13 12,16 12 PF5 153 154 (GND)
    PN3 PA13 PF5
    PN6 155 156 (GND) PB4 155 156 PD4
    16 PN6 15 PB4 PD4 12,16
    (GND) 157 158 PN5 PJ2 157 158 PF6
    PN5 16 12 PJ2 PF6 12
    16 PN0 159 160 PA12 12,16 12 PJ3 159 160 PN1 16
    PN0 PA12 PJ3 PN1
    12 PB10 161 162 PN2 16
    (GND) 161 162 (GND)
    PB10 (GND) PN2
    163 164 PF1 12
    (GND) 163 164 PF4 12
    PF1 PF4
    (GND) 165 166 PF0 PF2 165 166 PF7
    PF0 12 12 PF2 PF7 12
    (GND) 167 168 (GND) PM15 167 168 PF3
    16 PM15 PF3 12
    (GND) 169 170 (GND) (GND) 169 170 (GND)
    MCU_5V0_S 171 172 MCU_3V3_S (GND) 171 172 (GND)
    3 MCU_5V0_S MCU_3V3_S 3
    173 174 DC_5V0_S 173 174 DC_3V3_S
    3 DC_5V0_S DC_3V3_S 3
    175 176 175 176
    MCU_1V25_L 177 178 MCU_3V3_L DC_P12V 177 178 DC_3V3_L
    3 MCU_1V25_L MCU_3V3_L 3 3 DC_P12V DC_3V3_L 3
    179 180 MCU_5V0_L DC_1V25_L 179 180 DC_5V0_L
    MCU_5V0_L 3 3 DC_1V25_L DC_5V0_L 3
    (GND) SH11 SH12 (GND) SH11 SH12

    CON SKT 180 CON SKT 180


    Socket Socket
    A GND GND A
    GND GND

    Not routed through the connectors:


    - Crystal signals Automotive Microcontroller
    - Specific MCU power pins (Power supplies are however taken to daughtercard) Applications
    East Kilbride, Scotland
    Freescale General Business Use
    Drawing Title:
    MPC574xx Customer EVB Main Board
    Page Title:
    Daughter Card Connectors (Sockets)
    Size Document Number Rev
    C SCH-27897 PDF: SPF-27897 D1

    Date: Friday, August 14, 2015 Sheet 4 of 16


    5 4 3 2 1
    5 4 3 2 1

    Reset and External Clock In


    Reset is in the Reset Input / Output PER_HVA
    VDD_HVA domain. PORST
    PER_HVA Connect an external LVI to pad
    when supplying external 1.25V so
    that PORST is asserted until R31
    exterbal 1.25V supply is at 10.0K
    D 3V3_SR D
    threshold and stable
    TPH1
    R217
    C220 (0603 1 PORSTx 4
    270 PORSTx
    C224 (0603 0.1UF 50V)
    0.1UF 50V)

    A
    TARGET
    R16 R24 DS1 RESET GND
    10.0K 10.0K GND YELLOW LED R4
    Reset from LED 10.0K Bi Directional reset
    U3 4

    8
    Debugger U4A line to/from MCU
    J9
    6 JTAG-RSTx 1 VCC
    JTAG-RSTx VCC

    C
    7 SYSTEM-RSTx 3 2 RST-INx 1 2 MCU-RSTx 4,6
    MR RESET MCU-RSTx
    RST-SWITCHx 2
    GND Tri-State Buffered
    SN74LVC2G08DCT GND
    Reset Switch RESET signal to

    4
    (1.65 to 5.5v operation) reset the MCU
    1
    Buffered RESET-out
    1 2
    SW1 B3WN-6002 GND ADM6315-26D2ARTZR7 Active reset drive (high / low)
    GND (2.5 to 5v operation) for any periperhals that need to
    be reset when MCU is in reset
    C TPV5 3V3_SR C
    C3 (0603
    0.1UF 50V) D1
    Note: R214 270 A C
    GND
    The Reset pad on the MPC5748G is in the VDD_HV_A domain which can be run from either LED RED
    3.3V or 5V (selected by the VDD_HV_A and PER_HVA jumpers) (MCU RESET)
    U4B
    To maintian brightness on the LED's irrespective of the voltage setting, the LED's are
    powered from constant 3.3V, grounded via the reset line. 5
    3 RST-OUTx 10,12
    RST-OUTx
    6

    SN74LVC2G08DCT

    External Clock In (SMA)

    EXT-CLK 4
    EXT-CLK
    B B

    R216
    100

    1
    P7
    5 2
    4 3

    CON 1 SMA

    SMA style
    Connector GND

    Automotive Microcontroller
    Applications
    A
    East Kilbride, Scotland A
    Freescale General Business Use
    Drawing Title:
    MPC574xx Customer EVB Main Board
    Page Title:
    Reset Circuitry & External Clock In
    Size Document Number Rev
    B SCH-27897 PDF: SPF-27897 D1

    Date: Friday, August 14, 2015 Sheet 5 of 16


    5 4 3 2 1
    5 4 3 2 1

    Debug Connectors (JTAG and NEXUS)

    JTAG Standard 14-pin Connector


    (All JTAG reset pullups are on Reset Page) Voltage Domains:
    PER_HVA
    D All of the signals used for JTAG (with the D
    exception of EVTI, see note) are powered from
    Note on EVTI: the VDD_HV_A domain. All of the additional
    R44 R41 R15 EVTI is an optional signals used for Nexus are powered from
    10.0K 10.0K 10.0K ONCE Connector signal. Although it is VDD_HV_B.
    supported on the JTAG
    P8 connector, tools vendors
    PC0 TDI (TDI) 1 2 (GND) do not normally use EVTI If you are using Nexus, you need to ensure that
    4 PC0
    4 PC1 TDO (TDO) 3 4 (GND) on non trace hardware. the VDD_HV_A and VDD_HV_B domains are at the
    PC1 TCLK (TCLK) (GND)
    4 PH9
    PH9 5 6 same voltage as well as ensuring that the
    PL8 EVTI EVTI (EVTI) 7 8 (N/C) EVTI is powered from
    4 PL8 DBUG-RSTx (RESET) 9 10 (TMS) PH10 VDD_HV_B whereas the
    peripheral supplies PER_HVA and PER_HVB match
    R19 0 DNP VDD_HV_A / B. See the MCU power page for
    (VREF) 11 12 (GND) rest of the JTAG signals
    5 JTAG-RSTx
    JTAG-RSTx (RDY) 13 14 (JCOMP) JCOMP are from VDD_HV_A. In configuration jumpers.
    (buffered R3 0 order to use EVTI on the
    reset TO MCU) C17 C20 CON_2X7 JTAG, connector,
    R30 47PF 47PF R1 VDD_HV_A and HV_B should
    MCU-RSTx R2 0 10.0K 10.0K be set to the same
    4,5 MCU-RSTx (bidirectional DNP DNP DNP Place One CAP voltage. Rather than
    MCU reset) next to each impose this limitation
    Optional connector for all customers, a
    Config zero ohm link has been
    added to allow EVTI to
    C C
    GND be enabled on the JTAG
    4 PH10 TMS connector if required.
    PH10

    NEXUS 50-pin Connector


    4 PL12
    PL12
    PER_HVB
    P10 PER_HVB
    S1 (GND)
    4 PL9 (MSEO_0) 1 2 (VREF) R245 PL12
    PL9
    4 PL11 (MSEO_1) 3 4 (TCK) PH9 R235 PL9
    PL11 (GND) (TMS)
    5 6 PH10 R225 PL11
    4 PL2 (MDO0) 7 8 (TDI) PC0 R236 PL2
    PL2
    4 PL3 (MDO1) 9 10 (TDO) PC1 R226 PL3
    PL3 (GND) 11 12 (JCOMP) JCOMP R237 PL4
    4 PL4 (MDO2) 13 14 (RDY) R227 PL5
    PL4 (MDO3) (EVTI)
    4 PL5 15 16 PL8 R238 PL10
    PL5 (GND) 17 18 (EVTO) PL12 R228 PL6
    B 4 PL10 (MCKO) 19 20 (RESET) DBUG-RSTx R239 PL7 B
    PL10
    4 PL6 (MDO4) 21 22 (RST OUT) MCU-RSTx R229 PL13
    PL6 (GND) 23 24 (GND) R240 PL14
    PL7 (MDO5) 25 26 (CLKOUT) R230 PL15
    4 PL7 TPV11
    4 PL13 (MDO6) 27 28 (TD/WT) R241 PM0
    PL13 (GND) 29 30 (GND) R231 PM1
    4 PL14 (MDO7) 31 32 (DAI1) R242 PM2
    PL14
    4 PL15 (MDO8) 33 34 (DAI2) R232 PM7
    PL15 (GND) (GND)
    35 36 R243 PM10
    4 PM0 (MDO9) 37 38 (ARBREQ) R247 PM9
    PM0
    4 PM1 (MDO10) 39 40 (ARBGRT) R246 PM8
    PM1 (GND) 41 42 (GND)
    PM2 (MDO11) 43 44 (MDO13) PM8 Neus
    4 PM2 Specific
    PM7 (MDO12) 45 46 (MDO14) PM9
    4 PM7 Pullups all
    (GND) 47 48 (GND)
    10K 0603
    4 PM10 (MDO15) 49 50 (N/C)
    PM10
    S2 (GND)

    CON 2X25

    GND Nexus GND


    Automotive Microcontroller
    4 PM9 Applications
    PM9
    4 PM8
    A
    PM8 East Kilbride, Scotland A
    Freescale General Business Use
    Drawing Title:
    MPC574xx Customer EVB Main Board
    Page Title:
    Debug Connectors (JTAG & Nexus)
    Size Document Number Rev
    B SCH-27897 PDF: SPF-27897 D1

    Date: Friday, August 14, 2015 Sheet 6 of 16


    5 4 3 2 1
    5 4 3 2 1

    CAN & LIN Physical


    CAN0 Physical Interface 5V0_SR PER_HVA

    VDD - 5.0V input supply for CAN transceiver (4.5 to 5.5V)


    VI/O - determines the signal level on MCU TX and RX pins C255 C254
    C270 0.1UF C271 0.1UF
    and can range from 2.8 to 5.5V 1uF 1uF
    (0603 (0603
    STB - High for Standby mode, pulled low for normal mode. 50V) 50V) CAN termination resistor
    D footprint. Place on D
    underside of PCB

    5
    GND U12 GND
    J15

    VIO
    VDD
    4 PB0 (CAN0_TX) 1 2 CAN0_TX 1 R307 120
    PB0 TXD
    4 PB1 PB1 (CAN0_RX) 3 4 DNP
    CAN0_RX 4 7 CAN0-CANH P15
    RXD CANH 1 HDR_1X3
    R59 4.70K CAN0-S 8 6 CAN0-CANL 2
    STB CANL 3

    GND
    TPV16

    All CAN and LIN signals are GND MC33901WEF GND

    2
    in power domain VDD_HV_A.
    GND
    All interfaces will work at
    3.3V or 5.0V (PER_HVA CAN1 Physical Interface 5V0_SR PER_HVA
    jumper)
    VDD - 5.0V input supply for CAN transceiver (4.5 to 5.5V) CAN termination resistor
    C257 C256
    C273 C272 0.1UF footprint. Place on
    VI/O - determines the signal level on MCU TX and RX pins 0.1UF
    1uF 1uF
    and can range from 2.8 to 5.5V (0603 (0603 underside of PCB
    C 50V) 50V) C
    STB - High for Standby mode, pulled low for normal mode.

    5
    GND U11 GND
    J14

    VIO
    VDD
    PC10 (CAN1_TX) 1 2 CAN1_TX 1 R306 120
    4 PC10 TXD
    PC11 (CAN1_RX) 3 4
    4 PC11 DNP P14
    CAN1_RX 4 7 CAN1-CANH
    RXD CANH 1 HDR_1X3
    R58 4.70K CAN1-S 8 6 CAN1-CANL 2
    STB CANL 3

    GND
    TPV15

    GND MC33901WEF GND

    2
    GND

    MC33662LEF LIN transceiver is newer version of 33661 offering:


    LIN0 Physical Interface Master Mode Pullup Enable
    - Full LIN compliance (33661 no longer compliant)
    J11 D200 GF1A R25 2.0K - Improved ESD protection on LIN pin up to 15KV
    PER_HVA P9 - Improved ESD on Wake and VSUP Pins
    B 1 2 A C - Other EMC and performance improvements B
    J10 U6 R221 2.0K 1
    4 PB3 PB3 (LIN0_RX) 1 2 LIN0-RX 1 8 C A 2 See freescale.com for more details
    PB2 (LIN0_TX) 3 4 (Enable) 2 RXD INH 7 D2 GF1A LIN0-VSUP 3
    4 PB2 EN VSUP
    (Wake) 3 6 LIN0-LIN 4
    LIN0-TX 4 WAKE LIN 5
    TXD GND Total current CON PLUG 4
    C231 C234 Battery through resistors
    MC33662LEF 0.1UF GND
    GND (LEF = 20K Baud) GND 1000pF Reverse (LIN Bus at GND)
    (0603 (0402 polarity & = 12mA (0.144W) LIN Molex
    50V) 50V) Pulse Connector
    EN = PER_HVA enables Transceiver and sets I/O for VDD_HV_A
    Protection Each resistor spec
    WAKE = GND ensures no spurious wakeups = 0.1W (0.2W total)
    GND

    LIN1 Physical Interface Master Mode Pullup Enable


    J13 D201 GF1A R248 2.0K
    PER_HVA 1 2 A C P11
    J12 U10 R249 2.0K 1 Automotive Microcontroller
    4 PC7 PC7 (LIN1_RX) 1 2 LIN1-RX 1 8 C A 2 Applications
    PC6 (LIN1_TX) 3 4 (Enable) 2 RXD INH 7 D3 GF1A LIN1-VSUP 3
    4 PC6 EN VSUP East Kilbride, Scotland
    A (Wake) 3 6 LIN1-LIN 4 A
    (TXD_0) LIN1-TX 4 WAKE LIN 5 Freescale General Business Use
    TXD GND Total current CON PLUG 4 Drawing Title:
    C248 C249 through resistors
    MC33662LEF Battery GND
    GND (LEF = 20K Baud) GND
    0.1UF 1000pF
    (0402
    Reverse (LIN Bus at GND) MPC574xx Customer EVB Main Board
    (0603 polarity & = 12mA (0.144W) Page Title:
    50V) Pulse
    LIN Molex
    EN = PER_HVA enables Transceiver and sets I/O for VDD_HV_A 50V)
    WAKE = GND ensures no spurious wakeups Protection Each resistor spec Connector CAN and LIN
    = 0.1W (0.2W total)
    Size Document Number Rev
    GND B SCH-27897 PDF: SPF-27897 D1

    Date: Friday, August 14, 2015 Sheet 7 of 16


    5 4 3 2 1
    5 4 3 2 1

    USB RS232 (serial) Interface

    All Signals are in


    power domain FTDI USB <-> Serial Interface
    VDD_HV_A. - Self Powered mode. No power is taken from USB
    - Device efaults to Dual serial (RS232) mode ie RS232 on both A and B
    D FTDI interface will - Configurable I/O voltage on CHA / CHB via VDDIOA/B 5V0_SR D
    work at 3.3V or 5.0V
    (PER_HVA jumper) 5V0_SR
    C259 C260
    PER_HVA
    0.1UF 0.1UF
    + C22
    D4 (0603 (0603
    BGX50A 10UF

    1
    C258 (0603 C262 50V) 50V)
    R251 C263
    0.1UF 50V) 0.1UF 0.1UF
    2
    D1 D2
    4 470

    1
    D4 D3
    (0603 (0603
    50V) 50V) GND
    L201
    GND C261
    470OHM

    3
    0.033UF
    DNP
    GND

    46

    42

    14

    31
    P18

    3
    U13

    2
    GND 24 BUS0 1 2

    VCC1

    VCC2

    VCCIOA

    VCCIOB
    AVCC
    ADBUS0 23 BUS1 3 4
    GND 6 ADBUS1 22 BUS2 5 6
    P17 3V3OUT ADBUS2 21 BUS3
    S2 ADBUS3 20 BUS4 DNP
    R69 27 ADBUS4 HDR 2X3
    2 USB_N USB_RN 8 19 BUS5 FTDI Pin 40 (TXD)
    -D
    3 USB_P USB_RP USBDM ADBUS5 17 is Output from
    2

    +D ADBUS6 FTDI Device,


    G
    4 R68 27 7 16
    1 USBDP ADBUS7 connect to MCU RXD
    1

    C V C
    S1 R67 15 Send Immediate / Wakeup
    FTDI Pin 39 (RXD)
    C23 C24 ACBUS0 13 Disabled for CHA
    1.5K ACBUS1 is Input to FTDI
    USB_TYPE_B R256 5 12 PER_HVA device, connect to
    47PF 47PF 4.70K RSTOUT# ACBUS2 11
    R254 10.0K MCU TXD
    DNP DNP 4 ACBUS3 10
    RESET# SI/WUA J16
    40 FTDI_TXD 1 2 (MCU_LIN2RX) PC9 4
    BDBUS0 PC9

    1.0M
    GND X1 CLK_XTIN_6M 43 39 FTDI_RXD 3 4 (MCU_LIN2TX) PC8 4
    XTIN BDBUS1 PC8
    GND 6 MHZ 38
    2 CLK_XTOUT_6M 44 BDBUS2 37
    R255
    10.0K XTOUT BDBUS3 36
    BDBUS4 35
    5V0_SR BDBUS5

    R66
    GND 33

    3
    BDBUS6 32
    48 BDBUS7
    GND 1 EECS 30 Send Immediate / Wakeup
    2 EESK BCBUS0 29 Disabled for CHB
    EEDATA BCBUS1 28 PER_HVA 5V0_SR
    R252 10.0K BCBUS2 27
    BCBUS3 R253 10.0K
    26
    47 SI/WUB
    TEST

    AGND

    GND1
    GND2
    GND3
    GND4
    41
    PWREN#
    R250 10.0K Disable Receiver when
    B in USB suspend mode B
    FT2232D DNP

    45

    9
    18
    25
    34
    GND

    Automotive Microcontroller
    Applications
    A
    East Kilbride, Scotland A
    Freescale General Business Use
    Drawing Title:
    MPC574xx Customer EVB Main Board
    Page Title:
    USB RS232 Interface
    Size Document Number Rev
    B SCH-27897 PDF: SPF-27897 D1

    Date: Friday, August 14, 2015 Sheet 8 of 16


    5 4 3 2 1
    5 4 3 2 1

    USB (Type A Host and Type AB OTG)


    USB Signals 3V3_SR 5V0_SR
    are in General Layout Note. Recommendation is to keep all
    power tracks between MCU and USB PHI less than 3" See Adobe Acrobat
    domain C239 C236 C230 Document
    10UF +
    C243
    0.1UF + 10UF
    additional SMSC Layout guidelines PDF to the right
    VDD_HV_A (35V
    0.1UF
    (Layout Note: Place Series TANT) (0603 (0603 (35V
    D 50V) 50V) TANT)
    USB Host, Type A D
    The USB Termination resistor close

    32

    21
    to USB IC) U7 (Available on all packages)
    interface 3V3_SR

    VDDIO

    VBAT_5V
    only supports GND GND
    3.3V 4 PG14 (USB1_DO) 3 8 (Layout Note: Route DP and DM with USB_TYPE_A_FEMALE
    PG14 (USB1_D1) DATA0 REFSEL0 (Select 60MHz CLKOUT
    PG15 4 11 90 Ohm Differential Pair. Keep
    operation. 4 PG15
    PE14 (USB1_D2) 5 DATA1 REFSEL1 14 with 24MHz XTAL) tracks as short as possible) P5
    All I/O 4 PE14 DATA2 REFSEL2
    4 PE15 (USB1_D3) 6
    PE15 DATA3
    signals must 4 PG10
    PG10 (USB1_D4) 7
    DATA4 V D- D+ G
    be 3.3V. If PG11 (USB1_D5) 9 17 USB_A_EN S1 S2
    4 PG11 DATA5 CPEN
    PH11 (USB1_D6) 10
    VDD_HVA is 4 PH11 DATA6 R36 20K C8 C9 L4 26OHM C214
    4 PH12 (USB1_D7) 13 22 USB_A_VBUS (20K for HOST)
    set to 5V, PH12 DATA7 VBUS 100UF 1.0UF 1000pF
    (1/10W 0603) 1 2 USB_A_5V A1
    USB MCU pads PC3 (USB1_DIR) 31 19 USB_A_DM (16V (16V (0402 USB_A_DM A2
    4 PC3 DIR DM
    PI4 (USB1_STP) 29 18 USB_A_DP TANT) TANT) 50v) USB_A_DP A3 C206 R213
    must be left 4 PI4
    PI5 (USB1_NXT) 2 STP DP 23 (ID=GND for HOST mode) + + C216 + A4 1000pf 100
    as tri-state 4 PI5 NXT ID
    4 PC2 PC2 R49 30 USB1_CLK 1 C10 10UF (1210
    CLKOUT 2KV)
    with no VDD3V3_20
    20 USB_A_VDD3.3 1000pF (35V
    pullups. 4 PI7 (USB1_RST Active Low) 27 TANT) GND
    PI7 RESET 28 GND (50V
    VDD1V8_28 USB_A_VDD1.8 0402)
    33PF Y3 R33 30
    24MHZ 10 A_XO 25 VDD1V8_30 GND GND GND
    R46 A_XI 26 XO 24
    REFCLK/XI RBIAS
    2

    10.0K C14

    PAD_GND
    C C
    16
    15 SPK_R 12 R38 C238 C19 Layout Note:
    3V3_SR SPK_L NC 8.06K 1uF 1uF Place caps &
    Crystals are 1% (10V (10V resistor as
    33PF FOXSDLF/240F-20 USB83340 0603 0603
    close to
    1

    33
    (20pF Load low low
    R26 Capacitance) ESR) ESR) device as
    C13 1.0M GND GND GND GND possible
    GND

    USB OTG Micro AB


    3V3_SR 5V0_SR 5V0_SR (Only available on BGA packages)
    U9
    USB_A_EN 1 2 FLG_A TPV12
    C246 ENA FLGA
    C245 C242 C235 C244 C247 0.1UF
    10UF + 0.1UF + 10UF + 10UF USB_B_EN 4 3 FLG_B TPV13
    0.1UF ENB FLGB
    (35V (35V (0603
    (Layout Note: Place Series TANT) (0603 (0603 (35V TANT) 50V) 7 8 USB_A_PWR P1
    Termination resistor close 50V) 50V) TANT) IN OUTA 7 8 C2 R202
    32

    21

    to USB IC) U8 6 5 USB_B_PWR SHELL2 SHELL3 1000pf 100


    B B
    3V3_SR GND OUTB 6 9 (1210
    VDDIO

    VBAT_5V

    GND GND GND MIC2026-1YM SHELL1 SHELL4 2KV)


    PP15 (USB0_DO) 3 8 USB Power Switch GND
    4 PP15 DATA0 REFSEL0
    4 PP14 (USB0_D1) 4 11
    PP14 DATA1 REFSEL1

    VBUS
    PP13 (USB0_D2) 5 14

    GND
    4 PP13 DATA2 REFSEL2
    PP12 (USB0_D3) 6 (Layout Note: Route DP and DM with GND

    D+
    D-
    4

    ID
    PP12 DATA3
    4 PQ7 (USB0_D4) 7 90 Ohm Differential Pair. Keep
    PQ7 (USB0_D5) DATA4 USB_B_EN
    4 PQ6 9 17 tracks as short as possible) USB AB 5
    PQ6

    5
    4
    3
    2
    1
    PQ5 (USB0_D6) 10 DATA5 CPEN
    4 PQ5 DATA6 R37 1.0K (1K for OTG)
    4 PQ4 (USB0_D7) 13 22 USB_B_VBUS
    PQ4 DATA7 VBUS
    (1/10W 0603)
    PQ2 (USB0_DIR) 31 19 USB_B_DM
    4 PQ2 DIR DM
    4 PQ0 PQ0 (USB0_STP) 29 18 USB_B_DP GND
    PQ3 (USB0_NXT) 2 STP DP 23 USB_B_ID USB_B_ID
    4 PQ3 NXT ID
    4 PQ1 PQ1 R48 30 USB0_CLK 1 USB_B_DP
    CLKOUT 20 USB_B_VDD3.3 USB_B_DM
    PI6 (USB0_RST Active Low) 27 VDD3V3_20 USB_B_5V
    4 PI6 RESET 28
    VDD1V8_28 30 USB_B_VDD1.8 C212 C5 L3 26OHM
    33PF Y4 R32
    24MHZ 10 B_XO 25 VDD1V8_30 100UF 1.0UF 1 2
    R47 B_XI 26 XO 24 (16V (16V (0402 Automotive Microcontroller
    REFCLK/XI RBIAS
    2

    10.0K C16 TANT) TANT) 50v) C1


    PAD_GND

    Applications
    16 + + C205 + 1000pF
    3V3_SR SPK_R East Kilbride, Scotland
    A 15 12 R39 C237 C18 Layout Note: C4 10UF A
    SPK_L NC 8.06K 1uF 1uF 1000pF (50V Freescale General Business Use
    Place caps & (35V
    0402)
    Crystals are 1% (10V (10V TANT) Drawing Title:
    FOXSDLF/240F-20 USB83340 0603 0603 resistor as
    33PF
    MPC574xx Customer EVB Main Board
    1

    33

    (20pF Load low low close to


    R27 Capacitance) ESR) ESR) device as GND GND Page Title:
    C15 1.0M GND GND GND GND possible
    GND
    USB Type A / Type AB
    Size Document Number Rev
    B SCH-27897 PDF: SPF-27897 D1

    Date: Friday, August 14, 2015 Sheet 9 of 16


    5 4 3 2 1
    5 4 3 2 1

    Ethernet
    All Ethernet Signals
    are in power domain 50MHz Osc for RMII and 25MHz XTAL for MII 3V3_SR L200 3V3_SR
    VDD_HV_B C200 (0603 120OHM
    RMII_50MHZ 0.1UF 50V) 1 2
    The Ethernet Layout Note - Place Caps

    4
    D Y1 D
    interface only and Resistors close to PHI
    VDD GND 3 C227 C232 C223
    supports 3.3V 1 OE CLK 3 PHY_50MHz (RMII Clock) C241 + 0.1UF R29 R21 0.1UF 0.1UF
    operation. All I/O OUT 2 10UF 2.2K 2.2K
    GND C211 (0603 5% 5% (0603 (0603 R224 3V3_SR
    signals must be 3.3V. 50MHZ PHY_25MHz 1
    (TANT) 50V) 50V) 50V) 49.9

    2
    If VDD_HVA is set to (MII Clock) 1%

    2
    5V, Ethernet MCU pads 33PF J7

    22

    32
    48

    20
    21
    Y2
    must be left as GND 25MHZ GND U5 10/100 single phy
    J6
    33PF GND

    AVDD33

    IOVDD33_1
    IOVDD33_2

    RSVDPU1
    RSVDPU2
    tri-state with no C228

    1
    GND R215 0 1 2 3V3_SR Pulse J1011F21PNL
    0.1UF
    pullups. (RMII) CLKIN_X1 34 R233 (Includes built in
    C210 (+MII) X2 33 X1 49.9 (0603 transformer)
    X2 25 1% 50V) P6 RJ45-8
    25MHZ_OUT TPV10
    4 PG13-R (Termination on DC) (+MII) (TXD3) 6 1
    PG13-R (Termination on DC) (TXD2) TXD3_SNIMODE TD+
    4 PG12-R (+MII) 5 17 TDP GND 2 CG1
    PG12-R TXD2 TDP TD- GND1
    4 PH0-R (Termination on DC) (RMII) (TXD1) 4 16 TDN 3
    PH0-R TXD1 TDN CT_3
    4 PH1-R (Termination on DC) (RMII) (TXD0) 3 4
    PH1-R TXD0 GND_4
    4 PH2-R (Termination on DC) (RMII) (TXEN) 2 5
    PH2-R TXEN GND_5
    4 PG1 PG1 R45 50 (RMII) TXCLK 1 14 RDP 6
    ** See Layout Note R80 50 DNP TXCLK dp83848c RDP 13 RDN 7 CT_6 CG2
    PE13 (bottom right) R43 50 (+MII) RXD3 46 RDN R234 3V3_SR 8 RD+ GND2
    4 PE13 RXD3_PHYAD3 RD-
    4 PA7 PA7 R42 50 (+MII) RXD2 45 49.9
    PA8 R40 50 RXD1 44 RXD2_PHYAD2 28 LED_Y 1%

    GC
    (RMII)

    GA
    YC
    YA
    C 4 PA8 RXD1_PHYAD1 LEDACTCOL_ANEN C
    PA9 R35 50 (RMII) RXD0 43 26 LED_G
    4 PA9 RXD0_PHYAD1 LEDLINK_AN0
    4 PF15 PF15 R17 50 (RMII) RXDV 39 27 GND GND

    9
    10

    11
    12
    PA11 R28 50 (RMII) RXER 41 RXDV_MIIMODE LEDSPEED_AN1
    4 PA11 RXER_MDIXEN C233 C11 C6
    4 PA10 PA10 R34 50 (+MII) COL 42 23 PFBOUT 0.1UF 0.1UF 0.1UF
    PE12 R20 50 (RMII) CRS 40 COL_PHYAD0 PFBOUT R244
    4 PE12 CRS_LEDCFG (0603 (0603 (0603
    PA3 R5 50 (+MII) RXCLK 38 18 49.9 R223 R222
    4 PA3 RXCLK PFBIN1 50V) 50V) 50V)
    37 1% 270 270
    PG0-R (Termination on DC) (RMII) (MDC) 31 PFBIN2
    4 PG0-R MDC
    PF14 (RMII) (MDIO) 30 GND 3V3_SR 3V3_SR
    4 PF14 MDIO
    MCU Output PHI Output GND
    Resistors Next Place Next to 29 Place Caps close
    PHI 7 RESET 24 RBIAS
    to MCU on to connector
    PWRDN_INT RBIAS
    daughtercard

    IOGND_1
    IOGND_2
    AGND_1
    AGND_2

    RSVD1
    RSVD2
    RSVD3
    RSVD4
    RSVD5
    DGND
    Series Termination Resistors: R18
    50 Ohms as per TI spec. Place 4.87K
    resistors as close to driving
    source as possible. Termination

    19
    15
    36
    35
    47

    8
    9
    10
    11
    12
    recommended for ALL MII signals
    C229 C226 C240 C225 Layout Note:
    J8 GND 0.1UF 0.1UF + 0.1UF Place 0.1uF cap close
    5,12 RST-OUTx 1 to each pin. 10uF
    RST-OUTx (0603 (0603 10UF (0603 TANT as close to pin
    GND
    50V) 50V) (TANT) 50V)
    B 2 23 as possible B
    Reset Control:
    4 PI11 3 - Reset from MCU Reset Out (will reset with MCU) PFBIN1 PFBIN2 PFBOUT
    PI11
    - Reset from GPIO. Allows MCU to reset PHY as well as hold PHY in reset
    while reset config data can be driven onto pins to change mode etc. GND
    3V3_SR
    R218
    10.0K

    3V3_SR R308 0 RMII_50MHZ


    Boot Configuration (using PHY internal Pulls) ** Layout Note - Place
    J5 (50MHz OSC resistors as shown PHY_50MHz
    - Auto Negotiation Enable (All speeds / duplex supported) 1 Power) with shared pad on PG1
    (AN_EN, AN0 and AN1 all Internal PullUP) side of resistors
    2 R219 PF15
    - Operating Mode (MII or RMII) 2.2K 5% (MII_MODE) For RMII mode,
    (SNI_Mode Internal PullDown, MII_Mode control via jumper) 3 remove resistor
    Posn 1-2 for MII (default) between PG1 and
    - LED Configuraiton (Mode1) Posn 2-3 for RMII TXCLK and place PG1 TXCLK
    between PG1 and
    (LED_CFG Internal PullUp) GND PHY_50MHz
    - MDIX Enable (Auto MDIX Enabled) 3V3_SR MDIO Pullup
    (MDIX_EN Internal PullUP) Automotive Microcontroller
    R220 1.5K PF14 Applications
    - Physical Address (set to 0b00001) East Kilbride, Scotland
    A (PHYAD[0] Internal PullUp, PHYAD[1..4] Internal PullDown) A
    Freescale General Business Use
    Layout Note: Drawing Title:

    MII Mode resistor (MII / RMII mode) and the MDIP ullup resistor should be placed as close as MPC574xx Customer EVB Main Board
    possible to the PF15 / PF14 tracks to reduce the effect of a stub on the transmission line. Page Title:
    Ethernet
    Size Document Number Rev
    B SCH-27897 PDF: SPF-27897 D1

    Date: Friday, August 14, 2015 Sheet 10 of 16


    5 4 3 2 1
    5 4 3 2 1

    FlexRAY Physical Interface

    All Signals are in Decoupling Caps for BOTH IC's. Place next to power pins.
    power domain VDD_HV_A.
    P12V 5V0_SR PER_HVA
    FlexRAY interface will FlexRAY
    debug
    D work at 3.3V or 5.0V connector D
    (PER_HVA jumper) P4
    4 PC12 (FR_DBG0) 1 2 (FR_DBG1) C213 C215 C218 C219
    PC12 C209 C221 C222 C217
    4 PC14 (FR_DBG2) 3 4 (FR_DBG3) + + + + 0.1UF 0.1UF 0.1UF 0.1UF
    PC14
    DNP PER_HVA 5V0_SR P12V 10UF 10UF 10UF 10UF (0603 (0603 (0603 (0603
    PC15 50V) 50V) 50V) 50V)
    4 PC15
    4 PC13
    PC13
    VBAT VBUF VCC VIO
    GND
    J3

    19
    20
    14
    U2

    4
    4 PC5 (FR_A_TX) 1 2 FRA-JTXD
    PC5
    PE2 (FR_A_TX_EN) 3 4 FRA-JTXEN

    VIO
    VCC
    VBUF
    VBAT
    4 PE2
    PE3 (FR_A_RX) 5 6 FRA-JRXD GND
    4 PE3
    11 1 FRA-INH2 R210 C204
    TRXD0 INH2 TPV9
    HDR 2X3 10 2 FRA-INH1 47.0 10PF
    PER_HVA TRXD1 INH1 TPV7
    1% C208 P3
    5 18 FRA-BP 1 L2 2 FRA-DATA-A 4700PF (0603) 1
    J2 6 TXD BP 17 (50V 0805) 2
    R200 10.0K 1 2 FRA-BGE 8 TXEN BM FRA-BM 4 3 FRA-DATA-B
    R203 10.0K 3 4 FRA-STBN 9 BGE 7
    STBN RXD DLW43SH
    R205 10.0K 5 6 FRA-EN 3 13 FRA-ERRN R209 C203 GND Crimped lead - 279-9522
    C EN ERRN TPV1 Receptacle housing - 279-9156 C
    R212 10.0K 7 8 12 FRA-RXEN 47.0 10PF
    RXEN TPV4
    FRA-WAKE 15 1%

    GND
    WAKE (0603)
    GND
    TJA1080TS/N

    16
    Bus voltage +/- 12V (VBAT = 12v)
    Components spec'd for 12V operation
    FlexRAY A GND

    FlexRAY B PER_HVA 5V0_SR P12V

    J4

    19
    20
    14
    U1

    4
    4 PE4 (FR_B_TX) 1 2 FRB-JTXD
    PE4 (FR_B_TX_EN)
    PC4 3 4 FRB-JTXEN

    VIO
    VCC
    VBUF
    VBAT
    4 PC4
    4 PE5 PE5 (FR_B_RX) 5 6 FRB-JRXD GND
    B 11 1 FRB-INH2 R208 C202 B
    TRXD0 INH2 TPV8
    HDR 2X3 10 2 FRB-INH1 47.0 10PF
    TRXD1 INH1 TPV6
    1% C207 P2
    PER_HVA 5 18 FRB-BP 1 L1 2 FRB-DATA-A 4700PF (0603) 1
    J1 6 TXD BP 17 (50V 0805) 2
    R201 10.0K 1 2 FRB-BGE 8 TXEN BM FRB-BM 4 3 FRB-DATA-B
    R204 10.0K 3 4 FRB-STBN 9 BGE 7
    STBN RXD DLW43SH
    R206 10.0K 5 6 FRB-EN 3 13 FRB-ERRN R207 C201 GND Crimped lead - 279-9522
    EN ERRN TPV2 Receptacle housing - 279-9156
    R211 10.0K 7 8 12 FRB-RXEN 47.0 10PF
    RXEN TPV3
    FRB-WAKE 15 1%

    GND
    WAKE (0603)
    GND
    16 TJA1080TS/N
    Bus voltage +/- 12V (VBAT = 12v)
    Components spec'd for 12V operation
    GND

    MODE EN STBN
    Normal 1 1
    Rec Only 0 1 Automotive Microcontroller
    Go to Sleep 1 0 Applications
    Sleep 0 0
    A
    East Kilbride, Scotland A
    Freescale General Business Use
    Drawing Title:
    MPC574xx Customer EVB Main Board
    Page Title:
    FlexRAY Physical Interface
    Size Document Number Rev
    B SCH-27897 PDF: SPF-27897 D1

    Date: Friday, August 14, 2015 Sheet 11 of 16


    5 4 3 2 1
    5 4 3 2 1

    SAI Audio, AVB & TWRPI Connectors


    General Purpose TWRPI

    3V3_SR 5V0_SR 3V3_SR 3V3_LR 3V3_SR

    D P26 3V3_SR P27 3V3_SR D


    R316
    R315 1 2 10.0K R317 10.0K 1 2 R318 10.0K
    10.0K 3 4 R314 0 PO0 I2C0_SCL 3 4 I2C0_SDA PO1 4,16
    PO1
    5 6 5 6
    7 8 TWRPI-ADC0 PD5 7 8
    PD6 TWRPI-ADC1 9 10 PA12 (DSPI0_SIN) 9 10 (DSPI0_SOUT) PA13
    4,16 PD6 (ADC1_P[10]) 11 12 TWRPI-ADC2 PD4 PA15 (DSPI0_SS0) 11 12 (DSPI0_SCK) PA14
    13 14 13 14
    15 16 PK3 (EIRQ31) (GPIO0/IRQ) 15 16 (GPIO1) PK0 4,16
    TWRPI-ID0 TWRPI-ID1 (GPIO2) (GPIO3) PK0
    PD7 17 18 PD8 PK1 17 18 PK2 4,16 Note: Ports
    4,16 PD7 PK2
    (ADC1_P[11]) 19 20 RESET RST-OUTx PK4 (GPIO4) 19 20 PK[0..5] are
    shared with the
    Note: Ports GPIO Matrix
    PD[4..8] are GND CON_2X10 GND GND CON_2X10 GND
    shared with the
    GPIO Matrix RST-OUTx PK4 4,16
    5,10 RST-OUTx PK4
    PK1 4,16
    (ADC1_P[12]) PK1
    PD8 PK3 4,16
    4,16 PD8 (ADC1_P[8]) PK3
    PD4
    4,16 PD4 PD5 (ADC1_P[9]) PO0
    4,16 PD5 PO0 4,16

    C C

    SAI Audio and AVB


    P25
    1 2 Pins used on this header are also at GPIO Matrix
    4,16 PA12 (DSPI0_SIN) 3 4
    PA12
    4,16 PA13 (DSPI0_SOUT) 5 6 PA12 - DSPI0_SIN (Also shared with TWRPI)
    PA13
    4,16 PA14 (DSPI0_SCK) 7 8 PA13 - DSPI0_SOUT (Also shared with TWRPI)
    PA14 (DSPI0_SS0) PA14 - DSPI0_SCK (Also shared with TWRPI)
    4,16 PA15 9 10
    PA15
    4,15,16 PG2 (DSPI3_SOUT) 11 12 PA15 - DSPI0_SS0 (Also shared with TWRPI)
    PG2
    4,15,16 PG3 (DSPI3_SS3) 13 14
    PG3
    4,15,16 PG4 (DSPI3_SCK) 15 16 PG2 - DSPI3_SOUT (Also shared with User LED)
    PG4
    4,15,16 PG5 (DSPI3_SIN) 17 18 PG3 - DSPI3_SS3 (Also shared with User LED)
    PG5 PG4 - DSPI3_SCLK (Also shared with User LED)
    19 20
    PG5 - DSPI3_SIN (Also shared with User LED)
    HDR_10X2
    GND
    DNP

    B B

    3V3_SR
    P24
    1 2
    4 PF2 (SAI0_DATA3) 3 4 Differences to RevC
    PF2
    4 PF3 (SAI0_DATA2) 5 6 Pin 17 was PH5, now PD13** (PH5 now routed to GPIO Matrix)
    PF3
    4 PF4 (SAI0_DATA1) 7 8 Pin 27 was PH4, now PM4 (PH4 now routed to GPIO Matrix)
    PF4 (SAI0_DATA0) Pin 45 was PH3, now PM3 (PH3 now routed to GPIO Matrix)
    4 PF5 9 10
    PF5
    4 PF1 (SAI0_BCLK) 11 12
    PF1
    4 PB10 (SAI0_SYNC) 13 14 ** Note PD13 is also routed to MLB header via DNP link
    PB10
    4 PF0 (SAI0_MCLK) 15 16
    PF0
    4,13,16 PD13 (ENET0_TMR0) 17 18
    PD13 (I2C_SCL3) Black - SAI Channels
    4 PE11 19 20
    PE11
    4 PE10 (I2C_SDA3) 21 22 Green - I2C Channels
    PE10
    4 PJ2 (SAI1_DATA0) 23 24 Orange - ENET TMRx channels
    PJ2
    4 PJ3 (SAI1_BCLK) 25 26
    PJ3
    4,16 PM4 (ENET1_TMR2) 27 28
    PM4 (SAI1_SYNC)
    4 PF6 29 30
    PF6
    4 PF7 (SAI1_MCLK) 31 32
    PF7
    4 PE9 (I2C_SCL2) 33 34
    PE9
    4 PE8 (I2C_SDA2) 35 36 Automotive Microcontroller
    PE8
    4 PI14 (SAI2_DATA0) 37 38 Applications
    PI14 (SAI2_BCLK)
    4 PJ1 39 40
    PJ1 East Kilbride, Scotland
    A
    4 PJ0 (SAI2_SYNC) 41 42 A
    PJ0 Freescale General Business Use
    4 PI15 (SAI2_MCLK) 43 44
    PI15
    4,16 PM3 (ENET0_TMR2) 45 46 Drawing Title:
    PM3
    PA5 (GPIO Control) 47 48
    4 PA5
    49 50 MPC574xx Customer EVB Main Board
    5V0_SR Page Title:
    HDR_2X25
    GND
    SAI Audio, AVB & TWRPI Headers
    Size Document Number Rev
    B SCH-27897 PDF: SPF-27897 D1

    Date: Friday, August 14, 2015 Sheet 12 of 16


    5 4 3 2 1
    5 4 3 2 1

    MLB (SMSC) Daughtercard Connector


    3V3_SR
    Layout Note: MLB track lengths should be < 80mm
    (from MCU through daughter card to connector) 3V3_LR P12V
    P16
    44 43
    All MLB Signals are in R63 R65 R64
    (12v) 40 39 (3.3v) 10.0K 10.0K 10.0K
    D power domain VDD_HV_C. (3.3v Linear) 38 37 (3.3v) D

    (RSVD) 36 35 (SDA) (I2C1_SDA) PE1 4


    PE1
    The MLB interface only 4 PG9 PG9 CARD INTERRUPTING MCU (WKPU21) (INT) 34 33 (SCLK) (I2C1_SCL) PE0 4
    PE0
    supports 3.3V operation. (TDI/DSDA) 32 31 (TDO/DINT)
    All I/O signals must be Debug - Not RQD
    (TMS) 30 29 (TCK/DSCL)
    3.3V. If VDD_HVC is set
    MLB_MCKIN (MCK_IN) 28 27 (ERR/BOOT) Controls INIC Mode PA6
    to 5V, MLB MCU pads must TPV17 MLB_RSTOUT (RSOUT) 26 25 (RST) PH6
    PA6 4
    be left as tri-state TPV14 PH6 4
    with no pullups. 4 PH7
    PH7 (MLB_PWROFF) (PWROFF) 24 23 (STATUS) MLB_STATUS R62 0 DNP PD13
    PD13 4,12,16
    4,16 PI13 R60 0 DNP MLB_PS1 (PS1) 22 21 (PS0) MLB_PS0 R61 0 DNP PI12 4,16
    PI13 PI12
    (RSVD) 20 19 (MLBCP) MLB_CP
    (SR0) 18 17 (MLBCN) MLB_CN

    (RMCK) 16 15 (RSVD)
    (SX0) 14 13 (RSVD)

    (ID2) 12 11 (MLBDP) MLB_DP


    4 MLB_DAT MLB_DAT (MLBDAT) 10 9 (MLBDN) MLB_DN
    MLB_DAT
    (ID1) 8 7 (ID3)
    C C
    MLB_SIG MLB_SIG (MLBSIG) 6 5 (ID4)
    4 MLB_SIG
    (ID0) 4 3 (MLBSP) MLB_SP
    4 MLB_CLK MLB_CLK (MLBCLK) 2 1 (MLBSN) MLB_SN
    MLB_CLK
    Series 47 Ohm series Parallel 100 ohm LVDS
    termination termination 42 41 termination and Pullups
    on MCU already on / Pulldopwns (DNP'd)
    daughtercard R56 R54 R52 R50 SMSC are already on MLB
    47K 47K 47K 100 daughtercard QSH-020-01-L-D-DP-A daughtercard.
    DNP

    C21 Place resistors as


    27PF 3V3_SR close as possible to GND
    MLB tracks to
    DNP minimise stub lengths

    GND R51 R55


    1.0K 1.0K

    4 MLB_SN
    MLB_SN
    B B
    MLB_SP (PD[15] Shared with MLB_DAT for 3-pin mode)
    4 MLB_SP

    4 MLB_DN
    MLB_DN
    MLB_DP
    4 MLB_DP

    MLB_CN (PB[15] Shared with MLB_SIG for 3-pin mode)


    4 MLB_CN

    4 MLB_CP (PI[8] Shared with MLB_CLK for 3-pin mode)


    MLB_CP
    Parallel
    termination
    on MCU R53 R57
    daughtercard 619.0 619.0
    1% 1%

    GND Automotive Microcontroller


    Applications
    A
    East Kilbride, Scotland A
    Freescale General Business Use
    Drawing Title:
    MPC574xx Customer EVB Main Board
    Page Title:
    MLB SMSC Daughtercard Connector
    Size Document Number Rev
    B SCH-27897 PDF: SPF-27897 D1

    Date: Friday, August 14, 2015 Sheet 13 of 16


    5 4 3 2 1
    5 4 3 2 1

    SD Connector

    Caution
    The SD card specification details an operating voltage of
    between 2.7 and 3.6V. If using the SD card, it can ONLY be
    D used when VDD_HV_A (and PER_HVA) jumpers are set to 3.3V. 3V3_SR D

    Inserting an SD card with VDD_HV_A / PER_HVA set to 5V will


    result in card damage.
    C12
    C7 0.1UF
    + 10UF
    (35V (0603
    R9 R8 R12 R11 R6 R7 R10 TANT) 50V)
    10.0K 10.0K 10.0K 10.0K 10.0K 10.0K 10.0K
    DNP DNP DNP DNP DNP

    GND
    P200
    4 PI3 (SDHC_DATA0) 4
    PI3 PI2 (SDHC_DATA1) 3 DAT0 9
    4 PI2 DAT1 VCC/VDD
    PI1 (SDHC_DATA2) 15
    4 PI1 DAT2
    4 PI0 (SDHC_DATA3) 14
    PI0 13 DAT3
    11 DAT4
    7 DAT5 10
    5 DAT6 VSS1 6
    DAT7 GND/VSS2
    4 PH8 (SDHC_WP) R22 0 SD_WP 1 S1
    PH8 PA0 (SDHC_CD) WKPU19 R23 0 SD_Detect 2 WP_SW GND1 S2
    C 4 PA0 CD_SW GND2 C
    4 PE7 (SDHC_CLK) R14 22 SDHC1_CLK 8 S3
    PE7 (SDHC_CMD) CLK GND3
    4 PE6 PE6 12 S4
    CMD GND4

    R13 MMC_SD_CARD
    10.0K GND
    DNP Amphenol 101-00565-64 SD
    / MMC socket with card
    detection switch.

    GND

    B B

    Card Detect: Grounded when Card Inserted, Pulled high when card removed
    Write Protect: Grounded when NOT protected, Pulled high when protected (or card removed)
    Automotive Microcontroller
    Applications
    A
    East Kilbride, Scotland A
    Freescale General Business Use
    Drawing Title:
    MPC574xx Customer EVB Main Board
    Page Title:
    SD Card
    Size Document Number Rev
    B SCH-27897 PDF: SPF-27897 D1

    Date: Friday, August 14, 2015 Sheet 14 of 16


    5 4 3 2 1
    5 4 3 2 1

    User Peripherals, Audio Controls and GPIO


    Switches are hard wired to 3.3V rather than 5V so it's not possible to drive 5V into a 3.3V pad (which would cause damage)
    Similarly, the LED's are active low with 3.3v supply so can be safely coupled to pads on either 3.3V or 5V domains
    The ADC input is limited to 3.3V, again to prevent driving 5V into a 3.3V pad which would cause damage

    User LED's (Active Low) ADC Input Pot and Test Point
    D D

    PG[2..5] share eMIOS1 3V3_SR


    DS2 3V3_LR (Note - This is run from linear 3.3v regulator to
    UC[11..14] with PWM C A
    R257 270 provide a stable input voltage)
    functionality RV1 2K
    DS3 R259 270 3 1
    4,12,16 PG2 R258 0 USR_LED1 C A
    PG2 TP18
    4,12,16 PG3 R260 0 USR_LED2
    PG3

    2
    PG4 R262 0 USR_LED3 DS7 GND
    4,12,16 PG4 R261 270
    4,12,16 PG5 R270 0 USR_LED4 C A
    PG5 J17

    1
    1
    2
    3
    4
    DS8 R269 270 2 1 PB4 4
    PB4
    Note that LED2 and LED4 (PG3 C A (ADC1_P[0])
    C25 0.1UF
    and PG5) can be controlled in P19 LED's are SMD (1206) Yellow
    LPU_RUN mode (and also have pad HDR 1X4 DNP
    keepers in LPU_STANDBY) DNP (0603 50V) GND

    Hex Encoded Switch (Active High)


    C C

    3V3_SR SW2
    J26 R286
    1 HEX_SW1 R275 0 PD0 4,16
    PD0
    2 1 C B C D
    A E 2 HEX_SW2 PD1
    F R277 0 PD1 4,16
    9 0
    100 8 4 HEX_SW3 PD2
    R280 0 PD2 4,16
    7 1
    The LED's, Hex switches and push-button switches are 6 5 3 2
    4 8 HEX_SW4 R282 0 PD3
    connected to MCU pads vvia zero ohm links. If desired PD3 4,16
    these can be removed and direct connection made to the

    1
    2
    3
    4
    DRS4016
    LED or switch. All of the ports used for LED's / Since the Hex switch always R281 10.0K
    Switches are also bonded out to the GPIO matrix has an active output, the R279 10.0K
    jumper is to allow the switch R278 10.0K P20
    to be powered off R276 10.0K HDR 1X4
    DNP

    GND

    B
    User Pushbutton Switches (Active High) B
    Note - PA1 is also the NMI pin!
    3V3_SR SW3
    1 SW4 2 PB_SW1 (eMIOS H / X) R289 0 PA1 4,16
    PB_SW2 (eMIOS G / X) PA1
    R287 0 PA2 4,16
    PB_SW3 PA2
    1 2 (eMIOS G / Y) R302 0 PF9 4,16
    PB_SW4 (eMIOS G) PF9
    R304 0 PF11 4,16
    PF11
    SW6

    1
    2
    3
    4
    R303 10.0K
    1 2 R301 10.0K
    SW7 R288 10.0K
    R290 10.0K P22
    1 2 HDR 1X4
    DNP
    OMRON B3WN-6002 Pushbutton Switch GND

    Automotive Microcontroller
    Applications
    A
    East Kilbride, Scotland A
    Freescale General Business Use
    Drawing Title:
    MPC574xx Customer EVB Main Board
    Page Title:
    User Peripherals, Audio Controls and GPIO
    Size Document Number Rev
    B SCH-27897 PDF: SPF-27897 D1

    Date: Friday, August 14, 2015 Sheet 15 of 16


    5 4 3 2 1
    5 4 3 2 1

    GPIO Pin Matrix All pads are DNP (Do Not Populate) 0.1" pitch headers placed on a 0.1" grid PF8
    PF9
    PF8 4
    4,15
    PF9 PF[9,11] shared with
    PF10
    PORTA PORTB PORTC PORTD PORTE PORTF PORTG PORTH PF11
    PF10 4
    4,15
    user switches
    PF11
    PF12 4
    PF12
    4,15 PA1 PD0 1 PF13 4
    PA[1,2] shared with PA1 PF13
    4,15 PA2 IOM1
    user switches PA2
    4 PA4 PA1 1 PD1 1 PG2 4,12,15
    PA4 PG2 PG[2..5] shared with
    4,12 PA12 IOM7 IOM8 PG3 4,12,15
    PA12 PG3 user LED's, SAI and
    PA[12..15] shared with
    4,12 PA13 PA2 1 PD2 1 PG2 1 PG4 4,12,15
    SAI Audio and TWRPI PA13 PG4 TWRPI headers
    4,12 PA14 IOM14 IOM15 IOM16 PG5 4,12,15
    D PA14 PG5 D
    4,12 PA15 PD3 1 PG3 1 PH3 1 PG6 4
    PA15 PG6
    IOM21 IOM22 IOM132 PG7 4
    PG7
    4 PB5 PA4 1 PD4 1 PG4 1 PH4 1 PG8 4
    PB5 PG8
    4 PB6 IOM28 IOM29 IOM30 IOM131
    PB6
    4 PB7 PB5 1 PD5 1 PG5 1 PH5 1 PH3 4
    PB7 PH3
    4 PB11 IOM37 IOM38 IOM39 IOM130 PH4 4
    PB11 PH4
    4 PB12 PB6 1 PD6 1 PG6 1 PH5 4
    PB12 PH5
    IOM46 IOM47 IOM48 PH13 4
    PH13
    4,15 PD0 PB7 1 PD7 1 PG7 1 PH14 4
    PD[0..3] shared with PD0 PH14
    4,15 PD1 IOM55 IOM56 IOM57 PH15 4
    Hex Switch PD1 PH15
    4,15 PD2 PD8 1 PF8 1 PG8 1
    PD2 PM[3..4] shared with
    4,15 PD3 IOM63 IOM64 IOM65 PM3 4,12
    PD3 PM3 SAI Audio header
    4,12 PD4 PD9 1 PF9 1 PM4 4,12
    PD[4..8] shared with PD4 PM4
    4,12 PD5 IOM71 IOM72 PM5 4
    TWRPI connector with PD5 PM5
    4,12 PD6 PD10 1 PF10 1 PM6 4
    pullup on PD[7], PD[8] PD6 PM6
    4,12 PD7 IOM79 IOM80 PM11 4
    PD7 PM11
    4,12 PD8 PB11 1 PD11 1 PF11 1 PM12 4
    PD8 PM12
    4 PD9 IOM87 IOM88 IOM89 PM13 4
    PD9 PM13
    4 PD10 PA12 1 PB12 1 PD12 1 PF12 1 PM14 4
    PD10 PM14
    4 PD11 IOM96 IOM97 IOM98 IOM99 PM15 4
    PD11 PM15
    4 PD12 PA13 1 PD13 1 PF13 1 PH13 1
    PD[13] shared with PD12
    4,12,13 PD13 IOM106 IOM107 IOM108 IOM109 PN0 4
    SAI Audio and MLB PD13 PN0
    PA14 1 PH14 1 PN1 4
    headers PN1
    4 PI9 IOM116 IOM117 PN2 4
    C PI9 PN2 C
    4 PI10 PA15 1 No spare pins No spare pins PH15 1 PN3 4
    PI10 on PortE on PortE PN3
    IOM123 IOM124 PN4 4
    PI[12,13] shared with PN4
    4,13 PI12 PN5 4
    MLB header PI12 PN5
    4,13 PI13 PN6 4
    PI13 PN6
    PN7 4
    PN7
    PJ4 PN8
    4
    4
    PJ4
    PJ5 PORTI PORTJ PORTK PORTL PORTM PORTN PORTO PORTP PN9
    PN8 4
    4
    PJ5 PN9
    4 PJ6 PN10 4
    PJ6 PN10
    4 PJ7 PK0 1 PL0 1 PN0 1 PO0 1 PP0 1 PN11 4
    PJ7 PN11
    4 PJ8 IOM2 IOM3 IOM4 IOM5 IOM6 PN12 4
    PJ8 PN12
    4 PJ9 PK1 1 PL1 1 PN1 1 PO1 1 PP1 1 PN13 4
    PJ9 PN13
    4 PJ10 IOM9 IOM10 IOM11 IOM12 IOM13 PN14 4
    PJ10 PN14
    4 PJ11 PK2 1 PN2 1 PO2 1 PP2 1 PN15 4
    PJ11 PN15
    4 PJ12 IOM17 IOM18 IOM19 IOM20
    PJ12
    4 PJ13 PK3 1 PM3 1 PN3 1 PO3 1 PP3 1 PO0 4,12
    PO[0..1] shared with
    PJ13 PO0 TWRPI header
    4 PJ14 IOM23 IOM24 IOM25 IOM26 IOM27 PO1 4,12
    PJ14 PO1
    4 PJ15 PJ4 1 PK4 1 PM4 1 PN4 1 PO4 1 PP4 1 PO2 4
    PJ15 PO2
    IOM31 IOM32 IOM33 IOM34 IOM35 IOM36 PO3 4
    PO3
    4,12 PK0 PJ5 1 PK5 1 PM5 1 PN5 1 PO5 1 PP5 1 PO4 4
    PK0 PO4
    4,12 PK1 IOM40 IOM41 IOM42 IOM43 IOM44 IOM45 PO5 4
    PK1 PO5
    PK[0..4] shared with
    4,12 PK2 PJ6 1 PK6 1 PM6 1 PN6 1 PO6 1 PP6 1 PO6 4
    TWRPI header PK2 PO6
    4,12 PK3 IOM49 IOM50 IOM51 IOM52 IOM53 IOM54 PO7 4
    PK3 PO7
    4,12 PK4 PJ7 1 PK7 1 PN7 1 PO7 1 PP7 1 PO8 4
    PK4 PO8
    B 4 PK5 IOM58 IOM59 IOM60 IOM61 IOM62 PO9 4 B
    PK5 PO9
    4 PK6 PI9 1 PJ8 1 PK8 1 PN8 1 PO8 1 PP8 1 PO10 4
    PK6 PO10
    4 PK7 IOM73 IOM66 IOM67 IOM68 IOM69 IOM70 PO11 4
    PK7 PO11
    4 PK8 PI10 1 PJ9 1 PK9 1 PN9 1 PO9 1 PP9 1 PO12 4
    PK8 PO12
    4 PK9 IOM81 IOM74 IOM75 IOM76 IOM77 IOM78 PO13 4
    PK9 PO13
    4 PK10 PJ10 1 PK10 1 PN10 1 PO10 1 PP10 1 PO14 4
    PK10 PO14
    4 PK11 IOM82 IOM83 IOM84 IOM85 IOM86 PO15 4
    PK11 PO15
    4 PK12 PI12 1 PJ11 1 PK11 1 PM11 1 PN11 1 PO11 1 PP11 1
    PK12
    4 PK13 IOM100 IOM90 IOM91 IOM92 IOM93 IOM94 IOM95 PP0 4
    PK13 PP0
    4 PK14 PI13 1 PJ12 1 PK12 1 PM12 1 PN12 1 PO12 1 PP1 4
    PK14 PP1
    4 PK15 IOM110 IOM101 IOM102 IOM103 IOM104 IOM105 PP2 4
    PK15 PP2
    PJ13 1 PK13 1 PM13 1 PN13 1 PO13 1 PP3
    4 PL0 IOM111 IOM112 IOM113 IOM114 IOM115 PORTQ PP4
    PP3 4
    4
    PL0 No spare pins PP4
    4 PL1 PJ14 1 PK14 1 PM14 1 PN14 1 PO14 1 PP5 4
    PL1 on PortQ PP5
    IOM118 IOM119 IOM120 IOM121 IOM122 PP6 4
    PP6
    PJ15 1 PK15 1 PM15 1 PN15 1 PO15 1 PP7 4
    PP7
    IOM125 IOM126 IOM127 IOM128 IOM129 PP8 4
    PP8
    PP9 4
    PP9
    PP10 4
    PP10
    PP11 4
    TPH2 TPH3 TPH4 TPH5 TPH6 TPH7 TPH8 TPH9 TPH10 TPH11 TPH12 TPH13 TPH14 TPH15 PP11
    Busses are not used 14 GND Pads
    on ports as it makes Automotive Microcontroller
    (one at Applications
    it harder to see bottom of East Kilbride, Scotland
    1

    1
    A which pins are shared each colum) GND
    Freescale General Business Use
    A

    with other functions Drawing Title:

    Layout Notes: MPC574xx Customer EVB Main Board


    Page Title:
    Pads must be placed in a 13 x 16 matrix pattern, 2.54 mm pitch
    - 13 wide (one column for each port EXCLUDING those with no available pads ie C, E, H, Q) GPIO Pin Matrix
    - 16 tall (1 row for each port number from 0 to 15). Size Document Number Rev
    B SCH-27897 PDF: SPF-27897 D1
    - GND pad at bottom of each colum
    - After production, pads should be through hole (not solder filled) Date: Friday, August 14, 2015 Sheet 16 of 16
    5 4 3 2 1
    324 BGA DC
    5 4 3 2 1

    MPC5748G Customer EVB 324 BGA Daughter Card (MPC574XG-324DS)


    Revision Information
    Rev Date Designer Comments
    D
    Table Of Contents: X1 28 Feb 2013 Alasdair Robertson Initial release sent for review D

    Power - MPC5748G power pins footprint Sheet 2 X2 11 Mar 2013 Alasdair Robertson Final Review
    Power - MPC5748G Decoupling Capacitors Sheet 3 X3 13 Mar 2013 Alasdair Robertson Version sent to Pre Layout, incorporating fixes from review
    GPIO - MPC5748G GPIO pins 1 of 2 Sheet 4 X4 15 Mar 2013 Alasdair Robertson Component consolodation, Few minor changes. Sent to Layout
    GPIO - MPC5748G GPIO pins 2 of 2 Sheet 5 X5 29 Mar 2013 Alasdair Robertson Changes made during layout to Daughtercard Connectors
    Clocks Sheet 6 X6 15 Apr 2013 Alasdair Robertson CIS CAD Database update & SCH Back-Annotate
    Bus Termination Sheet 7 A 15 Apr 2015 Alasdair Robertson Post Layout (Back Annotated). Matches PCB RevA
    Daughtercard Connectors Sheet 8 A1 18 Aug 2015 Alasdair Robertson Tidy up Schematics for UM (RevA PCB)

    C C

    Caution:
    These schematics are provided for reference purposes only. As such,
    Freescale does not make any warranty, implied or otherwise, as to the
    suitability of circuit design or component selection (type or value) used in
    B
    these schematics for hardware design using the Freescale MPC5748G family 3 Different test points used in design: B

    of Microprocessors. Customers using any part of these schematics as a TPVx - Through Hole Pad small
    basis for hardware design, do so at their own risk and Freescale does not TPHx - Through Hile Pad Large (for standard 0.1" header).
    assume any liability for such a hardware design. TPX - Surface Mount Wire Loop

    Notes:
    - All components and board processes are to be ROHS compliant
    - All small capacitors are 0402 unless otherwise stated
    - All resistors are 0603 5% 0.1w unless otherwise stated. All zero ohm links are 0603
    - All connectors and headers are denoted Px and are 2.54mm pitch unless otherwise stated Automotive Microcontroller Applications
    - All jumpers are denoted Jx. Jumpers are 2mm pitch
    - Jumper default positions are shown in the schematics. For 3 way jumpers, default is always posn 1-2. East Kilbride, Scotland
    2 Pin jumpers generally have the "source" on pin 1. Freescale General Business Use
    - All switches are denoted SWx
    This document contains information proprietary to Freescale and shall not be used for engineering design,
    A
    - All test points are denoted TPx Freescale AISG Applications, East Kilbride
    A
    procurement or manufacture in whole or in part without the express written permission of Freescale
    - Test point Vias are denoted TPVx
    Designer: Drawing Title:
    A. Robertson
    MPC5748G 324 BGA Daughter Card
    User notes are given throughtout the schematics. Drawn by: Page Title:
    A. Robertson
    Index and Title Page
    Specific PCB LAYOUT notes are detailed in ITALICS
    Approved: Size Document Number Rev
    A. Robertson B SCH-27900 PDF: SPF-27900 A1

    Date: Tuesday, August 18, 2015 Sheet 1 of 8


    5 4 3 2 1
    5 4 3 2 1

    MPC5748G MCU Power Connections Caution:


    Default Configuraiton:
    - If VDD_HV_A is driven from 5V, the VDD_HV_FLA pin - ALL MCU supply voltages are set to 3.3V (ADC0, ADC1, VDD_HV_A,
    must not be supplied from 3.3V (remove the HVA_FLA VDD_HV_B, VDD_HV_C, VBallast)
    jumper) - VDD_HV_FLA = External 3.3V supplied (jumper fitted)
    - VDD_LV Supplied from ballast transistor
    - Don't attempt to over drive an analogue pad to 5V
    when the digital VDD_HV_x supply is set to 3.3V. This This is not necessarily the same as the default shown in the RM. All
    D will trigger the ESD protectrion on that pad. For VDD_HV_x domains have at least one peripheral that only functions at D
    example if VDD_HV_A is set to 3.3V and the analogue 3.3V. Therefore the default is to run these from 3.3V. The analogue pins
    supplies are set to 5V, you cannot drive 5V into a can only be driven to the same voltage as the VDD_HV_x domain they are
    From MCU pad in the VDD_HV_A domain situated in (ie max 3.3V) so makes sense for the analogue supply and
    supply reference to be 3.3V
    jumpers on
    main board
    MCU_1V25_L
    8 MCU_1V25_L
    MCU_5V0_S
    8 MCU_5V0_S
    MCU_3V3_S

    HVA_CAP
    8 MCU_3V3_S
    MCU_5V0_L
    8 MCU_5V0_L TPH3
    8 MCU_3V3_L MCU_3V3_L

    3 1
    1
    3v3
    1

    1
    3v3 5v0 3v3 5v0 3v3 5v0 3v3 5v0 3v3 5v0 J8 3v3 5v0 Individual MCU DAC External
    supply control Ref Voltage
    jumpers Select
    J3 J4 J5 J6 J7 J9 J11
    C C
    2

    4 2

    2
    R7 Q20
    0

    E_CAP
    MJD31CT4

    B_CAP
    1

    ADC1REF_CAP

    HVFLA_CAP

    LVDEC_CAP
    3
    HVA_CAP

    HVB_CAP

    HVC_CAP
    (Current Limit Resistor to
    ADC0_CAP

    ADC1_CAP

    LV_CAP
    R36

    3
    1.0K protecxt against case when
    other MCU supplies are
    R35 disconnected and external

    1
    0 J10 reference supply is live)

    2
    TPH2

    M11
    M12
    V14

    V16

    V15

    E18
    K17

    K13

    K11
    K12
    L14

    L11
    L12
    J15
    C2
    C9

    R7
    U8

    D8
    K2

    K3
    F5

    L2
    J2

    J3
    VDD_HV_ADC0

    VDD_HV_ADC1

    VDD_HV_A_C2
    VDD_HV_A_C9
    VDD_HV_A_E18
    VDD_HV_A_K17
    VDD_HV_A_R7
    VDD_HV_A_U8

    VDD_HV_B_J15
    VDD_HV_B_K13

    VDD_HV_FLA

    VRC_CTRL

    VDD_LV_D8
    VDD_LV_F5
    VDD_LV_K3
    VDD_LV_K11
    VDD_LV_K12
    VDD_LV_L11
    VDD_LV_L12
    VDD_LV_M11
    VDD_LV_M12
    VDD_HV_ADC1_REF

    VDD_HV_C

    VDD_LP_DEC

    VIN1_CMP_REF
    U1B

    DAC Ref
    B B

    Analogue MPC5748G 6M 324BGA Flash 1.25v Core & External Ballast


    Package 2of3 Power Pins
    VSS_HV_ADC0

    VSS_HV_ADC1

    VSS_HV_VPP
    VSS_HV_H10
    VSS_HV_H11
    VSS_HV_H12

    VSS_HV_K14
    VSS_HV_K16

    VSS_LV_M10
    VSS_HV_J10
    VSS_HV_J11
    VSS_HV_J12

    VSS_LV_K10

    VSS_LV_L10
    VSS_HV_H7
    VSS_HV_H8
    VSS_HV_H9

    VSS_HV_V8

    VSS_LV_M7
    VSS_LV_M8
    VSS_LV_M9
    VSS_LV_K7
    VSS_LV_K8
    VSS_LV_K9
    VSS_LV_F6

    VSS_LV_L7
    VSS_LV_L8
    VSS_LV_L9
    VSS_LV_J7
    VSS_LV_J8
    VSS_LV_J9
    MPC5748G + OTB-324R-1.0-019-00
    U14

    V17

    H7
    H8
    H9
    H10
    H11
    H12
    J10
    J11
    J12
    K14
    K16
    V8

    K1

    F6
    J7
    J8
    J9
    K7
    K8
    K9
    K10
    L7
    L8
    L9
    L10
    M7
    M8
    M9
    M10
    R24 0
    1

    Automotive Microcontroller
    ADC0_GND ADC1_GND GND TPH1 GND GND Applications
    A
    East Kilbride, Scotland A
    Freescale General Business Use
    Drawing Title:

    Ground Links R9 0 R10 0 MPC5748G 324 BGA Daughter Card


    (0 Ohm Page Title:
    Resistors)
    ADC0_GND GND ADC1_GND GND
    MPC5748G MCU Power
    Size Document Number Rev
    B SCH-27900 PDF: SPF-27900 A1

    Date: Tuesday, August 18, 2015 Sheet 2 of 8


    5 4 3 2 1
    5 4 3 2 1

    MPC5748G MCU Decoupling and bulk storage


    Capacitor Types:

    ADC Flash 470pF - Ceramic COG, 50v 5% 0402


    1000pF - Ceramic COG, 50V 5% 0402
    ADC0_CAP C49 ADC1_CAP C47 ADC1REF_CAP HVFLA_CAP 4700pF - Ceramic X7R, 50V 10% 0402
    1000pF 1000pF
    0.01uF - Ceramic X7R, 50V 10% 0402
    0.1uF - Ceramic X7R, 16V 10% 0402
    D 0.68uF - Ceramic X7R 16V 10% 0805 (Murata GCM219R71C684KA37 ) D
    C2 + C60 C3 + C59 C48 C58 C36 C34 1.0uF - Ceraminc X7R, 10V 10% 0603 (Taiyo Yuden LMK107B7105KA-T)
    10UF 1.0 UF 10UF 1.0 UF 1.0 UF 2.2UF 2.2uF - Ceraminc X7R, 10V, 10%, 0603 (Taiyo Yuden LMK107B7225KA-TR)
    DNP DNP 1000pF 1000pF LMK107B7225KA-T
    (low ESR) 4.7uF - TANT, 12.5V 20% ESR=0.08R 7343
    10uF - TANT, 35V 10% ESR=0.125R CC7343-31
    C57 C56 4.7uF Alternative (150-78844)- Polymer ALU, 16V 20% ESR=0.08R
    ADC0_GND 0.1UF ADC1_GND 0.1UF ADC1_GND GND 7343-18

    Place small Caps as close as possible to MCU pins

    VDD_HVA VDD_HVB VDD_HVC


    HVA_CAP C27 C52 C22 C55 C28 C37 HVB_CAP C40 C33 HVC_CAP C42
    470pF 1000pF 470pF 1000pF 470pF 1000pF 470pF 1000pF 1000pF

    + C1 + C4 + C5
    10UF 10UF 10UF
    C DNP C
    DNP

    C26 C53 C23 C54 C30 C38 C41 C35 C44


    GND 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF GND 0.1UF 0.1UF GND 0.1UF

    Place 10uF cap to west side of package


    Place small caps close to each MCU pin

    VDD_LV Ballast Transistor LP Internal Reg Cap


    LV_CAP C24 C50 C51 C46
    0.1UF 0.1UF B_CAP E_CAP E_CAP LV_CAP LVDEC_CAP
    0.1UF 0.1UF DNP DNP

    C8 4700pF
    C9 C10 C29 C61 C31 C20 C43
    B Place 2.2UF 2.2UF 0.68uF 0.68uF 0.68uF 0.68uF 1uF B
    DNP DNP (low (low (low DNP LMK107B7105KA-T
    close to (low (low ESR) ESR) ESR) (low (low ESR)
    C45 C21 C25
    transistor ESR) ESR) ESR)
    C32 C39
    0.1UF 0.1UF 0.1UF (Murata GCM219R71C684KA37)
    GND 0.1UF 0.1UF
    DNP DNP DNP
    GND GND GND
    VDD_LV (1.25V) Decoupling. Place one of the non DNP caps each side of the device 2.2uF caps Place one 0.68uF cap footprint
    as close as possible to pin. Distribute other (DNP) caps around rest of pins are DNP. each side of package
    Place close
    See caps below for Bypass Transistor bulk storage (some on VDD1V2 rail) to emitter One of these is DNP. May replace 2 caps with
    0.47uF to keep overall capacitance within limits

    Automotive Microcontroller
    Applications
    A
    East Kilbride, Scotland A
    Freescale General Business Use
    Drawing Title:
    MPC5748G 324 BGA Daughter Card
    Page Title:
    MPC5748G MCU Decoupling
    Size Document Number Rev
    B SCH-27900 PDF: SPF-27900 A1

    Date: Tuesday, August 18, 2015 Sheet 3 of 8


    5 4 3 2 1
    5 4 3 2 1

    MPC5748G GPIO 1 of 2
    U1A

    (SD_CD - WKPU19) PA0 L5 H3 PE0 (MLB_I2C1_SCL)


    8 PA0 PA0 PE0 PE0 8
    ** PA1 is also NMI. Routed (WKPU2 / NMI0) (SW1 & GPIO**) PA1 K6 H2 PE1 (MLB_I2C1_SDA)
    to I/O Matrix (WKPU3)
    8
    8
    PA1
    PA2
    (SW2 & GPIO) PA2 J6 PA1
    PA2
    MPC5748G 324 BGA PE1
    PE2
    A12 PE2 (FR_A_TX_EN) PE1
    PE2
    8
    8
    8 PA3
    (MII_RXCLK) PA3 M17 D10 PE3 (FR_A_RX)
    8
    PA3 PE3 PE3
    8 PA4
    (CMP1_13 / IO) PA4 P6 Package 1of3 GPIO Pins1 B11 PE4 (FR_B_TX)
    8
    D (SAI_GPIO) PA4 PE4 (FR_B_RX) PE4 D
    8 PA5 PA5 A14 A10 PE5 8
    PA5 PE5 PE5
    8 PA6
    (MLB_GPIO) PA6 A13 F8 PE6 (SD_CMD)
    8
    PA6 PE6 PE6
    8 PA7
    (MII_RXD2) PA7 F17 D7 PE7 (SD_CLK)
    8
    PA7 PE7 PE7
    8 PA8
    (RMII_RXD1) PA8 F18 K5 PE8 (SAI_I2C2_SDA)
    8
    PA8 PE8 PE8
    8 PA9
    (RMII_RXD0) PA9 E17 K4 PE9 (SAI_I2C2_SCL)
    8
    (MII_COL) PA9 PE9 (SAI_I2C3_SDA) PE9
    8 PA10 PA10 D18 H1 PE10 8
    PA10 PE10 PE10
    8 PA11
    (RMII_RXER) PA11 D17 J1 PE11 (SAI_I2C3_SCL)
    8
    PA11 PE11 PE11
    8 PA12
    (CMP1_15 / IO) PA12 N8 C18 PE12 (MII_CRS)
    8
    PA12 PE12 PE12
    8 PA13
    (CMP1_14 / IO) PA13 P7 G17 PE13 (MII_RXD3)
    8
    PA13 PE13 PE13
    8 PA14
    (CMP1_12 / IO) PA14 T3 C15 PE14 (USB1_D2)
    8
    Key to text colours: (CMP1_10 / IO) PA14 PE14 (USB1_D3) PE14
    8 PA15 PA15 N7 E12 PE15 8
    Purple - Comms Physical Interfaces PA15 PE15 PE15
    Orange - Other Peripherals and I/O
    Blue - Debug (JTAG & Nexus)
    8 PB0
    (CAN0_TX) PB0 N1 N9 PF0 (SAI0_MCLK)
    8
    PB0 PF0 PF0
    Black - Clock, Reset and Control
    8 PB1
    (CAN0_RX) PB1 N2 R9 PF1 (SAI0_BCLK)
    8
    (LIN0_TX) PB1 PF1 (SAI0_D3) PF1
    RED - I/O Matrix and other functions (eg LED)
    8 PB2 PB2 G9 P10 PF2 8
    PB2 PF2 PF2
    Green - I/O Matrix (dedicated)
    8 PB3
    (LIN0_RX) PB3 G8 U10 PF3 (SAI0_D2)
    8
    PB3 PF3 PF3
    8 PB4
    (ADC_POT) PB4 N11 N10 PF4 (SAI0_D1)
    8
    PB4 PF4 PF4
    8 PB5
    (GPIO) PB5 R14 V12 PF5 (SAI0_D0)
    8
    PB5 PF5 PF5
    8 PB6
    (GPIO) PB6 N12 T11 PF6 (SAI1_SYNC)
    8
    (GPIO) PB6 PF6 (SAI1_MCLK) PF6
    8 PB7 PB7 P14 R10 PF7 8
    PB7 PF7 PF7
    6 PB8
    (XTAL32) PB8 V10 T2 PF8 (GPIO)
    8
    PB8/XTAL32 PF8 PF8
    6 PB9
    (EXTAL32) PB9 V9 T1 PF9 (SW3 & GPIO) WKPU22
    8
    PB9/EXTAL32 PF9 PF9
    8 PB10
    (SAI0_SYNC) PB10 P9 R5 PF10 (CMP1_8 / IO)
    8
    C PB10 PF10 PF10 C
    8 PB11
    (GPIO) PB11 P13 P5 PF11 (SW4 & GPIO) WKPU15
    8
    (GPIO) PB11 PF11 (GPIO) PF11
    8 PB12 PB12 N13 N5 PF12 8
    PB12 PF12 PF12
    7 PB13
    (MLB_DN) PB13 T18 N6 PF13 (CMP1_11 /IO)
    8
    PB13 PF13 PF13
    7 PB14
    (MLB_SN) PB14 R17 G18 PF14 (RMII_MDIO)
    8
    PB14 PF14 PF14
    7 PB15
    (MLB_CN / SIG) PB15 R18 H17 PF15 (RMII_RXDV)
    8
    PB15 PF15 PF15

    8 PC0
    (TDI) PC0 F9 H18 PG0 (RMII_MDC)
    7
    PC0 PG0 PG0
    8 PC1
    (TDO) PC1 F10 J16 PG1 (RMII_TXCLK)
    8
    PC1 PG1 PG1
    8 PC2
    (USB1_CLK) PC2 C13 J4 PG2 (LED1 & GPIO)
    8
    (eMIOS E1UC_11_H)
    PC2 PG2 PG2
    8 PC3
    (USB1_DIR) PC3 D11 J5 PG3 (LED2 & GPIO)
    8
    (eMIOS E1UC_12_H)
    (FR_B_TX_EN) PC3 PG3 (LED3 & GPIO) PG3 (eMIOS E1UC_13_H)
    8 PC4 PC4 B12 G2 PG4 8
    PC4 PG4 PG4
    8 PC5
    (FR_A_TX) PC5 A11 F2 PG5 (LED4 & GPIO)
    8
    (eMIOS E1UC_14_H)
    PC5 PG5 PG5
    8 PC6
    (LIN1_TX) PC6 R3 M2 PG6 (CLKOUT1 GPIO)
    8
    PC6 PG6 PG6
    8 PC7
    (LIN1_RX) PC7 U2 M1 PG7 (CLKOUT0 GPIO)
    8
    PC7 PG7 PG7
    8 PC8
    (RS232_TX) PC8 D5 M3 PG8 (GPIO)
    8
    (RS232_RX) PC8 PG8 (MLB_IRQ - WKPU21) PG8
    8 PC9 PC9 D4 L3 PG9 8
    PC9 PG9 PG9
    8 PC10
    (CAN1_TX) PC10 M5 D14 PG10 (USB1_D4)
    8
    PC10 PG10 PG10
    8 PC11
    (CAN1_RX) PC11 M4 D13 PG11 (USB1_D5)
    8
    PC11 PG11 PG11
    8 PC12
    (FR_DBG0) PC12 D6 L18 PG12 (MII_TXD2)
    7
    PC12 PG12 PG12
    8 PC13
    (FR_DBG1) PC13 E6 M18 PG13 (MII_TXD3)
    7
    (FR_DBG2) PC13 PG13 (USB1_D0) PG13
    8 PC14 PC14 B2 F12 PG14 8
    PC14 PG14 PG14
    8 PC15
    (FR_DBG3) PC15 C3 C16 PG15 (USB1_D1)
    8
    PC15 PG15 PG15
    B B

    8 PD0
    (HEX1 & GPIO) PD0 R12 L17 PH0 (RMII_TXD1)
    7
    (HEX2 & GPIO) PD0 PH0 (RMII_TXD0) PH0
    8 PD1 PD1 T13 K18 PH1 7
    PD1 PH1 PH1
    8 PD2
    (HEX3 & GPIO) PD2 T14 J18 PH2 (RMII_TXEN)
    7
    PD2 PH2 PH2
    8 PD3
    (HEX4 & GPIO) PD3 R13 J17 PH3 (eMIOS1_UC_5H)
    8
    PD3 PH3 PH3
    8 PD4
    (GPIO) PD4 P11 C10 PH4 (eMIOS1_UC_6H)
    8
    PD4 PH4 PH4
    8 PD5
    (GPIO) PD5 T15 B10 PH5 (eMIOS1_UC_7H)
    8
    (GPIO) PD5 PH5 (MLB_RST) PH5
    8 PD6 PD6 U15 A9 PH6 8
    PD6 PH6 PH6
    8 PD7
    (GPIO) PD7 R15 D9 PH7 (MLB_PWR)
    8
    PD7 PH7 PH7
    8 PD8
    (GPIO) PD8 P12 E8 PH8 (SD_WP)
    8
    PD8 PH8 PH8
    8 PD9
    (GPIO) PD9 N15 E9 PH9 (TCK)
    8
    PD9 PH9 PH9
    8 PD10
    (GPIO) PD10 P15 E10 PH10 (TMS)
    8
    (GPIO) PD10 PH10 (USB1_D6) PH10
    8 PD11 PD11 V18 C14 PH11 8
    PD11 PH11 PH11
    8 PD12
    (GPIO) PD12 N16 D12 PH12 (USB1_D7)
    8
    PD12 PH12 PH12
    8 PD13
    (GPIO & MLB_ST) PD13 N14 F3 PH13 (GPIO)
    8
    PD13 PH13 PH13
    7 PD14
    (MLB_DP) PD14 T17 E2 PH14 (GPIO)
    8
    PD14 PH14 PH14
    7 PD15
    (MLB_SP / DAT) PD15 P17 G4 PH15 (GPIO)
    8
    PD15 PH15 PH15

    8 MCU-RSTx MCU-RSTx L1
    PORSTx C12 RESET
    8 PORSTx PORST
    Automotive Microcontroller
    6 MCU-XTAL MCU-XTAL V6 Applications
    MCU-EXTAL V7 XTAL
    6 MCU-EXTAL EXTAL East Kilbride, Scotland
    A A
    Freescale General Business Use
    MPC5748G + OTB-324R-1.0-019-00 Drawing Title:
    MPC5748G 324 BGA Daughter Card
    Page Title:
    MPC5748G GPIO 1of2
    Size Document Number Rev
    B SCH-27900 PDF: SPF-27900 A1

    Date: Tuesday, August 18, 2015 Sheet 4 of 8


    5 4 3 2 1
    5 4 3 2 1

    MPC5748G GPIO 2 of 2
    U1C
    Key to text colours:
    Purple - Comms Physical Interfaces
    Orange - Other Peripherals and I/O
    8 PI0
    (SD_D3) PI0 C6 G14 PM0 (MDO9)
    8
    (SD_D2) PI0 PM0 (MDO10) PM0
    Blue - Debug (JTAG & Nexus) PI1 E7 H13 PM1
    Black - Clock, Reset and Control
    8
    8
    PI1
    PI2
    (SD_D1) PI2 C7 PI1
    PI2
    MPC5748G 324 BGA PM1
    PM2
    H15 PM2 (MDO11) PM1
    PM2
    8
    8
    RED - I/O Matrix and other functions (eg LED)
    8 PI3
    (SD_D0) PI3 C8 L13 PM3 (GPIO)
    8
    PI3 PM3 PM3
    Green - I/O Matrix (dedicated)
    8 PI4
    (USB1_STP) PI4 A18 Package 3of3 GPIO Pins2 K15 PM4 (GPIO)
    8
    PI4 PM4 PM4
    8 PI5
    (USB1_NXT) PI5 E11 M14 PM5 (GPIO)
    8
    D (USB0_RST) PI5 PM5 (GPIO) PM5 D
    8 PI6 PI6 H4 L16 PM6 8
    PI6 PM6 PM6
    8 PI7
    (USB1_RST) PI7 G3 H16 PM7 (MDO12)
    8
    PI7 PM7 PM7
    7 PI8
    (MLB_CP / CLK) PI8 P18 J13 PM8 (MDO13)
    8
    PI8 PM8 PM8
    8 PI9
    (GPIO) PI9 T12 H14 PM9 (MDO14)
    8
    PI9 PM9 PM9
    8 PI10
    (GPIO) PI10 U12 J14 PM10 (MDO15)
    8
    (ENET_RST) PI10 PM10 (GPIO) PM10
    8 PI11 PI11 N18 G10 PM11 8
    PI11 PM11 PM11
    8 PI12
    (GPIO & MLB_PS0) PI12 N17 G11 PM12 (GPIO)
    8
    PI12 PM12 PM12
    8 PI13
    (GPIO & MLB_PS1) PI13 M16 M13 PM13 (GPIO)
    8
    PI13 PM13 PM13
    8 PI14
    (SAI2_D0) PI14 R16 M15 PM14 (GPIO)
    8
    PI14 PM14 PM14
    8 PI15
    (SAI2_MCLK) PI15 P16 T10 PM15 (GPIO)
    8
    PI15 PM15 PM15

    8 PJ0
    (SAI2_SYNC) PJ0 U18 T9 PN0 (GPIO)
    8
    PJ0 PN0 PN0
    8 PJ1
    (SAI2_BCLK) PJ1 V13 V11 PN1 (GPIO)
    8
    PJ1 PN1 PN1
    8 PJ2
    (SAI1_D0) PJ2 R11 U9 PN2 (GPIO)
    8
    (SAI1_BCLK) PJ2 PN2 (GPIO) PN2
    8 PJ3 PJ3 U11 T8 PN3 8
    PJ3 PN3 PN3
    8 PJ4
    (GPIO) PJ4 A1 U7 PN4 (GPIO)
    8
    PJ4 PN4 PN4
    8 PJ5
    (GPIO) PJ5 T16 R8 PN5 (GPIO)
    8
    PJ5 PN5 PN5
    8 PJ6
    (GPIO) PJ6 U16 P8 PN6 (GPIO)
    8
    PJ6 PN6 PN6
    8 PJ7
    (GPIO) PJ7 U17 U6 PN7 (GPIO)
    8
    (GPIO) PJ7 PN7 (GPIO) PN7
    8 PJ8 PJ8 U13 U5 PN8 8
    PJ8 PN8 PN8
    8 PJ9
    (GPIO) PJ9 V5 T5 PN9 (GPIO)
    8
    PJ9 PN9 PN9
    8 PJ10
    (GPIO) PJ10 V4 T7 PN10 (GPIO)
    8
    PJ10 PN10 PN10
    8 PJ11
    (GPIO) PJ11 U3 V2 PN11 (GPIO)
    8
    C PJ11 PN11 PN11 C
    8 PJ12
    (GPIO) PJ12 V3 V1 PN12 (GPIO)
    8
    (GPIO) PJ12 PN12 (GPIO) PN12
    8 PJ13 PJ13 T6 U1 PN13 8
    PJ13 PN13 PN13
    8 PJ14
    (GPIO) PJ14 R6 R4 PN14 (GPIO)
    8
    PJ14 PN14 PN14
    8 PJ15
    (GPIO) PJ15 U4 L4 PN15 (GPIO)
    8
    PJ15 PN15 PN15

    (GPIO) PK0 T4 G1 PO0 (GPIO)


    8 PK0 PK0 PO0 PO0 8
    8 PK1
    (GPIO) PK1 N3 F1 PO1 (GPIO)
    8
    PK1 PO1 PO1
    8 PK2
    (GPIO) PK2 N4 M6 PO2 (GPIO)
    8
    PK2 PO2 PO2
    8 PK3
    (GPIO) PK3 P1 L6 PO3 (GPIO)
    8
    PK3 PO3 PO3
    8 PK4
    (GPIO) PK4 P2 E1 PO4 (GPIO)
    8
    (GPIO) PK4 PO4 (GPIO) PO4
    8 PK5 PK5 P3 H6 PO5 8
    PK5 PO5 PO5
    8 PK6
    (GPIO) PK6 P4 H5 PO6 (GPIO)
    8
    PK6 PO6 PO6
    8 PK7
    (GPIO) PK7 R1 D1 PO7 (GPIO)
    8
    PK7 PO7 PO7
    8 PK8
    (GPIO) PK8 R2 D2 PO8 (GPIO)
    8
    PK8 PO8 PO8
    8 PK9
    (GPIO) PK9 B7 E3 PO9 (GPIO)
    8
    (GPIO) PK9 PO9 (GPIO) PO9
    8 PK10 PK10 A6 D3 PO10 8
    PK10 PO10 PO10
    8 PK11
    (GPIO) PK11 B6 C1 PO11 (GPIO)
    8
    PK11 PO11 PO11
    8 PK12
    (GPIO) PK12 A5 B1 PO12 (GPIO)
    8
    PK12 PO12 PO12
    8 PK13
    (GPIO) PK13 B5 E4 PO13 (GPIO)
    8
    PK13 PO13 PO13
    8 PK14
    (GPIO) PK14 C5 F4 PO14 (GPIO)
    8
    (GPIO) PK14 PO14 (GPIO) PO14
    8 PK15 PK15 A4 G6 PO15 8
    PK15 PO15 PO15
    B B
    8 PL0
    (GPIO) PL0 B4 G5 PP0 (GPIO)
    8
    PL0 PP0 PP0
    8 PL1
    (GPIO) PL1 L15 B3 PP1 (GPIO)
    8
    (MDO0) PL1 PP1 (GPIO) PP1
    8 PL2 PL2 E15 C4 PP2 8
    PL2 PP2 PP2
    8 PL3
    (MDO1) PL3 E14 F7 PP3 (GPIO)
    8
    PL3 PP3 PP3
    8 PL4
    (MDO2) PL4 F13 E5 PP4 (GPIO)
    8
    PL4 PP4 PP4
    8 PL5
    (MDO3) PL5 F14 G7 PP5 (GPIO)
    8
    PL5 PP5 PP5
    8 PL6
    (MDO4) PL6 F15 A2 PP6 (GPIO)
    8
    (MDO5) PL6 PP6 (GPIO) PP6
    8 PL7 PL7 G13 A3 PP7 8
    PL7 PP7 PP7
    8 PL8
    (EVTI) PL8 D15 B8 PP8 (GPIO)
    8
    PL8 PP8 PP8
    8 PL9
    (MSEO0) PL9 E13 A7 PP9 (GPIO)
    8
    PL9 PP9 PP9
    8 PL10
    (MCKO) PL10 G12 A8 PP10 (GPIO)
    8
    PL10 PP10 PP10
    8 PL11
    (MSEO1) PL11 E16 B9 PP11 (GPIO)
    8
    (EVTO) PL11 PP11 (USB0_D3) PP11
    8 PL12 PL12 D16 B17 PP12 8
    PL12 PP12 PP12
    8 PL13
    (MDO6) PL13 F16 B16 PP13 (USB0_D2)
    8
    PL13 PP13 PP13
    8 PL14
    (MDO7) PL14 G16 C17 PP14 (USB0_D1)
    8
    PL14 PP14 PP14
    8 PL15
    (MDO8) PL15 G15 B18 PP15 (USB0_D0)
    8
    PL15 PP15 PP15

    8 PQ0
    (USB0_STP) PQ0 C11
    (USB0_CLK) PQ1 B13 PQ0
    8 PQ1 PQ1
    8 PQ2
    (USB0_DIR) PQ2 B14 Automotive Microcontroller
    (USB0_NXT) PQ3 F11 PQ2
    8 PQ3 PQ3
    Applications
    (USB0_D7) PQ4 A15
    8 PQ4 PQ4 East Kilbride, Scotland
    A
    8 PQ5
    (USB0_D6) PQ5 A16 A
    (USB0_D5) PQ6 B15 PQ5 Freescale General Business Use
    8 PQ6 PQ6
    8 PQ7
    (USB0_D4) PQ7 A17 Drawing Title:
    PQ7
    MPC5748G 324 BGA Daughter Card
    MPC5748G + OTB-324R-1.0-019-00 Page Title:
    MPC5748G GPIO 2of2
    Size Document Number Rev
    B SCH-27900 PDF: SPF-27900 A1

    Date: Tuesday, August 18, 2015 Sheet 5 of 8


    5 4 3 2 1
    5 4 3 2 1

    Clocks

    D D

    Oscillators and External Clock

    EXT-CLK (From SMA connector on main board)


    8 EXT-CLK
    C63 12PF
    4 PB9 PB9
    (EXTAL32)

    2
    3
    R33 Y20
    C C
    1.0M 32.768KHZ 2
    DNP C7 12PF
    1 EXTAL
    C62 12PF

    1
    4 PB8 J2
    PB8 (XTAL32) R8 Y1
    1.0M 40.0MHZ
    FC-255 32.7680K-A3 GND DNP
    (Load Capacitance 7pF)
    J1
    4 MCU-EXTAL MCU-EXTAL C6 12PF

    2
    1 XTAL

    4 MCU-XTAL 2
    MCU-XTAL
    GND
    R34 0
    3
    NX8045GB-40.000M-STD-CSJ-1 XTAL
    DNP (Optimised for Automotive, 8pF Load capacitance)
    GND

    B B

    Automotive Microcontroller
    Applications
    A
    East Kilbride, Scotland A
    Freescale General Business Use
    Drawing Title:
    MPC5748G 324 BGA Daughter Card
    Page Title:
    Clocks
    Size Document Number Rev
    B SCH-27900 PDF: SPF-27900 A1

    Date: Tuesday, August 18, 2015 Sheet 6 of 8


    5 4 3 2 1
    5 4 3 2 1

    High Speed Signal Termination

    D D

    Ethernet Termination

    4 PG13 R6 50 PG13-R 8
    PG13 PG13-R
    4 PG12 R5 50 PG12-R 8
    PG12 PG12-R
    4 PH0 R4 50 PH0-R 8
    PH0 PH0-R
    4 PH1 R3 50 PH1-R 8
    PH1 PH1-R
    4 PH2 R2 50 PH2-R 8
    PH2 PH2-R

    4 PG0 R1 50 PG0-R 8
    PG0 PG0-R
    Place resistors as close as possible to MCU

    MLB Termination

    MLB_DAT 8
    MLB_DAT
    MLB_SIG 8
    MLB_SIG
    MLB_CLK 8
    C MLB_CLK C

    R20 R25 R29


    100 100 100
    DNP DNP DNP

    PB14 R23 0 MLB_SN 8


    4 PB14 MLB_SN
    R22 105.0 1%
    4 PD15 R21 0 MLB_SP (PD[15] Shared with MLB_DAT for 3-pin mode)
    8
    PD15 MLB_SP

    PB13 R30 0 MLB_DN 8


    4 PB13 MLB_DN
    R31 105.0 1%
    4 PD14 R32 0 MLB_DP 8
    PD14 MLB_DP

    PB15 R26 0 MLB_CN (PB[15] Shared with MLB_SIG for 3-pin mode)
    8
    4 PB15 MLB_CN
    R27 100 1%
    5 PI8 R28 0 MLB_CP (PI[8] Shared with MLB_CLK for 3-pin mode)
    8
    PI8 MLB_CP
    Place resistors as close as possible to MCU

    B
    From MCU Layout Note - Place resistors as shown with
    shared pad (as close to MCU as possible)
    To Daughtercard B

    Remove R1 and
    fit R2 to
    enable 3-pin
    signals

    R1 Fitted by default
    for LVDS 6-pin signals

    Automotive Microcontroller
    Applications
    A
    East Kilbride, Scotland A
    Freescale General Business Use
    Drawing Title:
    MPC5748G 324 BGA Daughter Card
    Page Title:
    High Speed Signal Termination
    Size Document Number Rev
    B SCH-27900 PDF: SPF-27900 A1

    Date: Tuesday, August 18, 2015 Sheet 7 of 8


    5 4 3 2 1
    5 4 3 2 1

    Daughter Card Connectors (Plugs)


    Notes: Connectors on Main board (Shown for reference)

    - there was no neat way to fit these connectors onto a B sized sheet so unfortunately the sheet size
    has been increased to C so will need to be printed on larger paper.
    - The Crystal Signals are NOT routed via the daughtercard connectors
    - The Specific MCU power pins are not routed via the daughter card however the jumpered MCU supply
    lines are brought up from the main board (see the top pins of the connector on the left)
    - The connector schematic symbols have been horizontally mirrored so they match the main EVB connector.
    D
    This has no bearing on the PCB placement or footprint. Pin1 on the recepticle mates with pin 1 on the D
    plug.

    P21 P20
    (GND) SH2 SH1 (GND) (GND) SH2 SH1 (GND)
    EXT-CLK 1 2 (GND)
    5 PM11 1 2 PC1 4
    6 EXT-CLK (GND) PM11 PC1
    3 4 PH7 4 4 PH10 3 4 PE3 4
    PH7 PH10 PE3
    PB2 5 6 PH6 PH4 5 6 PH5
    4 PB2 PH6 4 4 PH4 PH5 4
    (GND) 7 8 PB3 PE5 7 8 PC0
    PB3 4 4 PE5 PC0 4
    5 PP11 9 10 PH8 4 5 PM12 9 10 PQ3 5
    PP11 PH8 PM12 PQ3
    4 PE6 11 12 PP8 5 5 PI5 11 12 PC3 4
    PE6 PP8 PI5 PC3
    5 PI3 13 14 (GND)
    5 PQ0 13 14 PE4 4
    PI3 PQ0 PE4
    PP10 15 16 PP3 PC5 15 16 PH9
    5 PP10 PP3 5 4 PC5 PH9 4
    5 PP5 17 18 PE7 4
    (GND) 17 18 PL10 5
    PP5 PE7 PL10
    5 PI1 19 20 PK9 5 4 PG14 19 20 PE15 4
    PI1 PK9 PG14 PE15
    5 PI2 21 22 (GND)
    4 PH12 21 22 PORSTx 4
    PI2 PH12 PORSTx
    5 PP9 23 24 PC12 4 4 PC4 23 24 PE2 4
    PP9 PC12 PC4 PE2
    PC13 25 26 PK11 (GND) 25 26 PL4
    4 PC13 PK11 5 PL4 5
    5 PI0 27 28 (GND)
    5 PL9 27 28 PG11 4
    PI0 PL9 PG11
    5 PK10 29 30 PP4 5 4 PC2 29 30 PQ1 5
    PK10 PP4 PC2 PQ1
    4 PC8 31 32 PK14 5 4 PA6 31 32 (GND)
    PC8 PK14 PA6
    5 PK13 33 34 PK12 5 5 PL3 33 34 PG10 4
    PK13 PK12 PL3 PG10
    (GND) 35 36 PC9 4 PH11 35 36 PQ2
    PC9 4 PH11 PQ2 5
    5 PP2 37 38 PL0 5 4 PA5 37 38 PL8 5
    PP2 PL0 PA5 PL8
    5 PK15 39 40 (GND) 4 PE14 39 40 PQ6 5
    PK15 PE14 PQ6
    4 PC15 41 42 PP1 5 5 PQ4 41 42 (GND)
    PC15 PP1 PQ4
    5 PP7 43 44 (GND)
    4 PG15 43 44 PP13 5
    PP7 PG15 PP13
    (GND) 45 46 PC14 PQ5 45 46 PP12
    PC14 4 5 PQ5 PP12 5
    5 PP6 47 48 PJ4 5 5 PQ7 47 48 PI4 5
    PP6 (GND) PJ4 PQ7 PI4
    49 50 (GND)
    5 PP15 49 50 PP14 5
    PP15 PP14
    5 PO12 51 52 PO11 5
    (GND) 51 52 (GND)
    PO12 PO11
    C 5 PO7 53 54 PO8 5 5 PL12 53 54 PL2 5 C
    PO7 PO8 PL12 PL2
    PO10 55 56 (GND) PL11 55 56 PL5
    5 PO10 5 PL11 PL5 5
    5 PO4 57 58 PH14 4 5 PL6 57 58 PL13 5
    PO4 PH14 PL6 PL13
    5 PO9 59 60 PO13 5 5 PL7 59 60 PM0 5
    PO9 (GND) PO13 PL7 PM0
    SH4 SH3 (GND) (GND) SH4 SH3 (GND)

    (GND) SH6 SH5 (GND) (GND) SH6 SH5 (GND)


    4 PG5 61 62 PO1 5 5 PL15 61 62 PL14 5
    PG5 PO1 PL15 PL14
    5 PO14 63 64 PH13 4 5 PM1 63 64 PM9 5
    PO14 PH13 PM1 PM9
    5 PO0 65 66 PG4 4 5 PM2 65 66 PM7 5
    PO0 PG4 PM2 PM7
    PI7 67 68 PH15 4 4 PE12 67 68 PA10 4
    5 PI7 PH15 PE12 PA10
    5 PP0 69 70 PO15 5 4 PA11 69 70 PA9 4
    PP0 (GND) PO15 PA11 PA9
    71 72 PE10 4
    (GND) 71 72 PA8 4
    PE10 PA8
    4 PE1 73 74 PE0 4 4 PA7 73 74 PF14 4
    PE1 PE0 PA7 PF14
    5 PI6 75 76 PO6 5 4 PE13 75 76 PG0-R 7
    PI6 PO6 PE13 PG0-R
    5 PO5 77 78 (GND)
    4 PF15 77 78 PH2-R 7
    PO5 PF15 PH2-R
    PE11 79 80 PG2 PG1 79 80 (GND)
    4 PE11 PG2 4 4 PG1
    4 PG3 81 82 PA2 4 7 PH1-R 81 82 PG12-R 7
    PG3 (GND) PA2 PH1-R PG12-R
    83 84 PE9 4 7 PH0-R 83 84 PG13-R 7
    PE9 PH0-R PG13-R
    4 PE8 85 86 PA1 4 4 PA3 85 86 (GND)
    PE8 (GND) PA1 PA3
    87 88 MCU-RSTx 4
    (GND) 87 88 (GND)
    MCU-RSTx
    PG9 89 90 PN15 PM8 89 90 PM10
    4 PG9 PN15 5 5 PM8 PM10 5
    4 PA0 91 92 PO3 5 4 PH3 91 92 PM4 5
    PA0 (GND) PO3 PH3 PM4
    93 94 (GND)
    5 PM3 93 94 PL1 5
    PM3 PL1
    4 PG7 95 96 PG6 4 5 PM6 95 96 (GND)
    PG7 PG6 PM6
    4 PG8 97 98 PC11 4 5 PM13 97 98 PM5 5
    PG8 PC11 PM13 PM5
    PC10 99 100 PO2 PM14 99 100 PI13
    4 PC10 PO2 5 5 PM14 PI13 5
    (GND) 101 102 (GND) (GND) 101 102 PB12
    PB12 4
    (GND) 103 104 PB0 PD13 103 104 PD9
    PB0 4 4 PD13 PD9 4
    4 PB1 105 106 PK1 5 4 PD12 105 106 PI12 5
    PB1 PK1 PD12 PI12
    5 PK2 107 108 PF12 4 5 PI11 107 108 PB7 4
    PK2 PF12 PI11 PB7
    (GND) 109 110 (GND) PD10 109 110 PI15
    4 PD10 PI15 5
    4 PF13 111 112 (GND) (GND) 111 112 (GND)
    PF13 MLB_DAT MLB_CN
    5 PK4 113 114 (GND)
    7 113 114 7
    PK4 MLB_DAT MLB_SIG MLB_CP MLB_CN
    5 PK6 115 116 PK3 5 7 115 116 7
    PK6 PK3 MLB_SIG MLB_CLK MLB_CP
    5 PK8 117 118 PK5 5 7 117 118 (GND)
    PK8 PK5 MLB_CLK
    PN14 119 120 PF11 (GND) 119 120 (GND)
    5 PN14 PF11 4
    (GND) SH8 SH7 (GND) (GND) SH8 SH7 (GND)
    B B
    (GND) SH10 SH9 (GND) (GND) SH10 SH9 (GND)
    PF9 121 122 PK7 MLB_SN 121 122 MLB_DN
    4 PF9 PK7 5 7 MLB_SN MLB_DN 7
    PA14 123 124 PC6 MLB_SP 123 124 MLB_DP
    4 PA14 PC6 4 7 MLB_SP MLB_DP 7
    5 PN13 125 126 PF8 4
    (GND) 125 126 (GND)
    PN13 (GND) PF8
    127 128 (GND) (GND) 127 128 (GND)
    5 PN11 129 130 PC7 4 4 PD7 129 130 PI14 5
    PN11 PC7 PD7 PI14
    5 PJ11 131 132 PN12 5 5 PJ5 131 132 PJ7 5
    PJ11 PN12 PJ5 PJ7
    PJ10 133 134 PJ12 PJ0 133 134 PD11
    5 PJ10 PJ12 5 5 PJ0 PD11 4
    5 PK0 135 136 (GND) (GND) 135 136 PJ6 5
    PK0 PJ6
    5 PJ9 137 138 PJ15 5 4 PD5 137 138 PD6 4
    PJ9 PJ15 PD5 PD6
    5 PN9 139 140 (GND)
    4 PB5 139 140 PD2 4
    PN9 (GND) PB5 PD2
    141 142 PN8 5 4 PB11 141 142 PD3 4
    PN8 PB11 PD3
    PJ13 143 144 PF10 PD1 143 144 PJ8
    5 PJ13 PF10 4 4 PD1 PJ8 5
    4 PA4 145 146 PN7 5 5 PJ1 145 146 (GND)
    PA4 (GND) PN7 PJ1
    147 148 PJ14 5
    (GND) 147 148 PB6 4
    PJ14 PB6
    5 PN10 149 150 (GND)
    4 PD8 149 150 PD0 4
    PN10 PD8 PD0
    4 PA15 151 152 PN4 5 5 PI9 151 152 PI10 5
    PA15 PN4 PI9 PI10
    PN3 153 154 PA13 PF5 153 154 (GND)
    5 PN3 PA13 4 4 PF5
    5 PN6 155 156 (GND)
    4 PB4 155 156 PD4 4
    PN6 (GND) PB4 PD4
    157 158 PN5 5 5 PJ2 157 158 PF6 4
    PN5 PJ2 PF6
    5 PN0 159 160 PA12 4 5 PJ3 159 160 PN1 5
    PN0 PA12 PJ3 PN1
    4 PB10 161 162 PN2 5
    (GND) 161 162 (GND)
    PB10 PN2
    (GND) 163 164 PF1 (GND) 163 164 PF4
    PF1 4 PF4 4
    (GND) 165 166 PF0 PF2 165 166 PF7
    PF0 4 4 PF2 PF7 4
    (GND) 167 168 (GND) PM15 167 168 PF3
    5 PM15 PF3 4
    (GND) 169 170 (GND) (GND) 169 170 (GND)
    MCU_5V0_S 171 172 MCU_3V3_S (GND) 171 172 (GND)
    2 MCU_5V0_S MCU_3V3_S 2
    173 174 DC_5V0_S 173 174 DC_3V3_S
    TPV1 TPV4
    175 176 175 176
    MCU_1V25_L 177 178 MCU_3V3_L DC_P12V 177 178 DC_3V3_L
    2 MCU_1V25_L MCU_3V3_L 2 TPV3 TPV5
    179 180 MCU_5V0_L DC_1V25_L 179 180 DC_5V0_L
    MCU_5V0_L 2 TPV2 TPV6
    (GND) SH12 SH11 (GND) SH12 SH11

    PLUG 180 PLUG 180

    A Plug Plug A
    GND GND
    GND GND

    Automotive Microcontroller
    Applications
    East Kilbride, Scotland
    Freescale General Business Use
    Drawing Title:
    MPC5748G 324 BGA Daughter Card
    Page Title:
    Daughter Card Connectors (Plugs)
    Size Document Number Rev
    C SCH-27900 PDF: SPF-27900 A1

    Date: Tuesday, August 18, 2015 Sheet 8 of 8


    5 4 3 2 1
    256 BGA DC
    5 4 3 2 1

    MPC5748G Customer EVB 256BGA [6M/3M] Daughter Card (X-MPC574XG-256DS)


    Revision Information
    Rev Date Designer Comments
    D
    Table Of Contents: X1 11 Mar 2013 Alasdair Robertson Initial release sent for review based on X-MPC574XG-324DS X2 D

    Power - MPC5748G power pins footprint Sheet 2 X2 13 Mar 2013 Alasdair Robertson Version sent to Pre Layout, incorporating fixes from review
    Power - MPC5748G Decoupling Capacitors Sheet 3 X3 15 Mar 2013 Alasdair Robertson Component consolodation, Few minor changes. Sent to Layout
    GPIO - MPC5748G GPIO pins 1 of 2 Sheet 4 X4 29 Mar 2013 Alasdair Robertson Changes made during layout to Daughtercard Connectors
    GPIO - MPC5748G GPIO pins 2 of 2 Sheet 5 X5 15 Apr 2013 Alasdair Robertson LAY RefDes Re-Sequence & SCH Back-Annotate
    Clocks Sheet 6 A 15 Apr 2013 Alasdair Robertson Post Layout (Back Annotated). Matches PCB RevA
    Bus Termination Sheet 7 X1 16 Mar 2014 Jesus Sanchez Changes on MCU Power to validate MPC5746
    Daughtercard Connectors Sheet 8 SCH-27899 change to SCH-28341
    A 18 Apr 2014 Jesus Sanchez Post Layout. RevA.
    A1 18 Aug 2015 Alasdair Robertson Tidy up Schematics for UM (RevA PCB)

    C C

    Caution:
    These schematics are provided for reference purposes only. As such,
    Freescale does not make any warranty, implied or otherwise, as to the
    suitability of circuit design or component selection (type or value) used in
    B
    these schematics for hardware design using the Freescale MPC5748G family B

    of Microprocessors. Customers using any part of these schematics as a


    basis for hardware design, do so at their own risk and Freescale does not
    assume any liability for such a hardware design.

    Notes:
    - All components and board processes are to be ROHS compliant
    - All small capacitors are 0402 unless otherwise stated
    - All resistors are 0603 5% 0.1w unless otherwise stated. All zero ohm links are 0603
    - All connectors and headers are denoted Px and are 2.54mm pitch unless otherwise stated Automotive Microcontroller Applications
    - All jumpers are denoted Jx. Jumpers are 2mm pitch
    - Jumper default positions are shown in the schematics. For 3 way jumpers, default is always posn 1-2. East Kilbride, Scotland
    2 Pin jumpers generally have the "source" on pin 1. Freescale General Business Use
    - All switches are denoted SWx
    This document contains information proprietary to Freescale and shall not be used for engineering design,
    A
    - All test points are denoted TPx Freescale AISG Applications, East Kilbride
    A
    procurement or manufacture in whole or in part without the express written permission of Freescale
    - Test point Vias are denoted TPVx
    Designer: Drawing Title:
    A. Robertson / J. Sanchez
    MPC5748G 256 BGA Daughter Card
    User notes are given throughtout the schematics. Drawn by: Page Title:
    A. Robertson
    Index and Title Page
    Specific PCB LAYOUT notes are detailed in ITALICS
    Approved: Size Document Number Rev
    A. Robertson / J. Sanchez B SCH-28341 PDF: SPF-28341 A

    Date: Tuesday, August 18, 2015 Sheet 1 of 8


    5 4 3 2 1
    5 4 3 2 1

    MPC5748G MCU Power Connections Caution:


    Default Configuraiton:
    - If VDD_HV_A is driven from 5V, the VDD_HV_FLA pin - ALL MCU supply voltages are set to 3.3V (ADC0, ADC1, VDD_HV_A,
    must not be supplied from 3.3V (remove the HVA_FLA VDD_HV_B, VDD_HV_C, VBallast)
    jumper) - VDD_HV_FLA = External 3.3V supplied (jumper fitted)
    - VDD_LV Supplied from ballast transistor
    - Don't attempt to over drive an analogue pad to 5V
    when the digital VDD_HV_x supply is set to 3.3V. This This is not necessarily the same as the default shown in the RM. All
    D will trigger the ESD protectrion on that pad. For VDD_HV_x domains have at least one peripheral that only functions at D
    example if VDD_HV_A is set to 3.3V and the analogue 3.3V. Therefore the default is to run these from 3.3V. The analogue pins
    supplies are set to 5V, you cannot drive 5V into a can only be driven to the same voltage as the VDD_HV_x domain they are
    From MCU pad in the VDD_HV_A domain situated in (ie max 3.3V) so makes sense for the analogue supply and
    supply reference to be 3.3V
    jumpers on
    main board
    MCU_1V25_L
    8 MCU_1V25_L J9
    MCU_5V0_S 5v0 3
    8 MCU_5V0_S
    MCU_3V3_S 2

    HVA_CAP
    8 MCU_3V3_S

    1
    MCU_5V0_L 3v3 1
    8 MCU_5V0_L TPH3
    J12
    8 MCU_3V3_L MCU_3V3_L R37
    1.0
    DNP

    3 1
    1
    3v3
    1

    1
    3v3 5v0 3v3 5v0 3v3 5v0 3v3 5v0 3v3 5v0 J8 Individual MCU DAC External

    2
    supply control Ref Voltage
    jumpers Select
    J3 J4 J5 J6 J7 J11
    C C
    MJD31CT4
    2

    2
    TP2 Q20
    R7 0

    E_CAP
    B_CAP
    1

    1
    ADC1REF_CAP

    HVFLA_CAP

    LVDEC_CAP
    3
    HVA_CAP

    HVB_CAP

    HVC_CAP
    (Current Limit Resistor to
    ADC0_CAP

    ADC1_CAP

    LV_CAP
    R36

    3
    TPH2 1.0K protecxt against case when
    other MCU supplies are
    R35 disconnected and external
    0 J10 reference supply is live)

    2
    TP1
    M11

    M10
    G13
    R15

    H13

    H14
    E16

    K10
    K11
    L16

    L10
    L11

    M9
    C2
    C9

    N6
    N9
    R9

    H2

    D8
    E5

    K2
    J2

    J3
    U1B
    VDD_HV_ADC0

    VDD_HV_ADC1

    VDD_HV_A_C2
    VDD_HV_A_C9
    VDD_HV_A_E16
    VDD_HV_A_H13
    VDD_HV_A_N6
    VDD_HV_A_N9
    VDD_HV_A_R9

    VDD_HV_B_G13

    VDD_HV_C_M10

    VDD_HV_FLA_H2

    VRC_CTRL

    VDD_LV_D8
    VDD_LV_E5
    VDD_LV_H14
    VDD_LV_J3
    VDD_LV_K10
    VDD_LV_K11
    VDD_LV_L10
    VDD_LV_L11
    VDD_HV_ADC1_REF

    VDD_LP_DEC

    VIN1_CMP_REF
    DAC Ref
    B Differences to 324BGA B

    - 1 more VDD_HV_A on 256BGA


    - 1 fewer VDD_HV_B
    Analogue MPC5748G 256 BGA Flash 1.25v Core & External Ballast - 1 fewer VDD_LV
    Package 2of3 Power Pins - 2 more VSS_HV
    - 1 fewer VSS_LV
    VSS_HV_ADC0

    VSS_HV_ADC1

    VSS_HV_VPP
    VSS_HV_G10
    VSS_HV_G11

    VSS_HV_H10
    VSS_HV_H11

    VSS_LV_H15
    VSS_HV_J10
    VSS_HV_J11
    VSS_HV_G6
    VSS_HV_G7
    VSS_HV_G8
    VSS_HV_G9

    VSS_HV_H8
    VSS_HV_H9

    VSS_HV_T9

    VSS_LV_H6
    VSS_LV_H7
    VSS_HV_J9

    VSS_LV_E6

    VSS_LV_K6
    VSS_LV_K7
    VSS_LV_K8
    VSS_LV_K9
    VSS_LV_L6

    VSS_LV_L7
    VSS_LV_L8
    VSS_LV_L9
    VSS_LV_J6
    VSS_LV_J7
    VSS_LV_J8
    TP10
    TP11 TP12 TP13 TP14
    1

    PPC5748GSK0MMJ6 + OTB-256(324R)-1.0-006-00
    T15

    M16

    G6
    G7
    G8
    G9
    G10
    G11
    H8
    H9
    H10
    H11
    J9
    J10
    J11
    T9

    J1

    L6

    E6
    H6
    H7
    H15
    J6
    J7
    J8
    K6
    K7
    K8
    K9
    L7
    L8
    L9
    HVA_CAP
    TP3

    2
    GND
    R38 J13 Automotive Microcontroller
    0 R24
    ADC0_GND ADC1_GND 10K GND Applications
    GND
    East Kilbride, Scotland
    1

    A A

    1
    GND TPH1 Freescale General Business Use
    Drawing Title:
    GND
    Ground Links R9 0 R10 0 R39 C63 MPC5748G 256 BGA Daughter Card
    (0 Ohm 10K 1.0 UF Page Title:
    Resistors) DNP DNP MPC5748G MCU Power
    ADC0_GND GND ADC1_GND GND
    Size Document Number Rev
    GND GND B SCH-28341 PDF: SPF-28341 A

    Date: Tuesday, August 18, 2015 Sheet 2 of 8


    5 4 3 2 1
    5 4 3 2 1

    MPC5748G MCU Decoupling and bulk storage


    Capacitor Types:

    ADC Flash 470pF - Ceramic COG, 50v 5% 0402


    1000pF - Ceramic COG, 50V 5% 0402
    ADC0_CAP C48 ADC1_CAP C46 ADC1REF_CAP HVFLA_CAP 4700pF - Ceramic X7R, 50V 10% 0402
    1000pF 1000pF
    0.01uF - Ceramic X7R, 50V 10% 0402
    0.1uF - Ceramic X7R, 16V 10% 0402
    D 0.68uF - Ceramic X7R 16V 10% 0805 (Murata GCM219R71C684KA37 ) D
    C2 + C59 C3 + C58 C47 C57 C36 C34 1.0uF - Ceraminc X7R, 10V 10% 0603 (Taiyo Yuden LMK107B7105KA-T)
    10UF 1.0 UF 10UF 1.0 UF 1.0 UF 2.2UF 2.2uF - Ceraminc X7R, 10V, 10%, 0603 (Taiyo Yuden LMK107B7225KA-TR)
    DNP DNP 1000pF 1000pF LMK107B7225KA-T
    (low ESR) 4.7uF - TANT, 12.5V 20% ESR=0.08R 7343
    10uF - TANT, 35V 10% ESR=0.125R CC7343-31
    C56 C55 4.7uF Alternative (150-78844)- Polymer ALU, 16V 20% ESR=0.08R
    ADC0_GND 0.1UF ADC1_GND 0.1UF ADC1_GND GND 7343-18

    Place small Caps as close as possible to MCU pins

    VDD_HVA VDD_HVB VDD_HVC


    HVA_CAP C27 C51 C22 C54 C28 C37 C40 HVB_CAP C33 HVC_CAP C42
    470pF 1000pF 470pF 1000pF 470pF 1000pF 470pF 470pF 1000pF

    + C1 + C4 + C5
    10UF 10UF 10UF
    C DNP C
    DNP

    C26 C52 C23 C53 C30 C38 C41 C35 C44


    GND 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF GND 0.1UF GND 0.1UF

    Place 10uF cap to west side of package


    Place small caps close to each MCU pin

    VDD_LV Ballast Transistor LP Internal Reg Cap


    LV_CAP C24 C49 C50 C25
    0.1UF 0.1UF B_CAP E_CAP E_CAP LV_CAP LVDEC_CAP
    0.1UF 0.1UF DNP DNP

    C8 4700pF
    C9 C10 C29 C60 C31 C20 C43
    B Place 2.2UF 2.2UF 0.68uF 0.68uF 0.68uF 0.68uF 1uF B
    DNP DNP (low (low (low DNP LMK107B7105KA-T
    close to (low (low ESR) ESR) ESR) (low (low ESR)
    C45 C21
    transistor ESR) ESR) ESR)
    C32 C39
    0.1UF 0.1UF (Murata GCM219R71C684KA37)
    GND 0.1UF 0.1UF
    DNP DNP
    GND GND GND
    VDD_LV (1.25V) Decoupling. Place one of the non DNP caps each side of the device 2.2uF caps Place one 0.68uF cap footprint
    as close as possible to pin. Distribute other (DNP) caps around rest of pins are DNP. each side of package
    Place close
    See caps below for Bypass Transistor bulk storage (some on VDD1V2 rail) to emitter One of these is DNP. May replace 2 caps with
    0.47uF to keep overall capacitance within limits

    Differences to 324BGA
    - 1 more VDD_HV_A capacitor pair Automotive Microcontroller
    Applications
    - 1 fewer VDD_HV_B capacitor pair
    A - 1 fewer VDD_LV capacitor (one of DNP caps) East Kilbride, Scotland A
    Freescale General Business Use
    Drawing Title:
    MPC5748G 256 BGA Daughter Card
    Page Title:
    MPC5748G MCU Decoupling
    Size Document Number Rev
    B SCH-28341 PDF: SPF-28341 A

    Date: Tuesday, August 18, 2015 Sheet 3 of 8


    5 4 3 2 1
    5 4 3 2 1

    MPC5748G GPIO 1 of 2
    U1A

    (SD_CD - WKPU19) PA0 G4 G2 PE0 (MLB_I2C1_SCL)


    8 PA0 PA0 PE0 PE0 8
    (WKPU2 / NMI0) (SW1 & GPIO**) PA1 F3 F4 PE1 (MLB_I2C1_SDA)
    ** PA1 is also NMI. Routed to I/O Matrix (WKPU3)
    8
    8
    PA1
    PA2
    (SW2 & GPIO) PA2 F1 PA1
    PA2
    MPC5748G 256 BGA PE1
    PE2
    A7 PE2 (FR_A_TX_EN) PE1
    PE2
    8
    8
    8 PA3
    (MII_RXCLK) PA3 G16 A10 PE3 (FR_A_RX)
    8
    PA3 PE3 PE3
    8 PA4
    (CMP1_13 / IO) PA4 T2 Package 1of3 GPIO Pins1 A8 PE4 (FR_B_TX)
    8
    D Key to text colours: (SAI_GPIO) PA4 PE4 (FR_B_RX) PE4 D
    8 PA5 PA5 C10 B8 PE5 8
    PA5 PE5 PE5
    Purple - Comms Physical Interfaces
    8 PA6
    (MLB_GPIO) PA6 D11 B6 PE6 (SD_CMD)
    8
    PA6 PE6 PE6
    Orange - Other Peripherals and I/O
    8 PA7
    (MII_RXD2) PA7 C15 A5 PE7 (SD_CLK)
    8
    PA7 PE7 PE7
    Blue - Debug (JTAG & Nexus)
    8 PA8
    (RMII_RXD1) PA8 B16 G1 PE8 (SAI_I2C2_SDA)
    8
    PA8 PE8 PE8
    Black - Clock, Reset and Control
    8 PA9
    (RMII_RXD0) PA9 B15 H1 PE9 (SAI_I2C2_SCL)
    8
    (MII_COL) PA9 PE9 (SAI_I2C3_SDA) PE9
    RED - I/O Matrix and other functions (eg LED)
    8 PA10 PA10 A15 G3 PE10 8
    PA10 PE10 PE10
    Green - I/O Matrix (dedicated)
    8 PA11
    (RMII_RXER) PA11 B14 H3 PE11 (SAI_I2C3_SCL)
    8
    PA11 PE11 PE11
    8 PA12
    (CMP1_15 / IO) PA12 P6 C14 PE12 (MII_CRS)
    8
    PA12 PE12 PE12
    8 PA13
    (CMP1_14 / IO) PA13 R5 C16 PE13 (MII_RXD3)
    8
    PA13 PE13 PE13
    8 PA14
    (CMP1_12 / IO) PA14 P4 A14 PE14 (USB1_D2)
    8
    (CMP1_10 / IO) PA14 PE14 (USB1_D3) PE14
    8 PA15 PA15 R2 C12 PE15 8
    PA15 PE15 PE15

    8 PB0
    (CAN0_TX) PB0 L3 P7 PF0 (SAI0_MCLK)
    8
    PB0 PF0 PF0
    8 PB1
    (CAN0_RX) PB1 M2 T6 PF1 (SAI0_BCLK)
    8
    (LIN0_TX) PB1 PF1 (SAI0_D3) PF1
    8 PB2 PB2 A2 R6 PF2 8
    PB2 PF2 PF2
    8 PB3
    (LIN0_RX) PB3 D4 R7 PF3 (SAI0_D2)
    8
    PB3 PF3 PF3
    8 PB4
    (ADC_POT) PB4 T16 R8 PF4 (SAI0_D1)
    8
    PB4 PF4 PF4
    8 PB5
    (GPIO) PB5 N13 P8 PF5 (SAI0_D0)
    8
    PB5 PF5 PF5
    8 PB6
    (GPIO) PB6 N14 N8 PF6 (SAI1_SYNC)
    8
    (GPIO) PB6 PF6 (SAI1_MCLK) PF6
    8 PB7 PB7 R16 P9 PF7 8
    PB7 PF7 PF7
    6 PB8
    (XTAL32) PB8 T11 N2 PF8 (GPIO)
    8
    PB8 PF8 PF8
    6 PB9
    (EXTAL32) PB9 T10 M4 PF9 (SW3 & GPIO) WKPU22
    8
    PB9 PF9 PF9
    8 PB10
    (SAI0_SYNC) PB10 N7 P2 PF10 (CMP1_8 / IO)
    8
    C PB10 PF10 PF10 C
    8 PB11
    (GPIO) PB11 M13 R1 PF11 (SW4 & GPIO) WKPU15
    8
    (GPIO) PB11 PF11 (GPIO) PF11
    8 PB12 PB12 L14 P1 PF12 8
    PB12 PF12 PF12
    7 PB13
    (MLB_DN) PB13 L15 P3 PF13 (CMP1_11 /IO)
    8
    PB13 PF13 PF13
    7 PB14
    (MLB_SN) PB14 K15 D14 PF14 (RMII_MDIO)
    8
    PB14 PF14 PF14
    7 PB15
    (MLB_CN / SIG) PB15 K16 D15 PF15 (RMII_RXDV)
    8
    PB15 PF15 PF15

    8 PC0
    (TDI) PC0 B10 E13 PG0 (RMII_MDC)
    7
    PC0 PG0 PG0
    8 PC1
    (TDO) PC1 D9 E14 PG1 (RMII_TXCLK)
    8
    PC1 PG1 PG1
    8 PC2
    (USB1_CLK) PC2 B11 E4 PG2 (LED1 & GPIO)
    8
    (eMIOS E1UC_11_H)
    PC2 PG2 PG2
    8 PC3
    (USB1_DIR) PC3 C11 E1 PG3 (LED2 & GPIO)
    8
    (eMIOS E1UC_12_H)
    (FR_B_TX_EN) PC3 PG3 (LED3 & GPIO) PG3 (eMIOS E1UC_13_H)
    8 PC4 PC4 A9 F2 PG4 8
    PC4 PG4 PG4
    8 PC5
    (FR_A_TX) PC5 B9 D1 PG5 (LED4 & GPIO)
    8
    (eMIOS E1UC_14_H)
    PC5 PG5 PG5
    8 PC6
    (LIN1_TX) PC6 N3 M1 PG6 (CLKOUT1 GPIO)
    8
    PC6 PG6 PG6
    8 PC7
    (LIN1_RX) PC7 N4 L2 PG7 (CLKOUT0 GPIO)
    8
    PC7 PG7 PG7
    8 PC8
    (RS232_TX) PC8 B3 K3 PG8 (GPIO)
    8
    (RS232_RX) PC8 PG8 (MLB_IRQ - WKPU21) PG8
    8 PC9 PC9 C3 J4 PG9 8
    PC9 PG9 PG9
    8 PC10
    (CAN1_TX) PC10 L1 B13 PG10 (USB1_D4)
    8
    PC10 PG10 PG10
    8 PC11
    (CAN1_RX) PC11 K4 A16 PG11 (USB1_D5)
    8
    PC11 PG11 PG11
    8 PC12
    (FR_DBG0) PC12 B4 F15 PG12 (MII_TXD2)
    7
    PC12 PG12 PG12
    8 PC13
    (FR_DBG1) PC13 A3 F16 PG13 (MII_TXD3)
    7
    (FR_DBG2) PC13 PG13 (USB1_D0) PG13
    8 PC14 PC14 B2 C13 PG14 8
    PC14 PG14 PG14
    8 PC15
    (FR_DBG3) PC15 A1 D13 PG15 (USB1_D1)
    8
    PC15 PG15 PG15
    B B

    8 PD0
    (HEX1 & GPIO) PD0 R12 E15 PH0 (RMII_TXD1)
    7
    (HEX2 & GPIO) PD0 PH0 (RMII_TXD0) PH0
    8 PD1 PD1 T13 F13 PH1 7
    PD1 PH1 PH1
    8 PD2
    (HEX3 & GPIO) PD2 N11 D16 PH2 (RMII_TXEN)
    7
    PD2 PH2 PH2
    8 PD3
    (HEX4 & GPIO) PD3 R13 F14 PH3 (eMIOS1_UC_5H)
    8
    PD3 PH3 PH3
    8 PD4
    (GPIO) PD4 P12 D7 PH4 (eMIOS1_UC_6H)
    8
    PD4 PH4 PH4
    8 PD5
    (GPIO) PD5 T14 B7 PH5 (eMIOS1_UC_7H)
    8
    (GPIO) PD5 PH5 (MLB_RST) PH5
    8 PD6 PD6 R14 C7 PH6 8
    PD6 PH6 PH6
    8 PD7
    (GPIO) PD7 P13 C6 PH7 (MLB_PWR)
    8
    PD7 PH7 PH7
    8 PD8
    (GPIO) PD8 P14 A6 PH8 (SD_WP)
    8
    PD8 PH8 PH8
    8 PD9
    (GPIO) PD9 N16 A11 PH9 (TCK)
    8 Differences to 324BGA
    PD9 PH9 PH9
    8 PD10
    (GPIO) PD10 M14 D10 PH10 (TMS)
    8
    (GPIO) PD10 PH10 (USB1_D6) PH10
    8 PD11 PD11 M15 A13 PH11 8
    (GPIO) PD12 L13 PD11 PH11 B12 PH12 (USB1_D7) PH11 (none on this page)
    8 PD12 PD12 PH12 PH12 8
    8 PD13
    (GPIO & MLB_ST) PD13 K14 B1 PH13 (GPIO)
    8
    PD13 PH13 PH13
    7 PD14
    (MLB_DP) PD14 K13 C1 PH14 (GPIO)
    8
    PD14 PH14 PH14
    7 PD15
    (MLB_SP / DAT) PD15 J13 E3 PH15 (GPIO)
    8
    PD15 PH15 PH15

    8 MCU-RSTx MCU-RSTx K1
    PORSTx C8 RESET
    8 PORSTx PORST
    Automotive Microcontroller
    6 MCU-XTAL MCU-XTAL T7 Applications
    MCU-EXTAL T8 XTAL
    6 MCU-EXTAL EXTAL East Kilbride, Scotland
    A A
    Freescale General Business Use
    Drawing Title:
    PPC5748GSK0MMJ6 + OTB-256(324R)-1.0-006-00
    MPC5748G 256 BGA Daughter Card
    Page Title:
    MPC5748G GPIO 1of2
    Size Document Number Rev
    B SCH-28341 PDF: SPF-28341 A

    Date: Tuesday, August 18, 2015 Sheet 4 of 8


    5 4 3 2 1
    5 4 3 2 1

    MPC5748G GPIO 2 of 2
    U1C

    Key to text colours:


    8 PI0
    (SD_D3) PI0 C5
    Purple - Comms Physical Interfaces (SD_D2) PI1 A4 PI0
    Orange - Other Peripherals and I/O
    8
    8
    PI1
    PI2
    (SD_D1) PI2 D6 PI1
    PI2
    MPC5748G 256 BGA
    Blue - Debug (JTAG & Nexus)
    8 PI3
    (SD_D0) PI3 B5 K12 PM3 (GPIO)
    8
    PI3 PM3 PM3
    Black - Clock, Reset and Control
    8 PI4
    (USB1_STP) PI4 A12 Package 3of3 GPIO Pins2 L12 PM4 (GPIO)
    8
    PI4 PM4 PM4
    RED - I/O Matrix and other functions (eg LED)
    8 PI5
    (USB1_NXT) PI5 D12 F9 PM5 (GPIO)
    8
    D (USB0_RST) PI5 PM5 (GPIO) PM5 D
    Green - I/O Matrix (dedicated)
    8 PI6 PI6 D2
    (USB1_RST) PI7 E2 PI6
    8 PI7 PI7
    7 PI8
    (MLB_CP / CLK) PI8 J14
    (GPIO) PI9 J15 PI8
    8 PI9 PI9
    8 PI10
    (GPIO) PI10 J16
    (ENET_RST) PI11 H16 PI10
    8 PI11 PI11
    8 PI12
    (GPIO & MLB_PS0) PI12 G15
    (GPIO & MLB_PS1) PI13 G14 PI12
    8 PI13 PI13
    8 PI14
    (SAI2_D0) PI14 T12 M12 PM14 (GPIO)
    8
    PI14 PM14 PM14
    8 PI15
    (SAI2_MCLK) PI15 P11
    PI15

    8 PJ0
    (SAI2_SYNC) PJ0 R11
    (SAI2_BCLK) PJ1 N10 PJ0
    8 PJ1 PJ1
    8 PJ2
    (SAI1_D0) PJ2 R10
    (SAI1_BCLK) PJ3 P10 PJ2
    8 PJ3 PJ3
    8 PJ4
    (GPIO) PJ4 D3
    (GPIO) PJ5 N12 PJ4
    8 PJ5 PJ5
    8 PJ6
    (GPIO) PJ6 N15
    (GPIO) PJ7 P16 PJ6
    8 PJ7 PJ7
    (GPIO) PJ8 P15
    8 PJ8 PJ8
    8 PJ9
    (GPIO) PJ9 P5
    (GPIO) PJ10 T5 PJ9
    8 PJ10 PJ10
    8 PJ11
    (GPIO) PJ11 R3
    C PJ11 C
    8 PJ12
    (GPIO) PJ12 T1
    (GPIO) PJ13 N5 PJ12
    8 PJ13 PJ13
    8 PJ14
    (GPIO) PJ14 T4
    (GPIO) PJ15 R4 PJ14
    8 PJ15 PJ15

    (GPIO) PK0 T3 K5 PO0 (GPIO)


    8 PK0 PK0 PO0 PO0 8
    8 PK1
    (GPIO) PK1 H4 L5 PO1 (GPIO)
    8
    PK1 PO1 PO1
    8 PK2
    (GPIO) PK2 L4
    (GPIO) PK3 N1 PK2
    8 PK3 PK3
    8 PK4
    (GPIO) PK4 M3
    (GPIO) PK5 M5 PK4
    8 PK5 PK5
    8 PK6
    (GPIO) PK6 M6
    (GPIO) PK7 M7 PK6
    8 PK7 PK7
    8 PK8
    (GPIO) PK8 M8
    (GPIO) PK9 E8 PK8
    8 PK9 PK9
    (GPIO) PK10 E7
    8 PK10 PK10
    8 PK11
    (GPIO) PK11 F8
    (GPIO) PK12 G12 PK11
    8 PK12 PK12
    8 PK13
    (GPIO) PK13 H12
    (GPIO) PK14 J12 PK13
    8 PK14 PK14
    (GPIO) PK15 D5
    8 PK15 PK15
    B B
    8 PL0
    (GPIO) PL0 C4
    (GPIO) PL1 F7 PL0
    8 PL1 PL1
    Differences to 324BGA
    - 14 fewer pins on Port L
    - 12 fewer pins on Port M
    - 16 fewer pins on Port N
    - 14 fewer pins on Port O
    - 12 fewer pins on Port P
    E12 PP12 (USB0_D3)
    PP12 PP12 8 (And corresponding changes
    F12 PP13 (USB0_D2)
    8
    PP13 PP13 to daughtercard connectors)
    E11 PP14 (USB0_D1)
    8
    PP14 PP14
    F11 PP15 (USB0_D0)
    8
    PP15 PP15

    8 PQ0
    (USB0_STP) PQ0 J5
    (USB0_CLK) PQ1 H5 PQ0
    8 PQ1 PQ1
    8 PQ2
    (USB0_DIR) PQ2 G5 Automotive Microcontroller
    (USB0_NXT) PQ3 F5 PQ2
    8 PQ3 PQ3
    Applications
    (USB0_D7) PQ4 F6
    8 PQ4 PQ4 East Kilbride, Scotland
    A
    8 PQ5
    (USB0_D6) PQ5 E9 A
    (USB0_D5) PQ6 F10 PQ5 Freescale General Business Use
    8 PQ6 PQ6
    8 PQ7
    (USB0_D4) PQ7 E10 Drawing Title:
    PQ7
    MPC5748G 256 BGA Daughter Card
    Page Title:
    PPC5748GSK0MMJ6 + OTB-256(324R)-1.0-006-00 MPC5748G GPIO 2of2
    Size Document Number Rev
    B SCH-28341 PDF: SPF-28341 A

    Date: Tuesday, August 18, 2015 Sheet 5 of 8


    5 4 3 2 1
    5 4 3 2 1

    Clocks

    D D

    Oscillators and External Clock

    EXT-CLK (From SMA connector on main board)


    8 EXT-CLK
    C62 12PF
    4 PB9 PB9
    (EXTAL32)

    2
    3
    R33 Y20
    C C
    1.0M 32.768KHZ 2
    DNP C7 12PF
    1 EXTAL
    C61 12PF

    1
    4 PB8 J2
    PB8 (XTAL32) R8 Y1
    1.0M 40.0MHZ
    FC-255 32.7680K-A3 GND DNP
    (Load Capacitance 7pF)
    J1
    4 MCU-EXTAL MCU-EXTAL C6 12PF

    2
    1 XTAL

    4 MCU-XTAL 2
    MCU-XTAL
    GND
    R34 0
    3
    NX8045GB-40.000M-STD-CSJ-1 XTAL
    DNP (Optimised for Automotive, 8pF Load capacitance)
    GND

    B B

    Automotive Microcontroller
    Applications
    A
    East Kilbride, Scotland A
    Freescale General Business Use
    Drawing Title:
    MPC5748G 256 BGA Daughter Card
    Page Title:
    Clocks
    Size Document Number Rev
    B SCH-28341 PDF: SPF-28341 A

    Date: Tuesday, August 18, 2015 Sheet 6 of 8


    5 4 3 2 1
    5 4 3 2 1

    High Speed Signal Termination

    D D

    Ethernet Termination

    4 PG13 R4 50 PG13-R 8
    PG13 PG13-R
    4 PG12 R6 50 PG12-R 8
    PG12 PG12-R
    4 PH0 R5 50 PH0-R 8
    PH0 PH0-R
    4 PH1 R3 50 PH1-R 8
    PH1 PH1-R
    4 PH2 R1 50 PH2-R 8
    PH2 PH2-R

    4 PG0 R2 50 PG0-R 8
    PG0 PG0-R
    Place resistors as close as possible to MCU

    MLB Termination

    MLB_DAT 8
    MLB_DAT
    MLB_SIG 8
    MLB_SIG
    MLB_CLK 8
    C MLB_CLK C

    R20 R25 R29


    100 100 100
    DNP DNP DNP

    PB14 R23 0 MLB_SN 8


    4 PB14 MLB_SN
    R22 105.0 1%
    4 PD15 R21 0 MLB_SP (PD[15] Shared with MLB_DAT for 3-pin mode)
    8
    PD15 MLB_SP

    PB13 R30 0 MLB_DN 8


    4 PB13 MLB_DN
    R31 105.0 1%
    PD14 R32 0 MLB_DP 8
    4 PD14 MLB_DP

    PB15 R26 0 MLB_CN (PB[15] Shared with MLB_SIG for 3-pin mode)
    8
    4 PB15 MLB_CN
    R27 100 1%
    5 PI8 R28 0 MLB_CP (PI[8] Shared with MLB_CLK for 3-pin mode)
    8
    PI8 MLB_CP
    Place resistors as close as possible to MCU

    B
    From MCU Layout Note - Place resistors as shown with
    shared pad (as close to MCU as possible)
    To Daughtercard B

    Remove R1 and
    fit R2 to
    enable 3-pin
    signals

    R1 Fitted by default
    for LVDS 6-pin signals

    Automotive Microcontroller
    Applications
    A
    East Kilbride, Scotland A
    Freescale General Business Use
    Drawing Title:
    MPC5748G 256 BGA Daughter Card
    Page Title:
    High Speed Signal Termination
    Size Document Number Rev
    B SCH-28341 PDF: SPF-28341 A

    Date: Tuesday, August 18, 2015 Sheet 7 of 8


    5 4 3 2 1
    5 4 3 2 1

    Daughter Card Connectors (Plugs)


    Notes: Connectors on Main board (Shown for reference)

    - there was no neat way to fit these connectors onto a B sized sheet so unfortunately the sheet
    size has been increased to C so will need to be printed on larger paper.
    - The Crystal Signals are NOT routed via the daughtercard connectors
    - The Specific MCU power pins are not routed via the daughter card however the jumpered MCU
    supply lines are brought up from the main board (see the top pins of the connector on the left)
    - The connector schematic symbols have been horizontally mirrored so they match the main EVB
    D
    connector. This has no bearing on the PCB placement or footprint. Pin1 on the recepticle mates D
    with pin 1 on the plug.

    P21 P20
    (GND) SH2 SH1 (GND) (GND) SH2 SH1 (GND)
    6 EXT-CLK 1 2 (GND) (PM11) 1 2 PC1 4
    EXT-CLK PC1
    (GND) 3 4 PH7 PH10 3 4 PE3
    PH7 4 4 PH10 PE3 4
    PB2 5 6 PH6 4 PH4 5 6 PH5 4
    4 PB2 (GND) PH6 4 PH4 PH5
    7 8 PB3 4 PE5 7 8 PC0 4
    (PP11) PB3 4 PE5 PC0
    9 10 PH8 4
    (PM12) 9 10 PQ3 5
    PH8 PQ3
    PE6 11 12 (PP8) PI5 11 12 PC3 4
    4 PE6 5 PI5 PC3
    PI3 13 14 (GND) PQ0 13 14 PE4
    5 PI3 5 PQ0 PE4 4
    (PP10) 15 16 (PP3) PC5 15 16 PH9
    4 PC5 PH9 4
    (PP5) 17 18 PE7 (GND) 17 18 (PL10)
    PE7 4
    PI1 19 20 PK9 5 PG14 19 20 PE15 4
    5 PI1 PK9 4 PG14 PE15
    PI2 21 22 (GND) PH12 21 22 PORSTx 4
    5 PI2 4 PH12 PORSTx
    (PP9) 23 24 PC12 PC4 23 24 PE2
    PC12 4 4 PC4 PE2 4
    PC13 25 26 PK11 5
    (GND) 25 26 (PL4)
    4 PC13 PK11
    PI0 27 28 (GND) (PL9) 27 28 PG11 4
    5 PI0 PG11
    PK10 29 30 (PP4) PC2 29 30 PQ1 5
    5 PK10 4 PC2 PQ1
    PC8 31 32 PK14 5 PA6 31 32 (GND)
    4 PC8 PK14 4 PA6
    PK13 33 34 PK12 (PL3) 33 34 PG10
    5 PK13 PK12 5 PG10 4
    (GND) 35 36 PC9 4 PH11 35 36 PQ2 5
    (PP2) PC9 4 PH11 PQ2
    37 38 PL0 5 PA5 37 38 (PL8)
    PL0 4 PA5
    PK15 39 40 (GND) PE14 39 40 PQ6 5
    5 PK15 4 PE14 PQ6
    PC15 41 42 (PP1) PQ4 41 42 (GND)
    4 PC15 5 PQ4
    (PP7) 43 44 (GND) PG15 43 44 PP13
    4 PG15 PP13 5
    (GND) 45 46 PC14 4 PQ5 45 46 PP12 5
    (PP6) PC14 5 PQ5 PP12
    47 48 PJ4 5 PQ7 47 48 PI4 5
    PJ4 5 PQ7 PI4
    (GND) 49 50 (GND) PP15 49 50 PP14 5
    (PO12) 5 PP15 PP14
    C 51 52 (PO11) (GND) 51 52 (GND) C
    (PO7) 53 54 (PO8) (PL12) 53 54 (PL2)
    (PO10) 55 56 (GND) (PL11) 55 56 (PL5)
    (PO4) 57 58 PH14 (PL6) 57 58 (PL13)
    PH14 4
    (PO9) 59 60 (PO13) (PL7) 59 60 (PM0)
    (GND) SH4 SH3 (GND) (GND) SH4 SH3 (GND)

    (GND) SH6 SH5 (GND) (GND) SH6 SH5 (GND)


    PG5 61 62 PO1 5
    (PL15) 61 62 (PL14)
    4 PG5 (PO14) PO1
    63 64 PH13 4
    (PM1) 63 64 (PM9)
    PH13
    PO0 65 66 PG4 4
    (PM2) 65 66 (PM7)
    5 PO0 PG4
    PI7 67 68 PH15 4 PE12 67 68 PA10 4
    5 PI7 PH15 4 PE12 PA10
    (PP0) 69 70 (PO15) PA11 69 70 PA9 4
    4 PA11 PA9
    (GND) 71 72 PE10 4
    (GND) 71 72 PA8 4
    PE10 PA8
    PE1 73 74 PE0 4 PA7 73 74 PF14 4
    4 PE1 PE0 4 PA7 PF14
    PI6 75 76 (PO6) PE13 75 76 PG0-R 7
    5 PI6 4 PE13 PG0-R
    (PO5) 77 78 (GND) PF15 77 78 PH2-R
    4 PF15 PH2-R 7
    PE11 79 80 PG2 4 PG1 79 80 (GND)
    4 PE11 PG2 4 PG1
    PG3 81 82 PA2 4 7 PH1-R 81 82 PG12-R 7
    4 PG3 PA2 PH1-R PG12-R
    (GND) 83 84 PE9 4 7 PH0-R 83 84 PG13-R 7
    PE9 PH0-R PG13-R
    PE8 85 86 PA1 4 PA3 85 86 (GND)
    4 PE8 PA1 4 PA3
    (GND) 87 88 MCU-RSTx (GND) 87 88 (GND)
    MCU-RSTx 4
    PG9 89 90 (PN15) (PM8) 89 90 (PM10)
    4 PG9
    PA0 91 92 (PO3) PH3 91 92 PM4 5
    4 PA0 4 PH3 PM4
    (GND) 93 94 (GND) PM3 93 94 PL1 5
    5 PM3 PL1
    PG7 95 96 PG6 4
    (PM6) 95 96 (GND)
    4 PG7 PG6
    PG8 97 98 PC11 (PM13) 97 98 PM5
    4 PG8 PC11 4 PM5 5
    PC10 99 100 (PO2) PM14 99 100 PI13 5
    4 PC10 5 PM14 PI13
    (GND) 101 102 (GND) (GND) 101 102 PB12 4
    PB12
    (GND) 103 104 PB0 4 4 PD13 103 104 PD9 4
    PB0 PD13 PD9
    PB1 105 106 PK1 5 4 PD12 105 106 PI12 5
    4 PB1 PK1 PD12 PI12
    PK2 107 108 PF12 PI11 107 108 PB7
    5 PK2 PF12 4 5 PI11 PB7 4
    (GND) 109 110 (GND) PD10 109 110 PI15 5
    4 PD10 PI15
    PF13 111 112 (GND) (GND) 111 112 (GND)
    4 PF13 MLB_DAT MLB_CN
    PK4 113 114 (GND) 113 114 7
    5 PK4 7 MLB_DAT MLB_SIG MLB_CP MLB_CN
    PK6 115 116 PK3 5 115 116 7
    5 PK6 PK3 7 MLB_SIG MLB_CLK MLB_CP
    PK8 117 118 PK5 117 118 (GND)
    5 PK8 PK5 5 7 MLB_CLK
    (PN14) 119 120 PF11 4
    (GND) 119 120 (GND)
    B PF11 B
    (GND) SH8 SH7 (GND) (GND) SH8 SH7 (GND)

    (GND) SH10 SH9 (GND) (GND) SH10 SH9 (GND)


    PF9 121 122 PK7 MLB_SN 121 122 MLB_DN
    4 PF9 PK7 5 7 MLB_SN MLB_DN 7
    PA14 123 124 PC6 MLB_SP 123 124 MLB_DP
    4 PA14 PC6 4 7 MLB_SP MLB_DP 7
    (PN13) 125 126 PF8 4
    (GND) 125 126 (GND)
    PF8
    (GND) 127 128 (GND) (GND) 127 128 (GND)
    (PN11) 129 130 PC7 4 4 PD7 129 130 PI14 5
    PC7 PD7 PI14
    PJ11 131 132 (PN12) PJ5 131 132 PJ7
    5 PJ11 5 PJ5 PJ7 5
    PJ10 133 134 PJ12 5 PJ0 133 134 PD11 4
    5 PJ10 PJ12 5 PJ0 PD11
    PK0 135 136 (GND) (GND) 135 136 PJ6 5
    5 PK0 PJ6
    PJ9 137 138 PJ15 5 4 PD5 137 138 PD6 4
    5 PJ9 PJ15 PD5 PD6
    (PN9) 139 140 (GND) PB5 139 140 PD2 4
    4 PB5 PD2
    (GND) 141 142 (PN8) PB11 141 142 PD3
    4 PB11 PD3 4
    PJ13 143 144 PF10 4 4 PD1 143 144 PJ8 5
    5 PJ13 PF10 PD1 PJ8
    PA4 145 146 (PN7) PJ1 145 146 (GND)
    4 PA4 5 PJ1
    (GND) 147 148 PJ14 5
    (GND) 147 148 PB6
    PJ14 PB6 4
    (PN10) 149 150 (GND)
    4 PD8 149 150 PD0 4
    PD8 PD0
    PA15 151 152 (PN4) PI9 151 152 PI10
    4 PA15 5 PI9 PI10 5
    (PN3) 153 154 PA13 PF5 153 154 (GND)
    PA13 4 4 PF5
    (PN6) 155 156 (GND) PB4 155 156 PD4
    4 PB4 PD4 4
    (GND) 157 158 (PN5) PJ2 157 158 PF6 4
    (PN0) 5 PJ2 PF6
    159 160 PA12 4 PJ3 159 160 (PN1)
    PA12 5 PJ3
    PB10 161 162 (PN2) (GND) 161 162 (GND)
    4 PB10 (GND) 163 164 PF1 4
    (GND) 163 164 PF4 4
    (GND) PF1 PF4
    165 166 PF0 4 PF2 165 166 PF7 4
    PF0 4 PF2 PF7
    (GND) 167 168 (GND) (PM15) 167 168 PF3 4
    PF3
    (GND) 169 170 (GND) (GND) 169 170 (GND)
    MCU_5V0_S 171 172 MCU_3V3_S (GND) 171 172 (GND)
    2 MCU_5V0_S MCU_3V3_S 2
    173 174 DC_5V0_S 173 174 DC_3V3_S
    TPV1 TPV4
    175 176 175 176
    MCU_1V25_L 177 178 MCU_3V3_L DC_P12V 177 178 DC_3V3_L
    2 MCU_1V25_L MCU_3V3_L 2 TPV3 TPV5
    179 180 MCU_5V0_L DC_1V25_L 179 180 DC_5V0_L
    MCU_5V0_L 2 TPV2 TPV6
    (GND) SH12 SH11 (GND) SH12 SH11

    PLUG 180 PLUG 180

    A
    Plug Plug A

    GND GND
    GND GND
    Automotive Microcontroller
    Applications
    East Kilbride, Scotland
    Freescale General Business Use
    Drawing Title:
    MPC5748G 256 BGA Daughter Card
    Page Title:
    Daughter Card Connectors (Plugs)
    Size Document Number Rev
    C SCH-28341 PDF: SPF-28341 A

    Date: Tuesday, August 18, 2015 Sheet 8 of 8


    5 4 3 2 1
    176 QFP DC
    5 4 3 2 1

    MPC5748G Customer EVB 176QFP Daughter Card (MPC574XG-176DS)


    Revision Information
    Rev Date Designer Comments
    D
    Table Of Contents: X1 11 Mar 2013 Alasdair Robertson Initial release sent for review based on X-MPC574XG-324DS X2 D

    Power - MPC5748G power pins footprint Sheet 2 X2 13 Mar 2013 Alasdair Robertson Version sent to Pre Layout, incorporating fixes from review
    Power - MPC5748G Decoupling Capacitors Sheet 3 X3 15 Mar 2013 Alasdair Robertson Component consolodation, Added MCU GND tab. Sent to Layout
    GPIO - MPC5748G GPIO pins 1 of 2 Sheet 4 X4 29 Mar 2013 Alasdair Robertson Changes made during layout to Daughtercard Connectors
    GPIO - MPC5748G GPIO pins 2 of 2 Sheet 5 X5 15 Apr 2013 Alasdair Robertson LAY RefDes Re-Sequence & SCH Back-Annotate
    Clocks Sheet 6 A 15 Apr 2013 Alasdair Robertson Post Layout (Back Annotated). Matches PCB RevA
    Bus Termination Sheet 7 B 22 Jul 2013 Alasdair Robertson Update to accomodate extra socket pins on MCU
    Daughtercard Connectors Sheet 8 C 19 Nov 2013 Jesus Sanchez The socket was updated, exposed center PAD is grounded.
    D 19 Dec 2013 Jesus Sanchez Changes on MCU Power to validate MPC5746
    D1 17 Aug 2015 Alasdair Robertson Tidy up Schematics for UM (RevD PCB)

    C C

    Caution:
    These schematics are provided for reference purposes only. As such,
    Freescale does not make any warranty, implied or otherwise, as to the
    suitability of circuit design or component selection (type or value) used in
    B
    these schematics for hardware design using the Freescale MPC5748G family B

    of Microprocessors. Customers using any part of these schematics as a


    basis for hardware design, do so at their own risk and Freescale does not
    assume any liability for such a hardware design.

    Notes:
    - All components and board processes are to be ROHS compliant
    - All small capacitors are 0402 unless otherwise stated
    - All resistors are 0603 5% 0.1w unless otherwise stated. All zero ohm links are 0603
    - All connectors and headers are denoted Px and are 2.54mm pitch unless otherwise stated Automotive Microcontroller Applications
    - All jumpers are denoted Jx. Jumpers are 2mm pitch
    - Jumper default positions are shown in the schematics. For 3 way jumpers, default is always posn 1-2. East Kilbride, Scotland
    2 Pin jumpers generally have the "source" on pin 1. Freescale General Business Use
    - All switches are denoted SWx
    This document contains information proprietary to Freescale and shall not be used for engineering design,
    A
    - All test points are denoted TPx Freescale AISG Applications, East Kilbride
    A
    procurement or manufacture in whole or in part without the express written permission of Freescale
    - Test point Vias are denoted TPVx
    Designer: Drawing Title:
    A. Robertson
    MPC5748G 176 QFP Daughter Card
    User notes are given throughtout the schematics. Drawn by: Page Title:
    A. Robertson
    Index and Title Page
    Specific PCB LAYOUT notes are detailed in ITALICS
    Approved: Size Document Number Rev
    A. Robertson B SCH-27898 PDF: SPF-27898 D1

    Date: Tuesday, August 18, 2015 Sheet 1 of 8


    5 4 3 2 1
    5 4 3 2 1

    MPC5748G MCU Power Connections


    Caution:
    Default Configuraiton:
    - If VDD_HV_A is driven from 5V, the VDD_HV_FLA pin - ALL MCU supply voltages are set to 3.3V (ADC0, ADC1, VDD_HV_A,
    must not be supplied from 3.3V (remove the HVA_FLA VDD_HV_B, VDD_HV_C, VBallast)
    jumper) - VDD_HV_FLA = External 3.3V supplied (jumper fitted)
    - VDD_LV Supplied from ballast transistor
    - Don't attempt to over drive an analogue pad to 5V
    D when the digital VDD_HV_x supply is set to 3.3V. This This is not necessarily the same as the default shown in the RM. All D
    will trigger the ESD protectrion on that pad. For VDD_HV_x domains have at least one peripheral that only functions at
    example if VDD_HV_A is set to 3.3V and the analogue 3.3V. Therefore the default is to run these from 3.3V. The analogue pins
    supplies are set to 5V, you cannot drive 5V into a can only be driven to the same voltage as the VDD_HV_x domain they are
    From MCU
    supply pad in the VDD_HV_A domain situated in (ie max 3.3V) so makes sense for the analogue supply and
    jumpers on reference to be 3.3V
    main board
    MCU_1V25_L
    8 MCU_1V25_L
    MCU_5V0_S 5v0 3

    LV_CAP
    8 MCU_5V0_S

    8 MCU_3V3_S MCU_3V3_S 2

    1
    MCU_5V0_L J10
    8 MCU_5V0_L
    3v3 1 J14
    J9 R39 3
    8 MCU_3V3_L MCU_3V3_L 1.0
    3v3 DNP 2

    1
    1

    2
    1

    3
    3v3 5v0 3v3 5v0 3v3 5v0 3v3 5v0 J8
    Individual MCU B_CAP

    4
    supply control
    jumpers

    E_CAP
    J3 J4 J5 J6 1 Q20
    C C
    MJD31CT4
    2

    2
    Individual MCU
    R27 0

    3
    supply control
    jumpers

    HVFLA_CAP
    1
    ADC1REF_CAP

    HVA_CAP

    HVB_CAP
    ADC0_CAP

    ADC1_CAP

    LVDEC_CAP
    TPH2
    R36
    0

    151

    124

    110
    152
    90

    99

    98

    59
    85

    27

    32

    31
    54

    30
    6
    VDD_HV_ADC0

    VDD_HV_ADC1

    VDD_HV_A_6
    VDD_HV_A_59
    VDD_HV_A_85
    VDD_HV_A_151

    VDD_HV_B_124

    VDD_HV_FLA

    VRC_CTRL

    VDD_LV_31
    VDD_LV_54
    VDD_LV_110
    VDD_LV_152
    VDD_HV_ADC1_REF

    VDD_LP_DEC
    U1B

    Differences to 324BGA
    B - 2 fewer VDD_HV_A on 176QFP B

    - 1 fewer VDD_HV_B
    - No VDD_HV_C
    - 5 Fewer VDD_LV
    Analogue MPC5748G 176QFP Flash 1.25v Core & External Ballast - No VIN1_CMP_REF
    Package 2of3 Power Pins - 15 Fewer VSS_LV
    - 5 Fewer VSS_HV
    Central Pad for heat
    - Heat Dissipation GND TAB
    VSS_HV_ADC0

    VSS_HV_ADC1

    dissipation & GND

    VSS_HV_VPP
    VSS_HV_123
    VSS_HV_150

    VSS_LV_109
    VSS_HV_28
    VSS_HV_55
    VSS_HV_57
    VSS_HV_86
    VSS_HV_7

    EX_PAD1
    EX_PAD2
    EX_PAD3
    EX_PAD4
    EX_PAD5
    89

    97

    7
    28
    55
    57
    86
    123
    150

    26

    109

    177
    178
    179
    180
    181
    HVA_CAP PPC5748GSK0MKU6 + OTQ-176SG-0.5-004-00
    R20 TP107
    0
    TPAD_030

    2
    1

    R37 J11 Automotive Microcontroller


    ADC0_GND ADC1_GND GND GND TPH1 10K GND Applications
    A
    East Kilbride, Scotland A

    1
    Freescale General Business Use
    MPC5746 Drawing Title:
    INT_BAL_SELECT enable
    Ground Links R9 0 R8 0 R38 C51 GND MPC5748G 176 QFP Daughter Card
    (0 Ohm 10K 1.0 UF Page Title:
    Resistors) DNP DNP MPC5748G MCU Power
    ADC0_GND GND ADC1_GND GND
    Size Document Number Rev
    GND GND B SCH-27898 PDF: SPF-27898 D1

    Date: Tuesday, August 18, 2015 Sheet 2 of 8


    5 4 3 2 1
    5 4 3 2 1

    MPC5748G MCU Decoupling and bulk storage


    Capacitor Types:

    ADC Flash 470pF - Ceramic COG, 50v 5% 0402


    1000pF - Ceramic COG, 50V 5% 0402
    ADC0_CAP C43 ADC1_CAP C34 ADC1REF_CAP HVFLA_CAP 4700pF - Ceramic X7R, 50V 10% 0402
    1000pF 1000pF
    0.01uF - Ceramic X7R, 50V 10% 0402
    0.1uF - Ceramic X7R, 16V 10% 0402
    D 0.68uF - Ceramic X7R 16V 10% 0805 (Murata GCM219R71C684KA37 ) D
    C4 + C44 C3 + C33 C41 C40 C32 C31 1.0uF - Ceraminc X7R, 10V 10% 0603 (Taiyo Yuden LMK107B7105KA-T)
    10UF 1.0 UF 10UF 1.0 UF 1.0 UF 2.2UF 2.2uF - Ceraminc X7R, 10V, 10%, 0603 (Taiyo Yuden LMK107B7225KA-TR)
    DNP DNP 1000pF 1000pF LMK107B7225KA-T
    (low ESR) 4.7uF - TANT, 12.5V 20% ESR=0.08R 7343
    10uF - TANT, 35V 10% ESR=0.125R CC7343-31
    C42 C35 4.7uF Alternative (150-78844)- Polymer ALU, 16V 20% ESR=0.08R
    ADC0_GND 0.1UF ADC1_GND 0.1UF ADC1_GND GND 7343-18

    Place small Caps as close as possible to MCU pins

    VDD_HVA VDD_HVB
    HVA_CAP C27 C24 C48 C46 HVB_CAP C23
    470pF 1000pF 470pF 1000pF 470pF

    + C2 + C1
    10UF 10UF
    C C
    DNP

    C26 C25 C47 C45 C22


    GND 0.1UF 0.1UF 0.1UF 0.1UF GND 0.1UF

    Place 10uF cap to west side of package


    Place small caps close to each MCU pin

    VDD_LV Ballast Transistor LP Internal Reg Cap


    LV_CAP C50 C20
    0.1UF 0.1UF B_CAP E_CAP E_CAP LV_CAP LVDEC_CAP

    C7 4700pF
    C8 C9 C49 C30 C21 C28 C36
    B Place 2.2UF 2.2UF 0.68uF 0.68uF 0.68uF 0.68uF 1uF B
    DNP DNP (low (low (low DNP LMK107B7105KA-T
    close to (low (low ESR) ESR) ESR) (low (low ESR)
    transistor ESR) ESR) ESR)
    C37 C29
    GND 0.1UF 0.1UF (Murata GCM219R71C684KA37)
    GND GND GND
    VDD_LV (1.25V) Decoupling. Place 2.2uF caps Place one 0.68uF cap footprint
    as close as possible to pin. are DNP. each side of package
    Place close
    See caps below for Bypass Transistor bulk storage (some on VDD1V2 rail) to emitter One of these is DNP. May replace 2 caps with
    0.47uF to keep overall capacitance within limits

    Differences to 324BGA
    - 2 Fewer VDD_HV_A capacitor pairs Automotive Microcontroller
    Applications
    - 1 fewer VDD_HV_B capacitor pair
    A - No VDD_HV_C capacitor pairs East Kilbride, Scotland A
    - 5 fewer VDD_LV capacitor pairs Freescale General Business Use
    Drawing Title:
    MPC5748G 176 QFP Daughter Card
    Page Title:
    MPC5748G MCU Decoupling
    Size Document Number Rev
    B SCH-27898 PDF: SPF-27898 D1

    Date: Tuesday, August 18, 2015 Sheet 3 of 8


    5 4 3 2 1
    5 4 3 2 1

    MPC5748G GPIO 1 of 2
    U1A

    (SD_CD - WKPU19) PA0 24 18 PE0 (MLB_I2C1_SCL)


    8 PA0 PA0 PE0 PE0 8
    (WKPU2 / NMI0) (SW1 & GPIO**) PA1 19 20 PE1 (MLB_I2C1_SDA)
    ** PA1 is also NMI. Routed to I/O Matrix (WKPU3)
    8
    8
    PA1
    PA2
    (SW2 & GPIO) PA2 17 PA1
    PA2
    MPC5748G 176QFP PE1
    PE2
    156 PE2 (FR_A_TX_EN) PE1
    PE2
    8
    8
    8 PA3
    (MII_RXCLK) PA3 114 157 PE3 (FR_A_RX)
    8
    PA3 PE3 PE3
    8 PA4
    (CMP1_13 / IO) PA4 51 Package 1of3 GPIO Pins1 160 PE4 (FR_B_TX)
    8
    D Key to text colours: (SAI_GPIO) PA4 PE4 (FR_B_RX) PE4 D
    8 PA5 PA5 146 161 PE5 8
    PA5 PE5 PE5
    Purple - Comms Physical Interfaces
    8 PA6
    (MLB_GPIO) PA6 147 167 PE6 (SD_CMD)
    8
    PA6 PE6 PE6
    Orange - Other Peripherals and I/O
    8 PA7
    (MII_RXD2) PA7 128 168 PE7 (SD_CLK)
    8
    PA7 PE7 PE7
    Blue - Debug (JTAG & Nexus)
    8 PA8
    (RMII_RXD1) PA8 129 21 PE8 (SAI_I2C2_SDA)
    8
    PA8 PE8 PE8
    Black - Clock, Reset and Control
    8 PA9
    (RMII_RXD0) PA9 130 22 PE9 (SAI_I2C2_SCL)
    8
    (MII_COL) PA9 PE9 (SAI_I2C3_SDA) PE9
    RED - I/O Matrix and other functions (eg LED)
    8 PA10 PA10 131 23 PE10 8
    PA10 PE10 PE10
    Green - I/O Matrix (dedicated)
    8 PA11
    (RMII_RXER) PA11 132 25 PE11 (SAI_I2C3_SCL)
    8
    PA11 PE11 PE11
    8 PA12
    (CMP1_15 / IO) PA12 53 133 PE12 (MII_CRS)
    8
    PA12 PE12 PE12
    8 PA13
    (CMP1_14 / IO) PA13 52 127 PE13 (MII_RXD3)
    8
    PA13 PE13 PE13
    8 PA14
    (CMP1_12 / IO) PA14 50 136 PE14 (USB1_D2)
    8
    (CMP1_10 / IO) PA14 PE14 (USB1_D3) PE14
    8 PA15 PA15 48 137 PE15 8
    PA15 PE15 PE15

    8 PB0
    (CAN0_TX) PB0 39 63 PF0 (SAI0_MCLK)
    8
    PB0 PF0 PF0
    8 PB1
    (CAN0_RX) PB1 40 64 PF1 (SAI0_BCLK)
    8
    (LIN0_TX) PB1 PF1 (SAI0_D3) PF1
    8 PB2 PB2 176 65 PF2 8
    PB2 PF2 PF2
    8 PB3
    (LIN0_RX) PB3 1 66 PF3 (SAI0_D2)
    8
    PB3 PF3 PF3
    8 PB4
    (ADC_POT) PB4 88 67 PF4 (SAI0_D1)
    8
    PB4 PF4 PF4
    8 PB5
    (GPIO) PB5 91 68 PF5 (SAI0_D0)
    8
    PB5 PF5 PF5
    8 PB6
    (GPIO) PB6 92 69 PF6 (SAI1_SYNC)
    8
    (GPIO) PB6 PF6 (SAI1_MCLK) PF6
    8 PB7 PB7 93 70 PF7 8
    PB7 PF7 PF7
    6 PB8
    (XTAL32) PB8 61 42 PF8 (GPIO)
    8
    PB8 PF8 PF8
    6 PB9
    (EXTAL32) PB9 60 41 PF9 (SW3 & GPIO) WKPU22
    8
    PB9 PF9 PF9
    8 PB10
    (SAI0_SYNC) PB10 62 46 PF10 (CMP1_8 / IO)
    8
    C PB10 PF10 PF10 C
    8 PB11
    (GPIO) PB11 96 47 PF11 (SW4 & GPIO) WKPU15
    8
    (GPIO) PB11 PF11 (GPIO) PF11
    8 PB12 PB12 101 43 PF12 8
    PB12 PF12 PF12
    7 PB13
    (MLB_DN) PB13 103 49 PF13 (CMP1_11 /IO)
    8
    PB13 PF13 PF13
    7 PB14
    (MLB_SN) PB14 105 126 PF14 (RMII_MDIO)
    8
    PB14 PF14 PF14
    7 PB15
    (MLB_CN / SIG) PB15 107 125 PF15 (RMII_RXDV)
    8
    PB15 PF15 PF15

    8 PC0
    (TDI) PC0 154 122 PG0 (RMII_MDC)
    7
    PC0 PG0 PG0
    8 PC1
    (TDO) PC1 149 121 PG1 (RMII_TXCLK)
    8
    PC1 PG1 PG1
    8 PC2
    (USB1_CLK) PC2 145 16 PG2 (LED1 & GPIO)
    8
    (eMIOS E1UC_11_H)
    PC2 PG2 PG2
    8 PC3
    (USB1_DIR) PC3 144 15 PG3 (LED2 & GPIO)
    8
    (eMIOS E1UC_12_H)
    (FR_B_TX_EN) PC3 PG3 (LED3 & GPIO) PG3 (eMIOS E1UC_13_H)
    8 PC4 PC4 159 14 PG4 8
    PC4 PG4 PG4
    8 PC5
    (FR_A_TX) PC5 158 13 PG5 (LED4 & GPIO)
    8
    (eMIOS E1UC_14_H)
    PC5 PG5 PG5
    8 PC6
    (LIN1_TX) PC6 44 38 PG6 (CLKOUT1 GPIO)
    8
    PC6 PG6 PG6
    8 PC7
    (LIN1_RX) PC7 45 37 PG7 (CLKOUT0 GPIO)
    8
    PC7 PG7 PG7
    8 PC8
    (RS232_TX) PC8 175 34 PG8 (GPIO)
    8
    (RS232_RX) PC8 PG8 (MLB_IRQ - WKPU21) PG8
    8 PC9 PC9 2 33 PG9 8
    PC9 PG9 PG9
    8 PC10
    (CAN1_TX) PC10 36 138 PG10 (USB1_D4)
    8
    PC10 PG10 PG10
    8 PC11
    (CAN1_RX) PC11 35 139 PG11 (USB1_D5)
    8
    PC11 PG11 PG11
    8 PC12
    (FR_DBG0) PC12 173 116 PG12 (MII_TXD2)
    7
    PC12 PG12 PG12
    8 PC13
    (FR_DBG1) PC13 174 115 PG13 (MII_TXD3)
    7
    (FR_DBG2) PC13 PG13 (USB1_D0) PG13
    8 PC14 PC14 3 134 PG14 8
    PC14 PG14 PG14
    8 PC15
    (FR_DBG3) PC15 4 135 PG15 (USB1_D1)
    8
    PC15 PG15 PG15
    B B

    8 PD0
    (HEX1 & GPIO) PD0 77 117 PH0 (RMII_TXD1)
    7
    (HEX2 & GPIO) PD0 PH0 (RMII_TXD0) PH0
    8 PD1 PD1 78 118 PH1 7
    PD1 PH1 PH1
    8 PD2
    (HEX3 & GPIO) PD2 79 119 PH2 (RMII_TXEN)
    7
    PD2 PH2 PH2
    8 PD3
    (HEX4 & GPIO) PD3 80 120 PH3 (eMIOS1_UC_5H)
    8
    PD3 PH3 PH3
    8 PD4
    (GPIO) PD4 81 162 PH4 (eMIOS1_UC_6H)
    8
    PD4 PH4 PH4
    8 PD5
    (GPIO) PD5 82 163 PH5 (eMIOS1_UC_7H)
    8
    (GPIO) PD5 PH5 (MLB_RST) PH5
    8 PD6 PD6 83 164 PH6 8
    PD6 PH6 PH6
    8 PD7
    (GPIO) PD7 84 165 PH7 (MLB_PWR)
    8
    PD7 PH7 PH7
    8 PD8
    (GPIO) PD8 87 166 PH8 (SD_WP)
    8
    PD8 PH8 PH8
    8 PD9
    (GPIO) PD9 94 155 PH9 (TCK)
    8 Differences to 324BGA
    PD9 PH9 PH9
    8 PD10
    (GPIO) PD10 95 148 PH10 (TMS)
    8
    PD10 PH10 (USB1_D6) PH10
    140 PH11 8
    (GPIO) PD12 100 PH11 141 PH12 (USB1_D7) PH11 - Port D 11 Not on 176QFP
    8 PD12 PD12 PH12 PH12 8
    8 PD13
    (GPIO & MLB_ST) PD13 102 9 PH13 (GPIO)
    8
    PD13 PH13 PH13
    7 PD14
    (MLB_DP) PD14 104 10 PH14 (GPIO)
    8
    PD14 PH14 PH14
    7 PD15
    (MLB_SP / DAT) PD15 106 8 PH15 (GPIO)
    8
    PD15 PH15 PH15

    8 MCU-RSTx MCU-RSTx 29
    PORSTx 153 RESET
    8 PORSTx PORST
    Automotive Microcontroller
    6 MCU-XTAL MCU-XTAL 56 Applications
    MCU-EXTAL 58 XTAL
    6 MCU-EXTAL EXTAL East Kilbride, Scotland
    A A
    Freescale General Business Use
    Drawing Title:
    PPC5748GSK0MKU6 + OTQ-176SG-0.5-004-00
    MPC5748G 176 QFP Daughter Card
    Page Title:
    MPC5748G GPIO 1of2
    Size Document Number Rev
    B SCH-27898 PDF: SPF-27898 D1

    Date: Tuesday, August 18, 2015 Sheet 4 of 8


    5 4 3 2 1
    5 4 3 2 1

    MPC5748G GPIO 2 of 2
    U1C

    Key to text colours:


    8 PI0
    (SD_D3) PI0 172
    Purple - Comms Physical Interfaces (SD_D2) PI1 171 PI0
    Orange - Other Peripherals and I/O
    8
    8
    PI1
    PI2
    (SD_D1) PI2 170 PI1
    PI2
    MPC5748G 176QFP
    Blue - Debug (JTAG & Nexus)
    8 PI3
    (SD_D0) PI3 169
    Black - Clock, Reset and Control (USB1_STP) PI4 143 PI3
    8 PI4 PI4 Package 3of3 GPIO Pins2
    RED - I/O Matrix and other functions (eg LED)
    8 PI5
    (USB1_NXT) PI5 142
    D Green - I/O Matrix (dedicated) (USB0_RST) PI6 11 PI5 D
    8 PI6 PI6
    8 PI7
    (USB1_RST) PI7 12
    (MLB_CP / CLK) PI8 108 PI7
    7 PI8 PI8
    (GPIO)

    (ENET_RST) PI11 111


    8 PI11 PI11
    8 PI12
    (GPIO & MLB_PS0) PI12 112
    (GPIO & MLB_PS1) PI13 113 PI12
    8 PI13 PI13
    8 PI14
    (SAI2_D0) PI14 76
    (SAI2_MCLK) PI15 75 PI14
    8 PI15 PI15

    8 PJ0
    (SAI2_SYNC) PJ0 74
    (SAI2_BCLK) PJ1 73 PJ0
    8 PJ1 PJ1
    8 PJ2
    (SAI1_D0) PJ2 72
    (SAI1_BCLK) PJ3 71 PJ2
    8 PJ3 PJ3
    8 PJ4
    (GPIO) PJ4 5
    PJ4

    C C

    B B

    Differences to 324BGA
    - 2 fewer pins on Port I
    - 12 fewer pins on Port J
    - No Ports K to Q
    (And corresponding changes
    to daughtercard connectors)

    Automotive Microcontroller
    Applications
    A
    East Kilbride, Scotland A
    Freescale General Business Use
    Drawing Title:
    MPC5748G 176 QFP Daughter Card
    Page Title:
    PPC5748GSK0MKU6 + OTQ-176SG-0.5-004-00 MPC5748G GPIO 2of2
    Size Document Number Rev
    B SCH-27898 PDF: SPF-27898 D1

    Date: Tuesday, August 18, 2015 Sheet 5 of 8


    5 4 3 2 1
    5 4 3 2 1

    Clocks

    D D

    Oscillators and External Clock

    EXT-CLK (From SMA connector on main board)


    8 EXT-CLK
    C39 12PF
    4 PB9 PB9
    (EXTAL32)

    2
    3
    R30 Y20
    C C
    1.0M 32.768KHZ 2
    DNP C6 12PF
    1 EXTAL
    C38 12PF

    1
    4 PB8 J2
    PB8 (XTAL32) R7 Y1
    1.0M 40.0MHZ
    FC-255 32.7680K-A3 GND DNP
    (Load Capacitance 7pF)
    J1
    4 MCU-EXTAL MCU-EXTAL C5 12PF

    2
    1 XTAL

    4 MCU-XTAL 2
    MCU-XTAL
    GND
    R35 0
    3
    NX8045GB-40.000M-STD-CSJ-1 XTAL
    DNP (Optimised for Automotive, 8pF Load capacitance)
    GND

    B B

    Automotive Microcontroller
    Applications
    A
    East Kilbride, Scotland A
    Freescale General Business Use
    Drawing Title:
    MPC5748G 176 QFP Daughter Card
    Page Title:
    Clocks
    Size Document Number Rev
    B SCH-27898 PDF: SPF-27898 D1

    Date: Tuesday, August 18, 2015 Sheet 6 of 8


    5 4 3 2 1
    5 4 3 2 1

    High Speed Signal Termination

    D D

    Ethernet Termination

    4 PG13 R5 50 PG13-R 8
    PG13 PG13-R
    4 PG12 R4 50 PG12-R 8
    PG12 PG12-R
    4 PH0 R6 50 PH0-R 8
    PH0 PH0-R
    4 PH1 R3 50 PH1-R 8
    PH1 PH1-R
    4 PH2 R2 50 PH2-R 8
    PH2 PH2-R

    4 PG0 R1 50 PG0-R 8
    PG0 PG0-R
    Place resistors as close as possible to MCU

    MLB Termination

    MLB_DAT 8
    MLB_DAT
    MLB_SIG 8
    MLB_SIG
    MLB_CLK 8
    C MLB_CLK C

    R34 R21 R25


    100 100 100
    DNP DNP DNP

    PB14 R31 0 MLB_SN 8


    4 PB14 MLB_SN
    R32 105.0 1%
    4 PD15 R33 0 MLB_SP (PD[15] Shared with MLB_DAT for 3-pin mode)
    8
    PD15 MLB_SP

    PB13 R26 0 MLB_DN 8


    4 PB13 MLB_DN
    R28 105.0 1%
    PD14 R29 0 MLB_DP 8
    4 PD14 MLB_DP

    PB15 R22 0 MLB_CN (PB[15] Shared with MLB_SIG for 3-pin mode)
    8
    4 PB15 MLB_CN
    R23 100 1%
    5 PI8 R24 0 MLB_CP (PI[8] Shared with MLB_CLK for 3-pin mode)
    8
    PI8 MLB_CP
    Place resistors as close as possible to MCU

    B
    From MCU Layout Note - Place resistors as shown with
    shared pad (as close to MCU as possible)
    To Daughtercard B

    Remove R1 and
    fit R2 to
    enable 3-pin
    signals

    R1 Fitted by default
    for LVDS 6-pin signals

    Automotive Microcontroller
    Applications
    A
    East Kilbride, Scotland A
    Freescale General Business Use
    Drawing Title:
    MPC5748G 176 QFP Daughter Card
    Page Title:
    High Speed Signal Termination
    Size Document Number Rev
    B SCH-27898 PDF: SPF-27898 D1

    Date: Tuesday, August 18, 2015 Sheet 7 of 8


    5 4 3 2 1
    5 4 3 2 1

    Daughter Card Connectors (Plugs)


    Notes: Connectors on Main board (Shown for reference)

    - there was no neat way to fit these connectors onto a B sized sheet so unfortunately the
    sheet size has been increased to C so will need to be printed on larger paper.
    - The Crystal Signals are NOT routed via the daughtercard connectors
    - The Specific MCU power pins are not routed via the daughter card however the jumpered MCU
    supply lines are brought up from the main board (see the top pins of the connector on the
    left)

    D
    - The connector schematic symbols have been horizontally mirrored so they match the main EVB D
    connector. This has no bearing on the PCB placement or footprint. Pin1 on the recepticle
    mates with pin 1 on the plug.

    P21 P20
    (GND) SH2 SH1 (GND) (GND) SH2 SH1 (GND)
    EXT-CLK 1 2 (GND) (PM11) 1 2 PC1
    6 EXT-CLK PC1 4
    (GND) 3 4 PH7 PH10 3 4 PE3
    PH7 4 4 PH10 PE3 4
    4 PB2 5 6 PH6 4 4 PH4 5 6 PH5 4
    PB2 (GND) PH6 PH4 PH5
    7 8 PB3 4 4 PE5 7 8 PC0 4
    (PP11) PB3 PE5 PC0
    9 10 PH8 4
    (PM12) 9 10 (PQ3)
    PH8
    PE6 11 12 (PP8) PI5 11 12 PC3
    4 PE6 5 PI5 PC3 4
    5 PI3 13 14 (GND) (PQ0) 13 14 PE4 4
    PI3 (PP10) PE4
    15 16 (PP3)
    4 PC5 15 16 PH9 4
    (PP5) PC5 PH9
    17 18 PE7 4
    (GND) 17 18 (PL10)
    PE7
    PI1 19 20 (PK9)
    4 PG14 19 20 PE15 4
    5 PI1 PG14 PE15
    PI2 21 22 (GND) PH12 21 22 PORSTx
    5 PI2 4 PH12 PORSTx 4
    (PP9) 23 24 PC12 PC4 23 24 PE2
    PC12 4 4 PC4 PE2 4
    4 PC13 25 26 (PK11) (GND) 25 26 (PL4)
    PC13
    5 PI0 27 28 (GND) (PL9) 27 28 PG11 4
    PI0 (PK10) PG11
    29 30 (PP4)
    4 PC2 29 30 (PQ1)
    PC2
    PC8 31 32 (PK14) PA6 31 32 (GND)
    4 PC8 4 PA6
    (PK13) 33 34 (PK12) (PL3) 33 34 PG10
    PG10 4
    (GND) 35 36 PC9 4 4 PH11 35 36 (PQ2)
    (PP2) PC9 PH11
    37 38 (PL0)
    4 PA5 37 38 (PL8)
    (PK15) PA5
    39 40 (GND)
    4 PE14 39 40 (PQ6)
    PE14
    PC15 41 42 (PP1) (PQ4) 41 42 (GND)
    4 PC15 (PP7) 43 44 (GND)
    4 PG15 43 44 (PP13)
    PG15
    (GND) 45 46 PC14 4
    (PQ5) 45 46 (PP12)
    (PP6) PC14
    47 48 PJ4 5
    (PQ7) 47 48 PI4 5
    PJ4 PI4
    C (GND) 49 50 (GND) (PP15) 49 50 (PP14) C
    (PO12) 51 52 (PO11) (GND) 51 52 (GND)
    (PO7) 53 54 (PO8) (PL12) 53 54 (PL2)
    (PO10) 55 56 (GND) (PL11) 55 56 (PL5)
    (PO4) 57 58 PH14 (PL6) 57 58 (PL13)
    PH14 4
    (PO9) 59 60 (PO13) (PL7) 59 60 (PM0)
    (GND) SH4 SH3 (GND) (GND) SH4 SH3 (GND)

    (GND) SH6 SH5 (GND) (GND) SH6 SH5 (GND)


    4 PG5 61 62 (PO1) (PL15) 61 62 (PL14)
    PG5 (PO14) 63 64 PH13 4
    (PM1) 63 64 (PM9)
    PH13
    (PO0) 65 66 PG4 4
    (PM2) 65 66 (PM7)
    PG4
    5 PI7 67 68 PH15 4 4 PE12 67 68 PA10 4
    PI7 (PP0) PH15 PE12 PA10
    69 70 (PO15)
    4 PA11 69 70 PA9 4
    PA11 PA9
    (GND) 71 72 PE10 4
    (GND) 71 72 PA8 4
    PE10 PA8
    4 PE1 73 74 PE0 4 4 PA7 73 74 PF14 4
    PE1 PE0 PA7 PF14
    PI6 75 76 (PO6) PE13 75 76 PG0-R
    5 PI6 4 PE13 PG0-R 7
    (PO5) 77 78 (GND) PF15 77 78 PH2-R
    4 PF15 PH2-R 7
    4 PE11 79 80 PG2 4 4 PG1 79 80 (GND)
    PE11 PG2 PG1
    4 PG3 81 82 PA2 4 7 PH1-R 81 82 PG12-R 7
    PG3 PA2 PH1-R PG12-R
    (GND) 83 84 PE9 4 7 PH0-R 83 84 PG13-R 7
    PE9 PH0-R PG13-R
    PE8 85 86 PA1 PA3 85 86 (GND)
    4 PE8 PA1 4 4 PA3
    (GND) 87 88 MCU-RSTx (GND) 87 88 (GND)
    MCU-RSTx 4
    4 PG9 89 90 (PN15) (PM8) 89 90 (PM10)
    PG9
    4 PA0 91 92 (PO3)
    4 PH3 91 92 (PM4)
    PA0 PH3
    (GND) 93 94 (GND) (PM3) 93 94 (PL1)
    4 PG7 95 96 PG6 (PM6) 95 96 (GND)
    PG7 PG6 4
    4 PG8 97 98 PC11 4
    (PM13) 97 98 (PM5)
    PG8 PC11
    4 PC10 99 100 (PO2) (PM14) 99 100 PI13 5
    PC10 PI13
    (GND) 101 102 (GND) (GND) 101 102 PB12 4
    PB12
    (GND) 103 104 PB0 4 4 PD13 103 104 PD9 4
    PB0 PD13 PD9
    PB1 105 106 (PK1) PD12 105 106 PI12
    4 PB1 4 PD12 PI12 5
    (PK2) 107 108 PF12 PI11 107 108 PB7
    PF12 4 5 PI11 PB7 4
    (GND) 109 110 (GND) PD10 109 110 PI15
    4 PD10 PI15 5
    PF13 111 112 (GND) (GND) 111 112 (GND)
    4 PF13 (PK4) MLB_DAT MLB_CN
    113 114 (GND)
    7 113 114 7
    MLB_DAT MLB_SIG MLB_CP MLB_CN
    (PK6) 115 116 (PK3) 115 116
    7 MLB_SIG MLB_CP 7
    (PK8) 117 118 (PK5) MLB_CLK 117 118 (GND)
    B 7 MLB_CLK B
    (PN14) 119 120 PF11 (GND) 119 120 (GND)
    PF11 4
    (GND) SH8 SH7 (GND) (GND) SH8 SH7 (GND)

    (GND) SH10 SH9 (GND) (GND) SH10 SH9 (GND)


    PF9 121 122 (PK7) MLB_SN 121 122 MLB_DN
    4 PF9 7 MLB_SN MLB_DN 7
    PA14 123 124 PC6 MLB_SP 123 124 MLB_DP
    4 PA14 PC6 4 7 MLB_SP MLB_DP 7
    (PN13) 125 126 PF8 (GND) 125 126 (GND)
    PF8 4
    (GND) 127 128 (GND) (GND) 127 128 (GND)
    (PN11) 129 130 PC7 PD7 129 130 PI14
    PC7 4 4 PD7 PI14 5
    (PJ11) 131 132 (PN12) (PJ5) 131 132 (PJ7)
    (PJ10) 133 134 (PJ12) PJ0 133 134 (PD11)
    5 PJ0
    (PK0) 135 136 (GND) (GND) 135 136 (PJ6)
    (PJ9) 137 138 (PJ15) PD5 137 138 PD6
    4 PD5 PD6 4
    (PN9) 139 140 (GND) PB5 139 140 PD2
    4 PB5 PD2 4
    (GND) 141 142 (PN8) PB11 141 142 PD3
    4 PB11 PD3 4
    (PJ13) 143 144 PF10 PD1 143 144 (PJ8)
    PF10 4 4 PD1
    4 PA4 145 146 (PN7)
    5 PJ1 145 146 (GND)
    PA4 (GND) PJ1
    147 148 (PJ14) (GND) 147 148 PB6 4
    PB6
    (PN10) 149 150 (GND) PD8 149 150 PD0
    4 PD8 PD0 4
    PA15 151 152 (PN4) (PI9) 151 152 (PI10)
    4 PA15 (PN3) 153 154 PA13 4 4 PF5 153 154 (GND)
    (PN6) PA13 PF5
    155 156 (GND)
    4 PB4 155 156 PD4 4
    (GND) PB4 PD4
    157 158 (PN5)
    5 PJ2 157 158 PF6 4
    PJ2 PF6
    (PN0) 159 160 PA12 PJ3 159 160 (PN1)
    PA12 4 5 PJ3
    PB10 161 162 (PN2) (GND) 161 162 (GND)
    4 PB10 (GND) 163 164 PF1 4
    (GND) 163 164 PF4 4
    (GND) PF1 PF4
    165 166 PF0 4 4 PF2 165 166 PF7 4
    (GND) PF0 PF2 PF7
    167 168 (GND) (PM15) 167 168 PF3 4
    PF3
    (GND) 169 170 (GND) (GND) 169 170 (GND)
    MCU_5V0_S 171 172 MCU_3V3_S (GND) 171 172 (GND)
    2 MCU_5V0_S MCU_3V3_S 2
    173 174 DC_5V0_S 173 174 DC_3V3_S
    TPV1 TPV4
    175 176 175 176
    MCU_1V25_L 177 178 MCU_3V3_L DC_P12V 177 178 DC_3V3_L
    2 MCU_1V25_L MCU_3V3_L 2 TPV3 TPV5
    179 180 MCU_5V0_L DC_1V25_L 179 180 DC_5V0_L
    MCU_5V0_L 2 TPV2 TPV6
    (GND) SH12 SH11 (GND) SH12 SH11

    PLUG 180 PLUG 180


    A A

    Plug Plug
    GND GND
    GND GND Automotive Microcontroller
    Applications
    East Kilbride, Scotland
    Freescale General Business Use
    Drawing Title:
    MPC5748G 176 QFP Daughter Card
    Page Title:
    Daughter Card Connectors (Plugs)
    Size Document Number Rev
    C SCH-27898 PDF: SPF-27898 D1

    Date: Tuesday, August 18, 2015 Sheet 8 of 8


    5 4 3 2 1
    100 QFP DC
    5 4 3 2 1

    MPC5746C Customer EVB 100 BGA Daughter Card (MPC574XG-100DS)


    Revision Information
    Rev Date Designer Comments
    D
    Table Of Contents: X1 05 Jan 2014 Alasdair Robertson Initial release sent for review based on X-MPC574XG-256DS RevA D

    Power - MPC5746C power pins footprint Sheet 2 X2 07 Jan 2014 Alasdair Robertson Post review corrections incl MCU Orcad Footprint
    Power - MPC5746C Decoupling Capacitors Sheet 3 A 30 Jan 2014 Alasdair Robertson Prototype build release
    GPIO - MPC5746C GPIO pins 1 of 2 Sheet 4 A1 18 Aug 2015 Alasdair Robertson Tidy up Schematics for UM (RevA PCB)
    GPIO - MPC5746C GPIO pins 2 of 2 Sheet 5
    Clocks Sheet 6
    Bus Termination Sheet 7
    Daughtercard Connectors Sheet 8

    C C

    Caution:
    These schematics are provided for reference purposes only. As such,
    Freescale does not make any warranty, implied or otherwise, as to the
    suitability of circuit design or component selection (type or value) used in
    B
    these schematics for hardware design using the Freescale MPC5746C family B

    of Microprocessors. Customers using any part of these schematics as a


    basis for hardware design, do so at their own risk and Freescale does not
    assume any liability for such a hardware design.

    Notes:
    - All components and board processes are to be ROHS compliant
    - All small capacitors are 0402 unless otherwise stated
    - All resistors are 0603 5% 0.1w unless otherwise stated. All zero ohm links are 0603
    - All connectors and headers are denoted Px and are 2.54mm pitch unless otherwise stated Automotive Microcontroller Applications
    - All jumpers are denoted Jx. Jumpers are 2mm pitch
    - Jumper default positions are shown in the schematics. For 3 way jumpers, default is always posn 1-2. East Kilbride, Scotland
    2 Pin jumpers generally have the "source" on pin 1. Freescale General Business Use
    - All switches are denoted SWx
    This document contains information proprietary to Freescale and shall not be used for engineering design,
    A
    - All test points are denoted TPx Freescale AISG Applications, East Kilbride
    A
    procurement or manufacture in whole or in part without the express written permission of Freescale
    - Test point Vias are denoted TPVx
    Designer: Drawing Title:
    A. Robertson
    MPC5746C 100 BGA Daughter Card
    User notes are given throughtout the schematics. Drawn by: Page Title:
    A. Robertson
    Index and Title Page
    Specific PCB LAYOUT notes are detailed in ITALICS
    Approved: Size Document Number Rev
    A. Robertson B SCH-28701 PDF: SPF-28701 A1

    Date: Tuesday, August 18, 2015 Sheet 1 of 8


    5 4 3 2 1
    5 4 3 2 1

    MPC5746C MCU Power Connections Caution:


    Default Configuraiton:
    - If VDD_HV_A is driven from 5V, the VDD_HV_FLA pin - ALL MCU supply voltages are set to 3.3V (ADC0, ADC1, VDD_HV_A,
    must not be supplied from 3.3V (remove the HVA_FLA VDD_HV_B, VDD_HV_C, VBallast)
    jumper) - VDD_HV_FLA = External 3.3V supplied (jumper fitted)
    - VDD_LV Supplied from ballast transistor
    - Don't attempt to over drive an analogue pad to 5V
    when the digital VDD_HV_x supply is set to 3.3V. This This is not necessarily the same as the default shown in the RM. All
    D will trigger the ESD protectrion on that pad. For VDD_HV_x domains have at least one peripheral that only functions at D
    example if VDD_HV_A is set to 3.3V and the analogue 3.3V. Therefore the default is to run these from 3.3V. The analogue pins
    supplies are set to 5V, you cannot drive 5V into a can only be driven to the same voltage as the VDD_HV_x domain they are
    From MCU pad in the VDD_HV_A domain situated in (ie max 3.3V) so makes sense for the analogue supply and
    supply reference to be 3.3V
    jumpers on
    main board
    MCU_1V25_L
    8 MCU_1V25_L
    MCU_5V0_S
    8 MCU_5V0_S

    8 MCU_3V3_S MCU_3V3_S

    MCU_5V0_L
    8 MCU_5V0_L

    8 MCU_3V3_L MCU_3V3_L

    3v3

    1
    J8
    1

    3
    3v3 5v0 3v3 5v0 3v3 5v0 3v3 5v0 3v3 5v0 Individual MCU
    HDR 1X2 supply control
    jumpers
    J3 J4 J5 J6 J9
    C C
    2

    4 2
    Q20

    2
    R7 0

    E_CAP
    MJD31CT4

    B_CAP
    1

    ADC1REF_CAP

    HVFLA_CAP

    LVDEC_CAP
    3
    HVA_CAP

    HVB_CAP
    ADC0_CAP

    ADC1_CAP

    LV_CAP
    1

    3
    R35

    1
    0 J10

    2
    TPH2
    G10
    K10

    G4
    G7

    G5
    G6
    H9

    D4
    D7

    H3

    D5
    D6
    E8

    E1

    F2
    U1B
    VDD_HV_ADC0

    VDD_HV_ADC1

    VDD_HV_A_D4
    VDD_HV_A_D7
    VDD_HV_A_G4
    VDD_HV_A_G7

    VDD_HV_B_E8

    VDD_HV_FLA_H3

    VRC_CTRL

    VDD_LV_D5
    VDD_LV_D6
    VDD_LV_G5
    VDD_LV_G6
    VDD_HV_ADC1_REF

    VDD_LP_DEC
    B B

    Analogue MPC5746C 100 BGA Flash 1.25v Core & External Ballast
    Package 2of3 Power Pins
    VSS_HV_ADC0

    VSS_HV_ADC1

    INT_BAL_SEL
    VSS_VPP

    VSS_D1
    VSS_E4
    VSS_E5
    VSS_E6
    VSS_E7

    VSS_K4
    VSS_K7
    VSS_F4
    VSS_F5
    VSS_F6
    VSS_F7
    SKT BGA 100 TH + MPC574XG-100
    K9

    H10

    D2

    E2

    D1
    E4
    E5
    E6
    E7
    F4
    F5
    F6
    F7
    K4
    K7
    R24 0
    1

    Automotive Microcontroller
    ADC0_GND ADC1_GND TPH1 GND Applications
    GND
    A
    East Kilbride, Scotland A
    R37 Freescale General Business Use
    HVA_CAP J12 1.0K Drawing Title:
    3
    Ground Links R9 0 R10 0 MPC5746C 100 BGA Daughter Card
    (0 Ohm 2 Page Title:
    Resistors)
    ADC0_GND GND ADC1_GND GND 1
    MPC5746C MCU Power
    Size Document Number Rev
    B SCH-28701 PDF: SPF-28701 A1
    GND
    Date: Tuesday, August 18, 2015 Sheet 2 of 8
    5 4 3 2 1
    5 4 3 2 1

    MPC5746C MCU Decoupling and bulk storage


    Capacitor Types:

    ADC Flash 470pF - Ceramic COG, 50v 5% 0402


    1000pF - Ceramic COG, 50V 5% 0402
    ADC0_CAP C48 ADC1_CAP C46 ADC1REF_CAP HVFLA_CAP 4700pF - Ceramic X7R, 50V 10% 0402
    1000pF 1000pF
    0.01uF - Ceramic X7R, 50V 10% 0402
    0.1uF - Ceramic X7R, 16V 10% 0402
    D 0.68uF - Ceramic X7R 16V 10% 0805 (Murata GCM219R71C684KA37 ) D
    C2 + C59 C3 + C58 C47 C57 C36 C34 1.0uF - Ceraminc X7R, 10V 10% 0603 (Taiyo Yuden LMK107B7105KA-T)
    10UF 1.0 UF 10UF 1.0 UF 1.0 UF 2.2UF 2.2uF - Ceraminc X7R, 10V, 10%, 0603 (Taiyo Yuden LMK107B7225KA-TR)
    DNP DNP 1000pF 1000pF LMK107B7225KA-T
    (low ESR) 4.7uF - TANT, 12.5V 20% ESR=0.08R 7343
    10uF - TANT, 35V 10% ESR=0.125R CC7343-31
    C56 C55 4.7uF Alternative (150-78844)- Polymer ALU, 16V 20% ESR=0.08R
    ADC0_GND 0.1UF ADC1_GND 0.1UF ADC1_GND GND 7343-18

    Place small Caps as close as possible to MCU pins

    VDD_HVA VDD_HVB
    HVA_CAP C27 C51 C22 C54 HVB_CAP C33
    470pF 1000pF 470pF 1000pF 470pF

    + C1 + C4
    10UF 10UF
    C C
    DNP

    C26 C52 C23 C53 C35


    GND 0.1UF 0.1UF 0.1UF 0.1UF GND 0.1UF

    Place small caps close to each MCU pin

    VDD_LV Ballast Transistor LP Internal Reg Cap


    LV_CAP C24 C49
    0.1UF 0.1UF B_CAP E_CAP E_CAP LV_CAP LVDEC_CAP

    C8 4700pF
    Place close C9 C10 C29 C60 C31 C20 C43
    B 2.2UF 2.2UF 0.68uF 0.68uF 0.68uF 0.68uF 1uF B
    to transistor DNP DNP (low (low (low DNP LMK107B7105KA-T
    (low (low ESR) ESR) ESR) (low (low ESR)
    ESR) ESR) ESR)
    C32 C39
    GND 0.1UF 0.1UF (Murata GCM219R71C684KA37)
    GND GND GND
    VDD_LV (1.25V) Decoupling. Place -.1uF
    caps as close as possible to respective 2.2uF caps are Place one 0.68uF cap footprint
    VDD_LV pins DNP. Place close each side of package
    to emitter One of these is DNP to keep overall capacitance less
    than max spec of 3uF. If necessary, these can be
    replaced with 0.47uF caps as long as combined ESR of all
    caps is less than 0.03 Ohms

    Automotive Microcontroller
    Applications
    A
    East Kilbride, Scotland A
    Freescale General Business Use
    Drawing Title:
    MPC5746C 100 BGA Daughter Card
    Page Title:
    MPC5746C MCU Decoupling
    Size Document Number Rev
    B SCH-28701 PDF: SPF-28701 A1

    Date: Tuesday, August 18, 2015 Sheet 3 of 8


    5 4 3 2 1
    5 4 3 2 1

    MPC5746C GPIO 1 of 2
    U1A

    (SD_CD - WKPU19) PA0 H4


    8 PA0 PA0
    (WKPU2 / NMI0) (SW1 & GPIO**) PA1 G3
    ** PA1 is also NMI. Routed to I/O Matrix (WKPU3)
    8
    8
    PA1
    PA2
    (SW2 & GPIO) PA2 F3 PA1
    PA2
    MPC5746C 100 BGA PE2
    C3 PE2 (FR_A_TX_EN)
    PE2 8
    8 PA3
    (MII_RXCLK) PA3 C10 D3 PE3 (FR_A_RX)
    8
    PA3 PE3 PE3
    8 PA4
    (CMP1_13 / IO) PA4 J3 Package 1of3 GPIO Pins1
    D Key to text colours: (SAI_GPIO) PA5 A5 PA4 D
    8 PA5 PA5
    Purple - Comms Physical Interfaces
    8 PA6
    (MLB_GPIO) PA6 B4
    Orange - Other Peripherals and I/O (MII_RXD2) PA7 A10 PA6
    8 PA7 PA7
    Blue - Debug (JTAG & Nexus)
    8 PA8
    (RMII_RXD1) PA8 B10 C2 PE8 (SAI_I2C2_SDA)
    8
    PA8 PE8 PE8
    Black - Clock, Reset and Control
    8 PA9
    (RMII_RXD0) PA9 B9 C1 PE9 (SAI_I2C2_SCL)
    8
    (MII_COL) PA9 PE9 PE9
    RED - I/O Matrix and other functions (eg LED)
    8 PA10 PA10 B8
    Green - I/O Matrix (dedicated) (RMII_RXER) PA11 C8 PA10
    8 PA11 PA11
    8 PA12
    (CMP1_15 / IO) PA12 J7
    (CMP1_14 / IO) PA13 J6 PA12 A9 PE13 (MII_RXD3)
    8 PA13 PA13 PE13 PE13 8
    8 PA14
    (CMP1_12 / IO) PA14 J5
    (CMP1_10 / IO) PA15 J4 PA14 A6 PE15 (USB1_D3)
    8 PA15 PA15 PE15 PE15 8

    8 PB0
    (CAN0_TX) PB0 H2 J8 PF0 (SAI0_MCLK)
    8
    PB0 PF0 PF0
    8 PB1
    (CAN0_RX) PB1 H1
    PB1

    G8 PF5 (SAI0_D0)
    8
    PF5 PF5

    J2 PF8 (GPIO)
    8
    PF8 PF8
    J1 PF9 (SW3 & GPIO) WKPU22
    8
    PF9 PF9
    8 PB10
    (SAI0_SYNC) PB10 K8 K1 PF10 (CMP1_8 / IO)
    8
    C PB10 PF10 PF10 C

    D9 PF14 (RMII_MDIO)
    8
    PF14 PF14
    A8 PF15 (RMII_RXDV)
    8
    PF15 PF15

    8 PC0
    (TDI) PC0 C5 F9 PG0 (RMII_MDC)
    7
    PC0/TDI PG0 PG0
    8 PC1
    (TDO) PC1 C6 F10 PG1 (RMII_TXCLK)
    8
    PC1/TDO PG1 PG1
    B1 PG2 (LED1 & GPIO)
    8
    (eMIOS E1UC_11_H)
    PG2 PG2
    B2 PG3 (LED2 & GPIO)
    8
    (eMIOS E1UC_12_H)
    PG3 PG3

    8 PC5
    (FR_A_TX) PC5 E3
    PC5 H6 PG6 (CLKOUT1 GPIO)
    PG6 PG6 8
    H5 PG7 (CLKOUT0 GPIO)
    8
    PG7 PG7

    8 PC10
    (CAN1_TX) PC10 G2
    (CAN1_RX) PC11 G1 PC10 B6 PG11 (USB1_D5)
    8 PC11 PC11 PG11 PG11 8
    D10 PG12 (MII_TXD2)
    7
    PG12 PG12
    D8 PG13 (MII_TXD3)
    7
    PG13 (USB1_D0) PG13
    A7 PG14 8
    PG14 PG14
    B7 PG15 (USB1_D1)
    8
    PG15 PG15
    B B

    E10 PH0 (RMII_TXD1)


    7
    (HEX2 & GPIO) PH0 (RMII_TXD0) PH0
    8 PD1 PD1 J10 E9 PH1 7
    PD1 PH1 PH1
    C9 PH2 (RMII_TXEN)
    7
    PH2 PH2

    C4 PH9 (TCK)
    8
    TCK/PH9 PH9
    C7 PH10 (TMS)
    8
    TMS/PH10 PH10
    B5 PH12 (USB1_D7)
    8
    PH12 PH12
    8 PD13
    (GPIO & MLB_ST) PD13 G9
    PD13

    8 MCU-RSTx MCU-RSTx F1
    PORSTx A4 RESET
    8 PORSTx PORST
    Automotive Microcontroller
    6 MCU-XTAL MCU-XTAL K5 Applications
    MCU-EXTAL K6 XTAL
    6 MCU-EXTAL EXTAL East Kilbride, Scotland
    A A
    Freescale General Business Use
    Drawing Title:
    SKT BGA 100 TH + MPC574XG-100
    MPC5746C 100 BGA Daughter Card
    Page Title:
    MPC5746C GPIO 1of2
    Size Document Number Rev
    B SCH-28701 PDF: SPF-28701 A1

    Date: Tuesday, August 18, 2015 Sheet 4 of 8


    5 4 3 2 1
    5 4 3 2 1

    MPC5746C GPIO 2 of 2
    U1C

    Key to text colours:


    8 PI0
    (SD_D3) PI0 A1
    Purple - Comms Physical Interfaces (SD_D2) PI1 A2 PI0
    Orange - Other Peripherals and I/O
    8
    8
    PI1
    PI2
    (SD_D1) PI2 B3 PI1
    PI2
    MPC5746C 100 BGA
    Blue - Debug (JTAG & Nexus)
    8 PI3
    (SD_D0) PI3 A3
    Black - Clock, Reset and Control PI3
    RED - I/O Matrix and other functions (eg LED)
    Package 3of3 GPIO Pins2
    D Green - I/O Matrix (dedicated) D

    8 PI14
    (SAI2_D0) PI14 J9
    PI14

    8 PJ0
    (SAI2_SYNC) PJ0 F8
    (SAI2_BCLK) PJ1 H8 PJ0
    8 PJ1 PJ1
    8 PJ2
    (SAI1_D0) PJ2 H7
    PJ2

    C C

    (GPIO) PJ13 K3
    8 PJ13 PJ13
    8 PJ14
    (GPIO) PJ14 K2
    PJ14

    B B

    Automotive Microcontroller
    Applications
    A
    East Kilbride, Scotland A
    Freescale General Business Use
    Drawing Title:
    MPC5746C 100 BGA Daughter Card
    Page Title:
    SKT BGA 100 TH + MPC574XG-100
    MPC5746C GPIO 2of2
    Size Document Number Rev
    B SCH-28701 PDF: SPF-28701 A1

    Date: Tuesday, August 18, 2015 Sheet 5 of 8


    5 4 3 2 1
    5 4 3 2 1

    Clocks

    D D

    Oscillators and External Clock

    EXT-CLK (From SMA connector on main board)


    8 EXT-CLK

    3
    C C
    (Note the 32KHz osc 2
    pins are not bonded C7
    out on the 100 pin 12PF
    1 EXTAL
    package)

    1
    J2
    R8 Y1
    1.0M 40.0MHZ
    DNP
    J1
    4 MCU-EXTAL MCU-EXTAL C6 12PF

    2
    1 XTAL

    4 MCU-XTAL 2
    MCU-XTAL
    GND
    R34 0
    3
    NX8045GB-40.000M-STD-CSJ-1 XTAL
    DNP (Optimised for Automotive, 8pF Load capacitance)
    GND

    B B

    Automotive Microcontroller
    Applications
    A
    East Kilbride, Scotland A
    Freescale General Business Use
    Drawing Title:
    MPC5746C 100 BGA Daughter Card
    Page Title:
    Clocks
    Size Document Number Rev
    B SCH-28701 PDF: SPF-28701 A1

    Date: Tuesday, August 18, 2015 Sheet 6 of 8


    5 4 3 2 1
    5 4 3 2 1

    High Speed Signal Termination

    D D

    Ethernet Termination

    4 PG13 R4 50 PG13-R 8
    PG13 PG13-R
    4 PG12 R6 50 PG12-R 8
    PG12 PG12-R
    4 PH0 R5 50 PH0-R 8
    PH0 PH0-R
    4 PH1 R3 50 PH1-R 8
    PH1 PH1-R
    4 PH2 R1 50 PH2-R 8
    PH2 PH2-R

    4 PG0 R2 50 PG0-R 8
    PG0 PG0-R
    Place resistors as close as possible to MCU

    C C

    B B

    Automotive Microcontroller
    Applications
    A
    East Kilbride, Scotland A
    Freescale General Business Use
    Drawing Title:
    MPC5746C 100 BGA Daughter Card
    Page Title:
    High Speed Signal Termination
    Size Document Number Rev
    B SCH-28701 PDF: SPF-28701 A1

    Date: Tuesday, August 18, 2015 Sheet 7 of 8


    5 4 3 2 1
    5 4 3 2 1

    Daughter Card Connectors (Plugs)


    Notes: Connectors on Main board (Shown for reference)

    - there was no neat way to fit these connectors onto a B sized sheet so unfortunately the sheet
    size has been increased to C so will need to be printed on larger paper.
    - The Crystal Signals are NOT routed via the daughtercard connectors
    - The Specific MCU power pins are not routed via the daughter card however the jumpered MCU
    supply lines are brought up from the main board (see the top pins of the connector on the left)
    - The connector schematic symbols have been horizontally mirrored so they match the main EVB
    D
    connector. This has no bearing on the PCB placement or footprint. Pin1 on the recepticle mates D
    with pin 1 on the plug.

    P21 P20
    (GND) SH2 SH1 (GND) (GND) SH2 SH1 (GND)
    6 EXT-CLK 1 2 (GND) (PM11) 1 2 PC1 4
    EXT-CLK PC1
    (GND) 3 4 (PH7) PH10 3 4 PE3
    4 PH10 PE3 4
    (PB2) 5 6 (PH6) (PH4) 5 6 (PH5)
    (GND) 7 8 (PB3) (PE5) 7 8 PC0
    PC0 4
    (PP11) 9 10 (PH8) (PM12) 9 10 (PQ3)
    (PE6) 11 12 (PP8) (PI5) 11 12 (PC3)
    PI3 13 14 (GND) (PQ0) 13 14 (PE4)
    5 PI3 (PP10) 15 16 (PP3) PC5 15 16 PH9 4
    (PP5) 4 PC5 PH9
    17 18 (PE7) (GND) 17 18 (PL10)
    PI1 19 20 (PK9) PG14 19 20 PE15 4
    5 PI1 4 PG14 PE15
    PI2 21 22 (GND) PH12 21 22 PORSTx 4
    5 PI2 4 PH12 PORSTx
    (PP9) 23 24 (PC12) (PC4) 23 24 PE2
    PE2 4
    (PC13) 25 26 (PK11) (GND) 25 26 (PL4)
    PI0 27 28 (GND) (PL9) 27 28 PG11 4
    5 PI0 (PK10) PG11
    29 30 (PP4) (PC2) 29 30 (PQ1)
    (PC8) 31 32 (PK14) PA6 31 32 (GND)
    4 PA6
    (PK13) 33 34 (PK12) (PL3) 33 34 (PG10)
    (GND) 35 36 (PC9) (PH11) 35 36 (PQ2)
    (PP2) 37 38 (PL0) PA5 37 38 (PL8)
    (PK15) 4 PA5
    39 40 (GND) (PE14) 39 40 (PQ6)
    (PC15) 41 42 (PP1) (PQ4) 41 42 (GND)
    (PP7) 43 44 (GND) PG15 43 44 (PP13)
    4 PG15
    (GND) 45 46 (PC14) (PQ5) 45 46 (PP12)
    (PP6) 47 48 (PJ4) (PQ7) 47 48 (PI4)
    (GND) 49 50 (GND) (PP15) 49 50 (PP14)
    C (PO12) 51 52 (PO11) (GND) 51 52 (GND) C
    (PO7) 53 54 (PO8) (PL12) 53 54 (PL2)
    (PO10) 55 56 (GND) (PL11) 55 56 (PL5)
    (PO4) 57 58 (PH14) (PL6) 57 58 (PL13)
    (PO9) 59 60 (PO13) (PL7) 59 60 (PM0)
    (GND) SH4 SH3 (GND) (GND) SH4 SH3 (GND)

    (GND) SH6 SH5 (GND) (GND) SH6 SH5 (GND)


    (PG5) 61 62 (PO1) (PL15) 61 62 (PL14)
    (PO14) 63 64 (PH13) (PM1) 63 64 (PM9)
    (PD0) 65 66 (PG4) (PM2) 65 66 (PM7)
    (PI7) 67 68 (PH15) (PE12) 67 68 PA10 4
    PA10
    (PP0) 69 70 (PO15) PA11 69 70 PA9 4
    4 PA11 PA9
    (GND) 71 72 (PE10) (GND) 71 72 PA8 4
    (PE1) PA8
    73 74 (PE0) PA7 73 74 PF14 4
    (PI6) 4 PA7 PF14
    75 76 (PO6) PE13 75 76 PG0-R 7
    4 PE13 PG0-R
    (PO5) 77 78 (GND) PF15 77 78 PH2-R
    4 PF15 PH2-R 7
    (PE11) 79 80 PG2 PG1 79 80 (GND)
    PG2 4 4 PG1
    PG3 81 82 PA2 4 7 PH1-R 81 82 PG12-R 7
    4 PG3 PA2 PH1-R PG12-R
    (GND) 83 84 PE9 4 7 PH0-R 83 84 PG13-R 7
    PE9 PH0-R PG13-R
    PE8 85 86 PA1 4 PA3 85 86 (GND)
    4 PE8 PA1 4 PA3
    (GND) 87 88 MCU-RSTx (GND) 87 88 (GND)
    MCU-RSTx 4
    (PG9) 89 90 (PN15) (PM8) 89 90 (PM10)
    PA0 91 92 (PO3) (PH3) 91 92 (PM4)
    4 PA0 (GND) 93 94 (GND) (PM3) 93 94 (PL1)
    PG7 95 96 PG6 4
    (PM6) 95 96 (GND)
    4 PG7 PG6
    (PG8) 97 98 PC11 (PM13) 97 98 (PM5)
    PC11 4
    PC10 99 100 (PO2) (PM14) 99 100 (PI13)
    4 PC10 (GND) 101 102 (GND) (GND) 101 102 (PB12)
    (GND) 103 104 PB0 4 4 PD13 103 104 (PD9)
    PB0 PD13
    PB1 105 106 (PK1) (PD12) 105 106 (PI12)
    4 PB1 (PK2) 107 108 (PF12) (PI11) 107 108 (PB7)
    (GND) 109 110 (GND) (PD10) 109 110 (PI15)
    (PF13) 111 112 (GND) (GND) 111 112 (GND)
    (PK4) 113 114 (GND) (MLB_DAT) 113 114 (MLB_CN)
    (PK6) 115 116 (PK3) (MLB_SIG) 115 116 (MLB_CP)
    (PK8) 117 118 (PK5) (MLB_CLK) 117 118 (GND)
    (PN14) 119 120 (PF11) (GND) 119 120 (GND)
    B B
    (GND) SH8 SH7 (GND) (GND) SH8 SH7 (GND)
    (MLB_SP_
    (GND) SH10 SH9 (GND) (GND) SH10 SH9 (GND)
    PF9 121 122 (PK7) (MLB_SN) 121 122 (MLB_DN)
    4 PF9
    PA14 123 124 (PC6) (MLB_SP) 123 124 (MLB_DP)
    4 PA14 (PN13) 125 126 PF8 4
    (GND) 125 126 (GND)
    PF8
    (GND) 127 128 (GND) (GND) 127 128 (GND)
    (PN11) 129 130 (PC7) (PD7) 129 130 PI14 5
    PI14
    (PJ11) 131 132 (PN12) (PJ5) 131 132 (PJ7)
    (PJ10) 133 134 (PJ12) PJ0 133 134 (PD11)
    (PK0) 5 PJ0
    135 136 (GND) (GND) 135 136 (PJ6)
    (PJ9) 137 138 (PJ15) (PD5) 137 138 (PD6)
    (PN9) 139 140 (GND) (PB5) 139 140 (PD2)
    (GND) 141 142 (PN8) (PB11) 141 142 (PD3)
    PJ13 143 144 PF10 4 4 PD1 143 144 (PJ8)
    5 PJ13 PF10 PD1
    PA4 145 146 (PN7) PJ1 145 146 (GND)
    4 PA4 5 PJ1
    (GND) 147 148 PJ14 5
    (GND) 147 148 (PB6)
    PJ14
    (PN10) 149 150 (GND) (PD8) 149 150 (PD0)
    PA15 151 152 (PN4) (PI9) 151 152 (PI10)
    4 PA15 (PN3) 153 154 PA13 4 PF5 153 154 (GND)
    (PN6) PA13 4 PF5
    155 156 (GND) (PB4) 155 156 (PD4)
    (GND) 157 158 (PN5) PJ2 157 158 (PF6)
    (PN0) 5 PJ2
    159 160 PA12 4
    (PJ3) 159 160 (PN1)
    PA12
    PB10 161 162 (PN2) (GND) 161 162 (GND)
    4 PB10 (GND) 163 164 (PF1) (GND) 163 164 (PF4)
    (GND) 165 166 PF0 (PF2) 165 166 (PF7)
    PF0 4
    (GND) 167 168 (GND) (PM15) 167 168 (PF3)
    (GND) 169 170 (GND) (GND) 169 170 (GND)
    MCU_5V0_S 171 172 MCU_3V3_S (GND) 171 172 (GND)
    2 MCU_5V0_S MCU_3V3_S 2
    173 174 DC_5V0_S 173 174 DC_3V3_S
    TPV1 TPV4
    175 176 175 176
    MCU_1V25_L 177 178 MCU_3V3_L DC_P12V 177 178 DC_3V3_L
    2 MCU_1V25_L MCU_3V3_L 2 TPV3 TPV5
    179 180 MCU_5V0_L DC_1V25_L 179 180 DC_5V0_L
    MCU_5V0_L 2 TPV2 TPV6
    (GND) SH12 SH11 (GND) SH12 SH11

    PLUG 180 PLUG 180

    A
    Plug Plug A

    GND GND
    GND GND
    Automotive Microcontroller
    Applications
    East Kilbride, Scotland
    Freescale General Business Use
    Drawing Title:
    MPC5746C 100 BGA Daughter Card
    Page Title:
    Daughter Card Connectors (Plugs)
    Size Document Number Rev
    C SCH-28701 PDF: SPF-28701 A1

    Date: Tuesday, August 18, 2015 Sheet 8 of 8


    5 4 3 2 1
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    © 2015 Freescale Semiconductor, Inc.

    Document Number: MPC5748GEVBUG


    Rev. 0
    08/2015

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