thvd4411 Datasheet

THVD4411
SLLSFR9 – APRIL 2024
THVD4411 Multiprotocol (RS-232, RS-422, RS485) Transceiver with Integrated 120Ω

Switchable Termination Resistor and IEC-ESD Protection
1 Features 3 Description
• Meets or exceeds the requirements of the TIA/ THVD4411 is a highly integrated and robust
EIA-485A and TIA/EIA-232F standards multiprotocol transceiver supporting RS-232, RS-422
• 1 transmitter, 1 receiver for RS-232 and RS-485 physical layers. The device has one
• 1 transmitter, 1 receiver for RS-485 transmitter and one receiver to enable 1T1R RS-232
• On-chip switchable 120Ω termination resistor for port. Device also integrates one transmitter and one
RS-485 mode receiver to enable half and full duplex RS-485 port.
• Integrated charge-pump for RS-232 signaling MODE selection pins enable shared bus and logic
• 3V to 5.5V supply voltage pins for the protocols to share a common single
• 1.65V to 5.5V supply for logic data and control connector. Integrated termination for RS-485 bus pins
signals and for RS-232 receiver inputs are provided so no
• RS-485 differential output exceeds 2.1V for external components are needed to realize a fully-
PROFIBUS compatibility with 5V supply functional communication port. These devices have
• Large output swing (typical ± 9V) for RS-232 mode slew rate select feature that enables them to be
• SLR Pin Selectable Data Rates: used at two maximum speeds based on the SLR pin
– RS-232 3T5R mode: 250kbps and 1Mbps setting.
– RS-485 half-duplex and full-duplex mode: These devices feature integrated Level 4 IEC ESD
500kbps and 20Mbps protection, eliminating the need for external system-
• Bus I/O protection level protection components. In addition, the RS-485
– ±16kV HBM ESD receiver fail-safe feature drives logic high on received
– ±8kV IEC 61000-4-2 contact and ±15kV air-gap logic output when the bus inputs are open or shorted
discharge together or when the bus is idle. Shutdown mode
– ±4kV IEC 61000-4-4 fast transient burst consumes ultra-low current (10µA typical) in power-
• Shutdown pin for extremely low current sensitive applications. The device needs 3V to 5.5V
consumption (10µA typical) in disabled state supply that powers the charge pump for RS-232
• Glitch-free power-up/down for hot plug-in capability and the drivers and receivers for both RS-232 and
• 1/8 unit load (up to 256 bus nodes) for RS-485 RS-485. A separate logic supply VIO (1.65V to 5.5V)
• Open, short, and idle bus failsafe for RS-485 enables interface with low level microcontrollers.
receiver
• Bus short-circuit protection, Thermal shutdown Package Information
• Extended ambient temperature range: -40°C to PART NUMBER PACKAGE(1) PACKAGE SIZE(2)
125°C THVD4411 VQFN (24) 4mm × 4mm
• Space-saving thermally efficient 4mm x 4mm
(1) For more information, see Section 11.
VQFN-24 package (2) The package size (length × width) is a nominal value and
includes pins, where applicable.
2 Applications
Dual Protocol
• Industrial PC Transceiver
• Factory automation and control

• HVAC systems
• Building automation RS-232
Shared Connector
• Point-of-sale terminals MCU

UART1
RS-485/422
DB9
• Grid infrastructure RS-232

OR
• Industrial Transport RS-485 Interface
THVD4411 Simplified Schematic
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
THVD4411
SLLSFR9 – APRIL 2024 www.ti.com
Table of Contents
1 Features............................................................................1 7 Detailed Description......................................................23
2 Applications..................................................................... 1 7.1 Overview................................................................... 23
3 Description.......................................................................1 7.2 Functional Block Diagram......................................... 23
4 Pin Configuration and Functions...................................3 7.3 Feature Description...................................................24
5 Specifications.................................................................. 4 7.4 Device Functional Modes..........................................27
5.1 Absolute Maximum Ratings........................................ 4 8 Application and Implementation.................................. 32
5.2 ESD Ratings .............................................................. 4 8.1 Application Information .........................................32
5.3 ESD Ratings [IEC]...................................................... 4 8.2 Typical Application.................................................... 32
5.4 Recommended Operating Conditions.........................5 8.3 Power Supply Recommendations.............................37
5.5 Thermal Information....................................................5 8.4 Layout....................................................................... 37
5.6 Power Dissipation....................................................... 6 9 Device and Documentation Support............................39
5.7 Electrical Characteristics.............................................7 9.1 Device Support......................................................... 39
5.8 Switching Characteristics_RS-485_500kbps............ 10 9.2 Receiving Notification of Documentation Updates....39
5.9 Switching Characteristics_RS-485_20Mbps.............10 9.3 Support Resources................................................... 39
5.10 Switching Characteristics, Driver_RS232............... 11 9.4 Trademarks............................................................... 39
5.11 Switching Characteristics, Receiver_RS232........... 11 9.5 Electrostatic Discharge Caution................................39
5.12 Switching Characteristics_MODE switching........... 12 9.6 Glossary....................................................................39
5.13 Switching Characteristics_RS-485_Termination 10 Revision History.......................................................... 39
resistor.........................................................................13 11 Mechanical, Packaging, and Orderable
5.14 Typical Characteristics............................................ 14 Information.................................................................... 39
6 Parameter Measurement Information.......................... 17
2 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated
Product Folder Links: THVD4411

THVD4411
www.ti.com SLLSFR9 – APRIL 2024
4 Pin Configuration and Functions
24 C2+
23 C1+
C1-
C2-
VCC
V-
22
21
20
19
18
R1
V+ 1
17
R2
Connector side
Vcc 2
4x4 mm
16
GND
Logic side
L1 3
VQFN-24
(RGE)
15
L2 4 GND
SLR 5
14
R3
DIR 6
13
7 R4
9 10 11 12
8
TERM_RX
TERM_TX
MODE0
MODE1
VIO
SHDN
Figure 4-1. 24-Pin VQFN Package (RGE)
Top View
Table 4-1. Pin Functions

NAME NO. TYPE DESCRIPTION
V+ 1 Positive charge pump rail
VCC 2 P 3V to 5.5V supply voltage
L1 3 O Logic output (RS-232/RS-485)
L2 4 I Logic input (RS-232/RS-485)
Slew rate control, internal pull-down. SLR=H enables slow speed (250kbps for RS-232, 500kbps for
SLR 5 I
RS-485)
DIR 6 I RS-485 TX/RX enable/disable. Internal pull-down
MODE0 7 I
MODE control pins
MODE1 8 I
VIO 9 P 1.65V to 5.5V logic supply voltage
TERM_TX 10 I 120Ω Termination enable/disable across R1/R2 terminals. Internal Pull down
TERM_RX 11 I 120Ω Termination enable/disable across R3/R4 terminals. Internal Pull down
SHDN 12 I Device enable/disable. Internal pull-down
R4 13 I/O RS-485 inverting receiver input (B)
R3 14 I/O RS-232 driver output or RS-485 non-inverting receiver input (A)
GND(1) 15, 16 G Ground
R2 17 I/O RS-232 receiver input or RS-485 bus pin (Y or A)
R1 18 I/O RS-485 bus pin (Z or B)
VCC 19 P 3V to 5.5V supply voltage
V- 20 Negative charge pump rail
C2- 21 Negative terminal of charge pump capacitor
C1- 22 Negative terminal of charge pump capacitor
C1+ 23 Positive terminal of charge pump capacitor
C2+ 24 Positive terminal of charge pump capacitor
(1) GND pins 15 and 16 must be grounded on PCB.
Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 3

THVD4411
5 Specifications
5.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Bus supply voltage VCC to GND –0.5 6 V
Logic supply voltage VIO to GND –0.5 VCC + 0.2 V
Charge pump positive-output supply voltage V+ to GND –0.3 14 V
Charge pump negative-output supply voltage V- to GND 0.3 -14 V
Charge pump capacitor terminals C1+ to GND VCC - 0.3 V+ V
Charge pump capacitor terminals C2+ to GND -0.3 V+ V
Charge pump capacitor terminals C1- to GND -0.3 VCC V
Charge pump capacitor terminals C2- to GND V- -0.3 V
Voltage at any bus pin (R1, R2, R3, R4) with respect
Bus voltage –16 16 V
to GND
(R1-R2) or (R2-R1), (R3-R4) or (R4-R3) with
Differential bus voltage -22 22 V
termination disbled
(R1-R2) or (R2-R1), (R3-R4) or (R4-R3) with
Differential bus voltage RS485 mode -6 6 V
termination enabled
Range at any logic pin (L2, SLR, SHDN, TERM_TX,
Input voltage –0.3 VIO + 0.2 V
TERM_RX, MODE0, MODE1, DIR)
Receiver output current IO ( L1) –8 8 mA
Storage temperature Tstg –65 150 °C
Junction temperature TJ -40 170 °C
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions.
If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
5.2 ESD Ratings

VALUE UNIT
Bus terminals (R1, R2, R3,
±16,000 V
Human-body model (HBM), per ANSI/ESDA/ R4) and GND
V(ESD) Electrostatic discharge JEDEC JS-001(1) All pins except bus terminals
±4,000 V
and GND
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1,500 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
5.3 ESD Ratings [IEC]

VALUE UNIT
Electrostatic discharge, Device Contact discharge, per IEC 61000-4-2 ±8,000
in powered or unpowered state,
In powered condition- either Bus terminals (R1, R2, R3,
V(ESD) V
shutdown or RS232 or RS485 Air-gap discharge, per IEC 61000-4-2 R4) and GND ±15,000
mode, on chip termination ON or
OFF, loopback ON or OFF
Electrical fast transient in RS485 Bus terminals (R1, R2, R3,
V(EFT) Per IEC 61000-4-4 ±4,000 V
HD or FD mode R4)

THVD4411
5.4 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VCC Supply voltage 3 5.5 V
VIO I/O supply voltage 1.65 VCC V
VI (RS-485) Input voltage at any bus terminal (R1, R2, R3, R4) in RS-485 mode(1) –7 12 V
Differential input voltage in RS-485 mode [ (R1-R2) or (R2-R1), (R3-R4) or (R4-
VID -12 12 V
R3) ]
VI (RS-232) Receiver input voltage in RS-232 mode -15 15 V
High-level input voltage (L2, SLR, SHDN, TERM_TX, TERM_RX, MODE0,
VIH 0.7*VIO VIO V
MODE1, DIR inputs)
Low-level input voltage (L2 SLR, SHDN, TERM_TX, TERM_RX, MODE0,
VIL 0 0.3*VIO V
MODE1, DIR inputs)
IO Output current, driver in RS-485 mode –60 60 mA
IOR Output current, receiver (L1) VIO = 1.8 V or 2.5 V –2 2 mA
IOR Output current, receiver (L1) VIO = 3.3 V or 5 V –4 4 mA
RL Differential load resistance in RS-485 mode 54 60 Ω
SLR = VIO 500 kbps
Signaling rate in RS-485 mode
SLR = GND or floating 20 Mbps
1/tUI
SLR = VIO 250 kbps
Signaling rate in RS-232 mode
SLR = GND or floating 1 Mbps
TA (2) Operating ambient temperature -40 125 °C
(1) The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet.
(2) Operation is specified for internal (junction) temperatures upto 150°C. Self-heating due to internal power dissipation should be
considered for each application. Maximum junction temperature is internally limited by the thermal shut-down (TSD) circuit which
disables the driver and receiver when the junction temperature reaches 170°C.
5.5 Thermal Information

THVD4411
THERMAL METRIC(1) RGE (QFN) UNIT
24 PINS
RθJA Junction-to-ambient thermal resistance 32.3 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 27.5 °C/W
RθJB Junction-to-board thermal resistance 11.6 °C/W
ψJT Junction-to-top characterization parameter 0.3 °C/W
ψJB Junction-to-board characterization parameter 11.5 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 2.8 °C/W
(1) For more information about traditional and new thermalmetrics, see the Semiconductor and ICPackage Thermal Metrics application
report.

THVD4411
5.6 Power Dissipation

PARAMETER TEST CONDITIONS Typical Max UNIT
Unterminated, TERM_TX = L, SLR = H 500 kbps 160 200
Driver outputs externally shorted to
TERM_RX = L mW
receiver inputs, MODE1, MODE0 = 11, SLR = L 20Mbps 310 410
PD (RS-485) DIR = VIO,
VIO = VCC = 5.5 V, TA = 125 °C, SLR = H 500 kbps 430 500
L2 = square wave 50% duty TERM_TX = TERM_RX = VIO mW
SLR = L 20Mbps 485 575
VCC = VIO = 5.5V, R3 bus line loaded
with 3 kΩ, R3 load cap = 1000 pF, L2 SLR = L 1 Mbps 300 480 mW
RS-232 mode with MODE1, MODE0 = toggling
PD (RS-232)
01 V = V = 5.5V, R3 bus line loaded
CC IO
with 3 kΩ, R3 load cap = 2500 pF, L2 SLR = H 250 kbps 170 200 mW
toggling

THVD4411
5.7 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted). All typical values are at 25°C and supply voltage of VCC
= 5 V, VIO = 3.3 V , unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Driver_RS-485
RL = 60 Ω, –7 V ≤ Vtest ≤ 12 V (See ) 1.5 2 V
RL = 60 Ω, –7 V ≤ Vtest ≤ 12 V, 4.5 V ≤ VCC ≤ 5.5 V (See ) 2.1 3 V
Driver differential output
|VOD| RL = 100 Ω (See ) 2 2.5 V
voltage magnitude
RL = 54 Ω, 4.5 V ≤ VCC ≤ 5.5 V (See ) 2.1 3.3 V
RL = 54 Ω (See ) 1.5 3.3 V
Change in magnitude of
Δ|VOD| RL = 54 Ω or 100 Ω (See ) –50 50 mV
differential output voltage
Common-mode output
VOC RL = 54 Ω or 100 Ω (See ) VCC/2 3 V
voltage
Change in steady-state
ΔVOC(SS) common-mode output RL = 54 Ω or 100 Ω (See ) –50 50 mV
voltage
Short-circuit output current
IOS DIR = VIO, -7 V ≤ (VR2 or VR1) ≤ 12 V, or R1 shorted to R2 –250 250 mA
(bus terminals)
Driver High impedance MODE1, MODE0 = 11 , TERM_TX = GND, DIR = GND, VCC = GND or 5.5V,
-125 125 µA
output leakage current on VO = -7V, +12V
IOZD
R1 and R2 in Full duplex MODE1, MODE0 = 11, TERM_TX = VIO, DIR = GND, VCC = 5.5V, VO = -7V,
mode - 325 350 µA
+12V
Receiver_RS-485
Bus input current Half and full duplex modes, DIR = 0 V, VCC and VIO = VI = 12 V 75 125 μA
II
(termination disabled) 0 V or 5.5 V VI = –7 V –125 –70 μA
Receiver bus input leakage
Full duplex mode, VCC and VIO = 5.5 V, TERM_RX =
IRXT current with termination VI = - 7 to 12 V -325 325 μA
VIO
enabled
Positive-going input
VTH+ - 70 - 40 mV
threshold voltage(1)
Negative-going input Over common-mode range of - 7 V to 12 V
VTH- –200 –150 mV
threshold voltage(1)
VHYS Input hysteresis 25 80 mV
Input differential
CA,B Measured between R3 and R4, f = 1 MHz 20 pF
capacitance
VOH Output high voltage, L1 pin IOH = –4 mA, VIO = 3 to 3.6 V or 4.5 V to 5.5 V VIO – 0.4 VIO – 0.2 V
VOL Output low voltage, L1 pin IOL = 4 mA, VIO = 3 to 3.6 V or 4.5 V to 5.5 V 0.2 0.4 V
VOH Output high voltage, L1 pin IOH = –2 mA, VIO = 1.65 to 1.95 V or 2.25 V to 2.75 V VIO – 0.4 VIO – 0.2 V
VOL Output low voltage, L1 pin IOL = 2 mA, VIO = 1.65 to 1.95 V or 2.25 V to 2.75 V 0.2 0.4 V
Output high-impedance
IOZ VO = 0 V or VIO, DIR = VIO, MODE1, MODE0= 10 (half duplex mode) –2 2 µA
current, L1 pin
Driver_RS-232
VOH High-level output voltage DOUT (R3) at RL = 3 kΩ to GND, DIN (L2) = GND; VCC = 3 V to 3.6 V 5 5.5 7 V
VOL Low-level output voltage DOUT (R3) at RL = 3 kΩ to GND, DIN (L2) = VIO ; VCC = 3 V to 3.6 V –7.3 –5.5 -5 V
VOH High-level output voltage DOUT (R3) at RL = 3 kΩ to GND, DIN (L2) = GND; VCC = 4.5 V to 5.5 V 7.8 9 11 V
VOL Low-level output voltage DOUT (R3) at RL = 3 kΩ to GND, DIN (L2) = VIO ; VCC = 4.5 V to 5.5 V –11.3 –9 -7.8 V
Short-circuit output current VCC = 3.6 V VO = 0 V

IOS (2) ±35 ±60 mA
VCC = 5.5 V VO = 0 V
VCC = 0 V, V+ = 0 V, and V– =
ro Output resistance on R3 VO = ±2 V 300 10M Ω
0V
Output leakage current on VO = ±12 V VCC = 3 to 3.6 V ±125 μA

Ioff SHDN = GND
R3 VO = ±10 V VCC = 4.5 to 5.5 V ±125 μA
Receiver_RS-232

THVD4411
5.7 Electrical Characteristics (continued)

IOH = –4 mA, VIO = 3 to 3.6 V or 4.5 V to 5.5 V VIO – 0.5 VIO – 0.2 V
VOH High-level output voltage L1 VIO –
IOH = –2 mA, VIO = 1.65 to 1.95 V or 2.25 V to 2.75 V V – 0.2 V
0.46 IO
IOL = 4 mA, VIO = 3 to 3.6 V or 4.5 V to 5.5 V 0.4 V
VOL Low-level output voltage L1
IOL = 2 mA, VIO = 1.65 to 1.95 V or 2.25 V to 2.75 V 0.4 V
Positive-going input VCC = 3.3 V 1.6 2.4 V
VIT+ threshold voltage on
RS-232 receiver inputs (R2) VCC = 5 V 1.9 2.4 V
Negative-going input VCC = 3.3 V 0.6 1.1 V

VIT– threshold voltage on
RS-232 receiver inputs (R2) VCC = 5 V 0.8 1.4 V
Input hysteresis on receiver

Vhys 0.4 0.5 V
inputs (VIT+ – VIT–)
Output leakage current on
Ioff SHDN = 0 V ±0.05 ±10 μA
receiver output pins L1
Input resistance on receiver
rI -15 V ≤ VI ≤ 15 V 3 5 7 kΩ
input pins
Thermal Protection
Thermal shutdown
TSHDN Temperature rising 150 170 °C
threshold
Thermal shutdown
THYS 15 °C
hysteresis
Supply
UVVCC Rising under-voltage
2.5 2.7 V
(rising) threshold on VCC
UVVCC Falling under-voltage
1.9 2.1 V
(falling) threshold on VCC
UVVCC(hys Hysteresis on under-voltage
100 400 mV
) of VCC
UVVIO Rising under-voltage
1.5 1.6 V
(rising) threshold on VIO
UVVIO Falling under-voltage
1.2 1.4 V
(falling) threshold on VIO
Hysteresis on under-voltage
UVVIO(hys) 85 100 mV
of VIO
VCC = 4.5 V to 5.5 V, SHDN = GND, All other logic input pins floating, no
5 20 µA
load on bus, TA ≤ 125 ℃
VCC = 3 V to 3.6 V, SHDN = GND, All other logic input pins floating, no load
3 15 µA
Supply current in shutdown on bus, TA ≤ 125 ℃
ICC_SHDN
mode VCC = 4.5 V to 5.5 V, SHDN = GND, All other logic input pins floating, no
5 15 µA
load on bus, TA ≤ 105 ℃
VCC = 3 V to 3.6 V, SHDN = GND, All other logic input pins floating, no load
3 10 µA
on bus, TA ≤ 105 ℃
Logic supply current in
IIO_SHDN VIO = 1.65 V to 5.5 V, SHDN = GND, All other logic input pins floating 2 µA
shutdown mode
Driver and receiver enabled, DIR = VIO, MODE1,
No load 1.7 3.4 mA
Supply current (quiescent), MODE0 = 11 (Full duplex)
VCC = 4.5 V to 5.5 V
Driver enabled, receiver disabled, DIR = VIO,
ICC_485 TERM_RX, TERM_TX= No load 1.3 2.8 mA
MODE1, MODE0 = 10 (Half duplex)
Floating or low, SLR = X
Driver disabled, receiver enabled, DIR = GND,
No load 0.8 1.5 mA
Driver and receiver enabled, DIR = VIO, MODE1,
No load 1.5 2.8 mA
MODE0 = 11 (Full duplex)
Supply current (quiescent),
VCC = 3 V to 3.6 V Driver enabled, receiver disabled, DIR = VIO,
ICC_485 No load 1 2.3 mA
TERM_RX, TERM_TX= MODE1, MODE0 = 10 (Half duplex)
Floating or low, SLR = X
Driver disabled, receiver enabled, DIR = GND,
No load 0.7 1.3 mA

THVD4411
5.7 Electrical Characteristics (continued)

Logic supply current Driver disabled, Receiver enabled, SLR = GND, DIR
No load 7 17 µA
(quiescent), VIO = 3 to 3.6 = GND; MODE1, MODE0 = 10 (half duplex)
IIO_485 V
TERM_RX, TERM_TX= Driver disabled, Receiver enabled, SLR = VIO; DIR =
No load 8 21 µA
Floating GND; MODE1, MODE0 = 10 (half duplex)
Supply current in RS-485 Driver enabled with termination ON; MODE1, DIR= VIO, TERM_TX
ICCDT_485 38 50 mA
driver termination mode MODE0 = 11 (full duplex) = VIO
Supply current in RS-485 Receiver enabled with termination ON; MODE1, DIR = GND,
ICCRT_485 1 1.5 mA
receiver termination mode MODE0 = 11 (full duplex) TERM_RX = VIO
Supply current in RS-232 MODE1, MODE0 = 01, SHDN = VIO; other logic
ICC_RS232 No load 2.5 3.8 mA
mode inputs floating
On-Chip termination resistor_RS-485
120 Ω termination across
MODE1, MODE0 = 11 (Full duplex) or 10 (half duplex); DIR = GND,
RTERM_TX Driver output R1/R2 102 120 138 Ω
TERM_TX = VIO, VR2R1 = 2 V, VR1 = -7 V, 0 V, 10 V
terminals
120 Ω termination across
MODE1, MODE0 = 11 (Full duplex); TERM_RX = VIO, VR3R4 = 2 V, VR4 = -7
RTERM_RX receiver output R3/R4 102 120 138 Ω
V, 0 V, 10 V
terminals
Logic
Input current (L2, DIR,
SHDN, SLR, TERM_TX,
IIN 1.65 V ≤ VIO ≤ 5.5 V, 0 V ≤ VIN ≤ VIO -20 5 µA
TERM_RX, MODE1,
MODE0)
Rising threshold: logic
VIT+(IN) 0.6*VIO 0.7*VIO V
inputs
Falling threshold: logic 1.65 V ≤ VIO ≤ 5.5 V
VIT-(IN) 0.3*VIO 0.4*VIO V
inputs
VIN(HYS) Input threshold: logic inputs 0.1*VIO 0.2*VIO V
(1) Under any specific conditions, VTH+ is assured to be at least VHYS higher than VTH–.
(2) Short-circuit durations should be controlled to prevent exceeding the device absolute power dissipation ratings, and not more than one
output should be shorted at a time.

THVD4411
5.8 Switching Characteristics_RS-485_500kbps

500-kbps (with SLR = VIO) over recommended operating conditions. All typical values are at 25°C and supply voltage of VCC
= 5 V , VIO = 3.3 V, unless otherwise noted. (1)
Driver
VCC = 3 to 3.6 V, Typical
210 300 600 ns
at 3.3V
tr, tf Differential output rise/fall time
VCC = 4.5 to 5.5 V,
250 300 600 ns
Typical at 5 V
250 450 ns
at 3.3V
tPHL, tPLH Propagation delay RL = 54 Ω, CL = 50 pF
VCC = 4.5 to 5.5 V,
250 450 ns
Typical at 5 V
2 15 ns
at 3.3V
tSK(P) Pulse skew, |tPHL – tPLH|
VCC = 4.5 to 5.5 V,
2 15 ns
Typical at 5 V
MODE1, MODE0 = 10 (half
tPHZ, tPLZ Disable time 80 150 ns
duplex) or 11 (full duplex)
MODE1, MODE0 = 11 (full
tPZH, tPZL Enable time 200 650 ns
duplex): receiver enabled
Receiver
tr, tf Output rise/fall time 13 20 ns
tPHL, tPLH Propagation delay CL = 15 pF See 700 1200 ns
tSK(P) Pulse skew, |tPHL – tPLH| 10 50 ns
tPHZ, tPLZ Disable time in half duplex mode 30 80 ns
MODE1, MODE0 = 10, TERM_TX
tPZH(1) See 60 155 ns
Enable time in half duplex mode = VIO
tPZL(1) 450 1250 ns
tPZH(2), Enable time from shutdown with
DIR = 0 V; MODE1, MODE0 = 11 See 7 16 μs
tPZL(2) TX disabled in full duplex mode
(1) A, B are RX input, Y/Z are driver output terminals in Full duplex mode
5.9 Switching Characteristics_RS-485_20Mbps

20-Mbps (SLR = GND) over recommended operating conditions. All typical values are at 25°C and supply voltage of VCC = 5
V, VIO = 3.3 V. (1)
Driver
5 10 15 ns
at 3.3 V
tr, tf Differential output rise/fall time
VCC = 4.5 to 5.5 V,
5 10 15 ns
Typical at 5 V
VIO = 1.65 V to 1.95V 14 25 58 ns
tPHL, tPLH Propagation delay RL = 54 Ω, CL = 50 pF
VIO = 3 V to 3.6 V 9 20 46 ns
1 3.5 ns
at 3.3 V
tSK(P) Pulse skew, |tPHL – tPLH|
VCC = 4.5 to 5.5 V,
1 3.5 ns
Typical at 5 V
MODE1, MODE0 = 10 (half
tPHZ, tPLZ Disable time 11 65 ns
duplex) or 11 (full duplex)
See
MODE1, MODE0 = 11 (full
tPZH, tPZL Enable time 8 80 ns
duplex): receiver enabled
Receiver
tr, tf Output rise/fall time 5 10 ns
tPHL, tPLH Propagation delay CL = 15 pF See 40 70 ns
tSK(P) Pulse skew, |tPHL – tPLH| 10 ns

THVD4411
5.9 Switching Characteristics_RS-485_20Mbps (continued)

20-Mbps (SLR = GND) over recommended operating conditions. All typical values are at 25°C and supply voltage of VCC = 5
V, VIO = 3.3 V. (1)
tPHZ, tPLZ Disable time in half duplex mode 20 80 ns
MODE1, MODE0 = 10, TERM_TX
tPZH(1), See
Enable time in half duplex mode = VIO 50 160 ns
tPZL(1)
tPZH(2), Enable time from shutdown with
DIR = 0 V; MODE1, MODE0 = 11 See 4 15 μs
tPZL(2) TX disabled in full duplex mode
(1) A, B are RX input, Y/Z are driver output terminals in Full duplex mode.
5.10 Switching Characteristics, Driver_RS232

over recommended ranges of supply voltage and operating free-air temperature(unless otherwise noted)(1)
PARAMETER TEST CONDITIONS MIN TYP(2) MAX UNIT
250 kbps
RL = 3 kΩ
Maximum data rate CL = 2500 pF 250 500 kbps
One DOUT switching
tPHL,
Transmitter propagation delay 0.8 2 µs
tPHL RL = 3 kΩ to 7 kΩ CL = 150 pF to 2500 pF
tsk(p) Transmitter Pulse skew(3) 100 600 ns
VCC = 3.3 V ± 10%, 5 V ± 10% , CL = 150 pF to 1000 pF 6 30

SR(tr) Slew rate, transition region V/µs
RL = 3 kΩ to 7 kΩ, CL = 150 pF to 2500 pF 4 30
1 Mbps
RL = 3 kΩ CL = 250 pF, VCC = 3 to 3.6 V 1000 kbps

Maximum data rate
One DOUT switching, CL = 1000 pF, VCC = 4.5 to 5.5 V 1000 kbps
tPLH,
Transmitter propagation delay CL = 150 pF to 1000 pF 300 800 ns
tPHL RL = 3k to 7 kΩ,
tsk(p) Pulse skew(3) 25 150 ns
RL = 3k to 7 kΩ, VCC = 4.5 V to
CL = 150 pF to 1000 pF 18 150 V/µs
5.5 V
SR(tr) Slew rate, transition region
RL = 3k to 7 kΩ, VCC = 3 V to
CL = 150 pF to 1000 pF 15 150 V/µs
3.6 V
(1) Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V + 0.3 V; VCC = 5 V ± 0.5 V.
(2) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
(3) Pulse skew is defined as|tPLH – tPHL| of each channel of the samedevice.
5.11 Switching Characteristics, Receiver_RS232

over recommended ranges of supply voltage and operating free-air temperature (unlessotherwise noted)(1)
250 kbps
tPLH Propagation delay time, low- to high-level output 150 550 ns
CL = 150 pF,
tPHL Propagation delay time, high- to low-level output 150 550 ns
CL = 15 pF,
CL = 150 pF, 20 50 ns
Rise/fall time (receiver buffer output), VIO = 3 to 5.5 V
tR_232, CL = 15 pF, 5 10 ns
tF_232 CL = 150 pF, 40 90 ns
Rise/fall time (receiver buffer output), VIO = 1.65 to
2.75 V CL = 15 pF, 10 20 ns
ten Output enable time 6 14 us
CL = 150 pF, RL = 3 kΩ,
tdis Output disable time 100 200 ns
CL = 150 pF, 50 135 ns
tsk(p) Pulse skew(3)
CL = 15 pF, 50 135 ns

THVD4411
5.11 Switching Characteristics, Receiver_RS232 (continued)

over recommended ranges of supply voltage and operating free-air temperature (unlessotherwise noted)(1)
1 Mbps
CL = 150 pF,
CL = 15 pF,
CL = 150 pF, 20 50 ns
Rise/fall time (receiver buffer output), VIO = 3 to 5.5 V
tR_232, CL = 15 pF, 5 10 ns
tF_232 CL = 150 pF, 40 90 ns
Rise/fall time (receiver buffer output), VIO = 1.65 to
2.75 V CL = 15 pF, 10 20 ns
ten Output enable time 6 14 us
CL = 150 pF, RL = 3 kΩ,
tdis Output disable time 100 200 ns
CL = 150 pF, 50 125 ns
tsk(p) Pulse skew(3)
CL = 15 pF, See Figure 18 in spec sheet 50 125 ns
(1) Test conditions are C1–C4 = 0.1 μF atVCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF atVCC = 5 V ± 0.5 V.
(2) All typical values are at VCC = 3.3 V orVCC = 5 V, and TA = 25°C.
(3) Pulse skew is defined as |tPLH -tPHL| of each channel of the same device.
5.12 Switching Characteristics_MODE switching

Parameters over recommended operating conditions. All typical values are at 25°C and supply voltage of VCC = 5 V , VIO =
3.3 V, unless otherwise noted.
MODE1, MODE0 = 00 or floating; SHDN = GND to
VIO; rest of logic input pins floating, VCC = 4.5 V to 5.5
0.05 0.1 ms
V Time from 50% of rising SHDN to charge pump V-
Time from Shutdown to supply reaching -8 V;
tRDY
RS-232 ready MODE1, MODE0 = 00 or floating; SHDN = GND to
VIO; rest of logic input pins floating, VCC = 3 V to 3.6
0.1 0.4 ms
V Time from 50% of rising SHDN to charge pump V-
supply reaching -5 V;
L2 = Vio, MODE1 from GND to Vio, MODE0 = Vio;
Time to switch from RS-232
SHDN = DIR = VIO; SLR, TERM_TX, TERM_RX=
tR2_R4 1T1R mode to RS-485 Full 0.04 0.1 µs
floating; Time from 50% of MODE1 rising edge to R2
duplex mode
reaching 2V
L2 = Vio, MODE1 from Vio to GND, MODE0 = Vio;
Time to switch from RS-485
SHDN = DIR = VIO; SLR, TERM_TX, TERM_RX=
tR4_R2 full dupplex mode to RS-232 2 2.1 µs
floating; Time from 50% of MODE1 falling edge to R2
3T5R mode
reaching 300 mV
DIR= VIO, MODE1 = VIO; MODE0 from VIO to
Time to switch from RS-485 GND ; SHDN = VIO , SLR, TERM_TX, TERM_RX=
tFHD_RS485 full duplex to half duplex floating; L2= GND, 10k pull down resistor on L1, Time 0.5 1 µs
mode from 50% of MODE0 falling edge to 50% falling edge
on L1
DIR= VIO, MODE1 = VIO; MODE0 from GND to
Time to switch from RS-485 VIO ; SHDN = VIO , SLR, TERM_TX, TERM_RX=
tHFD_RS485 half duplex to full duplex floating; L2= GND, 10k pull down resistor on L1, Time 0.5 1 µs
mode from 50% of MODE0 rising edge to 50% rising edge
on L1

THVD4411
5.13 Switching Characteristics_RS-485_Termination resistor

Parameters over recommended operating conditions. All typical values are at 25°C and supply voltage of VCC = 5 V , VIO =
3.3 V, unless otherwise noted.
Driver terminal Termination MODE1, MODE0 = 11; VIO = 3 to 3.6 V, DIR = GND,
tDTEN 1000 2200 ns
resistor turn-on time VR2R1 = 2 V, VR1 = 0 V
Driver terminal Termination MODE1, MODE0 = 11; VIO = 3 to 3.6 V, DIR = GND,
tDTZ 2000 7200 ns
resistor turn-off time VR2R1 = 2 V, VR1 = 0 V
Receiver terminal
MODE1, MODE0 = 11; VIO = 3 to 3.6 V, VR3R4 = 2 V,
tRTEN Termination resistor turn-on 1000 2200 ns
VR4 = 0 V
time
Receiver terminal
MODE1, MODE0 = 11; VIO = 3 to 3.6 V, VR3R4 = 2 V,
tRTZ Termination resistor turn-off 2000 7200 ns
VR4 = 0 V
time

THVD4411
5.14 Typical Characteristics

120.5 119
120 VCC = 3.3 V 118.5 VCC = 3.3 V
119.5 VCC = 5 V 118 VCC = 5 V
119 117.5
Termination Resistor ()
Termination Resistor ()

118.5 117
118
116.5
117.5
116
117
115.5
116.5
116 115
115.5 114.5
115 114
114.5 113.5
114 113
113.5 112.5
113 112
-60 -40 -20 0 20 40 60 80 100 120 140 -8 -6 -4 -2 0 2 4 6 8 10
Temperature (°C) Bus Common Mode Voltage (V)
RS-485 Full Duplex mode V(R3-R4) = 2V RS-485 Full Duplex mode V(R3-R4) = 2V
Figure 5-1. RS-485 Termination Resistor vs Temperature Figure 5-2. Termination Resistor vs Bus Common Mode Voltage
40 60
VCC = 3.3 V VCC = 3.3 V
30 VCC = 5 V VCC = 5 V
40
20
20
10
Current (mA)
Current (A)
0 0
-10
-20
-20
-40
-30
-40 -60
-6 -4 -2 0 2 4 6 -6 -4 -2 0 2 4 6
Voltage Across Bus Terminals (V) Voltage Across Bus Terminals (V)
TERM_TX = GND DIR = GND TA = 25°C TERM_TX = VIO DIR = GND TA = 25°C
Figure 5-3. Voltage vs Current across R2-R1 Bus Pins with Figure 5-4. Voltage vs Current across R2-R1 Bus Pins with
Termination OFF Termination ON
5.1
4.8 4.8 VOD = 3.3 V
Driver Differential Output Voltage (V)
4.5 VOD = 5 V
4.2
4.2
Driver Output Voltage (V)
3.9
3.6
3.6
3 3.3
3
2.4 2.7
VOH (VCC = 3.3 V) 2.4
VOL (VCC = 3.3 V) 2.1
1.8
VOH (VCC = 5 V) 1.8
VOL (VCC = 5 V)
1.2 1.5
1.2
0.6 0.9
0.6
0 0.3
0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80
Driver Output Current (mA) Driver Output Current (mA)
DIR = VIO TA = 25°C DIR = VIO TA = 25°C
Figure 5-5. RS-485 Driver Output Voltage vs Driver Output Figure 5-6. RS-485 Driver Differential Output Voltage vs Driver
Current Output Current

THVD4411
5.14 Typical Characteristics (continued)

75 3.6
Driver Differential Output Voltage (V)

70 3.4
3.2
65
Supply Current (mA)
3
60
2.8
VCC = 3.3 V
55 VCC = 5 V
2.6
50
2.4
45 2.2
40 2
35 1.8
3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 5.5 -60 -40 -20 0 20 40 60 80 100 120 140
VCC (V) Temperature (°C)
TA = 25°C RL = 54Ω DIR = L2 = VIO DIR = L2 = VIO RL = 54Ω

RS-485 Full Duplex mode RS-485 Full Duplex mode
Figure 5-7. RS-485 Supply Current vs Supply Voltage Figure 5-8. RS-485 Driver Differential Output Voltage vs
Temperature
285 8.7
VCC = 3.3 V VCC = 3.3 V
280 8.4
VCC = 5 V RS-485 Driver Rse/Fall Time (ns) VCC = 5 V
275 8.1
Driver Rise Fall Time (ns)
270
7.8
265
7.5
260
7.2
255
6.9
250
245 6.6
240 6.3
235 6
230 5.7
-40 -20 0 20 40 60 80 100 120 140 -40 -20 0 20 40 60 80 100 120 140
Temperature (°C) Temperature (°C)
Bus Load = 54Ω ||50 pF SLR = VIO DIR = VIO Bus Load = 54Ω || 50pF SLR = GND DIR = VIO
Figure 5-9. RS-485 500kbps Driver Rise or Fall Time vs Figure 5-10. RS-485 20Mbps Driver Rise or Fall Time vs
Temperature Temperature
285 32
VCC = 3.3 V VCC = 3.3 V
RS-485 Driver Propagation Delay (ns)
280 VCC = 5 V VCC = 5 V

30
Driver Propagation Delay (ns)
275 28
270 26
265 24
260 22
255 20
250 18
-40 -20 0 20 40 60 80 100 120 140 -40 -20 0 20 40 60 80 100 120 140
Temperature (°C) Temperature (°C)
Bus Load = 54Ω ||50 pF SLR = VIO DIR = VIO Bus Load = 54Ω || 50pF SLR = GND DIR = VIO
Figure 5-11. RS-485 500kbps Driver Propagation Delay vs Figure 5-12. RS-485 20Mbps Driver Propagation Delay vs
Temperature Temperature

THVD4411
5.14 Typical Characteristics (continued)

72 80
VCC = 3.3 V
69 75 VCC = 5 V
66
RS-485 Supply Current (mA)

70
63
65
60
57 60
54 VCC = 3.3 V 55
51 VCC = 5 V
50
48
45
45
42 40
39 35
0 25 50 75 100 125 150 175 200 225 250 0 1 2 3 4 5 6 7 8 9 10
Data Rate (kHz) Data Rate (MHz)
TA = 25°C RL = 54Ω DIR = VIO TA = 25°C RL = 54Ω DIR = VIO
Figure 5-13. RS-485 500kbps Supply Current vs Signaling Rate Figure 5-14. RS-485 20Mbps Supply Current vs Signaling Rate
50 70
3.3 VCC_CL = 150pF 65 3.3 VCC_CL = 150pF
45 3.3 VCC_CL = 1000pF 3.3 VCC_CL = 1000pF
60
3.3 VCC_CL = 2500pF 5 VCC_CL = 150pF
40
5 VCC_CL = 150pF 55 5 VCC_CL = 1000pF
35 5 VCC_CL = 1000pF 50
5 VCC_CL = 2500pF 45
30
40
25 35
20 30
25
15
20
10 15
5 10
5
0
0
0 20 40 60 80 100 120 140
0 50 100 150 200 250 300 350 400 450 500
Input Data Frequency (KHz)
Input Data Frequency (KHz)
TA = 25°C SLR = VIO TA = 25°C SLR = GND
Driver output loaded with 5kΩ ; device in RS-232 1T1R mode Driver output loaded with 5kΩ ; device in RS-232 1T1R mode
L2 = toggling L2 = toggling
Figure 5-15. RS-232 Supply Current vs Signaling Rate for 250 Figure 5-16. RS-232 Supply Current vs Signaling Rate for 1
kbps Mode Mbps Mode
2.5
VIT+ (VCC = 3.3 V)
2.25 VIT+ (VCC = 5 V)
RS-232 Receiver Thresholds (V)
VIT– (VCC = 3.3 V)

VIT– (VCC = 5 V)
2
1.75
1.5
1.25
0.75
-40 -20 0 20 40 60 80 100 120 140
Temperature (°C)
Figure 5-17. RS-232 Receiver Thresholds vs Temperature

THVD4411
6 Parameter Measurement Information

VIO 375 Ω
DIR
R2
L2 Vtest
0 V or VIO VOD RL
R1
375 Ω
Figure 6-1. Measurement of RS-485 Driver Differential Output Voltage With Common-Mode Load
R2
VR2
R2 RL/2 R1
L2 VR1
0 V or VIO VOD
VOC(PP)
R1 RL/2
VOC VOC(SS)
CL
VOC
Figure 6-2. Measurement of RS-485 Driver Differential and Common-Mode Output With RS-485 Load
VIO VIO
VI 50%
DIR 0V
R2
L2 RL= tPLH tPHL
VOD 54 Ω CL= 50 pF
Input 90%
VI 50 Ω R1
Generator 50%
VOD 10%
tr tf
Figure 6-3. Measurement of RS-485 Driver Differential Output Rise and Fall Times and Propagation
Delays
L2 R2 VIO
S1 VO
VI 50%
0V
R1
DIR RL = tPZH
CL = 110 Ω VOH
Input 90%
50 Ω 50 pF
Generator VI 50%
VO
~0V
tPHZ
Figure 6-4. Measurement of RS-485 Driver Enable and Disable Times With Active High Output and
Pull-Down Load
Vcc
RL= 110
VIO
R2 50%
S1 VI
0V
L2 R1
VO tPZL
tPLZ
DIR ≈ Vcc
C L= VO
Input 50 pF
Generator VI 50 50 % 10%
VOL
Figure 6-5. Measurement of RS-485 Driver Enable and Disable Times With Active Low Output and Pull-up
Load

THVD4411
VIO
VIO
VI 50 %
0V
R2 1k tPZH(1) tPHZ
L2 VO L2 (driver input at VIO)
S1 VOH
90 % S1 to GND
VO 50 %
R1 CL = 15 pF
DIR 0V
tPZL(1)
tPLZ
Input
50 V IO R2 at GND, R1 at VCC
Generator VI S1 to VIO
VO 50 %
10 %
VOL
Figure 6-6. Measurement of RS-485 Receiver Output Rise and Fall Times and Propagation Delays
VIO
VIO
VI 50 %
0V
R2 1k tPZH(1) tPHZ
L2 VO L2 (driver input at VIO)
S1 VOH
90 % S1 to GND
VO 50 %
R1 CL = 15 pF
DIR 0V
tPZL(1)
tPLZ
Input
50 V IO R2 at GND, R1 at VCC
Generator VI S1 to VIO
VO 50 %
10 %
VOL
Figure 6-7. Measurement of RS-485 Receiver Enable and Disable Times in Half Duplex Mode
VIO
VIO 50%
VI
0V
R3 1k tPZH(2)
0V or 1.5V L1 VO
S1 VOH R3 at 1.5 V
1.5 V or 0V R4 at 0 V
R4 CL=15 pF 50%
SHDN VO
0V S1 to GND
tPZL(2)
Input DIR
Generator VI 50 VIO R3 at 0V
VO 50% R4 at 1.5V
S1 to VIO
VOL
Figure 6-8. Measurement of RS-485 Receiver Enable Time from Shutdown with TX disabled: Full Duplex
Mode
RTERM_RX = VR3R4 / IA RTERM_TX = VR2R1 / IY
DIR = GND
IA IY
R3 R2
L1
VR3R4 VR2R1
R4 R1
VR4 VR1
TERM_RX TERM_TX
Figure 6-9. Termination Resistor Measurement

THVD4411
VIO
RTERM_RX = VR3R4 / IA 50%
TERM_RX
IA
R3 0V
L1
VR3R4 tRTEN tRTZ
VR4 R4 90%
TERM_RX 50%
IA 10 %
VIO
RTERM_TX = VR2R1/ IY 50 %
DIR = GND TERM_TX
IY
R2 0V
VR2R1 tDTEN tDTZ
R1 90%
VR1
TERM_TX 50%
IY 10 %
Figure 6-10. Termination Resistor Switching Measurement

VIO
100 nF
0.5* VIO
100 nF 100 nF GND

SHDN
8V
100 nF
1 uF V+ tRDY
24 C2+
23 C1+
C1-
C2-
VCC
V-
22
21
20
19
V-
100 nF
18
GND R1
V+ 1
5V Vcc corner
17
R2 -8V
Vcc 2
16
L1 3 GND
VIO
15
L2 4 GND
GND
SLR 5
14
R3
0.5* VIO
DIR 6
13
R4 SHDN
5V
7
9 10 11 12
8
V+
TERM_RX
TERM_TX
VIO
MODE0
MODE1
tRDY
SHDN
V-
Toggle
3.3V Vcc corner
-5V
Figure 6-11. Time from Shutdown to RS-232 Ready

THVD4411
100 nF
100 nF
GND
100 nF 1 uF
24 C2+
23 C1+
C1-
C2-
VCC
V-
VIO
22
21
20
19
100 nF
18
GND
R1
V+ 1 0.5* VIO 0.5* VIO
MODE1
17
R2
Vcc 2
tR4_R2
16
L1 3 GND
tR2_R4
VIO
15
L2 4 GND
GND R2 2V
SLR 5 14
R3
300 mV
DIR 6
13
R4
7
9 10 11 12
8
VIO
TERM_RX
TERM_TX
MODE0
MODE1
VIO
SHDN
VIO
VIO
Figure 6-12. Time to Switch from RS-232 Mode to RS-485 Full Duplex Mode and Back
100 nF
100 nF GND
100 nF
1 uF
24 C2+
23 C1+
C1-
C2-
VCC
V-
22
21
20
19
VIO
GND
18
R1
V+ 1
100 nF
0.5* VIO 0.5* VIO

17
R2
Vcc 2 MODE0
10k Ω
16
L1 3 GND
GND tFHD_RS485
tHFD_RS485
15
L2 4 GND
GND
GND
VOH
SLR 5
14
R3 0.5
L2 0.5
DIR 6
13
R4 VOL
7
9 10 11 12
8
VIO
TERM_RX
TERM_TX
VIO
MODE0
MODE1
SHDN
VIO
VIO
Figure 6-13. Time to Switch from RS-485 Full Duplex to Half Duplex and Back

THVD4411
VIO
0.5 × VIO 0.5 × VIO
DIN (L2) DOUT (R3) Input

TX RS-232 output
Generator SHDN
Z0 CL
RL
VIO tPLH
tPHL
RS-232
VOH
Output
A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 250 kbps and 1 Mbit/s, 0V
ZO = 50 , 50% duty cycle, tr 10 ns, tf 10 ns. 0V
VOL
Figure 6-14. RS-232 Driver Prop Delay, Pulse Skew

VIO
DIN (L2) DOUT (R3) RS-232 Output

TX
Generator Input
Z0 SHDN
RL CL
VIO
tTHL tTLH
RS-232 VOH
Output 3V
A. CL includes probe and jig capacitance. 3V
B. The pulse generator has the following characteristics: PRR = 250 kbps and
1 Mbit/s, ZO = 50 , 50% duty cycle, tr 10 ns, tf 10 ns.
SR = 6 V / (tTHL or tTLH) –3 V –3 V
VOL
Figure 6-15. RS-232 Driver Slew Rate

3V
1.5 V 1.5 V
RX bus input
ROUT buffer (L1)
(R4) –3 V
RX Input
Generator
CL
Z0 SHDN
tPLH
VIO tPHL
VOH
A. CL includes probe and jig capacitance. Output
B. The pulse generator has the following characteristics: ZO = 50 90%
90%
50% duty cycle, tr 10 ns, tf 10 ns. 50%
50%
10% 10%
VOL
tF_232 tR_232
Figure 6-16. RS-232 Receiver Propagation Delay, Pulse Skew

THVD4411
VIO GND 3V
S1 Input
1.5 V 1.5 V
0V
RX bus input
RL
t P HZ t P ZH
(R2)
Output (S1 at GND) (S1 at GND)
+/–3 V RX
VOH
SHDN
CL Output 50%
0.3 V
Generator
Z0 t P LZ t P ZL
VCC
(S1 at V IO ) VCC
(S1 at V IO )
0.3 V
Output 50%
A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: ZO = 50 , 50% duty
VOL
cycle, tr 10 ns, tf 10 ns.
C. tPLZ and tPHZ are same as tDIS VOLTAGE WAV EFORMS
D. tPZL and tPZH are same as tEN
Figure 6-17. RS-232 Receiver Enable and Disable Time

THVD4411
7 Detailed Description
7.1 Overview
THVD4411 is a highly integrated and robust multiprotocol transceiver supporting RS-232, RS-422 and RS-485
physical layers. The device has one transmitter and one receiver to enable 1T1R RS-232 port. Device also
integrates one transmitter and one receiver to enable half and full duplex RS-485 port. MODE selection pins
enable shared bus and logic pins for the protocols to share a common single connector.
The device has SLR pin which allows it to be used for two different maximum speed settings for RS-232 and for
RS-485. This is beneficial as customers can qualify one device and use it in two separate end-applications. The
devices also have flexible I/O supply pin VIO which enables digital interface voltage range, from 1.65V to 5.5V,
different from bus voltage supply 3V to 5.5V.
7.2 Functional Block Diagram
Power DIN TX DOUT

Supply
VCC RS232
______
Charge
GND ROUT RX RIN
Pump
L1:L2 R1:R4
VIO
Y
SHDN
120
D TX
MODE0
Control Z
MODE1 DIR RS485
TERM_TX Logic A
120
SLR R RX
DIR B
TERM_RX
Figure 7-1. THVD4411 Block Diagram

THVD4411
7.3 Feature Description

7.3.1 Integrated IEC ESD and EFT Protection
Internal ESD protection circuits protect all the transceiver bus pins (driver and receiver) against electrostatic
discharges (ESD) according to IEC 61000-4-2 up to ±8kV for contact diacharge and ±15kV (air-discharge) for all
operating modes. Bus lines in RS-485 mode can also withstand electrical fast transients (EFT) according to IEC
61000-4-4 for up to ±4kV.
7.3.2 Protection Features
The THVD4411 bus pins are protected against any DC supply shorts in the range of -16V to +16V. In the RS-485
mode, the short circuit current is limited to ±250mA to comply with the TIA/EIA-485A standard. In RS-232 mode,
current limiting of ±60mA is applicable for scenarios where bus pins can short to ground.
The device also features thermal shutdown protection that disables the driver and the receiver if the junction
temperature exceeds the TSHDN threshold due to excessive power dissipation on-chip.
Supply undervoltage protection is present on both VCC and VIO supplies. This maintains the bus output
and receiver logic output in known driven state when both the supplies are above their rising undervoltage
thresholds. Table below describes the device behavior in various scenarios of supply levels.
Table 7-1. Supply Function Table
VCC VIO Driver Output Receiver Output
> UVVCC(rising) > UVVIO(rising) For RS-485 mode, determined by For RS-485 mode, determined
DIR and L2 inputs. For RS-232 by DIR and (R1-R2) or (R3-
mode, determined by L2 input. R4) inputs. For RS-232 mode,
For shutdown mode, Hi-Z determined by R2 input. For
shutdown mode, Hi-Z
< UVVCC(falling) > UVVIO(rising) High impedance Undetermined
> UVVCC(rising) < UVVIO(falling) High impedance High impedance
< UVVCC(falling) < UVVIO(falling) High impedance High impedance

THVD4411
7.3.3 Receiver Fail-Safe Operation

The RS-485 differential receiver of the THVD4411 is failsafe to invalid bus states caused by the following:
• Open bus conditions, such as a disconnected connector
• Shorted bus conditions, such as cable damage shorting the twisted-pair together
• Idle bus conditions that occur when no driver on the bus is actively driving
In any of these cases, the differential receiver outputs a failsafe logic high state so that the output of the receiver
is not indeterminate.
Receiver failsafe is accomplished by offsetting the receiver thresholds such that the input indeterminate range
does not include zero volts differential. To comply with the RS-422 and RS-485 standards, the receiver output
must output a high when the differential input VID is more positive than 200 mV, and must output a low when
VID is more negative than –200mV. The receiver parameters which determine the failsafe performance are VTH+,
VTH–, and VHYS (the separation between VTH+ and VTH–). As shown in the Receiver Function table, differential
signals more negative than –200 mV always causes a low receiver output, and differential signals more positive
than 200 mV always causes a high receiver output.
When the differential input signal is close to zero, it is still above the VTH+ threshold, and the receiver output
is high. Only when the differential input is more than VHYS below VTH+ does the receiver output transition to a
low state. Therefore, the noise immunity of the receiver inputs during a bus fault conditions includes the receiver
hysteresis value, VHYS, as well as the value of VTH+.
7.3.4 Low-Power Shutdown Mode
Driving the SHDN pin low puts the device into the shutdown mode. This is the lowest power mode of the device
and current consumption is 10 uA typical. All the blocks get are disabled in this mode.
7.3.5 On-chip Switchable Termination resistor
THVD4411 has 2 termination resistors of nominal 120Ω, one across R1/R2 and another across R3/R4 in
RS-485 mode. Both termination resistors are enabled or disabled using pins as described in Table 7-2. Both the
termination resistors can be enabled or disabled independent of the state of driver or receiver. Termination is
OFF in RS-232 1T1R, unpowered and thermal shutdown modes.
Table 7-2. On-chip termination function table
Signal state Device mode Function Comments
120Ω enabled between R1 and
TERM_TX = VIO Full duplex mode
R2 Termination between R1/R2 is
120Ω disabled between R1 and disabled by default
TERM_TX = GND or floating Full duplex mode
R2
TERM_RX = VIO Full duplex mode
R4 Termination between R3/R4 is
120Ω disabled between R3 and disabled by default
TERM_RX = GND or floating Full duplex mode
R4
TERM_RX = X, TERM_TX = VIO Half duplex mode In half duplex mode, TERM_RX
R2
is don't care and TERM_TX has
TERM_RX = X, TERM_TX = 120Ω disabled between R1 and higher priority
Half duplex mode
GND R2
On-chip 120Ω termination resistor is designed to have a minimum variation with temperature and across
common mode voltage on bus pins. Also, the termination block offers a resistive load to the bus, and does
not alter the magnitude or phase of the bus signals from DC to 20Mbps signaling.

THVD4411
7.3.6 Operational Data Rate

THVD4411 can be used in slow speed or fast speed RS-485 and RS-232 applications by configuring slew rate
control (SLR) pin. Table 7-3 describes slew rate control function.
Table 7-3. Slew rate control function table
Signal state Driver Receiver Comment
SLR = VIO Maximum speed of operation for Maximum speed of operation for Active high slew rate limiting
RS-485 = 500kbps. Maximum RS-485 = 500kbps. Maximum applied on driver output. In
speed of operation in RS-232 speed of operation in RS-232 this configuration, glitch filter
mode is 250kbps mode is 250kbps in receiver path for RS-485 is
enabled
SLR = GND or floating Maximum speed of operation Maximum speed of operation for Slew rate limiting on driver output
for RS-485= 20Mbps. Maximum RS-485 = 20Mbps. Maximum disabled.
speed of operation in RS-232 speed of operation in RS-232
mode is 1Mbps mode is 1Mbps
For RS-485 half and full duplex modes, receiver path in the slow speed mode (500kbps) provides additional
noise filtering. To attenuate high frequency noise pulses from the bus which can be wrongly interpreted as valid
data, SLR = VIO enables a low pass filter to filter out pulses with frequency higher than typical 800kHz.
7.3.7 Integrated Charge Pump for RS-232
THVD4411 has a integrated high-efficiency and low-noise charge pump to generate large output voltages for
RS-232 signals. Charge pump consists of a voltage doubler and an inverter to regulate the voltage to ± 6V or ±
10V for 3.3V or 5V VCC operation respectively. Charge pump needs four external ceramic capacitors and allows
for single supply operation for RS-232. For a generic description of RS-232 charge pump operation, please refer
to the blog: How the RS-232 Transceiver’s Regulated Charge-pump Circuitry Works

THVD4411
7.4 Device Functional Modes

1T1R RS232
MODE
24 C2+
23 C1+
C1-
C2-
VCC
V-
22
21
20
19
18
R1
V+ 1
17
RX R2
Vcc 2
5 kΩ
16
L1 3 GND
15
L2 4 TX GND
SLR 5
14
R3
DIR 6
13
R4
7
9 10 11 12
8
TERM_RX
TERM_TX
MODE0
MODE1
VIO
SHDN
Figure 7-2. RS-232 Mode

THVD4411
24 C2+
23 C1+
C1-
C2-
VCC
V-
22
21
20
19
18
R1
V+ 1 TX
17
R2
Vcc 2
16
L1 3 GND
120 Ω
RX
15
L2 4 GND
SLR 5
14
R3
DIR 6
13
R4
7
9 10 11 12
8
TERM_RX
TERM_TX
MODE0
MODE1
VIO
SHDN
Figure 7-3. RS-485 Half Duplex Mode

THVD4411
24 C2+
23 C1+
C1-
C2-
VCC
V-
22
21
20
19
18
R1
V+ 1
120 Ω
TX
17
R2
Vcc 2
16
L1 3 GND
120 Ω
RX
15
L2 4 GND
SLR 5
14
R3
DIR 6
13
R4
7
9 10 11 12
8
TERM_RX
TERM_TX
MODE0
MODE1
VIO
SHDN
Figure 7-4. RS-485 Full Duplex Mode

THVD4411
7.4.1 RS-485 Functionality

When the driver enable pin, DIR, is logic high, the differential outputs R2 and R1 follow the logic states at data
input L2. A logic high at L2 causes R2 to turn high and R1 to turn low. In this case the differential output voltage
defined as VOD = VR2 – VR1 is positive. When L2 is low, the output states reverse: R1 turns high, R2 becomes
low, and VOD is negative.
When DIR is low, both outputs turn high-impedance. In this condition the logic state at L2 is irrelevant. The DIR
pin has an internal pull-down resistor to ground, thus when left open the driver is disabled (high-impedance) by
default. The L2 pin has an internal pull-up resistor to VIO, thus, when left open while the driver is enabled, output
R2 turns high and R1 turns low.
Table 7-4. Driver Function Table
INPUT ENABLE OUTPUTS
FUNCTION
L2 DIR R2 R1
H H H L Actively drive bus high
L H L H Actively drive bus low
High High
X L Driver disabled
impedance impedance
High High
X OPEN Driver disabled by default
impedance impedance
OPEN H H L Actively drive bus high by default
Table 7-4 is valid for both half duplex and full duplex modes, and is independent of state of TERM_TX,
TERM_RX and SLR pins.
In full duplex mode, if SHDN is high, receiver is always enabled. In half duplex mode, receiver is enabled is DIR
= Low/floating and disabled if DIR = VIO. When the differential input voltage defined as VID = V R2 – V R1 or V R3 –
VR4 is higher than the positive input threshold, VTH+, the receiver output, L2, turns high. When VID is lower than
the negative input threshold, VTH-, the receiver output, L2, turns low. If VID is between VTH+ and VTH- the output
is indeterminate.
In half duplex mode, when DIR is high, the receiver output is high-impedance and the magnitude and polarity
of VID are irrelevant. Internal biasing of the receiver inputs causes the output to go failsafe-high when the
transceiver is disconnected from the bus (open-circuit), the bus lines are shorted to one another (short-circuit), or
the bus is not actively driven (idle bus).
Table 7-5. Receiver Function Table
DIFFERENTIAL INPUT OUTPUT
VID = VR2 – VR1(Half duplex mode) or FUNCTION
L1
VR3 – VR4(Full duplex mode)
VTH+ < VID H Receive valid bus high
VTH- < VID < VTH+ ? Indeterminate bus state
VID < VTH- L Receive valid bus low
High impedance for
Receiver disabled in half duplex mode
X DIR = VIO in Half
for DIR = VIO
duplex mode
Open-circuit bus H Fail-safe high output
Short-circuit bus H Fail-safe high output
Idle (terminated) bus H Fail-safe high output
Table 7-5 is valid irrespective of state of TERM_TX, TERM_RX and SLR pins.

THVD4411
7.4.2 RS-232 Functionality

In RS-232 mode, only way to disable driver is to go in shutdown mode by pulling SHDN pin low. A logic high at
input for driver L2 causes driver output R3 to be driven low towards negative charge pump output V-. A logic low
at input for driver L2 causes driver output R3 to be driven high towards positive charge pump output V+. If logic
input is left floating due to the pull-up resistors on driver logic input, the driver output is driven low towards V-.
Table 7-6. Driver Function Table
INPUT ENABLE OUTPUTS
FUNCTION
L2 SHDN R3
Low (driven
H H Normal operation with inverting logic
towards V-)
H (Driven
L H Normal operation with inverting logic
towards V+)
X L High impedance TX and RX are disabled in shutdown mode
Low (driven Since pull-up on logic input pin, output driven low
Open H
towards V-) by default
Table 7-6 is valid irrespective of the state of SLR pin.

For RS-232 receiver, if receiver bus input is above rising threshold VIT+, then received logic output goes low.
Also, if receiver bus input is below falling threshold VIT-, received logic output goes high.
Table 7-7. Receiver Function Table
RS-232 BUS INPUT LOGIC OUTPUT
FUNCTION
VIRx (voltage on R2) L1
VIT+ < VIRx L Normal operation with inverting logic
VIT- < VIRx < VIT+ ? Indeterminate bus state
VIRx < VIT- H Normal operation with inverting logic
High impedance for
X Receiver disabled in shutdown mode
SHDN = GND
Open-circuit bus H Fail-safe high output
Table 7-7 is valid irrespective of the state of SLR pin.

7.4.3 Mode Control
Table 7-8. MODE Control Function Table
MODE1 MODE0 Operating mode Function
L H RS-232 1T1R mode, charge pump is ON, 1T1R mode; L2 is Logic input for RS232
V+/V- are regulated driver; L1 is Logic output
H L RS-485 half duplex mode (charge pump is L1 is RX Logic output; L2 is Driver Logic
off) input; R1 R2 are Bus inverting and non-
inverting terminals respectively
H H RS-485 full duplex mode (charge pump is off) R1R2 are inverting and non-inverting driver
terminals; R3R4 are non-inverting and
inverting receiver terminals.

THVD4411
8 Application and Implementation

Note
Information in the following applications sections is not part of the TI component specification, and
TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes. Customers should validate and test their design
implementation to confirm system functionality.
8.1 Application Information

THVD4411 is a highly integrated multiprotocol transceiver supporting RS-232, RS-422 and RS-485 physical
layer and is used for asynchronous data transmissions. MODE pins allow for the configuration of
different operating modes. Device allows point-to-point RS-232 communication port and multipoint RS-485
communication port over common connector. The device also features integrated 120Ω switchable termination
resistor on RS-485 bus lines which enables same device to be used for middle nodes or end nodes in an
RS-485 network. When the device is configured in RS-232 mode, RS-485 circuits and 120Ω termination are
disabled and do not interfere in RS-232 communication. For RS-232 communication, charge pump and 5kΩ
resistor to ground on receiver bus pin is integrated in the device. This 5kΩ resistor and charge pump is
automatically disabled in RS-485 mode. Slew rate limiting pin is provided so that same device can be used
in slow speed or fast speed RS-485 and RS-232 applications. When ultra low power consumption is needed,
device can be put in shutdown mode using SHDN pin. All these features make the device completely flexible and
suitable for various application needs. Integration of termination resistor saves significant PCB area compared to
discrete implementation.
8.2 Typical Application
An RS-485 bus consists of multiple transceivers connecting in parallel to a bus cable. To eliminate line
reflections, each cable end is terminated with a termination resistor, RT, whose value matches the characteristic
impedance, Z0, of the cable. This method, known as parallel termination, generally allows for higher data rates
over longer cable length.
VIO VIO
MODE1 MODE0 MODE1 MODE0
L1 R R L1
R2 R2
THVD4411
THVD4411
120
120
R1 R1
DIR DIR
L2 D D L2
R1 R2 R1 R2
120 120
TERM_TX MODE1 TERM_TX
TERM_TX
VIO VIO VIO
MODE1
VIO R THVD4411 TERM_TX R THVD4411
D D
MODE0
MODE0
L1 DIR L2 L1 DIR L2
Figure 8-1. Typical RS-485 Network With Half-Duplex Transceivers

THVD4411
VIO VIO
MODE1 = MODE0 MODE1 = MODE0
R2 R3
L2 D 120 120 R L1
R1 R4
DIR
THVD4411
THVD4411
DIR
R4 R1
L1 R 120 120 D L2
R3 R2
TERM_TX TERM_RX TERM_RX TERM_TX
R3 R4 R1 R2
VIO VIO 120 V IO VIO
THVD4411
120
TERM_RX
Commander
MODE1 =
MODE0
GND Responder
R
VIO
D TERM_TX
GND
L1 DIR L2
Responder
Figure 8-2. Typical RS-485 Network With Full-Duplex Transceivers
THVD4411 can be used in both networks (half and full duplex) and at all nodes (end node or middle nodes)
since device has the configurability based on MODE1, MODE0 pins and TERM_TX, TERM_RX pins.
THVD4411 also consists of one line driver, one line receiver and dual charge pump circuit to enable
RS-232 serial communication port. This device provides the electrical interface between an asynchronous
communication controller and the serial-port connector.
8.2.1 Design Requirements
RS-485 is a robust electrical standard suitable for long-distance networking that may be used in a wide range
of applications with varying requirements, such as distance, data rate, and number of nodes. RS-232 is more
suitable for debug or configuration point to point applications.
8.2.1.1 Data Rate and Bus Length
There is an inverse relationship between data rate and cable length, which means the higher the data rate, the
short the cable length; and conversely, the lower the data rate, the longer the cable length. While most RS-485
systems use data rates between 10kbps and 100kbps, some applications require data rates up to 250kbps at
distances of 4000 feet and longer. Longer distances are possible by allowing for small signal jitter of up to 5 or
10%.
10000
5%, 10%, and 20% Jitter
Cable Length (ft)
1000
Conservative
Characteristics
100
10
100 1k 10 k 100 k 1M 10 M 100 M
Data Rate (bps)
Figure 8-3. Cable Length vs Data Rate Characteristic
Even higher data rates are achievable (that is, 50Mbps for the THVD24xxV) in cases where the interconnect is
short enough (or has suitably low attenuation at signal frequencies) to not degrade the data.

THVD4411
8.2.1.2 Stub Length

When connecting a node to the bus, the distance between the transceiver inputs and the cable trunk, known as
the stub, should be as short as possible. Stubs present a non-terminated piece of bus line which can introduce
reflections of varying phase as the length of the stub increases. As a general guideline, the electrical length, or
round-trip delay, of a stub should be less than one-tenth of the rise time of the driver; thus, giving a maximum
physical stub length as shown in Equation 1.
L(STUB) ≤ 0.1 × tr × v × c (1)
where
• tr is the 10/90 rise time of the driver
• c is the speed of light (3 × 108 m/s)
• v is the signal velocity of the cable or trace as a factor of c
8.2.1.3 Bus Loading
The RS-485 standard specifies that a compliant driver must be able to drive 32 unit loads (UL), where 1 unit load
represents a load impedance of approximately 12kΩ. Because the THVD4411 device in RS-485 half and full
duplex mode consists of 1/8 UL transceivers, connecting up to 256 receivers to the bus is possible for a limited
common mode range of - 7V to 12V.

THVD4411
8.2.2 Detailed Design Procedure

Figure 8-4 suggests an application schematic for THVD4411. Device has all logic pins on one side and bus side
pins on other side to enable a flow-through layout in end application.
All VCC power pins should have 1μF decoupling capacitor close to the respective device pins. RS-232 charge
pump is designed such that 100 nF charge pump capacitors work for both 3.3V and 5V operating VCC supply.
100 nF
GND
100 nF
100 nF 100 nF
3 to 5.5V
24 C2+
23 C1+
C1-
C2-
VCC
V-
22
21
20
19
18
R1
V+ 1
100 nF
3 to 5.5VGND
Bus side connector

17
R2
Vcc 2
GND
16
L1 3 THVD4411 GND
To and From MCU
15
L2 4 GND
GPIO
SLR 5
14
R3
DIR 6
13
R4
7
9 10 11 12
8
TERM_RX
TERM_TX
MODE0
MODE1
VIO
SHDN
100 nF
GND
1.65 to
5.5V
From MCU GPIO

Figure 8-4. Typical application diagram for THVD4411

THVD4411
8.2.3 Application Curves
VCC = 5V Bus Load = 5kΩ||2.5nF VCC = 5V Bus Load = 5kΩ||1nF

250kbps SLR = VIO 1Mbps SLR = GND
Figure 8-5. RS-232 Driver Waveform at 250kbps Figure 8-6. RS-232 Driver Waveform at 1Mbps and
and VCC = 5V VCC = 5V
VCC = 3.3V Bus Load = 5kΩ||2.5nF VCC = 3.3V RL = 5kΩ||1nF

250kbps SLR = VIO 1kbps SLR = GND
Figure 8-7. RS-232 Driver Waveform at 250kbps Figure 8-8. RS-232 Driver Waveform at 1Mbps and
and VCC = 3.3V VCC = 3.3V
VCC = 5V Bus Load = 54Ω||50pF VCC = 5V Bus Load = 54Ω||50pF

SLR = VIO Square wave at 500kbps SLR = GND Square wave at 20kbps
Figure 8-9. RS-485 Driver Waveform at 500 kbps Figure 8-10. RS-485 Driver Waveform at 20 Mbps
and VCC = 5V and VCC = 5V

THVD4411
8.3 Power Supply Recommendations

For reliable operation at all data rates and supply voltages, each supply should be decoupled with a ceramic
capacitor located as close to the supply pins as possible. Recommended bypass capacitor for VCC is 1μF, for VIO
is 100nF, for V+, V- charge pump voltage supplies is 100nF. Besides this, two charge pump flying capacitors of
100nF each are needed between C1+, C1- terminals and between C2+, C2- terminals. For VCC = 3.3V ±10%,
V+ and V- voltages are regulated to +5.5V and -5.5V typically. If an application needs larger RS-232 output
voltages, VCC = 5V ± 10% is recommended because V+ and V- are regulated to ±9.5V.
8.4 Layout
8.4.1 Layout Guidelines
Robust and reliable bus node design often requires the use of external transient protection devices to protect
against surge transients that may occur in industrial environments. THVD4411 has integrated IEC ESD and
EFT protection. So if the application does not need IEC Surge protection, external transient protection may not
be needed. Since these transients have a wide frequency bandwidth (from approximately 3MHz to 300MHz),
high-frequency layout techniques should be applied during PCB design.
1. Place the external protection circuitry close to the bus connector to prevent noise transients from
propagating across the board.
2. Use VCC and ground planes to provide low inductance. Note that high-frequency currents tend to follow the
path of least impedance and not the path of least resistance.
3. Design the protection components into the direction of the signal path. Do not force the transient currents to
divert from the signal path to reach the protection device.
4. Apply decoupling capacitors as close as possible to the VCC, VIO, V+, V- pins of transceiver.
5. Use at least two vias for VCC and ground connections of decoupling capacitors and protection devices to
minimize effective via inductance.
6. Optionally, use 1kΩ to 10kΩ pull-up and pull-down resistors for control lines to limit noise currents in these
lines during transient events.

THVD4411
8.4.2 Layout Example
C
C C
C
24 C2+
23 C1+
22 C1-
21 C2-
19 VCC
20 V-
R1
18
C
V+ 1
17
2 R2
C
Vcc
16
L1 3 GND
15
L2 4 GND
14
SLR 5 R3
13
DIR 6 R4
9
7
10 11 12
8
VIO
MODE0
TERM_TX
TERM_RX
MODE1
SHDN
Figure 8-11. Layout Example

THVD4411
9 Device and Documentation Support

9.1 Device Support
9.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Notifications to register and receive a weekly digest of any product information that has changed. For change
details, review the revision history included in any revised document.
9.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
9.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
9.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
9.6 Glossary
TI Glossary This glossary lists and explains terms, acronyms, and definitions.
10 Revision History
Table 10-1.
DATE REVISON NOTES
April 2024 * Initial release
11 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

PACKAGE OPTION ADDENDUM
www.ti.com 6-Apr-2024
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
THVD4411RGER ACTIVE VQFN RGE 24 5000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 THVD Samples
4411
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
TAPE AND REEL INFORMATION
REEL DIMENSIONS TAPE DIMENSIONS

K0 P1
B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers
Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2 Q1 Q2
Q3 Q4 Q3 Q4 User Direction of Feed
Pocket Quadrants
*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
THVD4411RGER VQFN RGE 24 5000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
THVD4411RGER VQFN RGE 24 5000 367.0 367.0 35.0
Pack Materials-Page 2
IMPORTANT NOTICE AND DISCLAIMER
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THVD4411

SLLSFR9 – APRIL 2024

THVD4411 Multiprotocol (RS-232, RS-422, RS485) Transceiver with Integrated 120Ω

• Factory automation and control

• Point-of-sale terminals MCU

• Grid infrastructure RS-232

THVD4411 Simplified Schematic

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4 Pin Configuration and Functions

Table 4-1. Pin Functions

(1) GND pins 15 and 16 must be grounded on PCB.

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5.2 ESD Ratings

5.3 ESD Ratings [IEC]

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5.4 Recommended Operating Conditions

5.5 Thermal Information

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5.6 Power Dissipation

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5.7 Electrical Characteristics

Short-circuit output current VCC = 3.6 V VO = 0 V

Output leakage current on VO = ±12 V VCC = 3 to 3.6 V ±125 μA

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5.7 Electrical Characteristics (continued)

Negative-going input VCC = 3.3 V 0.6 1.1 V

Input hysteresis on receiver

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5.7 Electrical Characteristics (continued)

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5.8 Switching Characteristics_RS-485_500kbps

5.9 Switching Characteristics_RS-485_20Mbps

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5.9 Switching Characteristics_RS-485_20Mbps (continued)

5.10 Switching Characteristics, Driver_RS232

VCC = 3.3 V ± 10%, 5 V ± 10% , CL = 150 pF to 1000 pF 6 30

RL = 3 kΩ CL = 250 pF, VCC = 3 to 3.6 V 1000 kbps

5.11 Switching Characteristics, Receiver_RS232

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5.11 Switching Characteristics, Receiver_RS232 (continued)

5.12 Switching Characteristics_MODE switching

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5.13 Switching Characteristics_RS-485_Termination resistor

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5.14 Typical Characteristics

Termination Resistor ()

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5.14 Typical Characteristics (continued)

Driver Differential Output Voltage (V)

TA = 25°C RL = 54Ω DIR = L2 = VIO DIR = L2 = VIO RL = 54Ω

280 VCC = 5 V VCC = 5 V

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5.14 Typical Characteristics (continued)