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Assignment 3

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abu talha priyonto
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16 views

Assignment 3

Uploaded by

abu talha priyonto
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Assignment 3

Question 1: (Lecture 8)

Given below is a sentence, for this sentence perform the following actions:

“Rare blue dog!”

i) Convert the following sentence into its equivalent ASCII HEX values:
(Hint: “car” = 63 61 72)

ii) For the equivalent HEX value chain found in part (i), find the binary
(base 2) representation. How many nibbles of information are there?

iii) For the equivalent binary value chain found in part (ii), find the Gray
Code representation. Why is this representation used?

iv) For the sentence above, find the decimal values (just like the HEX
values in part (i)) and then find the BCD representation.
Between BCD and Gray Code representation - which would require more
space for storage, explain why.

v) Convert AF45.6FD from HEX to OCTAL representation

Marks = 2 + 2 + 2 + 3 + 1
Question 2: (Lecture 9, 10)

i) Cascade two 4-bit Parallel Adders to perform the following arithmetic


function:
F = 7 + (3 x 2)

Use the following block to represent one Full Adder:

ii) What is the range of signed and unsigned HEX values that can be
represented in a 9 bit FlipFlop Register?

iii) Convert the following HEX values to their binary equivalents and then
perform Binary Multiplication between them. Show all the steps.

5A and 2C

Marks = 5 + 2 + 3
Question 3: (Lecture 11)

i) Write a VHDL code that implements the functions of a 4 bit Parallel


Adder.
Use the following notations for inputs and outputs - An, Bn, Sn, Cn and
Cout-n, where n is the number of the Adder in question (example - A 0, B2
and so forth)

ii) Write a VHDL code that implements a JK-FlipFlop with asynchronous


active low Preset and asynchronous active high Clear.

iii) Write a VHDL code for a 4-bit counter module that counts from 14 -> 2
and repeat.

Marks = 5 + 3 + 3
Question 4: (Lecture 12, 13)

i) Construct a CMOS NAND gate, NMOS NAND gate and NMOS NOR
gate.

ii) What are the differences between Resistor Transistor Logic, Directly
Coupled Transistor Logic and Transistor Transistor Logic? Draw 3 input
NAND using RTL, 4 input NAND using DCTL.

iii) A certain gate draws 3mA when its output is HIGH and its average
power dissipation, VCC is 7V for Transistor Transistor Logic. How much
does the gate draw when its output is LOW?
It draws 4.5 mA when in Transition time. Determine average power
dissipation for CMOS.

iv) Determine if the LSTTL (5V) can drive a CMOS (5V, HCT) circuit and
vice versa.

Voh Vol Vih Vil

LSTTL 2.8 0.38 1.9 0.9

CMOS 2.3 0.75 2.85 0.75

Marks = 3 + 3 + 2 + 2

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