USN CBS SCHEIE

18EC62
Sixth Semester B.E.
Degree Examination,
imalpractice.
Time: 3 hrs. Embedded Systems Jan./Feb. 2023
Note: Answer any FIVE full Max, Marks: 100
as
treated questions, choosing ONE full question from each
module.
pages.
be
will With a neat diagram, explain the Module-1
and resetarchitecture
blank b. Explain two stack model of ARM crotox M
50,
sequence of ARM cortex M3.
processor. (10Marks)
remaining
= (10Marks)
42+8
a.
With the help of neat diagram, OR
eg, explain operation modes and
thewritten b
With the help of register bit privilege levels of cortex M3.
on C. Explain the format, explain XPSR register in detail. (10 Marks)
lines function of special registers PRIMASK, (06 Marks)
equations FAULTMASK. BASEPRI, CONTROL,
cross (04 Marks)
diagonal
/or
3 a. RModule-2
Explain the operation of following
and i)ADD.W i)
LDMIA instructions with
iii) BEQ iv) LSR v) syntax and an example for each:
evaluator b. Explain different rotate and reverse IF-THEN.
draw instructions 'ofcortex M; with example for each.(10 Marks)
compulsorily (10 Marks)
to
appeal 4 a. Explain SSAT and USAT saturation OR
b. Write an assembly language programinstrüctions
to
with an example. (05 Marks)
:
answers, C.
ofidentification With a, neat diagram, explain the multiply two nurmbers. (05 Marks)
CMSIS organization, operation, benefits and
disadvantages. (10 Marks)
your
completing
revealing
Define embedded system: Classify Module-3
a
an embedded system based on
1) Complexity ii) Triggering. i) Generation
b. Explain the purpose, of an (10 Marks)
embedded system.
On Any
Mention the appliation of an embedded system in different (06 Marks)
domains. (04 Marks)
1. 2.
: OR
Note 6 a. Differentiate between RISCand CISC.
b. With a neat interface diagtam; explain the (06 Marks)
Important
c. Explain the following.g onboard IC communication bus. (08 Marks)
i)Optocoupler in) Zig-bee iii) Wi-fi, (06 Marks)

lof2
 18EC62
Module-4 quality attributes of an embedded
operational (10 Marks)
opcrational and non machine.
7 a. Define and Cxplain
ofdifferent components of washing (07 Marks)
system. explainthe role (03 Marks)
b. With a block diagram, fitmware design.
embedded
c. Explain super loopbased approach for

OR language
language source file to machine
explain high level (06 Marks)
a. With aneat flow diagram, (06 Marks)
conversion. example.
CDFG models with an belt
b. Conpare DFG and explain the design and operation of automatic seat
C. With the help of FSM model, (08 Marks)
warning system.
Module-5
operating system, with a neat diagram, explain the operating system
9 a. Define the term (07 Marks)
architecture.
the structure, memory organization and state transitions of
detail
b. Detineprocess, explain in (07 Marks)
the process/task. estimated completion time 10. 5. 7
process IDs Pi, P2, P; with
C. Three processes with process P4 with estimated
respectively enters the ready queue together. A new
miliseconds
time 2ms enters the reády queue after 2ms. Calculate the waiting time for all the
completion
Also, calculate the average waiting
processes and the turn around time for all the processes..
Job First) based preemptive
time and turn around time. Algorithm used is SJF (Shortest I/O operation are
scheduling. Assume all the process contain only CPUoperation and no (06 Marks)
involved.

OR
different conditions
10 a. Explain the concépt, of 'deadlock' with a neat diagram. Mention the (08 Marks)
which favors a deadlock situation.
b. Write a block schematic of IDE ehvirohment for embedded system design and explain their (08 Marks)
functions in brief
Write anote on IAP [In Applicatjon Programming] and in system programming. (04 Marks)
 CECS SCHEME
18EC62
USN

Sixth Semester B.E. Degree Examination, July/August 2022

Embedded Systems
Time: 3 hrs. Max. Marks: 100
Note: Answer any FIVE fullquestions, choosing ONE full question from each module.
cated
asmalpractice.
Module-1
1
a. With ablock Schematic, cxplain the function of various units in ARM cortex M3 processor
(10 Marks)
architecture, in brief.
(05 Marks)
b. Explain any 5 application of ARM cortex M3 based on its features.
cortex M3, when
bire: C. With diagram, Cxplain 2 operation modes and 2 privilege levels in
exceptions are to be handled. (05 Marks)
pa
blank
OR
remahing 2 a. With tables, describe the various interrupts and exception along with the vector addresses.
(10 Marks)
b. Explain Program Status Registers (PSRs) in cortex M3along with the 2 instructions(05used for
the accessing PSRS, with a diagram. Marks)
on (05 Marks)
C Describe the reset sequence with a diagram.
es

Module-2
3 a. Explain the 16 bit instructions: CMP, ASR, SBC and LDMIA, with an example for each.
(08 Marks)
b Describe signed and unsigned saturation instructions with diagram and examples. (08 Marks)
evglnto c. Explain IT instruction with an example to convert a High level language instruction to its
dcompulsorily equivalent assembly instructions in cortex M3. (04 Marks)
to
anneal
OR
a. Explain the following 32 bit instructions with an example for each : ADC, BFC, LSL and
ofidentifcation,
answers, PUSH. (08 Marks)
b. Describe CMSIS with diagram and its functions, organization and scope. (08 Marks)
your c. Write an ALP toadd the first 10integernumbers using cortex M3processor. (04 Marks)

completing
revealing
Module-3
5 a. Describe the elements of an embedded system with ablock diagram. (10 Marks)
On Any b. Classify the embedded systems based on the complexities and give 2 examples for cach
category. (06 Marks)
1. 2. C. Differentiate between RISSC and CISC architectures. (04 Marks)
:Note

Important
OR
6 a. Describe the functions of Optocoupler, I2C and IrDA for embedded system. (10 Marks)
b. Explain EPROM, EEPROM, FLASH, DRAM, NVRAM and Sensors required for embedded
systems. (06 Marks)
c. Differentiate between Embedded and general computing systems. (04 Marks)

l of2
 18EC6

Module-4
a. Describe coin operatedtelephone system with aFSM, function of states and state transtion
diagram. (08 Marks)
b. Explain any 5 characteristics of embedded systems. (05 Marks)
C. With a block schematic, explain the ALP based embedded firmware design with its
disadvantages. (07 Marks)

OR
8
a. Describe the sequential program model for seat belt warning system along with the
operation of the system. (08 Marks)
b. Explain any 5 operational quality attributes of embedded systems. (05 Marks)
c. With a functional block diagram, explain the working of a (07 Marks)
washing machine.

9
Module-5
a. With the state transition diagram, structure of a process and memory organization, explain
the functions of status and the scheduler function for process (10 Marks)
b. With an example, describe preemptive SJF scheduling andmanagement.
calculate all the performance
factors. (10Marks)

OR
10 a. Describe out-of-circuit programming and
b. With ablock diagram, explain the embedded In-system-programming. (10 Marks)
system development environment with the
functions of the components used in brief. (10 Marks)

2 of2
 USN 15EC62

Sixth Semester B.E.

ation, June/July 2018
ARM Microcontrollêr& Embedded Systems
malpractice.
Time: 3 hrs.
Max. Marks: 80
as Note: AnSwer FIVE full yhestions,choosing one full question from each
treated module.
Dages.
TAIlig
DiainA 1 a. Module-1
With a neat diagra, xplain the architecture
be of ARM cortex M3 microcontroller. (10 Marks)
will b. Explain the register organization of Cortex M3. (06 Marks)
50,
= OR
42+8 2 a.
Expla the operation modes and privilege levels available in ARM cortex M3 with a neat,
eg,
transition diagram. (06 Marks
WIEwritten
b.Mention the instructions used for accessing the special registers. Explain the same yhg
UIl
uitable examples.
Explain the stack operations using Push and Pop instructions in ARM Cortex M3,
HES equátions
UIayoliaiUS Module-2
a. Explain shift and Rotate instructions available in ARM Cortex M3
/or there rotate right instruction but no rotate left instruction in Cortoy M29" set.(08Why is
Marks)
and b. Explain the following instructions with suitable example:
evaluator () BFC (i) SXTH (iii) UBFX (iv) RBIT
UIaW (08 Marks)
COINpuisoliiy OR
to 4
appeal Write the memory map and explain memory access attribe nCortex M3. (08 Marks)
b. Analyse the following instructions and write the contetslof the registers after the execution
identification, of each instruction:
Assume R8 =0x00000088, R9 = 0x00000006 andR
J I U L Y

AHSWeIS, 0x00001111
() RSB.W. R8, R9, #0x10
your () ADD R&, R9, R3
of (i1) BIC.W R6, R8, #0x06
USIHHBieLINg
revealing (iv) ORR R8, R9 (08 Marks)

UH Any
mpUran
NULE!I. 5 a. Differentiate between: Kiodule-3
RISCand CISachitecture.
2.
Little Endian and Big Endian architecture. (08 Marks)
b. What are the feature oDthe following:
I2CbH
Optoeoupler
interface (08 Marks)

lof 2
 NSn

15Ec
systemdesign? Explain the role
OR inBbèdded (08 Marks)
of
memories used
6 a. What are the different types nem:
of each. (08 Marks)
following circuits in an
b. Explain theBrown-out protection unit.
()
(ii) Reset circuit.
What are
Module-4 development context.
embedded system design. (08 Marks)
7 a. an
Explainthe term quality attibutes inconsidered an embeddedsystem
embedded design.
tÝ be in the
the different quality attribûte? control data flow graph models in (08 Marks)
b. Explain Data flow graph and

OR (08 Marks)
a.
Explain the aitferent Embedded firmware design' approach in detail. (08 Marks)
b.
Explain tfi chàracteristics of an Embedded system.
Module-5
3
9
n the
a.
concept of 'deadlock' with a neat diagram, Mention the different conditioS
(08 Eaks
EXANrch favours a deadlock situation.
rie a block schematic of IDE enyironment for embedded system design and expntheir
functions in brief. oOgMarks)
OR
10 a.
hree processes with process IDs P, Pz, P, with estimated completjontime 10, 5, 7
milliseconds respectively enters the ready queue together. A new proçessP4With estimatea
completiòn time 2 ms enters the 'Ready' queue after 2 ms. Calculate e waiting tÉme for all
the processes and the turn around time for all the
processes.Aso, calculate the average
waiting time and average turn around time. The algorithm 4so s SJF (Shortest Job First)
based preemptive scheduling. Assumne all the process cgttàn ónly CPUoperation and no
VOoperation are involved.
b. Mention the sequence of operations for (08 Marks)
draw the interfacing diagram. embeddingthe\irmware with a programmer and
(08 Marks)
 USN
GBGS SCHEME 15EC62
a
Sixth Sem ester B.E, Degree
ARM Examination Dec.2018/Jan.2019
Microcontroller and Embedded Systems
Time: 3 hrs.
Max. Marks: 80
malpractice. Note: Answer any FIVE full
questions, choosing"
ONE full question from each module.

as
treated 1
Module-1
A. Explain architectural features of cortex M3 with block
b. Briefly describe the special registers of cortex M3. diagram. (07 Marks)
be c What is stack and what are the instructions to access (06 Marks)
pagwill stack? (03 Marks)
biaHR
50,
42+8=
Temalng OR
a. Briefly discuss feaures of built in nested vector interrupt controller. (08 Marks)
eg, b. Write a short note on :
LITewritten i) Debugging support
UIT i) Interrupts ánd exceptions supported bycortex M3, (08 Marks)
TIIIS
equations
CIUSS
Module-2
/or
duBOIal 3 a. Explain memorý map of cortex M3with diagram. (08 Marks)
and b. Write C language program to toggle an LED with'small delay in cortex M3. (05 Marks)
evaluator C. Explain the 32 bit multiply instruction set. (03 Marks)
ulu
OTJ
to OR
appeal (07 Marks)
4 a. Explain arithmetic instruction set with,example.
identification,b. Briefly explain shift and
rotate instructions with diagrans. (07 Marks)

c. Explain'working of following instructions: (02 Marks)

i) CMP ii) TST ii) CMN iv) REV.

of
Module-3
revealing with an I2C slave device. (08 Marks)
5 a Explain the sequenceiof operationsfor communicating
b. Write the differences between :
Any i) RISC and C]SC (08 Marks)
2. ii) Harvárd, architecture and Von Neumann architecture.

OR
(06 Marks)
6 a. Briefly explain PLDs and types of PLDs.
b. Write short note on:
i) Optocoupler (08 Marks)
ii) COTS. (02 Marks)
C. Explain working of DRAM.
lof 2
 7 a,
List and explain Modulc-4
C,
b. charactcristics of
Briefly describe any two operational cmbedded
an system
Define and classify and two non
clectronic control units. operational quality attributes, (06 Marky
(08 Marks,
(02 Marks)
a.
b. Discuss fundamental issues in OR
C. Different iate betwccn DFGandhardware software co-design.
Explain
applicat ion.different types of CDFG with example.
(08 Marks)
scrial interface buses (04 Marks)
deployed in automatic embedded
(04 Marks)
a.
b. Define procesS and
C. Explain
functional Module-5
explain process states and státes
Differentiate betweenrequirements to be analysed
threads and process, in transition diagram.
selection of an RTOS.
(07 Marks)
(06 Marks)
10 a.
(03 Marks)
b. Explain round robin
Three iOR
respectively scheduling
process with process IDstechnique.
enters ready queue P1, P2, P3 with
2ms enters ready A new estimated (03 Marks)
C.
turnaround queue after tögether.
time with help of 2ms. Calculate waiting completion
process P4 with estimatedtime 10, 5, 7 ms
Explain concept
scheduling. turnaround tÉmecompletion
preemptive
of pipe for SJF time, time
IPC. and
(10average
Miarks)
** (03 Marks)
 am

GBGS SCHEME 15EC62

SN

Sixth Semester B.E.Degree Examination, Aug./Sept. 20z0

ARM Microcontroller and Embedded System
Max. Marks: 80
Time:3 hrs.
module.
Note: Answer any FTVEfull questions, choosing ONE full (uestion from each

Module-1 diagram.
a
Explain the architecture of ARM Cortex-M3,processor with the help of neat block(08 Marks)
(04 Marks)
b. Describe the memory map of Cortex-M3 with neat diagram. (04 Marks)
List the applications of ARM processor.
ORy operating
levels. Depict the (06
2 a. Discuss the operating modes of cortex-M3-at different privelege Marks)
modes with state diagram. (04 Marks)
cg, h. Explain two stack model of cortex-M3 with diagrams. (06 Marks)
written
C. Describe thespecial function registers, of cortex-M3.
equations Module-2
instructions : QLDMIA ) BFC i) SXTB. (06 Marks)
3 a. Explain the working of following (04 Marks)
/or b. Write on ALP to add two 64-bit numbers. (06 Marks)
resisters in C.
and C. Explain any two methodsof accessing memory m¯pped
valuator OR
example, explain assembler sequence to write a bit
compulsorily
dr 4 a. What is bit-bandoperations?
with and withoutbit-band.
With 'an (06 Marks)
(05 Marks)
toappcal
CAanguage program to toggle an LED with asm¡ll delay in cortex M3. (05 Marks)
b. Write a
identification, C. Explain the working of TBB instruction.
answers, Module-3
different with neat
types of RAM and explain any one (06
5 a. Define the term RAM. Mention Marks)
your Circuit diagram. (06 Marks)
complofrevcaling
eting explain the `PI bus.
5 With a neat interfacing diagramFPGAfand CPLD. (04 Marks)
c. Bring out differençes'between
OR
Or system is built. Discuss any two in detail.
2.Any
6 a. Mention all the cores around which an embedded (08 Marks)
1.:Note (04 Marks)
Important b. Write a note on embedded finware.
C. Explain the importance ofbrown out
protection circuit with,a neat diagram. (04 Marks)

Module-4 (06 Marks)

a. Discuss the 6 operation quality attributes of an embedded system. monitoring
of automatic seat belt
b. With FSM model, explain the design and operation (06 Marks)
system. (04 Marks)
C. Compar CDFG and DFG with an example.
1of 2
 15E06
language
OR
language to
machine ConverSion
(05 Marks)
explain high level
8 a, Witlh a neat flow diagram,
design ofa washing machine and
process. usedin the (06 Marks)
b. With a block diagram, mention the components (05 Marks)
also explain its working. system.
embedded
C.
Describe in brief the typical characteristics ofan
Module-5 explain the different function of
a.
Define the term operating system. With a neat diagram
diagram (08 Marks)
operating system. (08 Marks)
O DiscUss the different téchnigues ior embedding the fireware into the targel
OR (02 Marks)
10 a. Bring out differencà between simulator and emulator.
O Descrnbe a preemptive SJF scheduling, Determine average turnaround time ana avelage
Waiting time, if process P1, P2 and P3with estimated completion time of 1.2, 6, 7
milliseconds enter ready queue together and later P4 with a completion tÉme of 2 msce
enters ready queue after 2ms. (07 Marks)
C. Explain the terms process, task and thread. (07 Marks)

M K

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 GBGS SCHEME 15EC62

USN

Sixth Semester B.E. Degree Examinatíon, June/July 201

ARM Micro Controller and Embedded Systems
Max. Marks: 80
Timc:3 hrs.

malpractice. choosing
Note:Answer any FIVE full questions,module:
ONE fulluestion from each

as Module-1 (08 Marks)

treated diagram.
Explain the architecture of ARM cortex- M3 processor with neat cortex M3. (08 Marks)
a
privilege levels in
naoesbe b. With neat diagram, explain operation mode and
will
blankS0, OR A (07 Marks)
operation. With the help of a neat diagram.
=
remaining 2 a. What is stack? Explain push and pop cortex M3 processor.
(09 Marks)
42+8 b. Explain in detail special registers used in ARM
cg, Module-2 (08 Marks)
thcwritten
a. Write anALPto calculate the sum of1 to 10 numbers.SBEX iii)ASR iv) MRS.
(04 Marks)
on 3
instruction Set: i) BFC ii) (04 Marks)
lincs
cquations b. Explain the following standard access. Intetface for Embedded software.
C. Explain how CMSIS provides
cross
OR (08 Marks)
/or
diagonal C language.
and 4a. Write a program to blink à LED using
directives AREA, ENTRY, DCB; ALIGN.
(04 Marks)

cvaluator b. Explain the following assembler (04 Marks)

supported bycortex M3.
c. Explain different bus interfaces
draw
compulsorily
to Module-3 (08 marks)
âre classified.
a. Explain howembedded system
appeal (08 Marks)
5
diagram, explain,the element ofembedded system.
idcntification,b.
With néat block
answers,
OR (04 Marks)
and CISC.
your 6 a. Differentiate between. RISe
memory are classified.
(08 Marks)
program
b. Explain how brown-out
(04 Marks)
of protection circuits works.
completing
revealing c.y Explain how
Module-4 (10 Marks)
operational and nonoperational attributes of an embedded systems. (06 Marks)
OnAny What are the communication.
a.
different types ofserial'interface bus used in automotive
1. 2. b. Explain
:Note
OR (06 Marks)
ToRortant 8 in hard ware software co-design. file translation take place.
a. Explain fundamental issu¿sdiagram how source file to object (06 marks)
b. Explain with a neaeblock (04 Marks)
approach ofembedded firmware design.
Explain K based
superloop
C.M - KM

lof 2
 a m

15EC62

(08 marks)
Module-5 (04 marks)
operating system architecture. example for
a. With neat diagram explain with an
systems are classified. time syystem
(04 Marks)
b. Explain how operating real time system and soft real
C. Differentiate between hard
each.
(08 marks)
OR
cxplain embedded system development environment. preemptive SJF
10 a. With neat diagram, time, waiting time using (04 Marks)
the following jobs calculate the tunaround
b. For
scheduling algorithm.
Jobs CPU bust time Arrivaltime
1 10 0.0
2 3.0
4.0
4 4 5.0

VTU Programihing] and in system programming. (04 MarkS)

C.
Write a note on AP(hApplication
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M -K : 1 9 a m

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M -K