Unit:- 1 Number system and Binary arithmetic operations

Number System:- In digital electronics, the number system is used for representing the
information. The number system has different bases and the most common of them are the
decimal, binary, octal, and hexadecimal. The base or radix of the number system is the
total number of the digit used in the number system. Suppose if the number system
representing the digit from 0 – 9 then the base of the system is the 10.
Types of Number Systems:-
1. Decimal Number System
2. Binary Number System
3. Octal Number System
4. Hexadecimal Number System

Binary Number System :- Number System with base or radix value 2 is termed as
Binary number system. It uses 2 digits i.e. 0 and 1 for the creation of numbers. The
modern computers do not process decimal number; they work with another number system
that is binary number system. The digital electronic equipments are works on the binary
number system and hence the decimal number system is converted into binary system. The
binary number system is very useful in electronic devices and computer systems because
it can be easily performed using just two states ON and OFF or True and False or High
and Low i.e. 0 and 1. The Binary number system is represented by (1100) 2 , (0011)2 .

The numbers in this system may possess both integer and fraction are
separated by a dot (.). The part of the number , which lies to the left of the binary point is
known as integer part. Similarly , the part of the number which lies to the right of the
binary point is known as fractional part.
The successive positions to the integer part of the binary point have weights of
0 1 2
2 , 2 , 2 and so on. Similarly , the successive positions to the fractional part of the
binary point having weights of 2 -1 , 2-2 , 2-3 and so on. That means , each positions has
specific weight, which is power of base 2.
For example, Suppose A = 100.101 be a binary number. The integer part of this number
is 100 and the fractional part of this number is 0.101. the digits 1, 0 and 0 of integer part
have weights of 20 , 21 and 22 respectively. Similarly ,the digits 1, 0 and 1 of fractional part
have weights of 2-1 , 2-2 and 2-3 respectively.
Mathematically , we can express it as,
(100.101)2 = (1x22)+( 0x21 )+ (0x20 )+ (1x2-1 )+ (0x2-2 )+ (1x2-3)
Characteristics of Binary Number System :-
1. It holds only two values, i.e., either 0 or 1.
2. It is also known as the base 2 number system.
3. The position of a digit represents the 0 power of the base(2). Example: 20
4. The position of the last digit represents the x power of the base(2). Example: 2 x,
where x represents the last position, i.e., 1

Advantage of Binary Number System :-

1. The main advantage of using binary is that it is a base which is easily represented by
electronic devices.
2. The Binary Number System are also ease of use in coding, fewer computations and
less computational errors.
Disadvantage of Binary Number System :-
1. The major disadvantage of binary number is difficult to read and write for humans
because of large number of binary of a equivalent decimal number.
Application /Uses of Binary Number System:-
1. Useful in computer technology and computer programming languages.
2. Helpful in digital encoding.
3. The binary number system can also be used in Boolean algebra.

Decimal Number System:- Number system with a base value of 10 is termed a Decimal
number system. It uses 10 digits i.e. 0 to 9 for the creation of numbers. Here, each digit in
the number is at a specific place with place value of a product of different powers of 10.
Here, the place value is termed from right to left as first place value called units, second
to the left as Tens, so on Hundreds, Thousands, etc. the Decimal number are represented
by (10264)10 , (156)10.

The numbers in this system may possess both integer and fraction are
separated by a dot (.). The part of the number , which lies to the left of the decimal point
is known as integer part. Similarly , the part of the number which lies to the right of the
decimal point is known as fractional part.
The successive positions to the integer part of the decimal point have weights
of 10 , 10 , 102 and so on. Similarly , the successive positions to the fractional part of
0 1

the decimal point having weights of 10 -1 , 10-2 , 10-3 and so on. That means , each
positions has specific weight, which is power of base 10.
Example:- The number 250.36 is interpreted as,
(250.36)10 = 2x102+5x10x1+0x100 +3x10-1+6x10-2
Characteristics of Decimal Number System :-
1. A Decimal number system carries Ten digits starting from 0, 1, 2, 3, 4, 5, 6, 7, 8,
and 9.
 2. It is also known as the base 10 number system.
3. The position of a digit represents the 0 power of the base(10). Example: 100
4. The position of the last digit represents the x power of the base(10). Example: 10x,
where x represents the last position, i.e., 1

Advantage of Decimal Number System:-

1. The main advantages of Decimal Number System are easy readable.

2. Used by humans.
3. Easy to manipulate.

Disadvantage of Decimal Number System:-

1. Wastage of space.
2. Wastage of time.

Application /Uses of Decimal Number System:-

1. It is used in many everyday applications, such as measuring weight, length, and

time.
2. It is also used in currency and in many mathematical and scientific calculations.
3. One of the most effective uses of the decimal number system is in the representation
of fractional values, such as 0.1, 0.01, and 0.001.
4. Another effective use of the decimal number system is in the representation of large
numbers. For example, the number 1,000,000 can be represented as 10 6 in decimal
form, which makes it easy to understand and work with.

Octal Number System :- Octal Number System is one in which the base value is 8. It
uses 8 digits i.e. 0 to 7 for the creation of Octal Numbers. Octal Numbers can be
converted to Decimal values by multiplying each digit with the place value and then
adding the result. Here the place values are 80, 81, and 82. Octal Numbers are useful for
the representation of UTF8 Numbers. It is represented by (234) 8 , (543)8 etc.

The numbers in this system may possess both integer and fraction are
separated by a dot (.). The part of the number , which lies to the left of the octal point is
known as integer part. Similarly , the part of the number which lies to the right of the
octal point is known as fractional part.
The successive positions to the integer part of the octal point have weights of
0 1 2
8 , 8 , 8 and so on. Similarly , the successive positions to the fractional part of the octal
point having weights of 8 -1 , 8-2 , 8-3 and so on. That means , each positions has specific
weight, which is power of base 8.
For Example:- The number 255.36 is interpreted as,
(255.36)8 = 2x82+5x81+5x80 +3x8-1+6x8-2
Characteristics of Octal Number System :-
1. An octal number system carries eight digits starting from 0, 1, 2, 3, 4, 5, 6, and 7.
2. It is also known as the base 8 number system.
3. The position of a digit represents the 0 power of the base(8). Example: 80
4. The position of the last digit represents the x power of the base(8). Example: 8 x,
where x represents the last position, i.e., 1.

Advantage of Octal Number System:-

1. It uses less digits than decimal and Hexadecimal number system. So, it has fewer
computations and less computational errors.
2. It uses only 3 bits to represent any digit in binary and easy to convert from octal to
binary and vice-versa.
3. It is easier to handle input and output in the octal form.

Disadvantage of Octal Number System:-

1. The major disadvantage of Octal number system is that computer does not
understand octal number system directly, so we need octal to binary converter.
Application /Uses of Octal Number System:-

1. Octal is used when the number of bits in one word is a multiple of 3.

2. It is also used as shorthand for representing file permissions on UNIX systems.
3. representation of UTF8 numbers

Hexadecimal Number System:- Number System with base value 16 is termed as

Hexadecimal Number System. It uses 16 digits for the creation of its numbers. Digits
from 0-9 are taken like the digits in the decimal number system but the digits from 10-15
are represented as A-F i.e. 10 is represented as A, 11 as B, 12 as C, 13 as D, 14 as E, and
15 as F. it is represented by (234A) 16 , (675F)16 etc.

The numbers in this system may possess both integer and fraction are
separated by a dot (.). The part of the number , which lies to the left of the hexa-decimal
point is known as integer part. Similarly , the part of the number which lies to the right of
the hexa-decimal point is known as fractional part.
The successive positions to the integer part of the hexa-decimal point have
weights of 160 , 161 , 162 and so on. Similarly , the successive positions to the fractional
part of the hexa-decimal point having weights of 16 -1 , 16-2 , 16-3 and so on. That means ,
each positions has specific weight, which is power of base 16.
For Example:- The number 25A.36 is interpreted as,
(25A.36)8 = 2x162+5x161+Ax160 +3x16-1+6x16-2

Characteristics of Hexa-decimal Number System :-

 1. It has ten digits from 0 to 9 and 6 letters from A to F.
2. The letters from A to F defines numbers from 10 to 15.
3. It is also known as the base 16number system.
4. In hexadecimal number, the position of a digit represents the 0 power of the
base(16). Example: 160
5. In hexadecimal number, the position of the last digit represents the x power of the
base(16). Example: 16x, where x represents the last position, i.e., 1

Advantage Hexa-decimal Number System :-

1. It uses less memory to store more numbers, for example it store 256 numbers in two
digits whereas decimal number stores 100 numbers in two digits.
2. This number system is also used to represent Computer memory addresses.
3. It uses only 4 bits to represent any digit in binary and easy to convert from
hexadecimal to binary and vice-versa.
4. It is easier to handle input and output in the hexadecimal form.
5. There is wide number of advantages in data science field, artificial intelligence and
machine learning.
Disadvantage Hexa-decimal Number System:-

1. It may not an easy to read and write for people, and also difficult to perform
operations like multiplications, divisions using hexadecimal number system.
2. Hexadecimal numbers is most difficult number system for dealing with Computer’s
data.

Application /Uses of Hexa-decimal Number System:-

1. It is commonly used in Computer programming and Microprocessors.

2. It is also helpful to describe colors on web pages.
3. Hexadecimal number system is used to describe locations in memory for every byte.
4. These hexadecimal numbers are also easier to read and write than binary or decimal
numbers for Computer Professionals.

Base Conversion:-

Rules For Decimal Number to other Bases Conversion:-

Rule 1 (Decimal Number System to Binary Number System) :- To convert a decimal

number to Binary number , repeatedly divide the decimal number by 2 and keep track of
the remainders. The binary equivalent of the decimal number is the sequence of remainders
in reverse order.
Rule 2 (Decimal Number System to Octal Number System) :- To convert a decimal
number to Octal number , repeatedly divide the decimal number by 8 and keep track of the
remainders. The octal equivalent of the decimal number is the sequence of remainders in
reverse order.

Rule 3 (Decimal Number System to Hexadecimal Number System) :- To convert a

decimal number to Hexadecimal number , repeatedly divide the decimal number by 16 and
keep track of the remainders. The hexadecimal equivalent of the decimal number is the
sequence of remainders in reverse order where the remainders 10 to 15 are represented by
the letters A to F.

Rule 4 ( For fractional Part) :- We can multiply the fractional part and note down the
carry till the result is zero and write from top to bottom

Conversion Problem with Solution:-

1. Decimal number to Binary number:-

Step1:- Divide the given decimal number by “2”

Step2:- By placing all the remainders in order in such a way, the Least Significant Bit
(LSB) at the top and Most Significant Bit (MSB) at the bottom, the required binary number
will be obtained from MSB to LSB.

Now, let us convert the given decimal number (294)10 into a binary number.

Divide by 2 Result Remainder Binary Value

294 ÷ 2 147 0 0 (LSB)

147 ÷ 2 73 1 1

73 ÷ 2 36 1 1

36 ÷ 2 18 0 0

18 ÷ 2 9 0 0

9÷2 4 1 1

4÷2 2 0 0
 2÷2 1 0 0

1÷2 0 1 1 (MSB)

Therefore, the binary equivalent for the given decimal number (294)10 is (100100110)2

29410 =1001001102

For integer and fractional part :-

Step 1 :- Divide the integer part by 2 and write the bottom to top.
Step 2 :- Multiply the fractional part by 2 and note down the carry till the result is
zero and write the carry from top to bottom.
Step 3 :- Combine the result of Step 1 and Step 2.

Convert decimal number (10.25) 10 to Binary number:-

Note: Keep multiplying the fractional part with 2 until decimal part 0.00 is obtained.
(0.25)10 = (0.01)2
Answer: (10.25)10 = (1010.01)2

2. Decimal number to Octal number :-

Step1:- Divide the given decimal number by 8.
Step2:- If the given decimal number is less than 8 the octal number is the same.
Step3 :- Repeat , the quotient till it is less than 8.
Step3 :-By placing all the remainders in order in such a way, the Least Significant
Bit (LSB) at the top and Most Significant Bit (MSB) at the bottom, the required
Octal number will be obtained from MSB to LSB(Bottom to Top).

For example: Convert (1792)10 into an octal number.

Decimal Number Operation Quotient Remainder

1792 ÷8 224 0

224 ÷8 28 0

28 ÷8 3 4

3 ÷8 0 3

Therefore, (1792)10 = (3400)8

Convert the decimal number (350)10 to an octal number.

Therefore, (350)10 = (536)8.

For integer and fractional part :-

Step 1 :- Divide the integer part by 8 and write the MSB to LSB.
Step 2 :- Multiply the fractional part by 8 and note down the carry till the result is
zero and write the carry from top to bottom.
Step 3 :- Combine the result of Step 1 and Step 2.

Convert decimal number (10.25) 10 to octal number.

Integer part : 10
8 10 2
1

(10)10 = (12)8

Fractional part:
0.25 x 8 = 2.00
Note: Keep multiplying the fractional part with 8 until decimal part .00 is obtained.
(.25)10 = (.2)8
Answer: (10.25)10 = (12+0.2)8 = (12.2)8

3. Decimal number to Hexadecimal number :-

Step1:- Divide the given decimal number by 16.
Step2:- If the given decimal number is less than 16, the hexadecimal number is the same.
Step3 :- Repeat , the quotient till it is less than 16.
Step3 :-By placing all the remainders in order in such a way, the Least Significant
Bit (LSB) at the top and Most Significant Bit (MSB) at the bottom, the required
hexadecimal number will be obtained from MSB to LSB(Bottom to Top).

For example, Convert Decimal number (1228)10 into Hexadecimal number.

Solution:

Divide by 16 Quotient Remainder Hex Value

1228 ÷ 16 76 12 C

76 ÷ 16 4 12 C

4 ÷ 16 0 4 4

Therefore, (1228)10 = (4CC)16

For Example, Convert decimal number (910)10 to Hexadecimal number

Answer : (910)10 = (38E)16

For integer and fractional part :-

Step 1:- Divide the integer part by 16 and write the MSB to LSB.
Step 2:- Multiply the fractional part by 16 and note down the carry till the result is
zero and write the carry from top to bottom.
Step 3 :- Combine the result of Step 1 and Step 2.

For example, Convert decimal number (32.16) 10 to Hexadecimal number.

Integer part : (32 ) 10

16 32 0

(32)10 = (20)16

Fractional part : (0.16)10

Fractional part:
0.16 x 16 = 2.56 _____2
0.56x16 = 8.96 _____8
0.96x16= 15.36 _______15
0.36x16= 5.76 _________5
0.76x16= 12.16 __________12
In this case, we have 5 digits as answer and the fractional part is still not 0 so, we stop here.

(0.16)10 = (0.28F5C)16
Answer: (32.16)10 = (20+0.28F5C)16 = (20. 28F5C)16

Rules For Binary Number to other Bases Conversion:-

Rule 1 (Binary Number System to Decimal Number System) :- To convert a binary

number to Decimal number ,multiply each binary digits by 2 n , where n is the position of
the binary digit, starting from right side with n=0.

For example, Convert the binary number (1101)2 into a decimal number.

Solution:

Given binary number = (1101)2

Now, multiplying each digit starting from right side with n=0.

1 × 23 + 1 × 2 2 + 0 × 2 1 + 1 × 2 0

=8+4+0+1

= 13

Thus, the equivalent decimal number for the given binary number (1101)2 is (13)10

For example, Convert the binary number (1101.11)2 into a decimal number.

Mathematically , we can write it as,

(1101.11)2 = (1x23) + (1x22) + (0x21) + (1x20) + (1x2-1) + (1x2-2)

= 8+4+0+1+0.5+0.25

= (13.75)10

Thus, the equivalent decimal number for the given binary number (1101.11)2 is (13.75)10

Rule 2 (Binary Number System to Octal Number System) :-

Step 1: Consider the binary number.

Step 2: For the integer part, group the binary digits into set of three starting from the
rightmost digit(MSB). If rightmost digit (MSB) group lacks bits to form group of 3
bits then add extra zero (0) to the leftmost side in integer part.
Step 3: For the fraction part, group the binary digits into set of three starting from the
leftmost digit (LSB). If leftmost digit (LSB) group lacks bits to form group of 3 bits
then add extra zero (0) to the rightmost side in fractional part.
Step 4: Each set of three binary digits should be converted to one octal digit.

For example, Convert binary number (1010111100)2 to Octal number

Solution,
Making a group of three digit starting from rightmost side,
= 1 010 111 100
Adding two 0 to complete the set in leftmost side,
= 001 010 111 100 4 2 1

Now write the octal equivalent number 2 2 21 2 0 OR 100 = 1x22+0x21+0x20

= 1 2 7 4 1 0 0 = 4+0+0 = 4
So, (1010111100)2= (1274)8. answer
For example, Convert binary number (0110011.1011)2 into octal number.
Solution ,
Making a group of three digit starting from rightmost side for integer part and leftmost
side for fractional part ,
= 0 110 011 . 101 1
(single 0 can be ignored) ( Integer part) ( Fractional part)
Adding two 0 to complete the set in rightmost side in fractional part,
= 110 011 . 101 100
Now write the octal equivalent number,
= 6 3 . 5 4
So, (0110011.1011)2 = (63.54)8
Note :
Octal Digit Value Binary Equivalent

0 000

1 001
2 010

3 011

4 100

5 101

6 110

7 111

Rule 3 ( Binary Number System to Hexadecimal Number System) :-

Step 1: Consider the binary number.

Step 2: For the integer part, group the binary digits into set of four starting from the
rightmost digit(MSB). If rightmost digit (MSB) group lacks bits to form group of 4
bits then add extra zero (0) to the leftmost side in integer part.
Step 3: For the fraction part, group the binary digits into set of four starting from the
leftmost digit (LSB). If leftmost digit (LSB) group lacks bits to form group of 4 bits
then add extra zero (0) to the rightmost side in fractional part.
Step 4: Each set of four binary digits should be converted to one hexadecimal digit.
For example, Convert binary number (1010101101011)2 into hexadecimal number.

Solution,

Making a group of four digit starting from rightmost side,

= 1 0101 0110 1011
Adding three 0 to complete the set in leftmost side,
= 0001 0101 0110 1011
Now write the octal equivalent number
= 1 5 6 B [ B=11]
So, (1010101101011)2 = (156B)16 answer
For example, Convert binary number (001100101.110111)2 into hexadecimal number.
Solution ,
(001100101.110111)2
Making a group of four digit starting from rightmost side for integer part and leftmost
side for fractional part ,
= 0 0110 0101 . 1101 11
(single 0 can be ignored) ( Integer part) ( Fractional part)
Adding two 0 to complete the set in rightmost side in fractional part,
= 0110 0101 . 1101 1100
Now write the octal equivalent number,
= 6 5 . D C
So, (001100101.110111)2 = (65.DC)16 answer
Note :
Binary Hexadecimal

0000 0

0001 1

0010 2

0011 3

0100 4

0101 5

0110 6

0111 7

1000 8

1001 9

1010 A

1011 B

1100 C

1101 D

1110 E

1111 F
Rules For Octal Number to other Bases Conversion:-

Rule 1 (Octal Number System to Decimal Number System) :- To convert a octal

number to Decimal number ,multiply each octal digits by 8 n , where n is the position of the
octal digit, starting from right side with n=0 in integer part.

For example, Convert the octal number (232)8 into a decimal number.

Solution:

Given octal number = (232)8

Now, multiplying each digit by 8n starting from right side with n=0.

= 2 × 82 + 3 × 81 + 2 × 80

= 2x64 + 3x8 + 2x1

= 128+24+2

= 154

Thus, the equivalent decimal number for the given octal number (232)8 is (154)10

For example, Convert the octal number (244.21)8 into a decimal number.

Solution ,

Mathematically , we can write it as,

(244.21)8= (2x82) + (4x81) + (4x80) + (2x8-1 + (1x8-2)

= 2x64+4x8+4x1+0.25+0.02

= 128+32+4+0.25+0.02

(13164.27)10

Thus, the equivalent decimal number for the given octal number (244.21)8 is (13164.27)10 .
answer

Rule 2 (Octal Number System to Binary Number System) :-

Step 1 :- Convert each octal digit to a 3 digit binary number (the octal digits may be
treated as decimal for this conversion).
Step 2 :- Combine all the resulting binary groups (of 3 digits each) into a single binary
number.

For example, convert octal number (75)8 to Binary number.

Solution ,
(75)8
Convert each octal digit to a 3 digit binary number
7 = 111
5 = 101
Now combine all resulting binary group into single binary number,
(75)8 = ( 111101)2
So ,the octal number (75)8 is equivalent to the binary number ( 111101)2.

For example, convert octal number (140.22)8 to Binary number.

Solution ,
(140.22)8
Convert each octal digit to a 3 digit binary number
1= 001
4= 100
0= 000
2= 010
2= 010
Now combine all resulting binary group into single binary number,
(140.22)8 = (001100000.010010)2.
So ,the octal number (140.22)8 is equivalent to the binary number (001100000.010010)2 or
(1100000.010010)2. Answer

Rule (Octal Number System to Hexadecimal Number System) :-

Step 1 :- Convert octal number to Binary number.

Step 2 :- Convert Binary number to Hexadecimal number.

For example, convert octal number (75)8 to Hexadecimal number.

Solution ,
(75)8
First Convert each octal digit to a 3 digit binary number
7 = 111
5 = 101
Now combine all resulting binary group into single binary number,
(75)8 = ( 111101)2
Then, Convert Binary number ( 111101)2 to Hexadecimal
Making a group of four digit starting from rightmost side,
= 11 1101
Adding two 0 to complete the set in leftmost side,
= 0011 1101
Now write the octal equivalent number
= 3 D
So ,the octal number (75)8 is equivalent to the hexadecimal number ( 3D)16.

Rules For Hexadecimal Number to other Bases Conversion:-

Rule 1 (Hexadecimal Number System to Decimal Number System) :- To convert a

hexadecimal number to Decimal number ,multiply each hexadecimal digits by 16 n , where
n is the position of the hexadecimal digit, starting from right side with n=0.

For example, Convert the hexadecimal number (32B)16 into a decimal number.

Solution:

Given hexadecimal number = (32B)16

Now, multiplying each digit by 16n starting from right side with n=0.

=3 × 162 + 2 × 161 + B × 160

= 3x 256+ 2x16 + 11x1

= (811) 10

Thus, the equivalent decimal number for the given hexadecimal number (32B) 16 is (811)10

For example, Convert the hexadecimal number (32B.38)16 into a decimal number.

Mathematically , we can write it as,

(32B.38)16 = (3 × 162 )+( 2 × 161 )+ (B × 160) + (3x16-1) + (8x16-2) 3/16 , 8/162

= 3x 256+ 2x16 + 11x1+0.19+0.031 B=11
= (811.221)10

Thus, the equivalent decimal number for the given binary number (32B.38)16 is (811.221)10

Rule2 hexadecimal to Binary:-

To convert a hexadecimal number to binary we write 4-bit binary equivalent of each
hexadecimal digit in the same order.
4-bit binary equivalents of hexadecimal digits are shown below.

Hexadecimal 4 bit binary

0 0000

1 0001

2 0010

3 0011

4 0100

5 0101

6 0110

7 0111

8 1000

9 1001

A 1010

B 1011

C 1100

D 1101

E 1110

F 1111
Binary Addition:- The result of the addition of two binary numbers is also a binary
number. To obtain the result of the addition of two binary numbers, we have to add
the digit of the binary numbers by digit. The table added below shows the rule of
binary addition.
A B Addition Carry

0 0 0 0

0 1 1 0

1 0 1 0

1 1 0 1

For example,

101

(+) 101

————-

1010

Binary Subtraction:- The result of the subtraction of two binary numbers is also a binary
number. To obtain the result of the subtraction of two binary numbers, we have to
subtract the digit of the binary numbers by digit. The table added below shows the rule of
binary subtraction.

A B Subtraction Borrow

0 0 0 0

0 1 1 1

1 0 1 0

1 1 0 0

For example, 11111

(-) 1000

10111
Binary Multiplication:- The multiplication process of binary numbers is similar to
the multiplication of decimal numbers. The rules for multiplying any two binary
numbers are given in the table,
A B Multiplication

0 0 0

0 1 0

1 0 0

1 1 1
For example,

Binary Division: The division method for binary numbers is similar to that of the
decimal number division method. Let us go through an example to understand the
concept better.
Example: Divide (101101)2 by (110)2
Solution:

1’s Complement of a Binary Number:-1’s Complement of a Binary Number is

obtained by inverting the digits of the binary number.
Example: Find the 1’s complement of (10011) 2.
Solution:
Given Binary Number is (10011) 2
Now, to find its 1’s complement, we have to invert the digits of the given number.
Thus, 1’s complement of (10011) 2 is (01100)2
2’s Complement of binary number:- 2’s Complement of a Binary Number is obtained
by inverting the digits of the binary number and then by adding 1 to the least significant
bit.
Example: Find the 2’s complement of (1011) 2.
Solution:
Given Binary Number is (1011) 2
To find the 2’s complement, first find its 1’s complement, (1011) 2  (0100)2
Now, by adding 1 to the least significant bit (0100+1) , we get (0101) 2
Hence, the 2’s complement of (1011) 2 is (0101)2

Multiple choice questions. ( From unit 1)

1) The Decimal equivalent of 2D16 is ……..

a. 0010 1101 b. 55 c. 65 d. 45
2) Binary equivalent of AA16 is………..
a. 1010 1010 b. 1011 1101 c. 1100 1010 d. 1010 0101
3) The weighted code has………..
a. Positional value b. No positional value
c. Excess-3 is weighted code d. All of above
4) Bird singing is a ………
a. Analog signal b. Digital signal c. Both d. None
5) Digital signals have…….
a. High bandwidth b. High Accuracy c.
fast processing d. All of above
1 0
6) 3 x 10 + 4 x 10 is
a. 340 b. 3.4 c. 0.34 d. None
7) The decimal equivalent of 1000 is…..
a. 8 b. 4 c. 12 d. None
8) The decimal equivalent of (0.1101)2 is………………………………………
a. 0.8122 b. 0.8123 c. 0.8124 d. 0.8125
9) The binary code of (21.125)10 is…….
a. 10101.001 b. 10100.001 c. 0.10101.010 d.10100.111
10) Which of the following is not a binary number?
a. 10110 b. 120 c. 00 d.11
11) Binary number consist of only ………
a. 0 and 2 b. 1 and 2 c. 0 and 1 d.1 and 1
12) Octal number range is from……….
a. 0 to 2 b. 1 to 6 c. 0 to 8 d.0 to 7
13) Decimal number is from……….
a. 0 to 9 b. 1 to 9 c. 0 to 10 d.1 to 10
14) Hexadecimal number range is from……….
a. 0 to 9 b. 0 to 9 and A to F c. 0 to 10 and A and F d.1 to 10
15) The given hexadecimal number (1E.53)16 is equivalent to…..
a. (35.684)8 b. (36.246)8 c. (34.340)8 d. (35.599)8

Short answer questions and

1.Define number system with example.
2. What are the characteristics of Binary number system
 3. Convert the following as indicated.
a) 11001+10011 b) 11001-10011 c) (22)10=(?)16 d)(167)8=(?)10
4. Convert decimal number into hexadecimal and octal number.
a) 12.25 b) 35 c) 125.55 d) 45
5. Write the advantage and disadvantage of Binary number system.
6. Represent the following number in 1's and 2's complement form.
a) 111010 b) 00110 c) 11001 d) 101001

Long answer question.

7. Convert the binary number into decimal number.
a) 111.001 b) 101011 c) 11.01 d) 01110
8. Convert the octal number into hexadecimal number.
a) 54 b) 30 c) 306 d) 125.25
9. Convert the hexadecimal number to decimal number and octal number.
a) CD.A1 b) 25B c) 0FF d) F24.3A
10. Convert the number (126)10 into binary, octal and hexadecimal number.

Unit :-2 Concept of logic gate

Logic Gate :- A logic gate is a basic building block of digital circuits that implements a
logical operation on one or more inputs and produces an only one output. The most
common logic gates are AND, OR, NOT, NAND, NOR, XOR AND XNOR. The mix of
inputs applied across a logic gate to determine its output. Logic gates use Boolean
algebra to execute logical processes. Logic gates are found in nearly every digital gadget.
We use on a regular basis. Logic gates are used in the architecture of our telephones,
laptops, tablets, and memory devices.

Applications of Logic Gates:-

a) They are basically used in circuits involving computation and processing.

b) They are also used in push button switches. E.g. Door Bell.
c) They are used in the functioning of street lights.
d) AND Gates are used to enable/inhibit the data transfer function.
e) They are also used in TTL (Transistor Transistor Logic) and CMOS circuitry.
f) In manufacturing more complex devices e.g. binary counters etc.
g) In decision – making regarding automatic control of machines and different
industrial processes
h) In calculators and computers
i) In digital measuring techniques
j) In digital processing of communications
k) In musical instruments, games and different domestic appliances

Advantages of Logic Gates :-

 a) Logical Operations are performed using Boolean Algebra which makes the circuit
design more economical and simple.
b) Logic ‘1’ and Logic ‘0’ can be easily distinguished.

Disadvantages of Logic Gates:-

a) Operating Voltage is limited.

b) Time delay occurs between input and output.

Logic operator :- A logic operator is a symbol that is used to represent a logic gate, for
example ' & ' represents of the AND operator, ' | ' represents the OR operator, ' ~ '
represents the NOT operator etc.

There are mainly three Logic operator

1. AND Operator:
 The AND operator represents the logical multiplication.
 It is denoted by a dot (.) between the two variables to be multiplied, i.e. A.B.
 However, sometimes, this dot is not used and we simply represent logical
multiplication of A and B as AB. It is read as A and B.
2. OR Operator :
 The OR operator represents the logical addition.
 It is denoted by a plus (+) sign between the two variables to be added. i.e.
A+B
 It is read as A OR B.
3. NOT Operator ( Inverter) :
 The NOT Operator represents the logical inversion or complementing.
 It is denoted by the bar ( --- ) over the variable to be inverted, i.e. y-.
 It is read as inversion of y.

Truth table : A truth table is a table that shows all possible combinations of inputs and
outputs for a logic gate. All variations of the inputs or arguments are listed to the left,
while the output is usually placed in the last columns to the right.

Types of logic gate:

Basic logic gates :

1. OR Gate :
 A OR gate has a Two or more inputs and one output.
 The logic of this gate is that if at least one of the inputs is 1 ( High, True,
ON, CLOSED ), the output will be 1. If all the input are 0 ( Low, False, OFF,
OPEN ) , then output will be 0.
 The logical OR is represented with the symbol ' + '.
  The OR gate’s output will be given by the following mathematical
procedure if there are two inputs A and B and output Y, i.e. Y=A+B.

A B Y= A+B
0 0 0
0 1 1
1 0 1
1 1 1
Table: Truth table for OR gate with 2 inputs.

Figure1: Logic Diagram for OR Gate

Venn-diagram for OR gate

A Venn diagram is a visual representation of the outputs of a logic gate with different
inputs. A Venn diagram can be easily created with the truth tables. Here, using the Venn-
diagram , the OR gate operation can be verified. The Venn-diagram shows that output Y
exist whenever any of the input A or B is high.

Electrical circuit equivalent to OR gate operation:-

This electrical circuit representing two input OR gate operates as follows:-

  When A = 0 (open) and B = 0 (open), the lamp will be OFF, i.e. output Y = 0.
 When A = 0 (open) and B = 1 (close), the lamp will be ON, and current follows the
path through switch B. Hence, the output Y = 1.
 When A = 1 (close) and B = 0 (open), the lamp will be ON, i.e. current flow through
switch A making the output Y = 1.
 When A = 1 (close) and B = 1 (close), the lamp will be ON and current flows
through both switches A and B. Thus, the output Y = 1.

Pin out configuration of OR gate

VCC

GND

Figure: Pin out configuration of TTL IC 7432 OR gate

The OR gate is available in the monolithic integrated circuit form. IC 7432 is a logic gate
IC which consist of four OR Gates with a 14 pin TTL IC. The OR gate performs logical
OR operation. The OR gates come in form of DIP package ICs. Therefore, it is called as
Quad OR gate IC. Each gate has three terminal, two inputs and one output. So 3, 6, 8, 11
are output pins for OR gate. Pin 14 is for input voltage supply ( +5 v) and pin 7 is for
grounding. The four OR gates are completely independent to each other The ICs are made
by CMOS, TTL ( Transistor Transistor Logic ) technology.

Note : Pin Description of 7432 IC – OR Gate:

Pin Number Description

1 A Input Gate 1

2 B Input Gate 1

3 Y Output Gate 1

4 A Input Gate 2
 5 B Input Gate 2

6 Y Output Gate 2

7 Ground

8 Y Output Gate 3

9 A Input Gate 3

10 B Input Gate 3

11 Y Output Gate 4

12 A Input Gate 4

13 B Input Gate 4

14 Vcc – Positive Supply

2. AND Gate:-

 An AND gate has a two or more inputs and single output.

 The logic of this gate is that When all of the inputs are 1( High, True, ON,
CLOSED ), the output of this gate is 1. If at least one of the input is 0
( Low, False, OFF, OPEN ) , then output will be 0.
 The logical AND is represented with the symbol ' . '.
 The AND gate’s Boolean logic is Y=A.B if there are two inputs A and B and
output Y.

Truth table for AND gate with 2 inputs:

A B Y= A.B
0 0 0
0 1 0
1 0 0
 1 1 1
Logic Diagram for AND Gate:

Venn-diagram for AND gate:

A Venn diagram is a visual representation of the outputs of a logic gate with

different inputs. A Venn diagram can be easily created with the truth tables. The diagram
consist of an overlapping circles. Each circles are labelled with variables. Here, the shaded
portion represents the AND gate operation. When both variables are high (11), then output
exist with shaded portion.

Electrical circuit equivalent to AND gate operation:-

This electrical circuit representing two input AND gate operates as follows:-
 When A = 0 (open) and B = 0 (open), the lamp will be OFF, no current can flow
through the circuit. Hence, the output Y = 0.
 When A = 0 (open) and B = 1 (close), the lamp will be OFF, because no current can
flow through the circuit due to an open at switch A. Hence, the output Y = 0.
 When A = 1 (close) and B = 0 (open), the lamp will be OFF, and no current flows
through the circuit due to an open at switch B. Thus, the output Y = 0.
 When A = 1 (close) and B = 1 (close), the lamp will be ON as there is no break in
the circuit, so current can flow. Thus, the output Y = 1.

Pin out configuration of AND gate:-

The AND gate is available in monolithic integrated circuit form. IC 7408 is a logic gate IC
which consist of four AND Gates with a 14 pin TTL IC. The AND gate performs logical
AND operation. The AND gates come in form of DIP ( Dual Inline Packaged ) package
ICs. Therefore, it is called as Quad AND gate IC. Each gate has three terminal, two inputs
and one output. So 3, 6, 8, 11 are output pins for AND gate. Pin 14 is for input voltage
supply ( +5 v) and pin 7 is for grounding. The four AND gates are completely independent
to each other. The ICs are made by CMOS, TTL ( Transistor Transistor Logic )
technology.

3. NOT gate (Inverter ):-

 The NOT gate is a basically one-input and one-output gate.
 The logic of this gate is that When the input is 1 ( High, True, ON, CLOSED
), the output is 0 ( Low, False, OFF, OPEN ), and vice versa.
 The logical NOT is represented with the symbol " ' ".
 The output of NOT gate is the logical inversion of input.
 So, A NOT gate is also called an inverter because of its feature.
 If there is only one input A, the output may be calculated using the Boolean
equation Y=A’.

Truth table for NOT gate:

A Y= A'
0 1
1 0

Logic Diagram for NOT Gate:

Venn-diagram for NOT gate:

 Figure: Venn-diagram for NOT gate

A Venn diagram is a visual representation of the outputs of a logic gate with different
inputs. A Venn diagram can be easily created with the truth tables.. Here, using the Venn
diagram, the NOT gate operation can be verified. The diagram shows that the output Y is
opposite of input A

Electrical circuit equivalent to NOT gate operation:-

This electrical circuit representing two input NOT gate operates as follows:-

 When A = 0 (open), the current flows through the lamp making it ON. Hence, the
output Y = 1.
 When A = 1 (close), the current will bypass through the switch A making the lamp
OFF. Hence, the output Y = 0.

Pin out configuration of NOT gate:

The NOT gate is also available in monolithic integrated circuit form. It contains a TTL
hex inverter. It is also 14 pin DIP package IC. 7404 is a logic gate IC which consist of six
NOT Gates. The NOT gate performs logical NOT operation. The NOT gates come in form
of DIP ( Dual Inline Packaged ) package ICs. Each gate has two terminal, one inputs and
one output. So 2, 4, 6, 8, 10, 12 are output pins for NOT gate. Pin 14 is for input voltage
supply ( +5 v) and pin 7 is for grounding. The six NOT gates are completely independent
to each other.

Universal gate :- A universal gate is a gate which can implement any Boolean function
without need to use any other gate type. The NAND and NOR gates are
universal gates.

1. NOR Gate :-
 This gate’s output is 1 only when all of its inputs are 0. Alternatively, when
all of the inputs are low, the output is high.
 A NOR gate, sometimes known as a “NOT-OR” gate.
 This gate is an inversion of logical OR.
 It consists of an OR gate followed by a NOT gate.

 The Boolean statement for the NOR gate is Y=(A+B)’ if there are two inputs
A and B and output Y.

Truth table for NOR gate with 2 inputs:

A B Y= (A+B)'
0 0 1
0 1 0
1 0 0
1 1 0

Logic Diagram for NOR Gate:

A
A
'
Y=(A+B) Y=(A+B)'
OR OR
B
B
Venn- diagram for NOR gate:

Electrical circuit equivalent to NOR gate operation:

This electrical circuit representing two input NOR gate operates as follows:-
 When A = 0 (open) and B = 0 (open), the current will pass through the lamp making
it ON. Hence, the output Y = 1.
 When A = 0 (open) and B = 1 (close), the current will pass through short-circuited
path provided by the switch B and no current will flow through the lamp making it
OFF. Hence, the output Y = 0.
 When A = 1 (close) and B = 0 (open), the current will pass through short-circuited
path provided by the switch A, and no current will flow through the lamp making it
OFF. Hence, the output Y = 0.
 When A = 1 (close) and B = 1 (close), the current will pass through short-circuited
paths provided by switches A & B, and no current will flow through the lamp
making it OFF. Hence, the output Y = 0.

Pin out configuration of NOR gate:

 Figure: Pin out configuration of TTL IC 7402 NOR gate

It is 14 pin DIP package IC. 7402 is a logic gate TTL IC which consist of four NOR
Gates. The NOR gate performs logical NOR operation. The NOR gates come in form of
DIP ( Dual Inline Packaged ) package ICs. So, it is called Quad 2- input NOR gate. Each
gate has three terminal, two inputs and one output. So 1, 4, 10,13 are output pins and
(2,3), (5,6), (8,9), (11,12) are inputs pin for NOR gate. Pin 14 is for input voltage supply
( +5 v) and pin 7 is for grounding. The Four NOR gates are completely independent to
each other.

2. NAND Gate:-
 This gate’s output is 0 only if none of the inputs is 0. Alternatively, when all
of the inputs are not high and at least one is low, the output is high.
 A NAND gate, sometimes known as a “NOT-AND” gate.
 This gate is an inversion of logical AND.
 It consists of an AND gate followed by a NOT gate.
 It is Combination of AND gate and NOT gate.

 The Boolean statement for the NAND gate is Y=(A.B)’ if there are two
inputs A and B and output Y.

Truth table for NAND gate with 2 inputs:

A B Y= (A.B)'
0 0 1
0 1 1
1 0 1
1 1 0

Logic Diagram for NAND Gate:

Y=(A.B)' OR Y=(A.B)'
Venn- diagram for NAND gate:

Electrical circuit equivalent to NAND gate operation:

This electrical circuit representing two input NAND gate operates as follows:-
 When A = 0 (open) and B = 0 (open), the current will pass through the lamp making
it ON. Hence, the output Y = 1.
 When A = 0 (open) and B = 1 (close), the current will pass through the lamp making
it ON. Hence, the output Y = 1.
 When A = 1 (close) and B = 0 (open), the current will pass through the lamp making
it ON. Thus, the output Y = 1.
 When A = 1 (close) and B = 1 (close), the current will follow the short-circuited path
provided by closed switches A and B, and no current will flow through the lamp
making it OFF. Therefore, the output Y = 0.

Pin out configuration of NAND gate:

Figure: Pin out configuration of TTL IC 7400 NAND gate

7400 is a logic gate TTL IC which consist of four NAND Gates. It is 14 pin DIP package
IC. The NAND gate performs logical NAND operation. The NAND gates come in form of
DIP ( Dual Inline Packaged ) package ICs. So, it is called Quad 2- input NAND gate. Each
gate has three terminal, two inputs and one output. So 3, 6, 8,11 are output pins and (1,2),
(4,5), (9,10), (12,13) are inputs pin for NAND gate. Pin 14 is for input voltage supply ( +5
v) and pin 7 is for grounding. The Four NAND gates are completely independent to each
other. A B Y= (A ⊕ B)
0 0 0
Special Purpose
Gates:- 0 1 1
1 0 1
X- OR
1 1 0 Gate:-
 The Exclusive-OR or ‘Ex-OR’ gate is a logic gate that accepts more than two
inputs and produces only one outputs.

 If any of the inputs is ‘High,’ the output of the XOR Gate is ‘High.’ If both
inputs are ‘High,’ the output is ‘Low.’ If both inputs are ‘Low,’ the output is
‘Low.’
 The Boolean equation for the XOR gate is Y= (A ⊕ B) = A'.B + A.B' if there
are two inputs A and B with output Y.
 The output of the XOR gate is also called as an odd function.

Truth table for XOR gate with 2 inputs:

Logic Diagram for XOR Gate:

Venn- diagram for XOR gate:

The Venn diagram represents the different inputs and outputs of the gate. The color part
shows the Odd function and 11 represents the both input is High.
Pin out configuration of XOR gate:

Figure: Pin out configuration of TTL IC 7486 XOR gate

7486 is a logic gate TTL IC which consist of four XOR Gates. It is 14 pin DIP package
IC. The XOR gate performs logical XOR operation. The XOR gates come in form of DIP
( Dual Inline Packaged ) package ICs. So, it is called Quad 2- input XOR gate. Each gate
has three terminal, two inputs and one output. So 3, 6, 8,11 are output pins and (1,2),
(4,5), (9,10), (12,13) are inputs pin for XOR gate. Pin 14 is for input voltage supply ( +5 v)
and pin 7 is for grounding. The Four XOR gates are completely independent to each
other.

Application of XOR gate:

 As a magnitude comparator.
 In parity generator.
 In adder and subtractor circuit
 In binary to gray code converter circuit

X-NOR Gate:

 The Exclusive-NOR or ‘EX-NOR’ gate is a digital logic gate that accepts more
than two inputs and produces only one outputs.

 If both inputs are ‘High,’ the output of the XNOR Gate is ‘High.’ If both inputs are
‘Low,’ the output is ‘High.’ If one of the inputs is ‘Low,’ the output is ‘Low.’
 If there are two inputs A and B, then the XNOR gate’s Boolean equation is: Y= (A
⊙ B) = (A ⊕ B)' =A.B+A’B’.
 The output of the XNOR gate is also called as an even function.

Truth table for XNOR gate with 2 inputs:

A B Y= A.B+A’B’
0 0 1
 0 1 0
1 0 0
1 1 1

Logic Diagram for XNOR Gate:

Venn- diagram for XNOR gate:

The Venn diagram represents the different inputs and outputs of the gate. The color part
shows the even function and 11 represents the both input is high.

Pin out configuration of XOR gate:

Figure: Pin out configuration of TTL IC 74266 XNOR gate

74266 is a logic gate TTL IC which consist of four XNOR Gates. It is 14 pin DIP package
IC. The XNOR gate performs logical XNOR operation. The XNOR gates come in form of
DIP ( Dual Inline Packaged ) package ICs. So, it is called Quad 2- input XNOR gate. Each
gate has three terminal, two inputs and one output. So 3, 4, 10,11 are output pins and
(1,2), (5,6), (8,9), (12,13) are inputs pin for XNOR gate. Pin 14 is for input voltage supply
( +5 v) and pin 7 is for grounding. The Four XNOR gates are completely independent to
each other.

Application of XNOR gate:

 As a comparator
  To check the even parity
 As even parity generator

De-Morgan's Theorem:- A famous mathematician DeMorgan invented the two most

important theorems of boolean algebra. The DeMorgan's theorems are used for
mathematical verification of the equivalency of the NOR and negative-AND gates and the
negative-OR and NAND gates. These theorems play an important role in solving various
boolean algebra expressions.

1st Theorem : - It states that "The complement of the product of the variables ( Variables A
and B) is equal to the sum of their individual complements of a variable.

(A.B)' = A'+B'
NAND = Bubbled OR

Logical implementation of De-Morgan’s 1st Theorem:

Here is a table that shows the verification of the first theorem of De Morgan:
Inputs Output For Each Term

A B A.B (A.B)' A' B' A'+B'

0 0 0 1 1 1 1

0 1 0 1 1 0 1

1 0 0 1 0 1 1

1 1 1 0 0 0 0
Table: Verification table for 1st Law

2nd Theorem: It states that "The complement of the sum of variables ( A and B) is
equal to the product of their individual complements of a variable.
(A+B)' = A'.B'
NOR =Bubbled AND

Logical implementation of De-Morgan’s 2nd Theorem:

Here is a table that shows the verification of the 2nd theorem of De Morgan:
Inputs Output For Each Term

A B A+B (A+B)' A' B' A'.B'

0 0 0 1 1 1 1

0 1 1 0 1 0 0

1 0 1 0 0 1 0

1 1 1 0 0 0 0
Table: Verification table for 2nd Law

Realization (Implementation) of various logic gates using Universal gates:

a) AND gate Using NAND Gates:-
The AND gate can be implemented by using two NAND gates in the below fashion:

b) AND gate Using NOR Gates:-

Implementation of AND gate using only NOR gates as shown below:

c) OR gate Using NAND Gates:-

The OR gate can be implemented using the NAND gate as below:
d) OR gate Using NOR Gates:-
Implementation of OR gate using two NOR gates as shown in the picture below:

e) NOT gate Using NAND Gates:-

f) NOT gate Using NOR Gates:-

g) XOR gate Using NAND Gates:-

h) XOR gate Using NOR Gates:-

i) XNOR gate Using NAND Gate:-

j) XNOR gate Using NOR Gate:-

k) NOR Gate using NAND Gates

l) NAND Gate using NOR Gates

Multiple choice question. ( From unit 2)

1. An inverter gates can be developed using---------------
a) 2 diodes b) Resistance and capacitance c) Transistor d) Inductance and capacitance
2. The output of the two-input OR gate is high
a) Only if both inputs are high b) Only if both inputs are low
c) Only if one input is high and the other is low d) If at least one of the inputs is high
3. The output of a two-input AND gate is high---------------------
a) Only if both the inputs are high b) Only if both the inputs are low
c) Only if one input is high and the other is low d) If at least one input is low
4. NAND gate means?
a) Inversion followed by AND gates b) AND gates followed by an inverter
c)AND gate followed by OR gate d)None of these
5. The output of the two-input NAND gate is high--------
a)Only if both the inputs are high b)Only if both the inputs are low
c)Only if one input is high and the other is low d)If at least one input is low
6. A NOR gate means?
a)Inversion followed by an OR gate b)OR gate followed by an inverter
c)NOT gate followed by an OR gate d)NAND gate followed by an OR gate
7. The output of two-input NOR gate is high--------------------
a) Only if both the inputs are high b) Only if both the inputs are low
c) Only if one input is high and the other is low d)If at least one input is high
8. An exclusive NOR gate is logically equal to-----------
a)Inverter followed by an XOR gate b) NOT gate followed by an exclusive XOR gate
c)Exclusive OR gate followed by an inverter d)The complement of a NOR gate
9. The gate ideally suited for bit comparison is a----------------------
a)Two input exclusive NOR gate b)Two input exclusive OR gate
c)Two input NAND gate d)Two input NOR gate
10. Two input exclusive NOR gate gives high output----------
a) When one input is high and the other is low b)Only when both the inputs are low
c)When both the inputs are the same d)Only when both the inputs are high
11. The logical gates are categorized into _____
a) One group b) Two group c) Three group d) Four group
12. _______ are basic gates.
a) OR b)NAND c) AND d) NOT, OR and AND
13. Which gate is known as the universal gate?
a) NOT b) NAND and NOR c) AND d) NOT, OR and AND
14. __________ are arithmetic gates.
a) NOT b) NAND and NOR c) XOR AND XNOR d) NOT, OR and AND
15. How does a logic gate function?
a) Using the flow of electric current b) Spontaneously
c) By using energy from a chemical reaction d) None of the above
16. Which of the following signifies a NOT gate?
a) 1 (input)- 0 (output) b) 1,0 (input)- 1 (output)
c) 0,0 (input)- 0 (output) d) None
17. Who first made use of truth tables?
a) Charles Sanders Pierce b) Father of Pragmatism c) Irving Annelis d) Both a and
b
18. Which are the forms of complex logic gates?
a) OAI b) AOI c) Both d) None
19. Which of the following gate has only one input?
a) AND b) NOT c) OR d) XOR
20. when both inputs to the EX-NOR gate is HIGH, the output is_____.
a) HIGH b) LOW c) Both a and b d) Invalid

Short answer questions.

1. How to implement AND gate using Universal gates?
2. List the importance of Special purpose gate.
3. Explain the OR gate with the help of truth table and logic diagram.
4. Write the application XOR and XNOR gate.
5. Define logic gate, truth table and universal gates.
6. Write the application of Logic gates.
7. Write the advantage and disadvantage of logic gates.

Long answer questions.

1. Explain the basic gates with the help of truth table and logic circuit.
2. Realize different gates using Universal gates.
3. Clarify the De-Morgan’s theorem with their verification table.

Unit: -3 Boolean algebra and Karnaugh Map

Boolean Algebra:

 Boolean algebra was invented by George Boole in 1854.

 Boolean algebra is the branch of algebra that deals with logical operations and
binary variables.
 Boolean Algebra is used to analyze and simplify the digital (logic) circuits.
 It uses only the binary numbers i.e. 0 and 1.
 It is also called as Binary Algebra or logical Algebra.
 It is a convenient way and systematic way of expressing and analyzing the operation
of logic circuits.
 A variable is a symbol used to represent a logical quantity.
  Variable used in Boolean algebra can have only two values. Binary 1 for HIGH and
Binary 0 for LOW.
 Complement of a variable is represented by an overbar (-). Thus, complement of
variable B is represented as B’ . Thus if B = 0 then B’= 1 and if B = 1 then B’= 0.
 A literal is a variable or the complement of a variable.
 ORing of the variables is represented by a plus (+) sign between them. For example
ORing of A, B, C is represented as A + B + C.
 Logical ANDing of the two or more variable is represented by writing a dot between
them such as A.B.C. Sometime the dot may be omitted like ABC.

Boolean Expression:-
 A logical statement that results in a Boolean value, either be True or False, is a
Boolean expression. Sometimes, synonyms are used to express the statement such as
‘Yes’ for ‘True’ and ‘No’ for ‘False’. Also, 1 and 0 are used for digital circuits for
True and False, respectively.
 Boolean expressions are the statements that use logical operators, i.e., AND, OR,
XOR and NOT. Thus, if we write X AND Y = True, then it is a Boolean expression.

Boolean Function:- A Boolean function consists of binary variables, logical operators,

constants such as 0 and 1, equal to the operator, and the parenthesis
symbols.

Truth Table:- The truth table is a table that gives all the possible values of logical
variables and the combination of the variables. It is possible to convert the Boolean
equation into a truth table. The number of rows in the truth table should be equal to 2 n,
where “n” is the number of variables in the equation. For example, if a Boolean equation
consists of 3 variables, then the number of rows in the truth table is 8. (i.e.,) 23 = 8.

Logic Gates:- A logic gate is a virtual or physical device that performs a Boolean
function. These are used to make logic circuits. Logic gates are the main components of
any digital system. This electrical circuit can have only one output and 1 or more inputs.
The relation between the input and the output is governed by specific logic. AND, OR,
NOT gate, etc are the examples of logic gates.

Rules of Boolean Algebra:-

Following are the important rules used in Boolean algebra.

 Variable used can have only two values. Binary 1 for HIGH and Binary 0 for LOW.
 The complement of a variable is represented by an overbar. Thus, the complement of
B is represented by B’ . Thus if B = 0 then B’= 1 and if B = 1 then B’= 0.

 OR-ing of the variables is represented by a plus (+) sign between them. For example,
the OR-ing of A, B, and C is represented as A + B + C.
 Logical AND-ing of the two or more variables is represented by writing a dot
between them, such as A.B.C. Sometimes, the dot may be omitted like ABC.
Laws of Boolean Algebra:
The basic laws of Boolean algebra, The commutative laws for addition and
multiplication, the associative laws for addition and multiplication, and the
distributive law-are the same as in ordinary algebra.

Commutative Laws:-

The commutative law of addition for two variables is written as,

A+B = B+A

 This law states that the order in which the variables are ORed
makes no difference. Remember, in Boolean algebra as applied
to logic circuits, addition and the OR operation are the same.
Fig.(1) illustrates the commutative law as applied to the OR
gate and shows that it doesn't matter to which input each
variable is applied. (The symbol ≡ means "equivalent to.

Fig.(1) Application of commutative law of addition.

The commutative law of multiplication for two variables is,

A.B = B.A
 This law states that the order in which the variables are ANDed makes no difference.
Fig.(2), il1ustrates this law as applied to the AND gate.

Fig.(2) Application of commutative law of multiplication.

Associative Laws:-

The associative law of addition is written as follows for three variables:

A + (B + C) = (A + B) + C

 This law states that when ORing more than two variables, the result is
the same regardless of the grouping of the variables. Fig.(3), illustrates
this law as applied to 2-input OR gates.
 Fig.(3) Application of associative law of addition.

The associative law of multiplication is written as follows for three

variables:

A(BC) = (AB)C.
 This law states that it makes no difference in what order the variables are
grouped when ANDing more than two variables. Fig.(4) illustrates this law
as applied to 2-input AND gates.

Fig.(4) Application of associative law of multiplication.

Distributive Law:-
The distributive law is written for three variables as follows:
A(B + C) = AB + AC

 This law states that ORing two or more variables and then
ANDing the result with a single variable is equivalent to
ANDing the single variable with each of the two or more
variables and then ORing the products. The distributive law
also expresses the process of factoring in which the common
variable A is factored out of the product terms, for example,
AB + AC = A(B + C).
 Fig.(5) Application of distributive law.

AND Law: These laws use the AND operation. Therefore they are called AND laws.

 A .0 = 0
 A.1=A
 A. A = A
 A. A' =0

OR Law: These laws use the OR operation. Therefore they are called OR laws.

 A +0=A
 A+1=1
 A+A=A
 A.+A'=1

Inversion Law: In Boolean algebra, the inversion law states that double inversion of
variable results in the original variable itself.

 A'' = A

Rules of Boolean Algebra ( Boolean expression Rules)

The basic rules that are useful in manipulating and simplifying Boolean
expressions. (Shortcut)

Table: Basic rules of Boolean algebra.

Rule 1:- A + 0 = A
A variable ORed with 0 is always equal to the variable. If the input variable
A is 1, the output variable X is 1, which is equal to A. If A is 0, the output is
0, which is also equal to A. This rule is illustrated in Fig.(1), where the lower
input is fixed at 0.

Fig.(1)
Rule 2:- A + 1 = 1
A variable ORed with 1 is always equal to 1. A 1 on an input to an OR gate
produces a 1 on the output, regardless of the value of the variable on the
other input, where the lower input is fixed at 1.

Rule 3:- A . 0 = 0

A variable ANDed with 0 is always equal to 0. Any time one input to an

AND gate is 0, the output is 0, regardless of the value of the variable on the
other input. This rule is illustrated in Fig.(2), where the lower input is fixed
at 0.

Fig.(2)

Rule 4:- A . 1 = A
A variable ANDed with 1 is always equal to the variable. If A is 0 the output
of the AND gate is 0. If A is 1, the output of the AND gate is 1 because both
inputs are now 1s. This rule is shown in Fig.(3), where the lower input is
fixed at 1.
 Fig.(3)
Rule 5:- A + A = A
A variable ORed with itself is always equal to the variable. If A is 0, then 0
+ 0 = 0; and if A is 1, then 1 + 1 = 1. This is shown in Fig.(4), where both
inputs are the same variable.

Fig.(4)

Rule 6:- A + A = 1
A variable ORed with its complement is always equal to 1. If A is 0, then 0
+ 0 = 0 + 1 = 1. If A is l, then 1 + 1 = 1+ 0 = 1. See Fig.(5), where one input
is the complement of the other.

Fig.(5)
Rule 7:- A . A = A
A variable ANDed with itself is always equal to the variable. If A = 0,
then 0.0 = 0; and if A = 1. then 1.1 = 1. Fig.(6) illustrates this rule.

Fig.(6)
Rule 8:- A . A = 0
A variable ANDed with its complement is always equal to 0. Either A or A will
always be 0: and when a 0 is applied to the input of an AND gate. the output will be 0
also. Fig.(7) illustrates this rule.
 Fig.(7)
Rule 9: A = A
The double complement of a variable is always equal to the variable. If you
start with the variable A and complement (invert) it once, you get A. If you
then take A and complement (invert) it, you get A, which is the original
variable. This rule is shown in Fig.(8) using inverters.

Fig.(8)

Rule 10: A + AB = A
This rule can be proved by applying the distributive law, rule 2, and rule 4 as
follows:
A + AB = A( 1 + B) Factoring (distributive law)
=A.l Rule 2: (1 + B) = 1
=A Rule 4: A . 1 = A

Rule 11: A + AB= A + B

This rule can be proved as follows:
A + AB = (A + AB) + AB Rule 10: A = A + AB
= (AA + AB) + AB Rule 7: A = AA

=AA +AB +AA +AB Rule 8: adding AA = 0

= (A + A)(A + B) Factoring
= 1. (A + B) Rule 6: A + A = 1
=A + B Rule 4: drop the 1

Rule 12: (A + B)(A + C) = A + BC

 This rule can be proved as follows:
(A + B)(A + C) = AA + AC + AB + BC Distributive law
= A + AC + AB + BC Rule 7: AA = A
= A( 1 + C) + AB + BC Rule 2: 1 + C = 1
= A. 1 + AB + BC Factoring (distributive law)
= A(1 + B) + BC Rule 2: 1 + B = 1
= A. 1 + BC Rule 4: A . 1 = A
= A + BC

Representation of Boolean expression can be primarily done in two ways. They are
as follows:
1. Sum of Products (SOP) form
2. Product of Sums (POS) form
Sum of products(SOP) form:-
 It is one of the ways of writing a boolean expression. As the name suggests, it is
formed by adding (OR operation) the product terms.
 These product terms are also called as ‘min-terms’. Min-terms are represented with
‘m’, they are the product(AND operation) of boolean variables either in normal
form or complemented form.
 In SOP, value taken only when function(F)=1.
 A = 1, A’ = 0.
 Therefore, SOP is sum of min-terms and is represented as:
F in SOP = ∑m (0, 3)
Here, F is sum of minterm0 and minterm3.
 How to write,

00 , 01
A’B’ + A’B
Express function F in sum of products(SOP) form:-
A B Function F
m0 0 0 0
m1 0 1 1
m2 1 0 1
m3 1 1 1

F(A,B) = 01 + 10 + 11
F(A,B) = A’B + AB’ + AB --------------- [ This is a Standard or Canonical SOP form]
F(A,B) = m1 + m2 + m3
F(A,B) = ∑m ( 1,2,3) -------------- [This is Sum of Min-term]

Again , F(A,B) = A’B + AB’ + AB

= A’B + A(B’ + B ) ------ [ B’ + B = 1, ]
 = A’B + A
=B+A ------- [ Distributive law] , [ This is Minimal SOP form]

Product of Sums (POS) form :-

 As the name suggests, it is formed by multiplying (AND operation) the sum terms.
These sum terms are also called as ‘max-terms’.
 Max-terms are represented with ‘M’, they are the sum (OR operation) of Boolean
variables either in normal form or complemented form.
 In POS, value taken only when function F = 0.
 A’ = 1, A = 0.
 Therefore, POS is product of max-terms and is represented as:
F in POS = πM (1, 2) Here, F is product of maxterm1 and maxterm2.
 How to write,

00 10
(A+B) . (A’+B)
Express function F in product of sum (POS) form:-
A B Function F
m0 0 0 0
m1 0 1 1
m2 1 0 0
m3 1 1 1

F(A,B) = (00) . (10)

F(A,B) = (A+B) . (A’ +B) --------------- [ This is a Standard or Canonical POS form]
F(A,B) =( m0 , m2 )
F(A,B) = πM ( 0, 2) -------------- [This is Product of Max-term]

Again , F(A,B) = (A+B) . (A’ + B)

= A(A’ + B) + B (A’ + B)
= AA’ + AB + A’ B + BB --------[ BB=B, AA’=0 ]
= AB + A’ B +B
= B( A+ A’) + B ------------[ A+ A’ =1 ]
= B + B ---------- [ B + B =B ]
=B ----------[ This is a maximal POS form]

Notes : Steps to make standard SOP form  Multiply by (A+ A’) term of missing
variable. For example , A’ + B’ = A’(B+ B’) + B’(A+ A’)
Notes: Steps to make standard POS form  Add (A A’) term of missing variable. For
example, A’ ( B+C) = (A’+BB’+CC’) . ( B + C + AA’)

Example 1:- Represent / Expand F ( A,B) = A’ + B’ in SOP and POS form and find
min-terms and max-terms.
Solution:-
F ( A,B) = A’ + B’ ----------[ In 1st term B is missing and In 2nd term A is missing]
F ( A,B) = A’(B+ B’) + B’(A + A’ ) ------[ A + A’ or B+ B’=1, just multiply by 1]
F ( A,B) = A’B + A’B’ +B’A +B’A’ -------[A’B’+ B’A’= A’B’, take any one]
F ( A,B) = A’B + A’B’ +A B’ ------[ SOP standard form]
F ( A,B) = 01 + 00 +10 [ In min-term, the ‘1’ input is written as such and the input ‘0’
is complimented.]

F ( A,B) = m1 + m0 +m2
F ( A,B) = ∑m ( 0, 1, 2) ----------------------- [Sum of min-term]
Now , The min-term m3 is missing in SOP, so m3 will be max-term.
Hence , POS form = (A’ + B’)
= πM ( 3 ) -------------- [POS max-term]

Example 2:- Find the min-terms and max-term of function F=A +BC’ +ABD’
+ABCD
Solution:
F( A,B,C,D) = A +BC’ +ABD’ +ABCD [ This is SOP so we have to make it standard
SOP form, that why we multiply by (A+A’) term ]
=A( B+B’) (C+C’) (D+D’) + BC’(A+A’) (D+D’) +ABD’ ( C+C’)+ABCD
= ( AB+A B’) ( CD+CD’+C’D+C’D’) +(BC’A+BC’A’) (D+D’)
+ABCD’+ABC’D’ +ABCD
= AB(CD+CD’+C’D+C’D’) + A B’(CD+CD’+C’D+C’D’)
+D(BC’A+BC’A’) + D’(BC’A+BC’A’) +ABCD’+ABC’D’ +ABCD
= ABCD+ABCD’+ABC’D+ABC’D’+AB’CD+AB’CD’+AB’C’D+
AB’C’D’+ABC’D+A’BC’D+ABC’D’+A’BC’D’+ ABCD’+ABC’D’+ABCD
= ABCD+ABCD’+ABC’D+ ABC’D’+ AB’CD + AB’CD’+ AB’C’D+ AB’C’D’+
A’BC’D + A’BC’D’[when two or more equation are same then take only one of them]
= 1111+ 1110+1101 +1100+1011 + 1010 + 1001 +1000 +0101 + 0100
F( A,B,C,D) = m15 + m14 + m13 + m12 + m11 + m10 + m9 + m8 + m5 + m4
F(A,B,C,D) = ∑m ( 4, 5, 8, 9, 10, 11, 12, 13, 14, 15)  [ This is Sum of min-terms]
Now, The min-term 0, 1, 2, 3, 6, 7 is missing in SOP, so 0, 1, 2, 3, 6, 7 will be max-term.
Hence , POS form = (A+B+C+D) (A+B+C+D’) (A+B+C’+D) (A+B+C’+D’)
(A+B’+C’+D) (A+B’+C’+D’)
= (0+0+0+0) ( 0+0+0+1) ( 0+0+1+0) ( 0+0+1+1) ( 0+1+1+0) (0+1+1+1)
= ( M0 , M1 , M2 , M3, M6 , M7)
F(A,B,C,D) = πM ( 0, 1, 2, 3, 6, 7 ) -------------- [POS max-term]
Example 3: Find min-terms and max-terms of A ( B’ +A) B .
Solution :
F(A,B) = A ( B’ +A) B  [ This is POS, so we have to make it standard POS form,
that why we Add (A A’ and BB’) term ]
F(A,B) = (A + BB’) ( B’ +A) (B + A A’)
= ( A + B ) (A + B’) (B’ + A) ( B +A ) ( B + A’)
= ( A + B ) (A + B’) ( A + B’) ( A +B ) (A’ + B)
= ( A + B ) (A + B’) (A’ + B) [when two or more equation are same then take
only one of them]
= ( 0+ 0 ) ( 0+ 1) ( 1+ 0)  [In Maxterm the input ‘0’ is written as such and the
input ‘1’ is complemented.]

= ( M 0 , M1 , M2 )
F(A,B) = πM ( 0, 1, 2 ) -------------- [POS max-term]
Now , the max-term M3 is missing in POS form, so M3 will be min-term.
Hence, SOP form = AB
= (11)
= ∑m ( 3 ) ----------------------- [Sum of min-term]

Example 4 : Express the Boolean function F=A+BC as min-term.

Solution,

F= A(B+B')(C+C')+BC(A+A')

F=(AB+AB')(C+C')+ ABC+ A'BC

F= ABC+ABC'+AB'C+ABC'+AB'C'+ABC+A'BC [when two or more equation are

same then take only one of them]

F= ABC+ ABC'+AB'C+ AB'C'+ A'BC [ In min-term the ‘1’ input is written as such and
the input ‘0’ is complimented.]

F= 111+110+101+100+011

F= m7+m6+m5+m4+m3

F=∑m(3,4,5,6,7)  SOP min-term

Example 5: Express the Boolean function F=A+BC as Maxterms

F=A+(BC)

Solution,

After removing the bracket and expanding we get

F= (A+B).(A+C)
F= (A+B+CC').(A+C+BB')

F= (A+B+C).(A+B+C').(A+C+B).(A+C+B')

F= (A+B+C).(A+B+C').( A+B'+C)  In Maxterm the input ‘0’ is written as such and the
input ‘1’ is complemented.

F=(0+0+0).(0+0+1).(0+1+0)

F= M0.M1.M2

F= πM(0,1,2)  POS Max-term

Difference between SOP and POS in Digital Logic

S.No. SOP POS

1 SOP stands for Sum of Products. POS stands for Product of Sums.

2 It is a technique of defining the boolean It is a technique of defining boolean

terms as the sum of product terms. terms as a product of sum terms.

3 It prefers minterms. It prefers maxterms.

4 In the case of SOP, the minterms are In the case of POS, the Maxterms are
defined as ‘m’. defined as ‘M’

5 It gives HIGH(1) output. It gives LOW(0) output.

 6 In SOP, we can get the final term by In POS, we can get the final term by
adding the product terms. multiplying the sum terms.

Simplification of Boolean functions :-

We can simplify Boolean function using below three ways;
1. Algebric simplification 2. K-Map simplification 3. Quine McLusky Method of
simplification
1. Algebraic Simplification :
Using Boolean algebra techniques, simplify this expression: AB + A(B + C) + B(B + C)
Solution
=AB + AB + AC + BB + BC (Distributive law)
=AB + AB + AC + B + BC (B.B=B)
= AB + AC + B + BC (AB+AB=AB)
= AB + AC + B (B+BC =B)
=B+AC (AB+B =B)

2. Minimize the following Boolean expression using Algebric Simplification

F(A,B,C)=A′B+BC′+BC+AB′C′
Solution,
=A′B+(BC′+BC′)+BC+AB′C′ [indeponent law]
= A′B+(BC′+BC)+(BC’+AB′C′)
= A′B+B(C′+C)+C’(B+AB′)
=A’B + B.1+ c’ (B+A)
= B(A′+1)+C′(B+A)
=B + C′(B+A) [A’+1=1]
= B+BC′+AC′
= B(1+C′)+AC′
= B+AC′ [1+C’ = 1]
3: Using the theorems and laws of Boolean Algebra, reduce the following functions
F1(A,B,C,D) = ∑(0,1,2,3,6,7,14,15)
Solution,
= A’B’C’D’ + A’B’C’D + A’B’CD’ + A’B’CD +A’BCD’ + A’BCD + ABCD’ + ABCD
4: Using the theorems and laws of Boolean Algebra, reduce the following functions
F1(X,Y,Z) = ∏(0,1,4,5,7)
Solution: =(X+Y+Z) (X+Y+Z’) (X’+Y+Z) (X’+Y+Z’) (X’+Y’+Z’)

K-Map simplification:-
Karnaugh Maps:
 The Karnaugh map (K–map), introduced by Maurice Karnaugh in 1953.
 It is a grid like representation of a truth table which is used to simplify boolean
algebra expressions.
 A Karnaugh map has zero and one entries at different positions.
 It provides grouping together Boolean expressions with common factors and
eliminates unwanted variables from the expression.
 In a K-map, crossing a vertical or horizontal cell boundary is always a change of
only one variable.
 A Karnaugh map provides a systematic method for simplifying Boolean expressions.
 Karnaugh maps can be used for expressions with two, three, four and five variables.
 The number of cells in a Karnaugh map is equal to the total number of possible input
variable combinations as is the number of rows in a truth table. For three variables,
the number of cells is 23 = 8. For four variables, the number of cells is 24 = 16.

There are the following steps used to solve the expressions using K-map:

 First, we find the K-map as per the number of variables.

 Find the maxterm and minterm in the given expression.
 Fill cells of K-map for SOP with 1 respective to the minterms.
 Fill cells of the block for POS with 0 respective to the maxterm.
 Next, we create rectangular groups that contain total terms in the power of two like
2, 4, 8, … and try to cover as many elements as we can in one group.
 With the help of these groups, we find the product terms and sum them up for the
SOP form.

let us discuss about the K-Maps for 2 to 5 variables one by one.

2 Variable K-Map:-
The number of cells in 2 variable K-map is four, since the number of variables is two. The
following figure shows 2 variable K-Map.

 There is only one possibility of grouping 4 adjacent min terms.

 The possible combinations of grouping 2 adjacent min terms are {(m 0, m1), (m2, m3),
(m0, m2) and (m1, m3)}.
3 Variable K-Map:-
The number of cells in 3 variable K-map is eight, since the number of variables is three.
The following figure shows 3 variable K-Map.

 There is only one possibility of grouping 8 adjacent min terms.

 The possible combinations of grouping 4 adjacent min terms are {(m 0, m1, m3, m2),
(m4, m5, m7, m6), (m0, m1, m4, m5), (m1, m3, m5, m7), (m3, m2, m7, m6) and (m2, m0, m6,
m4)}.
 The possible combinations of grouping 2 adjacent min terms are {(m 0, m1), (m1, m3),
(m3, m2), (m2, m0), (m4, m5), (m5, m7), (m7, m6), (m6, m4), (m0, m4), (m1, m5), (m3, m7)
and (m2, m6)}.
 If x=0, then 3 variable K-map becomes 2 variable K-map.

4 Variable K-Map: The number of cells in 4 variable K-map is sixteen, since the number
of variables is four. The following figure shows 4 variable K-Map.

 There is only one possibility of grouping 16 adjacent min terms.

 Let R1, R2, R3 and R4 represents the min terms of first row, second row, third row
and fourth row respectively. Similarly, C1, C2, C3 and C4 represents the min terms of
first column, second column, third column and fourth column respectively. The
possible combinations of grouping 8 adjacent min terms are {(R 1, R2), (R2, R3), (R3,
R4), (R4, R1), (C1, C2), (C2, C3), (C3, C4), (C4, C1)}.
 If w=0, then 4 variable K-map becomes 3 variable K-map.
5 Variable K-Map: The number of cells in 5 variable K-map is thirty-two, since the
number of variables is 5. The following figure shows 5 variable K-Map.

 There is only one possibility of grouping 32 adjacent min terms.

 There are two possibilities of grouping 16 adjacent min terms. i.e., grouping of min
terms from m0 to m15 and m16 to m31.
 If v=0, then 5 variable K-map becomes 4 variable K-map.
In the above all K-maps, we used exclusively the min terms notation. Similarly, you can
use exclusively the Max terms notation.
Minimization of Boolean Functions using K-Maps:
If we consider the combination of inputs for which the Boolean function is ‘1’, then we
will get the Boolean function, which is in standard sum of products form after
simplifying the K-map.
Similarly, if we consider the combination of inputs for which the Boolean function is ‘0’,
then we will get the Boolean function, which is in standard product of sums form after
simplifying the K-map.
Follow these rules for simplifying K-maps in order to get standard sum of products
form:
 Select the respective K-map based on the number of variables present in the Boolean
function.
 If the Boolean function is given as sum of min terms form, then place the ones at
respective min term cells in the K-map. If the Boolean function is given as sum of
products form, then place the ones in all possible cells of K-map for which the given
product terms are valid.
 Check for the possibilities of grouping maximum number of adjacent ones. It should
be powers of two. Start from highest power of two and upto least power of two.
Highest power is equal to the number of variables considered in K-map and least
power is zero.
 Each grouping will give either a literal or one product term. It is known as prime
implicant. The prime implicant is said to be essential prime implicant, if atleast
single ‘1’ is not covered with any other groupings but only that grouping covers.
 Note down all the prime implicants and essential prime implicants. The simplified
Boolean function contains all essential prime implicants and only the required prime
implicants.
Note 1 − If outputs are not defined for some combination of inputs, then those output
values will be represented with don’t care symbol ‘x’. That means, we can consider them
as either ‘0’ or ‘1’.
Note 2 − If don’t care terms also present, then place don’t cares ‘x’ in the respective cells
of K-map. Consider only the don’t cares ‘x’ that are helpful for grouping maximum
number of adjacent ones. In those cases, treat the don’t care value as ‘1’.
Example,
Let us simplify the following Boolean function, F(W,X,Y,Z)=WX’Y’+WY+W’YZ’ using
K-map.
Solution,
The given Boolean function is in sum of products form. It is having 4 variables W, X, Y &
Z. So, we require 4 variable K-map. The 4 variable K-map with ones corresponding to
the given product terms is shown in the following figure.

Here, 1s are placed in the following cells of K-map.

 The cells, which are common to the intersection of Row 4 and columns 1 & 2 are
corresponding to the product term, WX’Y’.
 The cells, which are common to the intersection of Rows 3 & 4 and columns 3 & 4
are corresponding to the product term, WY.
 The cells, which are common to the intersection of Rows 1 & 2 and column 4 are
corresponding to the product term, W’YZ’.
There are no possibilities of grouping either 16 adjacent ones or 8 adjacent ones. There are
three possibilities of grouping 4 adjacent ones. After these three groupings, there is no
single one left as ungrouped. So, we no need to check for grouping of 2 adjacent ones.
The 4 variable K-map with these three groupings is shown in the following figure.
Here, we got three prime implicants WX’, WY & YZ’. All these prime implicants
are essential because of following reasons.
 Two ones (m8 & m9) of fourth row grouping are not covered by any other groupings.
Only fourth row grouping covers those two ones.
 Single one (m15) of square shape grouping is not covered by any other groupings.
Only the square shape grouping covers that one.
 Two ones (m2 & m6) of fourth column grouping are not covered by any other
groupings. Only fourth column grouping covers those two ones.
Therefore, the simplified Boolean function is
F = WX’ + WY + YZ’
Follow these rules for simplifying K-maps in order to get standard product of sums
form:
 Select the respective K-map based on the number of variables present in the Boolean
function.
 If the Boolean function is given as product of Max terms form, then place the zeroes
at respective Max term cells in the K-map. If the Boolean function is given as
product of sums form, then place the zeroes in all possible cells of K-map for which
the given sum terms are valid.
 Check for the possibilities of grouping maximum number of adjacent zeroes. It
should be powers of two. Start from highest power of two and upto least power of
two. Highest power is equal to the number of variables considered in K-map and
least power is zero.
 Each grouping will give either a literal or one sum term. It is known as prime
implicant. The prime implicant is said to be essential prime implicant, if atleast
single ‘0’ is not covered with any other groupings but only that grouping covers.
 Note down all the prime implicants and essential prime implicants. The simplified
Boolean function contains all essential prime implicants and only the required prime
implicants.
Note − If don’t care terms also present, then place don’t cares ‘x’ in the respective cells of
K-map. Consider only the don’t cares ‘x’ that are helpful for grouping maximum number
of adjacent zeroes. In those cases, treat the don’t care value as ‘0’.
Example,
Let us simplify the following Boolean function, f(X,Y,Z)=∏M(0,1,2,4) using K-map.
Solution,
The given Boolean function is in product of Max terms form. It is having 3 variables X, Y
& Z. So, we require 3 variable K-map. The given Max terms are M 0, M1, M2 & M4. The
3 variable K-map with zeroes corresponding to the given Max terms is shown in the
following figure.
There are no possibilities of grouping either 8 adjacent zeroes or 4 adjacent zeroes. There
are three possibilities of grouping 2 adjacent zeroes. After these three groupings, there is no
single zero left as ungrouped. The 3 variable K-map with these three groupings is shown
in the following figure.

Here, we got three prime implicants X + Y, Y + Z & Z + X. All these prime implicants
are essential because one zero in each grouping is not covered by any other groupings
except with their individual groupings.
Therefore, the simplified Boolean function is
f = X+Y, Y+Z, Z+X
In this way, we can easily simplify the Boolean functions up to 5 variables using K-map
method. For more than 5 variables, it is difficult to simplify the functions using K-Maps.
Because, the number of cells in K-map gets doubled by including a new variable.

Minterm:-
Minterm is the product of various different literals in which each literal occurs exactly
once. The output result of the minterm functions is 1. It is represented by m. To represent
a function, we perform a sum of minterms also called the Sum Of Products (SOP).
Maxterm:-
Maxterm is the sum of various different literals in which each literal occurs exactly once.
The output result of the maxterm functions is 0. It is represented by M. To represent a
function, we perform product of maxterms also called Product of Sum (POS).

Differentiate between Min-term and Max-term

Minterm Maxterm

Minterm is the term with the product of N Maxterm is the term with the sum of N
literals occurring exactly once. literals occurring exactly once.

It is represented by m. It is represented by M.

It is logical AND of distinct literals. It is logical OR of distinct literals.

The sum of minterms forms SOP (Sum of The product of maxterms forms POS
 Minterm Maxterm

Product) functions. (Product of Sum) functions.

The output result of maxterm function is

The output result of minterm function is 1.
0.

It works on active high. It works on active low.

Example: AB + A’B’ Example: (A+B). (A’+B’)

Multiple choice questions. ( From unit 3)

1: George Boole invented Boolean algebra in,

a) 1854 b) 1754 c) 1954 d) 2054
2: K-map is used for _______
a) Logic minimization b) expression maximization c) summing of parity bits
d) logic gate creation
3: To display time in railway stations which digital circuit is used?
a) Seven segment decoder b) Eight segment decoder
c) Multiplexer d) De-multiplexer
4: Who has invented K-map?
a) Maurice Karnaugh b)Edward Veitch c) George Boole d) Adam Smith
5: The Boolean expression Y = XY + ZX is in the ___________ form.
a) Product-of-Sum b)Sum-of-Products c) Linear d)None of the above
6: Product-of-Sums expressions can be implemented using……..
a) 2-level OR-AND logic circuits b) 2-level NOR logic circuits c)Both d) None
7: The Boolean expressions are represented in a unique way called….
a) Canonical form b) Min-term c) Max-term d) Logic diagram
8: There are ______ cells in a 4-variable K-map.
a) 12 b) 16 c) 18 d) 8
9: Product-of-Sums expressions can be implemented using ___________
a) 2-level OR-AND logic circuits b) 2-level NOR logic circuits
c) 2-level XOR logic circuits d) Both 2-level OR-AND and NOR logic circuits
10: To display time in railway stations which digital circuit is used?
a) seven segment decoder b) eight segment encoder
c) 8:3 multiplexer d) 9 bit segment driver
11: In Gray coding, the adjacent code values differ by _______
a) Single bit b) 3 bits c) 10 bits d) 0 bit
12: An AND gate with schematic "bubbles" on its inputs performs the same function
as a (n)________ gate.

a)NOT b) OR c) NOR d) NAND

13: How many gates would be required to implement the following Boolean
expression after simplification? XY + X(X + Z) + Y(X + Z)
 a) 1 b) 2 c) 4 d) 5
14: Which Boolean algebra property allows us to group operands in an expression in
any order without affecting the results of the operation [for example, A + B = B + A]?

a) associative b) Commutative c) Boolean d) distributive

15: Which of the following is true for a 5-variable Karnaugh map?

a) There is no such thing. b) It can be used only with the aid of a computer.
c) It is made of two 4-variable K- map. d) It is made of 2-variable and 3-variable K-
map.
16: When four 1s are taken as a group on a Karnaugh map, the number of variables
eliminated from the output expression is ________.

a) 1 b) 2 c) 3 d) 4
17: Which of the examples below expresses the distributive law of Boolean algebra?

a) (A + B) + C = A + (B + C) b) A(B + C) = AB + AC
c) A + (B + C) = AB + AC d) A(BC) = (AB) + C
18: The expression W(X + YZ) can be converted to SOP form by applying which law?
a) Associative law b) Commutative law c) Distributive law d) None of the above
19: An AND gate with schematic "bubbles" on its inputs performs the same function
as a(n)________ gate.
a) NOT b) OR d) NOR d) NAND
20: Use Boolean algebra to find the most simplified SOP expression for F = ABD +
CD + ACD + ABC + ABCD.

a) F = ABD + ABC + CD b) F = CD + AD c) F = BC + AB d) F = AC + AD
21: The output of an exclusive-NOR gate is 1. Which input combination is correct?

a) A = 1, B = 0 b) A = 0, B = 1 c) A = 0, B = 0 d) None of the above

22: The inverter can be produced with how many NAND gates?

a) 1 b) 2 c) 3 d) 4
23: A 4-variable AND-OR circuit produces a 0 at its Y output. Which combination of
inputs is correct?

a) A = 0, B = 0, C = 1, D = 1 b) A = 1, B = 1, C = 0, D = 0
c) A = 1, B = 1, C = 1, D = 1 d) A = 1, B = 0, C = 1, D = 0
24. A gate can drive a number of load gate inputs up to its specified ________

a) Supply voltage b) Noise margin c) Fan-in d) Fan-out

25: The expression for Absorption law is given by……
a) A + AB = A b) A + AB = B c) AB + AA’ = A d) A + B = B + A

Short answer questions.

1. Verify Commutative law of two variables.
2. What are the different between SOP and POS form.
3. Explain and verify the De-Morgan’s theorem.
4. Define Min-term, Max-term, Boolean algebra.
5. Implement the following expression using basic gates.
a) F = XY +Z b) F = (A+B) (A’.B) c) F = XYZ’
Long answer questions.
1. What is K-Map ? Explain the types of K-Map.
2. Simplify the Boolean expression.
a) F(A,B,C)=A′B+BC′+BC+AB′C′ b) F(A,B,C)=(A+B)(A+C)
c) F= (A + B + C)(A +B + C)(A + B + C) d) F= AB(BC + AC)
e) F= (A + B)(A + C) f) F=A.(A + B)
g) F= AB(A + B)(B + B) h) (A + C)(AD + AD) + AC + C i) A(A + B) + (B + AA)
(A + B)
3. Find the min-term and standard product of max-term.
a) F= A+BC ( as Min-term) b) F= A+BC (as Max-term)
c) F = AC + AB′ d) F=A.(A + B)

Unit:- 4 Binary arithmetic and Combinational Logic

Combinational circuits :- Combinational circuits are defined as the time independent
circuits which do not depends upon previous inputs to generate any output are termed as
combinational circuits.

 In this output depends only upon present input.

 Speed is fast.
 It is designed easy.
 There is no feedback between input and output.
 This is time independent.
 Elementary building blocks: Logic gates
 Used for arithmetic as well as boolean operations.
 Combinational circuits don’t have capability to store any state.
 As combinational circuits don’t have clock, they don’t require triggering.
 These circuits do not have any memory element.
 It is easy to use and handle.
 Examples – Encoder, Decoder, Multiplexer, Demultiplexer, Adder, Subtractor.

Block Diagram of Combinational circuits:

Sequential circuits:- Sequential circuits are those which are dependent on clock cycles
and depends on present as well as past inputs to generate any output.

 In this output depends upon present as well as past input.

  Speed is slow.
 It is designed tough as compared to combinational circuits.
 There exists a feedback path between input and output.
 This is time dependent.
 Elementary building blocks: Flip-flops
 Mainly used for storing data.
 Sequential circuits have capability to store any state or to retain earlier state.
 As sequential circuits are clock dependent they need triggering.
 These circuits have memory element.
 It is not easy to use and handle.
 Example – Clocks, Flip-flops, Bi-stables, Counters, Memories.

Block Diagram of Sequential circuits:

Adder :- An adder is a Combinational circuit that performs the addition of two or more
binary number is called an Adder. Each computer has an adder located in its CPU(ALU)
that is responsible for the process of addition. They are also used in other parts of the
processor, where they are used to calculate addresses, table indices, increment and
decrement operators, and similar operations.

Types of adder :-

1. Half Adder :- A combinational circuit that performs the addition of two bits is
called a Half Adder. It receives two inputs A and B and produces two outputs Sum
(S) and Carry (C).
 The block diagram for a half adder:-

Truth table for Half adder:-

From above truth table, Sum = A'B + AB' (0= complement & 1= general)

Carry = AB

Circuit implementation for Half Adder:-

We can also obtain the logical diagram for Sum and Carry by using the Exclusive OR
gate:-
The sum (S) is generated by an XOR gate which output's '1' if exactly one of its inputs are
'1'. The carry (C) is generated by an AND gate, which outputs '1' if both inputs are '1'.

K-map for Sum (S): A'B + AB'

K-map for Carry (C): AB

Full Adder:- A combinational circuit that performs the addition of three bits (inputs)
and produces two outputs. The first two inputs are A and B and the third input is an input
carry as C-IN. The output carry is designated as C-OUT and the normal output is
designated as S which is SUM.

Block diagram of Full adder:-

Truth table for Full adder:-

 From truth table, Sum (S): A' B' C + A' B C' + A B' C' + A B C
Carry (C): A' B C + A B' C +A B C' + ABC

Circuit implementation for Full Adder:-

K-map for Sum (S): A' B' C + A' B C' + A B' C' + A B C

K-map for Carry (C): A' B C + A B' C +A B C' + ABC

Now Carry (C) : AC +AB + BC (From K- Map)

Implementation of Full Adder using NAND Gates:-As mentioned earlier, a NAND gate
is one of the universal gates and can be used to implement any logic design. The circuit of
full adder using only NAND gates is shown below.

Subtractor:- A subtractor is a combinational logic circuit that can perform the subtraction
of two number (binary numbers) and produce the difference and borrow. It is a
combinational circuit that means its output depends on its present inputs only.

Types of Subtractor

1. Half Subtractor:- It is a combinational logic circuit that perform the subtraction of

two single bits. It contains two inputs (A and B) and produces two outputs
Difference (D ) and Borrow( B out).

Block Diagram of Half Subtractor:-

Truth Table of Half Subtractor:

From truth table, Difference (D) = A'B + AB'

Borrow (Bout) = A'B

K-map Simplification for Difference (D): A'B + AB'

K-map Simplification for Borrow (B out): A'B

Logic Diagram of Half Subtractor:

Full Subtractor:- It is a Combinational logic circuit that perform the subtraction of three
single bits. It contains three inputs(A, B, B in) and
produces two outputs (D, Bout). Where, A and B are called Minuend and Subtrahend bits
.And, Bin -> Borrow-In and Bout -> Borrow-Out.

Block diagram of Full Subtractor:-

Truth Table of Full Subtractor:

From truth table, Difference (D): A'B'Bin + AB'Bin' + ABBin + A'BBin', which can be
simplified as,

D = B'(A'Bin + ABin') + B(ABin + A'Bin')

D = B'(A xor Bin) + B(A xor Bin)'
D = A xor B xor Bin

Borrow (Bout) = Bout = BBin + A'B + A'Bin

K-map Simplification for ‘D’ : A'B'Bin + AB'Bin' + ABBin + A'BBin'

K-map Simplification for B out : BBin + A'B + A'Bin

Logic Diagram of Full Subtractor:

Binary Adder:- A Binary Adder is a digital circuit that implements the arithmetic sum of
two binary numbers supported with any length is known as a binary adder. It is generated
using full-adder circuits connected in sequence. The output carries from one full-adder
linked to the input carry of the next full-adder.

4- Bit Binary Adder :

  The augend bits (A) and the addend bits (B) are designated by subscript numbers
from right to left, with subscript '0' denoting the low-order bit.
 The carry inputs starts from C0 to C3 connected in a chain through the full-adders.
C4 is the resultant output carry generated by the last full-adder circuit.
 The output carry from each full-adder is connected to the input carry of the next-
high-order full-adder.
 The sum outputs (S0 to S3) generates the required arithmetic sum of augend and
addend bits.
 The n data bits for the A and B inputs come from different source registers. For
instance, data bits for A input comes from source register R1 and data bits
for B input comes from source register R2.
 The arithmetic sum of the data inputs of A and B can be transferred to a third
register or to one of the source registers (R1 or R2).

Multiplexer/ Data selector :

 A multiplexer is a combinational circuit that has 2 n input lines and a single output
line.
 Simply, Multiplexer is a circuit that accept many inputs but gives only one output.
 Multiplexer means many into one
 The binary information is received from the input lines and directed to the output
line. On the basis of the values of the selection lines, one of these data inputs will be
connected to the output.
 there are n selection lines and 2n input lines
 A multiplexer is also treated as Mux.
 Multiplexers can handle two type of data i.e., analog and digital.
 Used in multi-position switch.

Types of multiplexer :

1) 2 to 1 Multiplexer :
 In 2×1 multiplexer, there are only two inputs, i.e., A 0 and A1, 1 selection line,
i.e., S0 and single outputs, i.e., Y.
 On the basis of the combination of inputs which are present at the selection
line S0, one of these 2 inputs will be connected to the output.
 Block diagram of 2x1 Mux:-

Truth table for 2x1 Multiplexer:

Inputs Selector Output

A1 A0 S0 Y
- A0 0 A0
A1 - 1 A1
OR

From truth table, The logical expression of the term Y = S0'.A0 + S0.A1

Logical circuit diagram of 2x1 Mux :

2 to 1 Multiplexer Working Principle:- When S=0, it is applied directly as an input to the

second AND gate, and inverted S that is 1 is applied as a second input to the first AND
gate. Now, we know that for AND gate if any one input is zero, the output is zero. So, the
output of the second AND gate is zero. Since the second input to the first AND gate is 1,
its output is equal to its first input, which is Y = A0.
When S=1, Exactly the reverse happens. In this case, the second AND gate output is equal
to its first input, that is Y = A1 and the first AND gate output is 0.
So, by applying either a logic ‘0’ or a logic ‘1’ at the select input S, we can select the
appropriate input, A0 or A1 with the circuit act like a single pole double throw (SPDT)
switch.

2) 4 to 1 Multiplexer:-

 In the 4×1 multiplexer, there are four inputs, i.e., A 0, A1, A2, and A3, 2
selection lines, i.e., S0 and S1 and single output, i.e., Y.
 On the basis of the combination of inputs that are present at the selection lines
S0 and S1, one of these 4 inputs are connected to the output.

Block diagram of 4 to 1 Mux:-

Truth table for 4 to 1 Mux:-

Inputs Selector Output

A3 A2 A1 A0 S1 S0 Y

- - - A0 0 0 A0
- - A1 - 0 1 A1
- A2 - - 1 0 A2
A3 - - - 1 1 A3
OR
From truth table, the logical expression of the term Y=S 1' S0' A0+S1' S0 A1+S1 S0'
A2+S1 S0 A3

Logical circuit diagram of 4 to 1 Mux:-

4 to 1 Multiplexer Working Principle:-

If both the select inputs S0=0, S1=0, then the topmost AND gate is enabled and all other
AND gate is disabled. So, the data input A0 is selected and transmitted as output. Hence,
we get the output Y = A0 .

If both the select inputs S0=1, S1=1,then the bottom-most AND gate is enabled and all other
AND gate is disabled. So, the data input A3 is selected and transmitted as output. Hence,
we get output Y = D3.

3) 8 to 1 Multiplexer:-
 In the 8 to 1 multiplexer, there are total eight inputs, i.e., A0, A1, A2, A3, A4, A5,
A6, and A7, 3 selection lines, i.e., S0, S1and S2 and single output, i.e., Y.
 On the basis of the combination of inputs that are present at the selection lines S 0,
S1, and S2, one of these 8 inputs are connected to the output.

Block diagram for 8 to 1 Multiplexer:-

Truth table for 8 to 1 Mux:
Inputs Selector Output
A7 A6 A5 A4 A3 A2 A1 A0 S2 S1 S0 Y
- - - - - - - A0 0 0 0 A0
- - - - - - A1 - 0 0 1 A1
- - - - - A2 - - 0 1 0 A2
- - - - A3 - - - 0 1 1 A3
- - - A4 - - - - 1 0 0 A4
- - A5 - - - - - 1 0 1 A5
- A6 - - - - - - 1 1 0 A6
A7 - - - - - - - 1 1 1 A7

OR

From truth table,

The logical expression of Y=S0'.S1'.S2'.A0+S0.S1'.S2'.A1+S0'.S1.S2'.A2+S0.S1.S2'.A3+S0'.S1'.S2
A4+S0.S1'.S2 A5+S0'.S1.S2 .A6+S0.S1.S3.A7

Logical circuit diagram of 8 to 1 Mux:

Implementation for 8 ×1 multiplexer using 4×1 and 2×1 multiplexer :

 We can implement the 8×1 multiplexer using a lower order multiplexer.

 To implement the 8×1 multiplexer, we need two 4×1 multiplexers and one
2×1 multiplexer.

 The 4×1 multiplexer has 2 selection lines (S 0 and S1), 4 inputs , and 1 output.
The 2×1 multiplexer has only 1 selection line.

 For getting 8 data inputs, we need two 4×1 multiplexers. The 4×1 multiplexer
produces one output. So, in order to get the final output, we need a 2×1
multiplexer.

Block Diagram of 8 ×1 multiplexer using 4×1 and 2×1 multiplexer :

Truth table
Inputs Selector Output
A7 A6 A5 A4 A3 A2 A1 A0 S2 S1 S0 Y
- - - - - - - A0 0 0 0 A0
- - - - - - A1 - 0 0 1 A1
- - - - - A2 - - 0 1 0 A2
- - - - A3 - - - 0 1 1 A3
- - - A4 - - - - 1 0 0 A4
- - A5 - - - - - 1 0 1 A5
- A6 - - - - - - 1 1 0 A6
A7 - - - - - - - 1 1 1 A7
Figure: Truth table for 8 to 1 Mux using 4 x 1 Mux

From truth table,

The logical expression of Y=S0'.S1'.S2'.A0+S0.S1'.S2'.A1+S0'.S1.S2'.A2+S0.S1.S2'.A3+S0'.S1'.S2
A4+S0.S1'.S2 A5+S0'.S1.S2 .A6+S0.S1.S3.A7 ( Logical circuit is same as above 8 x 1 Mux)

4) 16 x 1 Multiplexer:-
 In the 16 to 1 multiplexer, there are total of 16 inputs, i.e., A 0, A1, …, A15, 4 selection
lines, i.e., S0, S1, S2, and S3 and single output, i.e., Y.
 On the basis of the combination of inputs that are present at the selection lines S 0, S1,
and S2, one of these 16 inputs will be connected to the output.

The block diagram of the 16×1Mux:-

Truth table of 16 x 1 Mux:

Inputs Selector Ou
tpu
t
A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 S3 S2 S1 S0 Y

- - - - - - - - - - - - - - A0 0 0 0 0 A0
- - - - - - - - - - - - - - A1 - 0 0 0 1 A1
- - - - - - - - - - - - - A2 - - 0 0 1 0 A2
- - - - - - - - - - - - A3 - - - 0 0 1 1 A3
- - - - - - - - - - - A4 - - - - 0 1 0 0 A4
- - - - - - - - - - A5 - - - - - 0 1 0 1 A5
- - - - - - - - - A6 - - - - - - 0 1 1 0 A6
- - - - - - - - A7 - - - - - - - 0 1 1 1 A7
- - - - - - - A8 - - - - - - - - 1 0 0 0 A8
- - - - - - A9 - - - - - - - - - 1 0 0 1 A9
- - - - - A10 - - - - - - - - - - 1 0 1 0 A10
- - - - A11 - - - - - - - - - - - 1 0 1 1 A11
- - - A12 - - - - - - - - - - - - 1 1 0 0 A12
- - A13 - - - - - - - - - - - - - 1 1 0 1 A13
- A14 - - - - - - - - - - - - - - 1 1 1 0 A14
A15 - - - - - - - - - - - - - - 1 1 1 1 A15

OR
From truth table,
The logical expression of Y=A0.S0'.S1'.S2'.S3'+A1.S0'.S1'.S2 '.S3+A2.S0'.S1'.S2.S3'+A3.S0'.S1 '.
S2.S3+A4.S0'.S1.S2'.S3'+A5.S0 '.S1.S2'.S3+A6.S1.S2.S3'+A7.S0 '.S1.S2.S3+A8.S0.S1'.S2'.S3'+A9 .S0.
S1'.S2'.S3+Y10.S0.S1'.S2.S3 '+A11.S0.S1'.S2.S3+A12
S0.S1.S2 '.S3'+A13.S0.S1.S2'.S3+A14.S0.S1 .S2.S3'+A15.S0.S1.S2'.S3

Logical circuit for 16 x 1 Mux:-

16×1 multiplexer using 8×1 and 2×1 multiplexer:-

 We can implement the 16×1 multiplexer using a lower order multiplexer.

 To implement the 8×1 multiplexer, we need two 8×1 multiplexers and one 2×1
multiplexer. The 8×1 multiplexer has 3 selection lines, 4 inputs, and 1 output. The
2×1 multiplexer has only 1 selection line.

 For getting 16 data inputs, we need two 8 ×1 multiplexers. The 8×1 multiplexer
produces one output. So, in order to get the final output, we need a 2×1 multiplexer.
  The block diagram of 16×1 multiplexer using 8×1 and 2×1 multiplexer is given
below.

( Note: Truth table and Logical circuit are same as above 16 x 1 Mux )

Advantage and disadvantage of Multiplexer:

Advantages:
1] It reduces ckt complexity and cost.
2] We can implement many combinations logic ckts using multiplexer.
3] It does not need K-maps and simplification.
4] Increased Efficiency
5] Flexibility – Multiplexing allows different types of signals, such as audio, video, and
data, to be transmitted over the same channel. This makes communication systems more
flexible and adaptable to changing needs.
6] Improved Quality
7] Scalability

Disadvantages:
1] Added delays in switching ports.
2] Limitations on which ports can be used simultaneously.
3] Extra IO many require to control multiplexer.
4] Added delays in I/O signals propagating through the multiplexer.
5] Potential for Interference
6] Limited Capacity
7] Synchronization Issues
Applications of Multiplexers:

 Multiplexer is used as data selector device.

 Multiplexers are used in communication systems to increase the efficiency of the
system.
 Multiplexers are used in telephone networks for integration of several audio signals
on a single transmission line.
 To maintain large amount of data, multiplexers are also used in computer memory
systems.
 Multiplexers are also employed in TV broadcasting systems.
 Multiplexers are used in satellite communication and GPS (Global Positioning
System).
 Multiplexers are also used in PLC (Programmable Logic Control) systems, etc.

De-multiplexer/ Data distributers:

 A De-multiplexer is a combinational circuit that has only 1 input line and 2 N output
lines.

 Simply, the multiplexer is a single-input and multi-output combinational circuit.

 data from one input can be passed to one of the many output data lines..

 On the basis of the values of the selection lines, the input will be connected to one of
these outputs.

 Demultiplexers are mainly used in Boolean function generators and decoder

circuits.

 The Demultiplexer ICs are also called as Decoder ICs. For example, 74159 is a 4-
line to 16-line Decoder IC.

 De-multiplexer is opposite to the multiplexer.

 De-multiplexer is also treated as De-mux.

Selection lines

2n Outputs line
Types of De-multiplexer

1) 1 x 2 De- Mux:-
 In the 1 to 2 De-multiplexer, there are only two outputs, i.e., Y 0, and Y1, 1 selection
lines, i.e., S0, and single input, i.e., A.
 On the basis of the selection value, the input will be connected to one of the outputs.
 The figure below shows the block diagram of a 1-to-2 De-multiplexer with additional
enable input.
The block diagram of 1 x 2 De-Mux:-

 In the figure, there are only two possible ways to connect the input to output lines, thus
only one select signal is enough to do the demultiplexing operation. When the select
input is LOW, then the input will be passed to Y0 and if the select input is HIGH, then
the input will be passed to Y1.

Truth table for 1 x 2 De-Mux:-

Figure: The truth table of the 1×2 De-multiplexer

 From the above truth table, the output Y0 is active when the combination of select
line and input line are active low and high respectively, i.e., S0 A = 0 1 .

 Therefore, the expression for output Y0 is Y0 = S0' A

 Similarly, the output Y1 is active when the combination of select line and input line
are active high, i.e., S0 A = 1 1 .

 Therefore, the expression for output Y0 is Y1 = S0 A

 Finally, The logical expression are,
Y0 = S0' A
Y1 = S0 A

Logical circuit of 1 x 2 De-Mux:-

2) 1 x 4 De-mux:-

 In 1 to 4 De-multiplexer, there are total of four outputs, i.e., Y 0, Y1, Y2, and Y3, 2
selection lines, i.e., S0 and S1 and single input, i.e., A.
 On the basis of the combination of inputs which are present at the selection lines
S0 and S1, the input be connected to one of the outputs. The block diagram and the
truth table of the 1×4 multiplexer are given below.
 The outputs are active only when the ‘E’ bit is HIGH.

The block diagram of the 1×4 De-multiplexer:-

The truth table of the 1×4 De- multiplexer:

From truth table, it is clear that, when S0 = 0 and S1 = 0, the data input is connected
to output Y0 and when S0 = 0 and s1=1, the data input is connected to output
Y1.Similarly, other outputs are connected to the input for the other two combinations of
select lines.
The logical expression of the term Y is :

Y0=S1'S0'A
y1=S1'S0 A
y2=S1 S0'A
y3=S1 S0 A

Logical circuit of the above expressions is given below:

3) 1 x 8 De-mux:-

 In 1 to 8 De-multiplexer, there are total of eight outputs, i.e., Y 0, Y1, Y2, Y3, Y4, Y5,
Y6, and Y7, 3 selection lines, i.e., S0, S1and S2 and single input, i.e., A.
 On the basis of the combination of inputs which are present at the selection lines S 0,
S1 and S2, the input will be connected to one of these outputs.
 It is also called as 3-to-8 demultiplexer due to its three select input lines and 8 output
lines.
 The block diagram and the truth table of the 1×8 de-multiplexer are given below.
The truth table of the 1×8 de-multiplexer:


 The input ‘A’ is connected with one of the eight outputs from Y0 to Y7 based on the
select lines S2, S1 and S0.
 For example, if S2 S1 S0 = 0 0 0, then the input D is connected to the output Y0 and
so on.
The logical expression of the term Y is:
Y0=S0'.S1'.S2'.A
Y1=S0.S1'.S2'.A
Y2=S0'.S1.S2'.A
Y3=S0.S1.S2'.A
Y4=S0'.S1'.S2 A
Y5=S0.S1'.S2 A
Y6=S0'.S1.S2 A
Y7=S0.S1.S3.A

Logical circuit of the above expressions is given below:

Implement 1×8 De-multiplexer using 1×4 and 1×2 de-multiplexer:

 We can implement the 1×8 de-multiplexer using a lower order de-multiplexer.

 To implement the 1×8 de-multiplexer, we need two 1×4 de-multiplexer and one 1×2
de-multiplexer.

 The 1×4 multiplexer has 2 selection lines, 4 outputs, and 1 input. The 1×2 de-
multiplexer has only 1 selection line.

 For getting 8 data outputs, we need two 1×4 de-multiplexer. The 1×2 de-multiplexer
produces two outputs. So, in order to get the final output, we have to pass the outputs
of 1×2 de-multiplexer as an input of both the 1×4 de-multiplexer.

 The block diagram of 1×8 de-multiplexer using 1×4 and 1×2 de-multiplexer is given
below.

(Note : Truth table and Logical circuit are same as 1 x 8 De-multiplexer)

4) 1 x 16 De-multiplexer:-

 In 1×16 de-multiplexer, there are total of 16 outputs, i.e., Y 0, Y1, …, Y15, 4 selection
lines, i.e., S0, S1, S2, and S3 and single input, i.e., A.

 On the basis of the combination of inputs which are present at the selection lines S 0,
S1, and S2, the input will be connected to one of these outputs.

 The block diagram and the truth table of the 1×16 de-multiplexer are given below.
Block Diagram for 1 x 16 De-multiplexer:-

Truth Table for 1x16 De-Mux:

From truth table, The logical expression of the term Y is:

 Y0=A.S0'.S1'.S2'.S3'
Y1=A.S0'.S1'.S2'.S3
Y2=A.S0'.S1'.S2.S3'
Y3=A.S0'.S1'.S2.S3
Y4=A.S0'.S1.S2'.S3'
Y5=A.S0'.S1.S2'.S3
Y6=A.S0'.S1.S2.S3'
Y7=A.S0'.S1.S2.S3
Y8=A.S0.S1'.S2'.S3'
Y9=A.S0.S1'.S2'.S3
Y10=A.S0.S1'.S2.S3'
Y11=A.S0.S1'.S2.S3
Y12=A.S0.S1.S2'.S3'
Y13=A.S0.S1.S2'.S3
Y14=A.S0.S1.S2.S3'
Y15=A.S0.S1.S2'.S3

Logical circuit of the above expressions is given below:

Implement 1×16 de-multiplexer using 1×8 and 1×2 de-multiplexer:

 We can implement the 1×16 de-multiplexer using a lower order de-multiplexer.

 To implement the 1×16 de-multiplexer, we need two 1×8 de-multiplexer and one
1×2 de-multiplexer.

 The 1×8 multiplexer has 3 selection lines, 1 input, and 8 outputs. The 1×2 de-
multiplexer has only 1 selection line.

 For getting 16 data outputs, we need two 1×8 de-multiplexer. The 1×8 de-
multiplexer produces eight outputs. So, in order to get the final output, we need a
1×2 de-multiplexer to produce two outputs from a single input. Then we pass these
outputs into both the de-multiplexer as an input.

 The block diagram of 1×16 de-multiplexer using 1×8 and 1×2 de-multiplexer is
given below.

(Note : Truth table and Logical circuit are same as 1 x 16 De-multiplexer)

Applications of Demultiplexers
 Demultiplexers are used in clock data recovery solutions.
 Demultiplexer along with multiplexer is necessary for any communication system for
data transmission.
 Demultiplexers are used in ATM packets broadcasting.
 The output of Arithmetic Logic Unit is stored in respective registers using
Demultiplexers.
 They act as Serial to Parallel converter.
 They are also used in Wavelength routers.
Advantages & Disadvantages of De-Multiplexer:
The advantages of Demultiplexer include the following.
 The efficiency of the communication system can be improved with the help of the
Multiplexer & Demultiplexer combination
 A demultiplexer separates back the mutual signals into streams.
 Its function is quite opposite to multiplexer
 It can be used as a decoder in the security systems
 The combination of Mux & Demux is used for the transmission of Audio or Video
signals.
The disadvantages of demultiplexer include the following.

 Bandwidth wastage can be occurred.

 Delays can be occurred due to the synchronization of the signal.

Difference Between Multiplexer and Demultiplexer

Parameters Multiplexer Demultiplexer

Definition Multiplexer refers to a type of The demultiplexer refers to the

combinational circuit that accepts type of combinational circuit that
multiple inputs of data but provides accepts just a single input but
only a single output. directs it through multiple outputs.

Technique of A Multiplexer performs conversion A Demultiplexer performs

Conversion from parallel to serial. conversion from serial to parallel.

Common Name Data Selector Data Distributor

Operational Multiplexer works on an Demultiplexer works on an

Principle operational principle of many to operational principle of one to
one. many.

Configuration of It behaves as a data selector It behaves as a data distributor

Devices because the multiplexer is an N to because the demultiplexer is a 1 to
1 device. N device.
Total Number of It has multiple inputs of data and It has a single input of data and
Data Inputs signals. signals.

Total Number of A Multiplexer generates a single A Demultiplexer generates

Data Outputs output for data and signals. multiple outputs for data and
signals.

Information It processes the digital data and It collects digital data and info
Processing info by collecting them from from one single source/channel and
multiple sources and integrating then converts it into a set of
them into a single source as the multiple sources as the outputs.
output.

Type of Digital The multiplexer acts as a digital The demultiplexer acts as a digital
Setup switch. circuit.

Logic Type A multiplexer follows a logic type A demultiplexer also follows a

that is combinational. combinational logic type.

End of Usage In the process of time-division In the process of time-division

Multiplexing, we use a Multiplexer Multiplexing, we use a
at the end of the transmitter. Demultiplexer at the end of the
receiver.

Decoder: -

 A Decoder is a combinational logic circuit that translating of coded

information from one format into another.

 A digital decoder converts a set of digital signals into corresponding decimal

code.

 A decoder is a combinational circuit that converts binary information from N

input lines to a maximum of 2N unique output lines.

 a binary decoder is a digital circuit that converts a binary code into a set of
outputs. Binary decoders are the inverse of encoders and are widely used in
digital systems to convert serial codes into parallel outputs.

 At a time, only one input line is activated for simplicity.

 The produced 2N-bit output code is equivalent to the binary information.

Types of Decoder:

1) 2-to-4 Line Decoder:-

 In the 2 to 4 line decoder, there are total of two inputs, i.e., A 0, and A1 single
enable line E and four outputs, i.e., Y0, Y1, Y2, and Y3.
 For each combination of inputs, when the enable 'E' is set to 1, one of these four
outputs will be 1.
 The block diagram and the truth table of the 2 to 4 line decoder are given below.

Block Diagram for 2-to-4 Line Decoder:-

Truth Table for 2-to-4 Line Decoder:-

The logical expression of the term Y0, Y0, Y2, and Y3 is as follows:

Y3=E.A1.A0
Y2=E.A1.A0'
Y1=E.A1'.A0
Y0=E.A1'.A0'

Logical circuit of the above expressions is given below:

2) 3 to 8 line decoder:-

 The 3 to 8 line decoder is also known as Binary to Octal Decoder.

 In a 3 to 8 line decoder, there is a total of eight outputs, i.e., Y 0, Y1, Y2, Y3, Y4, Y5,
Y6, and Y7 and three inputs, i.e., A0, A1, and A2 and single line Enable E.

 For each combination of inputs, when the enable 'E' is set to 1, one of these Eight
outputs will be 1.

 The block diagram and the truth table of the 3 to 8 line encoder are given below.

Block Diagram for 3 to 8 line decoder:-

Truth Table for 3 to 8 Decoder:

The logical expression of the term Y0, Y1, Y2, Y3, Y4, Y5, Y6, and Y7 is as follows:

Y0=A0'.A1'.A2'
Y1=A0.A1'.A2'
Y2=A0'.A1.A2'
Y3=A0.A1.A2'
Y4=A0'.A1'.A2
Y5=A0.A1'.A2
Y6=A0'.A1.A2
Y7=A0.A1.A2

Logical circuit of the above expressions is given below:

3) 4 to 16 line Decoder:-

 In the 4 to 16 line decoder, there is a total of 16 outputs, i.e., Y 0, Y1, Y2,……,

Y15 and four inputs, i.e., A0, A1, A2, and A3.

 The 3 to 16 line decoder can be constructed using either 2 to 4 decoder or 3 to 8

decoder.

 There is the following formula used to find the required number of lower-order
decoders.

Required number of lower order decoders=m2/m1

m1 = 8
m2 = 16

Required number of 3 to 8 decoders= =2

Block Diagram for 4 to 16 line Decoder:-

Operation of 4 to 16 line Decoder:-

 When A3 = 0, the lower decoder will be activated (enabled) and upper decoder will
be deactivated. At that time, the lower decoder will generate the minterms from 0000
to 0111 i.e. m0 to m7.
 When A3 = 1, the lower decoder will be deactivated and upper decoder will be
activated. At that time, the upper decoder will generate the Minterms from 1000 to
1111 i.e. m8 to m15.

Truth Table:
The logical expression of the term A0, A1, A2,…, A15 are as follows:

Y0=A0'.A1'.A2'.A3'
Y1=A0'.A1'.A2'.A3
Y2=A0'.A1'.A2.A3'
Y3=A0'.A1'.A2.A3
Y4=A0'.A1.A2'.A3'
Y5=A0'.A1.A2'.A3
Y6=A0'.A1.A2.A3'
Y7=A0'.A1.A2.A3
Y8=A0.A1'.A2'.A3'
Y9=A0.A1'.A2'.A3
Y10=A0.A1'.A2.A3'
Y11=A0.A1'.A2.A3
Y12=A0.A1.A2'.A3'
Y13=A0.A1.A2'.A3
Y14=A0.A1.A2.A3'
Y15=A0.A1.A2'.A3

Logical circuit of the above expressions is given below:

applications of decoders:-
 It is used in code conversion. i.e analog to digital conversion in the analog decoder.
 It may also be used for data distribution.
 In a high-performance memory system, this decode can be used to minimize the
effect of system decoding.
 The decoder is used as address decoders in CPU memory location identification.
 It is also be used in electronic circuits to convert instruction into CPU control
signals.
 They are mainly used in logical circuits, data transfer.
 They can also be used to create simple other digital logics like half adders and full
adders and
 some other digital design also.
 Microprocessor selecting different I/O devices.
 It decoding to binary input to activate the LED segments so that the decimal number
can be displayed.
 Microprocessor memory system selecting different banks of memory.
 The decoder can be used as a timing or sequencing signals to turn the device on or
off at specific times because when the decoder inputs come from a counter that is
being continually pulsed, The decoder output will be activated sequentially.
 The decoder is used whenever an output or a group of output is to be activated only
on the occurrence of a specific combination of input signals.
 They can be the application of switching function often with the fewer integrated
circuit.
Advantages of using Decoders in Digital Electronics:-
The advantages of Decoder in Digital Electronics are:
 Binary Decoders are used to convert an input signal into many parallel outputs. This,
in turn, increases the performance of the system.
 It allows us to select one output among the many based on the input code. This
increases the flexibility of the system.
 Binary Decoders help in distributing the data from a single input to many outputs. This
reduces the probability of errors and also increases the reliability.

Disadvantages of using Decoders in Digital Electronics

The disadvantages of Decoder in digital electronics are:
 They have a more complex structure than the demultiplexers. They require extra logic
gates to give correct results.
 They are used to convert binary codes into their respective outputs. That is, they are
limited to specific uses only.
 The number of outputs in a binary decoder is fixed. This becomes difficult when the
user needs to address more outputs.

Encoder:-

 An Encoder is a combinational logic circuit that translates decimal number to

binary number.
  The produced N-bit output code is equivalent to the binary information.

 An Encoder is a combinational circuit that performs the reverse operation of

a Decoder. It has a maximum of 2N input lines and ‘N’ output lines, hence it
encodes the information from 2 N inputs into an N-bit code.

 An encoder is a digital circuit that converts a set of binary inputs into a unique
binary code.

 An encoder is a device which converts familiar numbers or characters or symbols

into a coded format. It accepts the alphabetic characters and decimal numbers as
inputs and produces the outputs as a coded representation of the inputs.

 At a time, only one input line is activated for simplicity.

Types of Encoder:

1) 4 to 2 line Encoder:-

 In 4 to 2 line encoder, there are four inputs, i.e., Y0, Y1, Y2, and Y3, and two outputs,
i.e., A0 and A1.

 In 4-input lines, one input-line is set to true at a time to get the respective binary
code in the output side.

 The block diagram and the truth table of the 4 to 2 line encoder shown below.

Block Diagram for 4 to 2 line Encoder:-

Truth Table for 4 to 2 line Encoder:-

The logical expression of the term A0 and A1 is as follows:

A1=Y3+Y2
A0=Y3+Y1

Logical circuit of the above expressions is given below:

2) 8 to 3 line Encoder:

 The 8 to 3 line Encoder is also known as Octal to Binary Encoder.

 In 8 to 3 line encoder, there are eight inputs, i.e., Y 0, Y1, Y2, Y3, Y4, Y5, Y6, and
Y7 and three outputs, i.e. A0, A1, and A2.

 In 8-input lines, one input-line is set to true at a time to get the respective binary
code in the output side.

 The block diagram and the truth table of the 8 to 3 line encoder shown below.

Block Diagram for 8 to 3 line Encoder:-

Truth Table for 8 to 3 line Encoder:

The logical expression of the term A0, A1, and A2 are as follows:

A2=Y4+Y5+Y6+Y7
A1=Y2+Y3+Y6+Y7
A0=Y7+Y5+Y3+Y

Logical circuit of the above expressions is given below:

Decimal to BCD Encoder:-

 The Octal to Binary Encoder is also known as 10 to 4 line Encoder.

 In 10 to 4 line encoder, there are ten inputs, i.e., Y 0, Y1, Y2, Y3, Y4, Y5, Y6, Y7, Y8,
and Y9 and four outputs, i.e., A0, A1, A2, and A3.

 In 10-input lines, one input-line is set to true at a time to get the respective BCD
code in the output side.

 The block diagram and the truth table of the decimal to BCD encoder are given
below.
Truth Table:

The logical expression of the term A0, A1, A2, and A3 is as follows:

A3=Y9+Y8
A2=Y7+Y6+Y5+Y4
A1=Y7+Y6+Y3+Y2
A0 = Y9 + Y7 +Y5 +Y3 + Y1

Logical circuit of the above expressions is given below:

Priority Encoder:
4 to 2 line Priority Encoder:
 In this priority encoder, there are 4 inputs, i.e., Y 0, Y1, Y2, and Y3, and two outputs,
i.e., A0 and A1.

 The Y3 has high and Y0 has low priority inputs.

 When more than one input is '1' at the same time, the output will be the (binary) code
corresponding to the higher priority input.

 The truth table of the 4 to 2 line priority encoder shown below.

Truth Table:

The logical expression of the term A0 and A1 can be found using K-map as:
 A1=Y3+Y2
A0=Y3+Y2'.Y1

Logical circuit of the above expressions is given below:

Uses of Encoders:
1. These systems are very easy to use in all digital systems.
2. Encoders are used to convert a decimal number into the binary number. The
objective is to perform a binary operation such as addition, subtraction,
multiplication, etc.

Advantages and disadvantages of encoder:

Advantages of encoder:
 Highly reliable and accurate.
 Higher resolution.
 Low-cost feedback.
 Integrated electronics.
 Compact in size.
 Fuses optical and digital technology.
 It can be incorporated into existing applications.

Disadvantages of an encoder:
 The subject of magnetic radio interference.
 Susceptible to dirt, oil and dust contaminate.
 Direct light source interference.
Application of an encoder:
 Automatic health monitoring systems.
 RF-based home automation system.
 Robotics vehicle with the metal detector.
 War field flying robot with a using night-vision flying camera.
 Speed synchronization of multiple motors in industries.
 Encoder for CNC machines.
 Encoder for the medical industry most common for breast cancer treatment in the
world.
 Encoder for the electronics industry.

Differentiate between Encoder and Decoder

ENCODER DECODER

Encoder circuit basically converts the Decoder performs reverse operation and
applied information signal into a coded recovers the original information signal from
digital bit stream. the coded bits.

In case of encoder, the applied signal is Decoder accepts coded binary data as its
the active signal input. input.

The number of inputs accepted by an The number of input accepted by decoder is

 ENCODER DECODER

encoder is 2n. only n inputs.

The output lines for an encoder is n. The output lines of an decoder is 2n.

The encoder generates coded data bits as The decoder generates an active output
its output. signal in response to the coded data bits.

The operation performed is simple. The operation performed is complex.

The encoder circuit is installed at the The decoder circuit is installed at the
transmitting end. receiving side.

OR gate is the basic logic element used AND gate along with NOT gate is the basic
in it. logic element used in it.

It is used in Microprocessors, memory chips

It is used in E-mail, video encoders etc.
etc

Code Converter: The Code converter is used to convert one type of code to another.
Some common types of code converters are Binary to Gray code converter, Gray to Binary
code converter, BCD to Excess-3 code converter, 7- Segment display code converter etc.
Different codes are used for different types of digital system and computer based
application to perform data representation and manipulation tasks.

BCD to Excess-3 code converter: The Excess-3 code is an important 4-bit code,
sometimes used with Binary-coded decimal ( BCD ) number. To convert any decimal
number into its excess-3 form, add 3 to each decimal digit and then convert the sum to a
BCD number.

For example, convert 12 to an excess-3 number.

Solution,
First, add 3 to each decimal digit.
1 2
+3 +3
4 5
Now, convert the sum to BCD form as, 4= 0100, 5=0101
So, 01000101 is the excess -3 code for decimal 12.

Binary to Gray code conversion:- The Binary to Gray code converter is a logical circuit
that is used to convert the binary code into its equivalent Gray code. By putting the MSB
of 1 below the axis and the MSB of 1 above the axis and reflecting the (n-1) bit code about
an axis after 2n-1 rows, we can obtain the n-bit gray code.

The 4-bit binary to gray code conversion table is as follows:

Decimal Number 4-bit Binary Code 4-bit Gray Code

ABCD G1G2G3G4

0 0000 0000

1 0001 0001

2 0010 0011

3 0011 0010

4 0100 0110

5 0101 0111

6 0110 0101

7 0111 0100

8 1000 1100

9 1001 1101

10 1010 1111

11 1011 1110

12 1100 1010

13 1101 1011

14 1110 1001
 15 1111 1000

In 4-bit gray code, the 3-bit code is reflected against the axis drawn after the 2 4-1-
1th =8th row.

How to Convert Binary to Gray Code:-

o In the Gray code, the MSB will always be the same as the 1'st bit of the given binary
number.
o In order to perform the 2nd bit of the gray code, we perform the exclusive-or (XOR)
of the 1'st and 2nd bit of the binary number. It means that if both the bits are different,
the result will be one else the result will be 0.
o In order to get the 3rd bit of the gray code, we need to perform the exclusive-or
(XOR) of the 2nd and 3rd bit of the binary number. The process remains the same for
the 4th bit of the Gray code. Let's take an example to understand these steps.

Example:-

Suppose we have a binary number 01101, which we want to convert into Gray code. There
are the following steps which need to perform this conversion:

o As we know that the 1st bit of the Gray code is the same as the MSB of the binary
number. In our example, the MSB is 0, so the MSB or 1st bit of the gray code is 0.
o Next, we perform the XOR operation of the 1'st and the second binary number. The
1st bit is 0, and the 2nd bit is 1. Both the bits are different, so the 2 nd bit of the Gray
code is 1.
 o Now, we perform the XOR of the 2 nd bit and 3rd bit of the binary number. The 2nd bit
is 1, and the 3rd bit is also 1. These bits are the same, so the 3 rd bit of the Gray code is
0.
o Again perform the XOR operation of the 3rd and 4th bit of binary number. The 3rd bit
is 1, and the 4th bit is 0. As these are different, the 4th bit of the Gray code is 1.
o Lastly, perform the XOR of the 4 th bit and 5th bit of the binary number. The 4 th bit is
0, and the 5th bit is 1. Both the bits are different, so that the 5 th bit of the Gray code is
1.
o The gray code of the binary number 01101 is 01011.

Gray to Binary Code Conversion:-

The Gray to Binary code converter is a logical circuit that is used to convert the gray code
into its equivalent binary code. There is the following circuit used to convert the Gray code
to binary number.

Just like Binary to Gray code conversion; it is also a very simple process. There are the
following steps used to convert the Gray code into binary.
 o Just like binary to gray, in gray to binary, the 1 st bit of the binary number is similar
to the MSB of the Gray code.
o The 2nd bit of the binary number is the same as the 1 st bit of the binary number when
the 2nd bit of the Gray code is 0; otherwise, the 2 nd bit is altered bit of the 1st bit of
binary number. It means if the 1st bit of the binary is 1, then the 2 nd bit is 0, and if it
is 0, then the 2nd bit be 1.
o The 2nd step continues for all the bits of the binary number.

Gray Code to Binary Conversion Example

Suppose we have the Gray code 01011, which we want to convert into a binary number.
There are the following steps which we need to perform for the conversion:

o The 1'st bit of the binary number is the same as the MSB of the Gray code. The
MSB of the Gray code is 0, so the MSB of the binary number is 0.
o Now, for the 2nd bit, we check the 2nd bit of the Gray code. The 2 nd bit of the Gray
code is 1, so the 2nd bit of the binary number is one that is altered number of 1st
o The next bit of the Gray code is 0; the 3 rd bit is the same as the 2 nd bit of the Gray
code, i.e., 1.
o The 4th bit of the Gray code is 1; the 4th bit of the binary number is 0 that is the
altered number of the 3rd
o The 5th bit of the Gray code is 1; the 5 th bit of the binary number is 1; that is the
altered number of the 4th bit of the binary number.
o So, the binary number of the Gray code 01011 is 01101.

Multiple choice questions. ( From unit 4 )

1. Decimal digit in BCD can be represented by-------------------
a) 1 input line b) 2input line c) 3 input line d) 4 input line
2. To construct 4 x 1 Mux we require--------------
a) 4 inputs & 2 selection lines b) 2 input & 4 selection lines
c) 4 inputs & 4 selection lines d) 8 inputs & 3 selection lines
3. The encoder with 16 inputs has------------outputs.
a) 8 b) 4 c) 2 d) 1
4. Which of the following is not the property of combinational circuits?
 a) Can store information b) Can produce sum and difference
c) Can make selection d) Can decode the input
5. The full adder can be constructed using----------------
a) Gates only b) Universal gate only c) Two half adder only d) All of above
6. The priority encoding works on----------------
a) Even input only b) Odd input only c) Input priority d) Output priority
7. 8 x 1 Mux can be constructed using ---------------
a) Two 3x1 Mux b) Two 4x1 Mux c) Two 8x1 Mux d) Two 16x1 MUx
8. Combinational circuit have ---------------to store data.
a) A memory b) Multiple bits c) No memory d) Multiple memory
9. The gates required to build a half adder are---------------
a) EX-OR gate & NOR gate b) EX-OR gate & OR gate
c) EX-OR gate & AND gate d) EX-NOR & AND gate
10. Opposite of encoding is---------------------
a) Decoding b) Multiplexing c) De-Multiplexing d) Adding

Short answer questions.

1. Explain Combinational logic with suitable diagram.
2. Define half adder with their truth table and logical diagram.
3. Differentiate between encoder and decoder.
4. Differentiate between multiplexer and De- Multiplexer.
5. Explain 8x1 Mux with their truth table and logical diagram.
6. Write the advantage and disadvantage of Multiplexer.
7. Write the advantage and disadvantage of De-Multiplexer.
8. Write the advantage and disadvantage of Encoder.
9. Write the advantage and disadvantage of Decoder.
10.What are the uses of Mux, De-Mux, Encoder and Decoder.
11. What are the features of Mux, De-Mux, Encoder and Decoder.

Long Answer Questions.

1. What is an adder ? explain the full subtractor with truth table and logic diagram.
2. Realize full adder circuit using NAND gate only.
3. Describe Multiplexer and De-Multiplexer.
4. Design 4x1 Mux using Universal gate.
5. Implement 8x1 Mux using 4x1 Mux.

Unit: 5 introduction to Microprocessor and its Components

Microprocessor :-
 A Microprocessor is an important part of a computer architecture without which
you will not be able to perform anything on your computer.
 A microprocessor is a multipurpose, programmable, clock-driven, register-based
electronic device that reads binary instructions from a storage device called memory,
accepts binary data as input and processes data according to those instructions and
provide results as output.
 The microprocessor contains millions of tiny components like transistors, registers,
and diodes that work together.
 In simple words, a Microprocessor is a digital device on a chip that can fetch
 instructions from memory, decode and execute them and give results.

Block diagram of microprocessor:

A microprocessor consists of an ALU, control unit and register array.

Where ALU performs arithmetic and logical operations on the data received from an input
device or memory. Control unit controls the instructions and flow of data within the
computer. And, register array consists of registers identified by letters like B, C, D, E, H,
L, and accumulator.

Working of Microprocessor: The microprocessor follows a sequence to execute the

instruction: Fetch, Decode, and then Execute.

Initially, the instructions are stored in the storage memory of the computer in sequential
order. The microprocessor fetches those instructions from the stored area (memory), then
decodes it and executes those instructions till STOP instruction is met. Then, it sends the
result in binary form to the output port. Between these processes, the register stores the
temporary data and ALU (Arithmetic and Logic Unit) performs the computing functions.

List of Terms Used in a Microprocessor:-

Here is a list of some of the frequently used terms in a microprocessor −
 Instruction Set − It is the set of instructions that the microprocessor can understand.
 Bandwidth − It is the number of bits processed in a single instruction.
 Clock Speed − It determines the number of operations per second the processor can
perform. It is expressed in megahertz (MHz) or gigahertz (GHz).It is also known as
Clock Rate.
 Word Length − It depends upon the width of internal data bus, registers, ALU, etc.
An 8-bit microprocessor can process 8-bit data at a time. The word length ranges
from 4 bits to 64 bits depending upon the type of the microcomputer.
 Data Types − The microprocessor has multiple data type formats like binary, BCD,
ASCII, signed and unsigned numbers.
  Bus - Set of conductors intended to transmit data, address or control information to
different elements in a microprocessor. A microprocessor will have three types of
buses, i.e., data bus, address bus, and control bus.

 IPC (Instructions Per Cycle) - It is a measure of how many instructions a CPU is

capable of executing in a single clock.

Features of a Microprocessor:-
 Low Cost - Due to integrated circuit technology microprocessors are available at
very low cost. It will reduce the cost of a computer system.
 High Speed - Due to the technology involved in it, the microprocessor can work at
very high speed. It can execute millions of instructions per second.
 Small Size - A microprocessor is fabricated in a very less footprint due to very large
scale and ultra large scale integration technology. Because of this, the size of the
computer system is reduced.
 Versatile - The same chip can be used for several applications, therefore,
microprocessors are versatile.
 Low Power Consumption - Microprocessors are using metal oxide semiconductor
technology, which consumes less power.
 Less Heat Generation - Microprocessors uses semiconductor technology which will
not emit much heat as compared to vacuum tube devices.
 Reliable - Since microprocessors use semiconductor technology, therefore, the
failure rate is very less. Hence it is very reliable.
 Portable - Due to the small size and low power consumption microprocessors are
portable.

Application of microprocessor:-
Smartphones:Smartphones, tablets, and other mobile devices all rely on microprocessors
to function. They execute instructions, process data, and perform various operations to
make these devices work.
Every Computer:- It is used in every computer, ranging from personal computers to
supercomputers. All the instruction execution and operational execution work are done
by microprocessors present inside them.
Automobile: It is used in automobiles to control a wide range of functions including
engine management, and entertainment systems.
lift control: It is used in lift control, Traffic light control, fuel control of furnaces in
power plants, etc.
In robots: It is used in robots, video games, smart cameras, etc.
Aerospace: Microprocessors are used in various aerospace applications, including
aircraft navigation, guidance systems, and flight control systems.
Server management: It plays an important role in server management where it executes
millions of data stores and retrieves instructions in milliseconds.
Household Devices: The programmable thermostat allows the control of temperature at
homes. In this system, a microprocessor works with the temperature sensor to determine
and adjust the temperature accordingly. High-end coffee makers, Washing machines, and
radio clocks contain microprocessor technology.
Industrial Applications: Some industrial items which use microprocessors technology
include: cars, boats, planes, trucks, heavy machinery, elevators, gasoline pumps, credit-
card processing units, traffic control devices, computer servers, most high tech medical
devices, surveillance systems, security systems, and even some doors with automatic entry.
In Medicals: Many medical devices, like an insulin pump, are typically controlled by a
microprocessor. The microprocessors perform various functions, such as processing data
from bio-sensors, storing measurements, and analyzing results.
Instrumentation: Microprocessor is also very useful in the field of instrumentation.
Function generators, frequency counters, frequency synthesizers, spectrum analyses and
many other instruments are available, when microprocessors are used as controller.
Entertainment: The use of microprocessor in entertainment equipment, toys and home
entertaining applications is making them more useful and full of features.
Office Automation and Publication: Microprocessor based system with software
packages has changed the office environment. Microprocessors based systems are being
used for spread sheet operations, word processing, storage etc.The Publication technology
has revolutionized by the microprocessor.
Communication: In communication the telephone industry is most important. In this
industry, microprocessors are used in digital telephone sets, telephone exchanges and
modem etc. The use of microprocessor in satellite communication, television, has made
teleconferencing possible. Railway reservation and airline reservation system also uses
microprocessor technology. WAN (Wide Area Network) and LAN (Local Area Network)
for communication of vertical information through computer network.

Advantages of the microprocessor :

1. High processing speed
2. Compact size
3. Easy maintenance
4. Can perform complex mathematics
5. Flexible
6. Can be improved according to a requirement

Disadvantages of microprocessors :
1. Overheating occurs due to overuse
2. Performance depends on the size of the data
3. Large board size than microcontrollers
4. Most microprocessors do not support floating-point operations
Types of Microprocessor:
A microprocessor can be classified into three categories −

RISC Processor: RISC stands for Reduced Instruction Set Computer. RISC or Reduced
Instruction Set Computer is a computer architecture where instruction is simple and
designed to get executed quickly. Instructions get completed in one clock cycle this is
because of the optimization of instructions and pipelining (a technique that allows for
simultaneous execution of parts, or stages, of instructions more efficiently process
instructions). RISC makes use of multiple registers to avoid large interactions with
memory. It has few addressing nodes.
Some of the RISC processors are −
 Power PC: 601, 604, 615, 620
 DEC Alpha: 210642, 211066, 21068, 21164
 MIPS: TS (R10000) RISC Processor
 PA-RISC: HP 7100LC
 IBM RS6000
 MC88100

Architecture of RISC:
RISC microprocessor architecture uses highly-optimized set of instructions. It is used in
portable devices like Apple iPod due to its power efficiency.
Characteristics of RISC:
The major characteristics of a RISC processor are as follows −
 It consists of simple instructions.
 It supports various data-type formats.
 It utilizes simple addressing modes and fixed length instructions for pipelining.
 It supports register to use in any context.
 One cycle execution time.
 “LOAD” and “STORE” instructions are used to access the memory location.
 It consists of larger number of registers.
 It consists of less number of transistors.

Features of RISC Processor:

Some important features of RISC processors are:

1. One cycle execution time: For executing each instruction in a computer, the RISC
processors require one CPI (Clock per cycle). And each CPI includes the fetch,
decode and execute method applied in computer instruction.
2. Pipelining technique: The pipelining technique is used in the RISC processors to
execute multiple parts or stages of instructions to perform more efficiently.
3. A large number of registers: RISC processors are optimized with multiple registers
that can be used to store instruction and quickly respond to the computer and
minimize interaction with computer memory.
4. It supports a simple addressing mode and fixed length of instruction for executing
the pipeline.
5. It uses LOAD and STORE instruction to access the memory location.
6. Simple and limited instruction reduces the execution time of a process in a RISC

Advantages of RISC Microprocessor

1. The RISC processor's performance is better due to the simple and limited number of
the instruction set.
 2. It requires several transistors that make it cheaper to design.
3. RISC allows the instruction to use free space on a microprocessor because of its
simplicity.
4. RISC processor is simpler than a CISC processor because of its simple and quick
design, and it can complete its work in one clock cycle.

Disadvantages of RISC Microprocessor

1. The RISC processor's performance may vary according to the code executed because
subsequent instructions may depend on the previous instruction for their execution in
a cycle.
2. Programmers and compilers often use complex instructions.
3. RISC processors require very fast memory to save various instructions that require a
large collection of cache memory to respond to the instruction in a short time.

CISC Processor: CISC stands for Complex Instruction Set Computer. CISC or Complex
Instruction Set Computer is a computer architecture where instructions are such that a
single instruction can execute multiple low-level operations like loading from memory,
storing into memory, or an arithmetic operation, etc. It has multiple addressing nodes
within a single instruction.CISC makes use of very few registers.
Some of the CISC Processors are,
 IBM 370/168
 VAX 11/780
 Intel 80486
 Intel 386
 Intel 486

Architecture of CISC:
Its architecture is designed to decrease the memory cost because more storage is needed in
larger programs resulting in higher memory cost. To resolve this, the number of
instructions per program can be reduced by embedding the number of operations in a single
instruction.
Characteristics of CISC:
 Variety of addressing modes.
 Larger number of instructions.
 Variable length of instruction formats.
 Several cycles may be required to execute one instruction.
 Instruction-decoding logic is complex.
 One instruction is required to support multiple addressing modes.

Advantages of CISC Processors:

1. The compiler requires little effort to translate high-level programs or statement
languages into assembly or machine language in CISC processors.
2. The code length is quite short, which minimizes the memory requirement.
3. To store the instruction on each CISC, it requires very less RAM.
4. Execution of a single instruction requires several low-level tasks.
5. CISC creates a process to manage power usage that adjusts clock speed and voltage.
6. It uses fewer instructions set to perform the same instruction as the RISC.

Disadvantages of CISC Processors:

1. CISC chips are slower than RSIC chips to execute per instruction cycle on each
program.
2. The performance of the machine decreases due to the slowness of the clock speed.
3. Executing the pipeline in the CISC processor makes it complicated to use.
4. The CISC chips require more transistors as compared to RISC design.
5. In CISC it uses only 20% of existing instructions in a programming event.

Difference between RISC and CISC Processor

S.No. RISC CISC

 1. RISC is a reduced instruction set. CISC is a complex instruction set.

2. The number of instructions is less as compared The number of instructions is more as compared
to CISC. to RISC.

3. The addressing modes are less. The addressing modes are more.

4. It works in a fixed instruction format. It works in a variable instruction format.

5. The RISC consumes low power. The CISC consumes high power.

6. The RISC processors are highly pipelined. The CISC processors are less pipelined.

7. It optimizes the performance by focusing on It optimizes the performance by focusing on

software. hardware.

8. Requires more RAM. Requires less RAM.

Coprocessor:- A coprocessor is a specially designed microprocessor, which can handle its

particular function many times faster than the ordinary microprocessor.
For example − Math Coprocessor.
Some Intel math-coprocessors are −
8087-used with 8086

 80287-used with 80286
 80387-used with 80386
Input/Output Processor:
It is a specially designed microprocessor having a local memory of its own, which is used
to control I/O devices with minimum CPU involvement.
For example −
DMA (direct Memory Access) controller

 Keyboard/mouse controller
 Graphic display controller
 SCSI port controller
Transputer (Transistor Computer):
A transputer is a specially designed microprocessor with its own local memory and having
links to connect one transputer to another transputer for inter-processor communications. It
was first designed in 1980 by Inmos and is targeted to the utilization of VLSI technology.
A transputer can be used as a single processor system or can be connected to external links,
which reduces the construction cost and increases the performance.
For example − 16-bit T212, 32-bit T425, the floating point (T800, T805 & T9000)
processors.
DSP (Digital Signal Processor):
This processor is specially designed to process the analog signals into a digital form. This
is done by sampling the voltage level at regular time intervals and converting the voltage at
that instant into a digital form. This process is performed by a circuit called an analogue to
digital converter, A to D converter or ADC.
A DSP contains the following components −
 Program Memory − It stores the programs that DSP will use to process data.
 Data Memory − It stores the information to be processed.
 Compute Engine − It performs the mathematical processing, accessing the program
from the program memory and the data from the data memory.
 Input/Output − It connects to the outside world.
Its applications are:
 Sound and music synthesis
 Audio and video compression
 Video signal processing
 2D and 3d graphics acceleration.
For example − Texas Instrument’s TMS 320 series, e.g., TMS 320C40, TMS320C50.

Bit-Slice Processors: The processor of desired word length is developed using the building
blocks. The basic building block is called Bit-Slice where the building blocks include 4-bit
ALUs, micro programs sequencers, carry look-ahead generators, etc. The word 'slice' was
used because the desired number of ALUs and other components were used to build an 8-
bit, 16-bit or 32-bit CPU.

Examples of Bit-Slice Processors were:

o AMD-2900, AMD 2909, AMD 2910, AMD 29300 series,

o Texas instrument's SN-74AS88XX series, etc.

Graphic Processors: Graphics Processors are specially designed processors for graphics.
Intel has developed Intel 740-3D graphics chip. It is optimized for Pentium II PCs, using a
hyper pipelined 3D architecture with additional 2D acceleration. Like most 3D graphics
chips, the I-740 will be marketed in performance, not the main stream category. It is
designed mostly for such heavy multimedia uses as games and movies.

Examples of Graphic Processors are:

o Intel 82786 graphics coprocessor

o IBM's 8514/A,
o Texas Instruments' TMS34010 and TMS34020,
 o Intel i860 and Intel i750, etc.

Microcontroller: A microcontroller is a small and low-cost microcomputer, which is

designed to perform the specific tasks of embedded systems like displaying microwave’s
information, receiving remote signals, etc.
The general microcontroller consists of the processor, the memory (RAM, ROM,
EPROM), Serial ports, peripherals (timers, counters), etc. A microcontroller is a self-
contained desktop that can be utilized in an embedded system. A few microcontrollers
may run at clock rate rates and use four-bit expressions.

Working of Microcontroller :
The microcontroller chip is a high-speed device, yet it is slow when compared to a
computer. As a result, each command will be executed quickly within the
microcontroller. The quartz oscillator is enabled and through control logic register once
the supply is powered on. Parasite capacitors will be recharged for a few seconds while
the early preparation is taking place. Once the voltage level reaches its maximum value
and the oscillator’s frequency stabilizes, the operation of writing bits through special
function registers becomes stable. Everything is controlled by the oscillator’s CLK, and
the whole electronics will begin to function. All of this happens in a matter of
nanoseconds.
A microcontroller’s major role is that it can be thought of as a self-contained system with
a processor memory. Its peripherals can be used in the same way that an 8051
microcontroller can. The bulk of microcontrollers in use today are embedded in other
types of machinery such as telephones, appliances, vehicles, and computer system
peripherals.

Architecture of Microcontroller:
CPU: Basically, the CPU is the central part of a microcontroller. It is a brain that follows
out an action given by the user. The CPU fetches the instruction from the memory (ROM),
decodes it and executes it. This technique is known as pipelining. The pipelining is done
with the help of the data bus and address bus.
The CPU operates instructions at a speed of MegaHertz (MHz) or GigaHertz (GHz).

Clock: The MCU requires the clock to do any task. To provide a clock to the
microcontroller, a crystal oscillator is driven to the CPU.
The crystal selection determines the speed at which microcontroller want to operate. The
frequency range of the crystal oscillator is generally in the range of MHz.

Registers: Register is a data storing an element. It stores a binary word of 8-bit length. The
microcontrollers are equipped with various general purpose and peripheral registers.
General purpose registers include Program Counter (PC) and the stack pointer for storing
the data and instructions. Whereas Peripheral registers are useful to configure the
hardware in a microcontroller.
Input-Output Ports: Input/output ports are commonly called as GPIO (General purpose
Input output) ports. This means these ports can be used either as input or output. Some
micro MCU supports alternate GPIO. They can be used for multiple functions.
They are required for connecting the external devices like Display interfaces (LED, LCD,
and touch screen), motors, etc. I/O ports are also used for input sensing and switching
purposes.

Memory: RAM (Random access memory) is for storing the temporary storage of data and
ROM (Read Only Memory) is for permanent storage.
To store the data in a microcontroller, the processor architecture is divided into Harvard
and Von-Neumann architecture. Harvard has separate memory buses (address bus and data
bus) to store the instructions and data, whereas Von-Neumann has a common memory for
both instructions and data.
Timers: Timers are the most innovative peripherals that can produce precise time delay. It
can repeat a pre-defined task at a known time period.
Some of the applications of timer include motor control, to turn on/off relay
circuit, GPS (Global Position System), home appliance control etc.

Counters: The Counter is a peripheral that counts the events happening outside the MCU.
Applications of counters include pulse measurement, object detection, etc. They are used in
frequency measurement, to count the rise or fall in temperature in microwave ovens, to
measure the set time in washing machine and electric heaters.

Serial Interfaces: In electronics, different devices talk to each other using serial
communication. To achieve serial communication, interfaces like UART (Universal
Asynchronous receiver-transmitter), I2C, and SPI etc. are used.
Moreover, advanced protocols like Ethernet, USB are also incurred in latest
microcontrollers.

Analog to Digital Converter (ADC): Sensors convert physical parameters like

temperature, humidity, and pressure into analog signals. The ADC converts this analog
signal into digital bytes. The analog signals may be in the form of voltage, current or
resistance.
It has an internal clock that measures the clock cycles fed by the MCU and samples with its
own clock. The number of clock cycles represents the digital representation of analog
voltage.

Digital to Analog Converter (DAC): DAC (Digital to analog conversion) is a contrary of

ADC. DAC converts the digital data into an analog voltage form. Some of the applications
of DAC include digital signal processing, motor control, music players, digital
potentiometer etc.
Interrupts: An Interrupt is an event that comes into play to do more than one task. When
an interrupt is called the microcontroller stops the current execution (first task) and
performs other tasks (second task). After completing the second task, it comes back to the
first task and carries out normal operations.

Types of Microcontroller :
Here are some of the most common types of microcontrollers:
1) 8-bit Microcontrollers: These are the most basic type of microcontrollers,
typically used in simple applications such as toys, small appliances, and remote
controls. They have a limited processing power and memory capacity, but they are
easy to use and cost-effective. This type of microcontroller is used to execute
arithmetic and logical operations like addition, subtraction, multiplication division, etc.
For example, Intel 8031 and 8051 are 8 bits microcontroller.
2) 16-bit Microcontrollers: These are more advanced than 8-bit microcontrollers and
are capable of performing more complex tasks. They are commonly used in
applications such as medical devices, automotive systems, and industrial control
systems.This type of microcontroller is used to perform arithmetic and logical
operations where higher accuracy and performance is required. For example, Intel 8096
is a 16-bit microcontroller
 3) 32-bit Microcontrollers: These are the most powerful and feature-rich
microcontrollers, capable of handling large amounts of data and performing high-
speed processing. They are used in applications such as gaming systems, multimedia
devices, and high-end industrial automation. This type of microcontroller is generally
used in automatically controlled appliances like automatic operational machines,
medical appliances, etc.
4) ARM Microcontrollers: These microcontrollers are based on the ARM
architecture and are widely used in a variety of applications, including mobile devices,
automotive systems, and industrial control systems.
5) PIC Microcontrollers: These microcontrollers are manufactured by Microchip
Technology and are commonly used in a wide range of applications, including home
appliances, automotive systems, and medical devices.
6) AVR Microcontrollers: These microcontrollers are manufactured by Atmel
Corporation and are commonly used in applications such as robotics, industrial control
systems, and consumer electronics.
7) FPGA-based Microcontrollers: These microcontrollers use field-programmable
gate arrays (FPGAs) to provide highly customizable and flexible processing
capabilities. They are commonly used in applications such as digital signal processing,
video processing, and high-speed networking.

Applications of Microcontroller :
In contrast to microprocessors, which are used in personal computers and other devices,
microcontrollers are mostly employed in embedded devices. These are mostly utilized in
a variety of products such as implantable medical devices, machine tools, automotive
engine control systems, office equipment, remote-controlled appliances, and so on. The
following are some of the most common uses for microcontrollers.
Properties of Microcontroller :
 Microcontroller devices are capable of having words longer than 64 bits.
 Microcontroller consist of RAM , ROM , Timer , I/O Ports.
 Microcontroller ROM is used for program storage and RAM is used for data storage.
 It is designed by using CISC architecture.
 The power consumption of modern microcontrollers is significantly lower and have
operating voltage range from 1.8V to 5.5V
 The latest feature of microcontroller is flash memory like EPROM and EEPROM.
 The most recent feature of a microcontroller is flash memory, such as EPROM and
EEPROM.

Uses of Microcontroller :
Microcontrollers are used in a wide range of electronic devices and systems, including:
1. Home Appliances: Many home appliances, such as washing machines, refrigerators,
and air conditioners, use microcontrollers to perform various functions, such as
temperature control, timing, and monitoring.
2. Automotive Systems: Microcontrollers are used in automotive systems, such as
engine control units, anti-lock braking systems, and airbag systems, to control various
functions and ensure safe and efficient operation.
3. Medical Devices: Medical devices, such as insulin pumps, heart monitors, and blood
glucose meters, use microcontrollers to perform various functions and provide
accurate and reliable results.
4. Industrial Control Systems: Microcontrollers are used in industrial control systems,
such as robotics, process control systems, and manufacturing equipment, to control
and monitor various processes and operations.
5. Consumer Electronics: Many consumer electronics devices, such as digital cameras,
gaming systems, and audio players, use microcontrollers to perform various functions
and provide advanced features and capabilities.
6. IoT Devices: Internet of Things (IoT) devices, such as smart home systems,
wearables, and environmental sensors, use microcontrollers to connect to the internet
and perform various functions.
7. Aerospace and Defense Systems: Microcontrollers are used in aerospace and
defense systems, such as satellites, avionics, and missiles, to control and monitor
various functions and ensure safe and efficient operation.
Difference between Microcontroller and Microprocessor:-

Feature Microcontroller (µC) Microprocessor (µP)

Designed for general-

Designed for specific embedded system
Purpose purpose computing
applications
applications

CPU with minimal on-

board memory,
Single-chip computer system with on-board
Architecture peripherals, and I/O
memory, peripherals, and I/O interfaces
interfaces

Integration
Highly integrated Less integrated
level

System
Single-chip system CPU + support chips
architecture

Processing
Lower power Higher power
power

Instruction
Fixed instruction set More flexible
set

On-board
On-chip memory No on-board memory
memory

Input/Output
More I/O ports Fewer I/O ports
(I/O)
 Peripheral
On-board peripherals External peripherals
devices

Cost Lower cost Higher cost

Power
Lower power Higher power
consumption

Applications Embedded systems General-purpose

Standard development
Integrated development environment (IDE)
tools and languages
provided by manufacturers, with
Development such as C, C++, and
specialized programming languages and
assembly
tools

Higher clock speed,

Lower clock speed, typically less than 100
Clock speed typically greater than 1
MHz
GHz

Evolution of Microprocessors:

First Generation (4 - bit Microprocessors):

 The first generation microprocessors were introduced in the year 1971-1972 by Intel
Corporation. It was named Intel 4004 since it was a 4-bit processor.
 It was a processor on a single chip. It could perform simple arithmetic and logical
operations such as addition, subtraction, Boolean OR and Boolean AND.
 I had a control unit capable of performing control functions like fetching an
instruction from storage memory, decoding it, and then generating control pulses to
execute it.

Second Generation (8 - bit Microprocessor): The second generation microprocessors

were introduced in 1973 again by Intel. It was a first 8 - bit microprocessor which could
perform arithmetic and logic operations on 8-bit words. It was Intel 8008, and another
improved version was Intel 8088.

Third Generation (16 - bit Microprocessor): The third generation microprocessors,

introduced in 1978 were represented by Intel's 8086, Zilog Z800 and 80286, which were
16 - bit processors with a performance like minicomputers.

Fourth Generation (32 - bit Microprocessors): Several different companies introduced

the 32-bit microprocessors, but the most popular one is the Intel 80386.

Fifth Generation (64 - bit Microprocessors): From 1995 to now we are in the fifth
generation. After 80856, Intel came out with a new processor namely Pentium processor
followed by Pentium Pro CPU, which allows multiple CPUs in a single system to achieve
multiprocessing.Other improved 64-bit processors are Celeron, Dual, Quad, Octa Core
processors.

Table: Important Intel Microprocessors:

Microprocessor Year of Word Memory Pins Clock Remarks

Invention Length addressing
Capacity

4004 1971 4-bit 1 KB 16 750 First

KHz Microproce
ssor

8085 1976 8-bit 64 KB 40 3-6 Popular 8-

MHz bit
Microproce
ssor

8086 1978 16-bit 1MB 40 5-8 Widely

MHz used in
PC/XT

80286 1982 16-bit 16MB real, 4 68 6-12.5 Widely

GB virtual MHz used in
PC/AT

80386 1985 32-bit 4GB real, 132 20-33 Contains

64TB virtual 14X14 MHz MMU on
PGA chip

80486 1989 32-bit 4GB real, 168 25-100 Contains

64TB virtual 17X17 MHz MMU,
PGA cache and
FPU, 1.2
million
transistors

Pentium 1993 32-bit 4GB real,32- 237 60-200 Contains 2

bit PGA ALUs,2
address,64- Caches,
bit data bus FPU, 3.3
Million
transistors,
3.3 V, 7.5
million
transistors

Pentium Pro 1995 32-bit 64GB real, 387 150- It is a data

36-bit PGA 200 flow
 address bus MHz processor.
It contains
second
level cache
also,3.3 V

Pentium II 1997 32-bit - - 233- All features

400 Pentium
MHz pro plus
MMX
technology,
3.3 V, 7.5
million
transistors

Pentium III 1999 32-bit 64GB 370 600- Improved

PGA 1.3 version of
MHz Pentium II;
70 new
SIMD
instructions

Pentium 4 2000 32-bit 64GB 423 600- Improved

PGA 1.3 version of
GHz Pentium III

Itanium 2001 64-bit 64 address 423 733 64-bit

lines PGA MHz- EPIC
1.3 Processor
GHz

Where,

o PGA - Pin Grid Array

o MMX - MultiMedia eXtensions
o EPIC - Explicitly Parallel Instruction Computing
o SIMD - Single Instruction Multiple Data
o ALU - Arithmetic and Logic Unit
o MMU - Memory Management Unit
o FPU - Floating Point Unit

Block diagram of a computer:

Input Unit :The input unit consists of input devices that are attached to the computer.
These devices take input and convert it into binary language that the computer
understands. Some of the common input devices are keyboard, mouse, joystick, scanner
etc.
Central Processing Unit (CPU) : Once the information is entered into the computer by
the input device, the processor processes it. The CPU is called the brain of the computer
because it is the control center of the computer. It first fetches instructions from memory
and then interprets them so as to know what is to be done. If required, data is fetched
from memory or input device. Thereafter CPU executes or performs the required
computation and then either stores the output or displays on the output device. The CPU
has three main components which are responsible for different functions – Arithmetic
Logic Unit (ALU), Control Unit (CU) and Memory registers
Arithmetic and Logic Unit (ALU) : The ALU, as its name suggests performs
mathematical calculations and takes logical decisions. Arithmetic calculations include
addition, subtraction, multiplication and division. Logical decisions involve comparison
of two data items to see which one is larger or smaller or equal.
Control Unit : The Control unit coordinates and controls the data flow in and out of CPU
and also controls all the operations of ALU, memory registers and also input/output units.
It is also responsible for carrying out all the instructions stored in the program. It decodes
the fetched instruction, interprets it and sends control signals to input/output devices until
the required operation is done properly by ALU and memory.
Memory Registers : A register is a temporary unit of memory in the CPU. These are
used to store the data which is directly used by the processor. Registers can be of
different sizes(16 bit, 32 bit, 64 bit and so on) and each register inside the CPU has a
specific function like storing data, storing an instruction, storing address of a location in
memory etc. The user registers can be used by an assembly language programmer for
storing operands, intermediate results etc. Accumulator (ACC) is the main register in the
ALU and contains one of the operands of an operation to be performed in the ALU.
Memory : Memory attached to the CPU is used for storage of data and instructions and is
called internal memory The internal memory is divided into many storage locations, each
of which can store data or instructions. Each memory location is of the same size and has
an address. With the help of the address, the computer can read any memory location
easily without having to search the entire memory. when a program is executed, it’s data
is copied to the internal memory and is stored in the memory till the end of the execution.
The internal memory is also called the Primary memory or Main memory. This memory
is also called as RAM, i.e. Random Access Memory. The time of access of data is
independent of its location in memory, therefore this memory is also called Random
Access memory (RAM). Read this for different types of RAMs
Output Unit : The output unit consists of output devices that are attached with the
computer. It converts the binary data coming from CPU to human understandable form.
The common output devices are monitor, printer, plotter etc.

8085 Bus Structure

The bus organization of the 8085 microprocessor is the way in which the microprocessor
communicates with other devices in a computer system. The 8085 microprocessor has a
16-bit address bus, an 8-bit data bus, and various control signals that are used to manage
data transfer and other operations.

There are three types of buses.

Address bus :
 It is a group of conducting wires which carries address only.
 Address bus is unidirectional because data flow in one direction, from
microprocessor to memory or from microprocessor to Input/output devices (That is,
Out of Microprocessor).
 Length of Address Bus of 8085 microprocessor is 16 Bit (That is, Four
Hexadecimal Digits), ranging from 0000 H to FFFF H, (H denotes Hexadecimal).
 The microprocessor 8085 can transfer maximum 16 bit address which means it can
address 65, 536 different memory location.
 The Length of the address bus determines the amount of memory a system can
address.Such as a system with a 32-bit address bus can address 2^32 memory
locations.
 If each memory location holds one byte, the addressable memory space is 4
GB.However, the actual amount of memory that can be accessed is usually much
less than this theoretical limit due to chipset and motherboard limitations.
Data bus :
 It is a group of conducting wires which carries Data only.
 Data bus is bidirectional because data flow in both directions, from microprocessor
to memory or Input/Output devices and from memory or Input/Output devices to
microprocessor.
 Length of Data Bus of 8085 microprocessor is 8 Bit (That is, two Hexadecimal
Digits), ranging from 00 H to FF H. (H denotes Hexadecimal).
 When it is write operation, the processor will put the data (to be written) on the
data bus, when it is read operation, the memory controller will get the data from
specific memory block and put it into the data bus.
 The width of the data bus is directly related to the largest number that the bus can
carry, such as an 8 bit bus can represent 2 to the power of 8 unique values, this
equates to the number 0 to 255.A 16 bit bus can carry 0 to 65535.
Control bus :
 The control bus is a bidirectional bus that is used to carry control signals between
the microprocessor and other components such as memory and I/O devices.
 It is used to transmit commands to the memory or I/O devices for performing
specific operations.
 It is a group of conducting wires, which is used to generate timing and control
signals to control all the associated peripherals, microprocessor uses control bus to
process data, that is what to do with selected memory location. Some control
signals are:
Memory read
Memory write
 I/O read
 I/O Write
 Opcode fetch

Uses of Bus organization in 8085 microprocessor :

 Memory access: The bus organization is used for accessing the memory by
transferring the address of the memory location through the address bus and the
data to be stored or retrieved through the data bus.
 I/O operations: The bus organization is used for performing input/output
operations by transferring the input/output device address through the address bus
and the data to be input or output through the data bus.
 Interrupt handling: The bus organization is used for interrupt handling, where the
microprocessor uses the address bus to fetch the interrupt vector and the data bus to
fetch the interrupt service routine.
 DMA operations: The bus organization is used for performing Direct Memory
Access (DMA) operations, where the data transfer between the memory and I/O
devices takes place without the intervention of the microprocessor.

Advantages of 8085 bus structure :

Flexibility: The bus organization used in the 8085 microprocessor allows it to

communicate with a wide range of devices. This flexibility makes it well-suited for use in
a variety of computer systems, including embedded systems, personal computers, and
other devices.
Modularity: The bus organization makes it easy to add or remove devices from a
computer system. This modularity allows system designers to customize the system to
meet the needs of specific applications.
Scalability: The bus organization used in the 8085 microprocessor is scalable, which
means that it can be used in systems of varying sizes and complexity. This scalability
makes it well-suited for use in systems that require a wide range of performance levels.
Low Cost: The bus organization used in the 8085 microprocessor is relatively simple and
inexpensive to implement. This makes it an attractive option for low-cost, embedded
applications.

Disadvantages of 8085 bus structure :

Limited Bandwidth: The bus organization used in the 8085 microprocessor has a limited
bandwidth, which can limit the performance of the processor in high-performance
applications.

Latency: The bus organization can introduce latency, which is the delay between the
time a command is issued and the time the response is received. This latency can be a
problem in real-time applications that require immediate responses.
Data Integrity: The bus organization used in the 8085 microprocessor is vulnerable to
data corruption due to electromagnetic interference and other sources of noise. This can
lead to errors in data transmission and processing.
Complexity: The bus organization used in the 8085 microprocessor can be complex to
implement and troubleshoot, which can increase the cost and time required to develop
and maintain computer systems.

Issues of Bus organization in 8085 microprocessor :

 Limited data transfer rate: The 8085 microprocessor has an 8-bit data bus, which
means that it can transfer only 8 bits of data at a time. This limited data transfer
rate can be a bottleneck in systems that require faster data transfer.
 Limited address range: The 8085 microprocessor has a 16-bit address bus, which
limits the addressable memory to 64 KB. This can be a limitation in systems that
require larger memory addressing.
 Bus contention: Bus contention occurs when two or more devices try to use the bus
at the same time. This can cause data corruption and other errors in the system.
 Timing issues: The bus organization requires precise timing for the signals to be
transmitted correctly. Any timing errors can cause data corruption or other errors in
the system.
 Limited number of devices: The bus organization of the 8085 microprocessor can
support a limited number of devices due to its limited bus width and address range.
This can be a limitation in systems that require more devices to be connected.
 Noise interference: The signals on the bus can be affected by noise interference,
which can cause errors in the system.
 Power consumption: The bus organization can consume significant power,
especially when many devices are connected to the bus. This can be a limitation in
portable or low-power systems.
8085 microprocessor architecture with its functional operation :

Above figure shows the 8085 Microprocessor Architecture. It consists of various

functional blocks as listed below :

Registers in 8085:
(a) General Purpose Registers – The 8085 has six general-purpose registers to store 8-
bit data; these are identified as- B, C, D, E, H, and L. These can be combined as register
pairs – BC, DE, and HL, to perform some 16-bit operation. These registers are used to
store or copy temporary data, by using instructions, during the execution of the program.
(b) Specific Purpose Registers –
 Accumulator: The accumulator is an 8-bit register (can store 8-bit data) that is the
part of the arithmetic and logical unit (ALU). After performing arithmetical or logical
operations, the result is stored in accumulator. Accumulator is also defined as register
A.
 Flag registers: The Flag register is a Special Purpose Register. Depending upon the
value of the result after any arithmetic and logical operation, the flag bits become set
(1) or reset (0). In 8085 microprocessor, the flag register consists of 8 bits and only 5
of them are useful. The 5 flags are:
What is Flag register ?
The Flag register is a 5-bit register in the 8085 microprocessor that contains
information about the status of the arithmetic and logic operations performed by the
processor. The bits in the Flag register are used to indicate whether the result of an
operation is zero, positive, negative, or if there was a carry or borrow during the
operation.

The 5 flag registers are:

1. Sign Flag (S) – After any operation if the MSB (B(7)) of the result is 1, it indicates
the number is negative and the sign flag becomes set, i.e. 1. If the MSB is 0, it
indicates the number is positive and the sign flag becomes reset i.e. 0. from 00H to 7F,
sign flag is 0 from 80H to FF, sign flag is 1 1- MSB is 1 (negative) 0- MSB is 0
(positive)
Example: MVI A 30 (load 30H in register A) MVI B 40 (load 40H in register B)
SUB B (A = A – B) These set of instructions will set the sign flag to 1 as 30 – 40 is a
negative number. MVI A 40 (load 40H in register A) MVI B 30 (load 30H in register
B) SUB B (A = A – B) These set of instructions will reset the sign flag to 0 as 40 – 30
is a positive number.
2. Zero Flag (Z) – After any arithmetical or logical operation if the result is 0 (00)H, the
zero flag becomes set i.e. 1, otherwise it becomes reset i.e. 0. 00H zero flags is 1. from
01H to FFH zero flag is 0 1- zero-result 0- non-zero result Example: MVI A 10 (load
10H in register A) SUB A (A = A – A) These set of instructions will set the zero flag
to 1 as 10H – 10H is 00H
3. Auxiliary Carry Flag (AC) – This flag is used in the BCD number system(0-9). If
after any arithmetic or logical operation D(3) generates any carry and passes it on to
D(4) this flag becomes set i.e. 1, otherwise, it becomes reset i.e. 0. This is the only
flag register that is not accessible by the programmer 1-carry out from bit 3 on
addition or borrows into bit 3 on subtraction 0-otherwise
Example: MVI A 2BH (load 2BH in register A) MVI 39H (load 39H in register B)
ADD B (A = A + B) These set of instructions will set the auxiliary carry flag to 1, as
on adding 2B and 39, the addition of lower-order nibbles B and 9 will generate a
carry.
4. Parity Flag (P) – If after any arithmetic or logical operation the result has even parity,
an even number of 1 bit, the parity register becomes set i.e. 1, otherwise it becomes
reset i.e. 0. 1-accumulator has an even number of 1 bits 0-accumulator has odd parity
Example: MVI A 05 (load 05H in register A) This instruction will set the parity flag
to 1 as the BCD code of 05H is 00000101, which contains an even number of ones i.e.
2.
5. Carry Flag (CY) – Carry is generated when performing n bit operations and the result
is more than n bits, then this flag becomes set i.e. 1, otherwise, it becomes reset i.e. 0.
During subtraction (A-B), if A>B it becomes reset, and if (A<B) it becomes set. Carry
flag is also called the borrow flag. 1-carry out from MSB bit on addition or borrow
into MSB bit on subtraction 0-no carry out or borrow into MSB bit.
Example: MVI A 30 (load 30H in register A) MVI B 40 (load 40H in register B) SUB
B (A = A – B) These set of instructions will set the carry flag to 1 as 30 – 40 generates
a carry/borrow. MVI A 40 (load 40H in register A) MVI B 30 (load 30H in register B)
 SUB B (A = A – B) These set of instructions will reset the carry flag to 0 as 40 – 30
does not generate any carry/borrow.
Uses of Flag register :
Some of the most common uses of the Flag register are:
1. Conditional branching: The flags in the Flag register are used to make decisions
about whether to branch to a different instruction or not. For example, the Jump on
Zero (JZ) instruction checks the Zero Flag to see if the result of the previous operation
was zero. If it was, the program counter is changed to jump to a different address.
2. Arithmetic operations: The Flag register is used extensively during arithmetic
operations such as addition, subtraction, multiplication, and division. The Carry Flag
is used to detect if there was a carry during addition or a borrow during subtraction.
The Auxiliary Carry Flag is used to detect if there was a carry from the 3rd bit to the
4th bit during addition or a borrow from the 4th bit to the 3rd bit during subtraction.
3. Logical operations: The Flag register is also used during logical operations such as
AND, OR, and XOR. The Zero Flag is used to detect if the result of the logical
operation was zero. The Sign Flag is used to detect if the result was negative.
4. System calls: The Flag register is used by the operating system to determine the status
of the CPU before and after a system call. For example, the operating system might
check the Carry Flag to see if there was a carry during an arithmetic operation, and
then take appropriate action based on the result.

Advantages of flag resister :

Efficient error detection: The flag register can be used to efficiently detect errors and
other conditions during program execution. For example, the carry flag can be used to
detect overflow or underflow during arithmetic operations.
Simplifies branching: The flags can be used to make decisions about branching and
other control flow operations. For example, the zero flag can be used to determine if a
value is zero, and the sign flag can be used to determine if a value is negative.
Saves memory: The flag register can help reduce the amount of memory required for
storing status information.
Faster execution: By using flags instead of performing additional operations to check
conditions, the 8085 microprocessor can execute programs more quickly.

Disadvantages of flag resister :

Limited information: The flag register provides a limited set of status information that
may not be sufficient for all applications.
Limited control: The flags in the flag register are set or cleared automatically by the
processor and cannot be directly manipulated by the programmer.
Complexity: The use of flags can add complexity to programming and debugging,
particularly when multiple flags are used in conjunction with one another.
Overwriting: Since the flag register is also used for other purposes, such as storing the
stack pointer, the status flags can be accidentally overwritten during program execution.
 (c) Memory Registers – There are two 16-bit registers used to hold memory addresses.
The size of these registers is 16 bits because the memory addresses are 16 bits. They
are :-
 Program Counter: This register is used to sequence the execution of the instructions.
The function of the program counter is to point to the memory address from which the
next byte is to be fetched. When a byte (machine code) is being fetched, the program
counter is incremented by one to point to the next memory location.
 Stack Pointer: It is used as a memory pointer. It points to a memory location in
read/write memory, called the stack. It is always incremented/decremented by 2
during push and pop operation.

Uses of Registers of 8085 microprocessor :

Here are some common uses of the different registers in the 8085 microprocessor:
1. The accumulator register is the most commonly used register in the 8085
microprocessor. It is used for arithmetic and logical operations, as well as for
input/output (I/O) operations. The accumulator is also used as a temporary storage
location for data.
2. The PC register is used to keep track of the memory location of the current instruction.
When an instruction is executed, the PC register is automatically incremented to point
to the next instruction in memory.
3. The SP register is used to keep track of the top of the stack. The stack is used for
temporary storage of data and return addresses during subroutine calls.
4. The flag register is used to store status information about the results of arithmetic and
logical operations, including whether a result is negative, zero, or carry.
5. General Purpose Registers (B, C, D, E, H, and L): These registers are used for general
purpose storage of data, as well as for addressing memory locations. They can be used
in pairs as 16-bit registers, such as BC, DE, and HL, for more efficient addressing of
memory locations.
6. Instruction Register (IR) and Machine Cycle Register (MCR): These registers are used
internally by the microprocessor to decode instructions and control the timing of
machine cycles.

Features of t registers in 8085 microprocessor are :

1. All of the registers in the 8085 microprocessor are directly accessible by the arithmetic
and logic unit (ALU), allowing for efficient processing of data.
2. The accumulator register is used as a default destination for most arithmetic and logic
instructions, which simplifies programming.
3. The general purpose registers can be used for storing data during computations, but
they can also be used to hold memory addresses, making them useful for accessing
memory locations.
4. The program counter and stack pointer registers are crucial for managing the flow of
instructions and data within a program.
5. The flag register provides valuable information about the results of arithmetic and
logic operations, allowing for efficient decision-making in programs.
6. The instruction register stores the current instruction being executed, allowing for
efficient decoding and control signal generation by the control unit.
Advantages of registers in 8085 microprocessor

1. Fast access: Registers provide a fast and efficient way to access data and perform
operations. Since the registers are located inside the processor, they can be accessed
quickly without having to wait for data to be fetched from memory.
2. Reduced memory access: The use of registers can help reduce the number of memory
accesses required, which can improve the overall performance of the system.
3. Specialized functionality: Each register in the 8085 microprocessor has a specific
function, such as the accumulator for arithmetic operations and the program counter
for storing the address of the next instruction. This specialized functionality can make
programming and debugging easier.
4. Reduced complexity: By providing dedicated registers for specific purposes, the
8085 microprocessor reduces the complexity of the programming and execution
process.

Disadvantages of registers in 8085 microprocessor

1. Limited storage capacity: The 8085 microprocessor has a limited number of

registers, which can restrict the amount of data that can be stored and manipulated at
any given time.
2. Complex addressing modes: Some of the addressing modes used in the 8085
microprocessor can be complex, which can make programming more difficult.
3. Context switching: In some cases, switching between different sets of registers can
add overhead and complexity to the programming process.
4. Lack of flexibility: The fixed number and function of registers in the 8085
microprocessor can limit the flexibility of the system and make it more difficult to
adapt to changing requirements.

Addressing modes in 8085 microprocessor:

The 8085 microprocessor has several addressing modes that are used to access memory
locations. Some of the most commonly used addressing modes in the 8085 microprocessor
are:
Types of addressing modes
In 8085 microprocessor there are 5 types of addressing modes:

1. Immediate Addressing Mode:-

In immediate addressing mode the source operand is always data. If the data is 8-bit,
then the instruction will be of 2 bytes, if the data is of 16-bit then the instruction will
be of 3 bytes.
Examples:
MVI B 45 (move the data 45H immediately to register B)
LXI H 3050 (load the H-L pair with the operand 3050H immediately)
JMP address (jump to the operand address immediately)

2. Register Addressing Mode:-

In register addressing mode, the data to be operated is available inside the register(s)
 and register(s) is(are) operands. Therefore the operation is performed within various
registers of the microprocessor.
Examples:
MOV A, B (move the contents of register B to register A)
ADD B (add contents of registers A and B and store the result in register A)
INR A (increment the contents of register A by one)

3. Direct Addressing Mode:-

In direct addressing mode, the data to be operated is available inside a memory
location and that memory location is directly specified as an operand. The operand is
directly available in the instruction itself.
Examples:
LDA 2050 (load the contents of memory location into accumulator A)
LHLD address (load contents of 16-bit memory location into H-L register pair)
IN 35 (read the data from port whose address is 35)

4. Register Indirect Addressing Mode:-

In register indirect addressing mode, the data to be operated is available inside a
memory location and that memory location is indirectly specified by a register pair.
Examples:
MOV A, M (move the contents of the memory location pointed by the H-L pair to the
accumulator)
LDAX B (move contents of B-C register to the accumulator)
STAX B (store accumulator contents in memory pointed by register pair B-C)

5. Implied/Implicit Addressing Mode:-

In implied/implicit addressing mode the operand is hidden and the data to be operated
is available in the instruction itself.
Examples:
CMA (finds and stores the 1’s complement of the contents of accumulator A in A)
RRC (rotate accumulator A right by one bit)
RLC (rotate accumulator A left by one bit)
6. Relative Addressing Mode:-
In this mode, the operand is a memory location specified by the contents of the
program counter plus a constant value.
Example:
MOV R0,#05H
AGAIN:
MVI A,#55H
ADD A,R0
JMP AGAIN
In this example, the instruction JMP AGAIN uses the Relative Addressing Mode. The
instruction jumps to the label AGAIN by adding the contents of the program counter with
the specified constant value. The constant value is calculated based on the distance
between the current instruction and the label AGAIN.
In this case, the instruction JMP AGAIN is executing a loop that loads the accumulator
with the value 55H, adds the contents of the register R0 to the accumulator, and then
jumps back to the label AGAIN to repeat the loop.

Features of the addressing modes in the 8085 microprocessor :

1. Immediate addressing: In immediate addressing mode, the operand is a constant

value that is part of the instruction. The immediate addressing mode is used for
instructions that require a fixed value, such as loading a constant value into a register.
2. Direct addressing: In direct addressing mode, the operand is a memory address
specified directly in the instruction. The direct addressing mode is used for
instructions that access data stored in memory.
3. Indirect addressing: In indirect addressing mode, the operand is a memory address
specified indirectly by a register or memory location. The indirect addressing mode is
used for instructions that access data stored in memory, where the memory address is
not known in advance.
4. Register addressing: In register addressing mode, the operand is stored in one of the
processor registers. The register addressing mode is used for instructions that
manipulate the contents of the registers.
5. Indexed addressing: In indexed addressing mode, the operand is obtained by adding
an offset value to a base address stored in a register. The indexed addressing mode is
used for instructions that access data stored in memory using a computed address.
6. Relative addressing: In relative addressing mode, the operand is specified as an
offset relative to the current program counter value. The relative addressing mode is
used for instructions that perform conditional branching or looping.
7. Memory-mapped I/O addressing: In memory-mapped I/O addressing mode, the
processor accesses input/output devices using memory addresses instead of
specialized I/O instructions. Memory-mapped I/O addressing mode is used for
interfacing with peripherals such as displays, keyboards, and printers.

Advantages of Addressing Modes in 8085 Microprocessor :

1. Versatility: The 8085 microprocessor supports several addressing modes, which

allows for a wide range of memory access and manipulation options.
2. Efficient memory usage: Different addressing modes allow for efficient use of
memory, reducing the memory footprint of programs and making the best use of
available memory.
3. Easy to use: The addressing modes are easy to use, making it simple for programmers
to write and execute complex programs.
4. Improved performance: The use of different addressing modes can improve the
performance of programs, as the correct addressing mode can be chosen to match the
specific requirements of the program.

Disadvantages of Addressing Modes in 8085 Microprocessor :

1. Complexity: The various addressing modes can be complex, making it difficult for
programmers to choose the correct mode for a given task.
2. Overhead: The use of different addressing modes can result in additional overhead, as
the microprocessor must perform additional operations to access memory.
3. Debugging difficulties: Debugging programs that use multiple addressing modes can
be difficult, as the programmer must keep track of the different modes used in each
memory access.
4. Limitations: The addressing modes are limited by the size of the program counter and
the memory address space, which can impact the performance of large programs.

Uses of Addressing Modes in 8085 Microprocessor :-

Here are some of the most common uses of addressing modes in the 8085
microprocessor:
1. Direct addressing: Direct addressing is used when the address of the operand is
directly specified in the instruction. This addressing mode is used for simple
operations where the operand is stored in a specific memory location, and the address
does not need to be calculated or manipulated in any way.
2. Indirect addressing: Indirect addressing is used when the address of the operand is not
directly specified in the instruction, but is instead stored in a register or memory
location. This addressing mode is useful for accessing data stored in memory that may
be located at a different address each time the program is executed.
3. Immediate addressing: Immediate addressing is used when the operand is specified
directly in the instruction, rather than being stored in memory. This addressing mode
is useful for performing simple arithmetic or logic operations on constants or literals.
4. Register addressing: Register addressing is used when the operand is stored in a
register, rather than in memory. This addressing mode is useful for performing fast
arithmetic or logic operations on small amounts of data.
5. Indexed addressing: Indexed addressing is used when the address of the operand is
calculated by adding an offset value to the contents of a register. This addressing
mode is useful for accessing elements of an array or data structure.
6. Relative addressing: Relative addressing is used when the address of the operand is
calculated relative to the current program counter. This addressing mode is useful for
branching to different parts of a program or for accessing data stored in a specific
location relative to the current program counter.

Why use addressing modes in 8085 microprocessor ?

Here are some reasons why addressing modes are used in the 8085 microprocessor:
 Flexibility: Addressing modes provide a flexible way to access data and instructions in
memory. Different addressing modes allow programmers to choose the most
appropriate addressing technique for a particular task, depending on the type of data
being accessed, the size of the data, and other factors.
 Memory optimization: Addressing modes can help to optimize the use of memory
resources by allowing data and instructions to be accessed in the most efficient way
possible. For example, using indirect addressing modes can reduce the amount of
memory needed to store addresses, while using indexed addressing modes can reduce
the number of memory accesses needed to access a large array of data.
 Performance optimization: Addressing modes can also help to optimize the
performance of the microprocessor by reducing the number of memory accesses
needed to fetch data or instructions. This can help to speed up the execution of
programs and improve the overall efficiency of the microprocessor.
 Reduced code size: Addressing modes can help to reduce the size of code needed to
perform a particular task. By using addressing modes that allow data and instructions
to be accessed using fewer instructions, programmers can write more compact and
efficient code.
8085 pin configuration :-
 The signals of 8085 Pin Diagram can be classified into seven groups according to their
functions.

1. Power supply and frequency signals.

2. Data bus and address bus
3. Control bus
4. Interrupt signals
5. Serial I/O signals
6. DMA signals
7. Reset signals

1. Power Supply and Frequency Signals:

 Vcc : It requires a single +5 V power supply.

 Vss : Ground reference.
 X1 and X2 : A tuned circuit like LC, RC or crystal is connected at these two The
internal clock generator divides oscillator frequency by 2, therefore, to operate a
system at 3 MHz, the crystal of tuned circuit must have a frequency of 6 MHz.
 CLK OUT : This signal is used as a system clock for other devices. Its frequency is
half the oscillator frequency.
2. Data Bus and Address Bus:

A) AD0 to AD7 : The 8 bit data bus (D0 – D7) is multiplexed with the lower half (A 0 – A7)
of the 16 bit address bus. During first part of the machine cycle (T1), lower 8 bits of
memory address or I/O address appear on the bus. During remaining part of the machine
cycle (T2 and T3) these lines are used as a bi-directional data bus.

B) A8 to A15 : The upper half of the 16 bit address appears on the address lines A 8 to A15.
These lines are exclusively used for the most significant 8 bits of the 16 bit address lines.

3. Control and Status Signals:

a) ALE (Address Latch Enable) : We, know that AD0 to AD7 lines are multiplexed and
the lower half of address (A0 – A7) is available only during T1 of the machine cycle. This
lower half of address is also necessary during T 2 and T3 of machine cycle to access specific
location in memory or I/O port. This means that the lower half of an address must be
latched in T1 of the machine cycle, so that it is available throughout the machine cycle. The
latching of lower half of an address bus is done by using external latch and ALE signal
from 8085 Pin Diagram.

b) RD and WR : These signals are basically used to control the direction of the data flow
between processor and memory or I/O device/port. A low on RD indicates that the data
must be read from the selected memory location or I/O port via data bus. A low on WR
indicates that the data must be written into the selected memory location or I/O port via
data bus.

c) IO/M, S0 and S1 : IO/M indicates whether I/O operation or memory operation is being
carried out. S1 and S0 indicate the type of machine cycle in progress.
d) READY : It is used by the microprocessor to sense whether a peripheral is ready or not
for data transfer. If not, the processor waits. It is thus used to synchronize slower
peripherals to the microprocessor.

4. Interrupt Signals:

The 8085 Pin Diagram has five hardware interrupt signals : RST 5.5, RST 6.5, RST 7.5,
TRAP and INTR. The microprocessor recognises interrupt requests on these lines at the
end of the current instruction execution.

The INTA (Interrupt Acknowledge) signal is used to indicate that the processor has
acknowledged an INTR interrupt.

5. Serial I/O Signals:

a) SID (Serial I/P Data) : This input signal is used to accept serial data bit by bit from the
external device.

b) SOD (Serial O/P Data) : This is an output signal which enables the transmission of
serial data bit by bit to the external device.

6. DMA Signal:

a) HOLD : This signal indicates that another master is requesting for the use of address
bus, data bus and control bus.

b) HLDA : This active high signal is used to acknowledge HOLD request.

7. Reset Signals:

a) RESET IN : A low on this pin

 Sets the program counter to zero (0000H).

 Resets the interrupt enable and HLDA flip-flops.
 Tri-states the data bus, address bus and control bus. (Note : Only during RESET is
active).
 Affects the contents of processor’s internal registers randomly.
b) RESET OUT : This active high signal indicates that processor is being reset. This
signal is synchronized to the processor clock and it can be used to reset other devices
connected in the system.

Timing diagram of MOV Instruction in Microprocessor

Problem – Draw the timing diagram of the given instruction in 8085,
MOV B, C
Given instruction copy the contents of the source register into the destination register and
the contents of the source register are not altered.
Example:
MOV B, C
Opcode: MOV
Operand: B and C
B is the destination register and C is the source register whose contents need to be
transferred to the destination register. Algorithm – The instruction MOV B, C is of 1 byte;
therefore the complete instruction will be stored in a single memory address. For example:
2000: MOV B, C
Only opcode fetching is required for this instruction and thus we need 4 T states for the
timing diagram. For the opcode fetch the IO/M (low active) = 0, S1 = 1 and S0 = 1. The
timing diagram of MOV instruction is shown below:
In Opcode fetch ( t1-t4 T states):

 00 – lower bit of address where the opcode is stored, i.e., 00.

 20 – higher bit of address where the opcode is stored, i.e., 20.
 ALE – provides signal for multiplexed address and data bus. Only in t1 is it used as an
address bus to fetch a lower bit of address otherwise it will be used as the data bus.
 RD (low active) – signal is 1 in t1 & t4 as no data is read by the microprocessor. Signal
is 0 in t2 & t3 because here the data is read by a microprocessor.
 WR (low active) – signal is 1 throughout, no data is written by a microprocessor.
 IO/M (low active) – signal is 1 throughout because the operation is performing on
memory.
 S0 and S1 – both are 1 in case of opcode fetching.

Timing diagram of INR M

Problem – Draw the timing diagram of the given instruction in 8085,
INR M
The content present in the designated register/memory location (M) is incremented by 1
and the result is stored in the same place. If the operand is a memory location, it is
specified by the contents of HL pair. Example:
INR M
Opcode: INR
Operand: M
M is the memory location (say 5000H) and suppose the data present at M (or 5000H) is
26H, which is need to be incremented by 1. Hex code- 34H Algorithm – The instruction
INR M is of 1 byte; therefore the complete instruction will be stored in a single memory
address. For example:
2000: INR M
The opcode fetch will be same as for other instructions in first 4 T states. Only the Memory
read and Memory Write need to be added in the successive T states. For the opcode fetch
the IO/M (low active) = 0, S1 = 1 and S0 = 1. For the memory read the IO/M (low active)
= 0, S1 = 1 and S0 = 0. Also, only 3 T states will be required. For the memory write the
IO/M (low active) = 0, S1 = 0 and S0 = 1 and 3 T states will be required. The timing
diagram of INR M instruction is shown below:
 In
Opcode fetch ( t1-t4 T states ) –
 00: lower bit of address where opcode is stored, i.e., 00
 20: higher bit of address where opcode is stored, i.e., 20.
 ALE: provides signal for multiplexed address and data bus. Only in t1 it used as
address bus to fetch lower bit of address otherwise it will be used as data bus.
 RD (low active): signal is 1 in t1 & t4 as no data is read by microprocessor. Signal is 0
in t2 & t3 because here the data is read by microprocessor.
 WR (low active): Signal is 1 throughout, no data is written by microprocessor.
 IO/M (low active): Signal is 0 in throughout because the operation is performing on
memory.
 S0 and S1: both are 1 in case of opcode fetching.
In Memory read ( t5-t7 T states ) –
 00: lower bit of address where opcode is stored, i.e, 00
 50: higher bit of address where opcode is stored, i.e, 50.
 ALE: provides signal for multiplexed address and data bus. Only in t5 it used as
address bus to fetch lower bit of address otherwise it will be used as data bus.
 RD (low active): signal is 1 in t5, no data is read by microprocessor. Signal is 0 in t6 &
t7, data is read by microprocessor.
 WR (low active): signal is 1 throughout, no data is written by microprocessor.
 IO/M (low active): signal is 0 in throughout, operation is performing on memory.
 S0 and S1 – S1=1 and S0=0 for Read operation.
In Memory write ( t8-t10 T states ) –
 00: lower bit of address where opcode is stored, i.e, 00
 50: higher bit of address where opcode is stored, i.e, 50.
 ALE: provides signal for multiplexed address and data bus. Only in t8 it used as
address bus to fetch lower bit of address otherwise it will be used as data bus.
 RD (low active): signal is 1 throughout, no data is read by microprocessor.
 WR (low active): signal is 1 in t8, no data is written by microprocessor. Signal is 0 in
t9 & t10, data is written by microprocessor.
 IO/M (low active): signal is 0 in throughout, operation is performing on memory.
 S0 and S1 – S1=0 and S0=1 for write operation.

Advantages of using the timing diagram of INR include:

Better monitoring of anticoagulant therapy: The timing diagram of INR provides

healthcare professionals with a better understanding of how well the anticoagulant therapy
is working.
Helps to adjust medication dosages: The timing diagram of INR helps healthcare
professionals to adjust medication dosages to ensure that the patient is receiving the
optimal level of anticoagulation.
Reduces the risk of blood clots and bleeding: The timing diagram of INR helps
healthcare professionals to reduce the risk of blood clots and bleeding in patients receiving
anticoagulant therapy.

Disadvantages of using the timing diagram of INR include:

Need for frequent blood tests: To create a timing diagram of INR, patients need to
undergo frequent blood tests, which can be inconvenient and uncomfortable.
Cost: Frequent blood tests can also be expensive for patients, especially those who are not
covered by insurance.
Inaccuracy: The timing diagram of INR may not always accurately reflect the level of
anticoagulation in the patient’s bloodstream, as it is based on a single point in time and
does not take into account any fluctuations in the patient’s INR level.

Bit :- A bit (binary digit) is the smallest unit of data that a computer can process and store.
A bit is always in one of two physical states, similar to an on/off light switch. The state is
represented by a single binary value, usually a 0 or 1.
Byte :- a unit of computer information or data-storage capacity that consists of a group of
eight bits and that is used especially to represent an alphanumeric character
Word :- A word is the natural unit of data used by a particular microprocessor, although it
must be bigger than a byte, which is 8 bit.
Nibble :- A nibble is a unit of measurement for digital files that consists of four bits or
half of a byte.
Instruction :- An instruction is a binary pattern designed inside the microprocessor to
perform a specific function. In other words, it is actually a command to the microprocessor
to perform a given task on specified data.
Von Neumann Architecture:
Von Neumann Architecture is a digital computer architecture whose design is based on the
concept of stored program computers where program data and instruction data are stored in
the same memory. This architecture was designed by the famous mathematician and
physicist John Von Neumann in 1945.

Harvard Architecture:
Harvard Architecture is the digital computer architecture whose design is based on the
concept where there are separate storage and separate buses (signal path) for instruction
and data. It was basically developed to overcome the bottleneck of Von Neumann
Architecture.
Difference between Von Neumann and Harvard Architecture :
VON NEUMANN ARCHITECTURE HARVARD ARCHITECTURE

It is ancient computer architecture based It is modern computer architecture based on

on stored program computer concept. Harvard Mark I relay based model.

Same physical memory address is used for Separate physical memory address is used
instructions and data. for instructions and data.

There is common bus for data and Separate buses are used for transferring data
instruction transfer. and instruction.

Two clock cycles are required to execute

An instruction is executed in a single cycle.
single instruction.

It is cheaper in cost. It is costly than Von Neumann Architecture.

CPU can not access instructions and CPU can access instructions and read/write
read/write at the same time. at the same time.

It is used in personal computers and small It is used in micro controllers and signal
computers. processing.

Multiple choice question.

1. 8085 has ………..flags.
 a) 5 b) 4 c) 3 d) 2
2. Data is a group of ………
a) Bits b) Message c) Wires d) Resisters
3. Processor is a …………. Device.
a) Electronic b) Computing c) Integrated d) All of the above
4. MOV is a ………….type of instruction.
a) Arithmetic b)Logic c) Branch d) Data transfer
5. ALU contains………………..
a) BUS and input unit b) Resisters, ALU and Control unit
c) output unit d) All of the above
6. 8085 is a …..bit processor.
a) 4 b)8 c) 16 d) 12
7. The ALU of 8085 processor can process ……..data.
a) 4 bit b) 8 bit c) 12 bit d)16 bit
8. The flags are used ………about next operation.
a) To make decision b) To verify c) To store d) To read
9. The zero flag is set when……….
a) Reading data b) Storing c) ALU generates zero result d) Resisters are all zero
10. For immediate movement of data, we need to use…….
a) MOV instructions b) MVI instructions c) LDA instructions d) STA instructions

Short answer questions.

1. What is microprocessor? Write the features of Microprocessor.
2. Explain the difference between RISC and CISC.
3. Explain the difference between Microprocessor and Microcontroller.
4. Write about Von Neumann Architecture with suitable diagram.
5. Write about Harvard Architecture with suitable diagram.
6. What are the advantage and disadvantage of flag resister in 8085 Microprocessor?
7. What are the advantage and disadvantage of resister in 8085 Microprocessor?
8. What are the advantage and disadvantage of addressing modes in 8085 Microprocessor?
9. What are the advantage and disadvantage of RISC?
10. What are the advantage and disadvantage of CISC?
9. Write the features of flag resister in 8085 Microprocessor.
10. Write the features of resister in 8085 Microprocessor.
11. Write the features of addressing modes in 8085 Microprocessor.
12. Draw the timing diagram of MOV B,C.
13. Differentiate between the Von-Neumann and Harvard architecture.
14. What is microprocessor ? Write the different application area of it.
15. Define bit, byte, word, nibble and instruction.

Long Answer Questions.

1. Draw the pin configuration of 8085 Microprocessor.
2. Draw the block diagram of 8085 Microprocessor and explain its features.
3. What is addressing modes? Explain the 8085 addressing modes.
4. Define flag resister? Explain the different type of flag resister.
5. What is resister? And explain different types of resister found in 8085 Mup.
6. Explain the bus system or bus organization of microprocessor.