Lecture 1&2
Lecture 1&2
Lecture 1&2
Samuel Ndegwa
1
EEE 4130 MICROPROCESSORS
Prerequisites
Computer Science Basics
Digital Electronics
2
Course Content
1. Survey of computer and microprocessor system: Architecture;
central processing unit, memory and input and output devices, structure of
single board computer register oriented programme counter. Von-Neumann
and Harvard Architectures.
2. Registers instruction: types, formats and simple addressing modes. Input
and output devices: programme control fetch execute cycle, memory cycles.
Input and output operations, stacks processor status word.
3. Assembly language programming: assembler concept, mnemonics,
symbolic addresses, literal and pseudo operations,
simple instructions and addressing modes, data storage location, counter
error flags and messages. Interrupt service routines. Application of C
programming in microprocessors.
4. Interfacing: serial and parallel interfacing devices, polling techniques.
Development tools and monitors. Sensors and actuators interfacing. Study
case of an application.
5. Program structure: program modularization, relocation, re-entrant and
position independent code, sub-routines, parameter passing, development
tools and monitors, redundancy and fault tolerance.
Laboratory/Practical Exercises
i. Advanced programming (Assembly, Machine code)
ii. The 32-bit 80386 microprocessor
iii. Interrupt management
iv. Interface management-serial and parallel
Course Assessment
Cats 10%
Assignments 5%
Labs 15%
Exam 70%
Total 100%
3
Reference Materials
4
MICROPROCESSORS
Introduction
5
Components of Microprocessor
Microprocessor is capable of performing various computing
functions and making decisions to change the sequence of
program execution.
The microprocessor can be divided into three segments as
shown in the figure, Arithmetic/logic unit (ALU), register
array, and control unit.
These three segment is responsible for all processing done in a computer
Arithmetic Register
and Logical Array
Unit (ALU)
Control Unit
Register array
Registers are the small additional memory location which are used
to store and transfer data and programs that are currently being
executed.
Control unit
The control unit provides the necessary timing and control signals
to all the operations in the microcomputer.
6
It controls and executes the flow of data between the
microprocessor, memory and peripherals.
The control bus is bidirectional and assists the CPU in synchronizing
control signals to internal devices and external components.
This signal permits the CPU to receive or transmit data from main
memory.
7
The width of the address bus corresponds to the maximum addressing
capacity of the bus, or the largest address within memory that the bus
can work with.
Data Bus
It is used to transfer data within Microprocessor and Memory/Input or
Output devices.
It is bidirectional as Microprocessor requires to send or receive data.
As such, a greater width allows greater amounts of data to be
transferred at the same time.
Control Bus
Microprocessor uses control bus to process data, i.e. what to do with
the selected memory location.
Some control signals are Read, Write and Opcode fetch etc.
This is a dedicated bus, because all timing signals are generated according
to control signal.
Microprocessor
Terminologies
Integrated circuits
An electronic circuit fabricated out of a solid block of semiconductor material. This
design of circuit, often called a solid state circuit, allows for very complex circuits
to be constructed in a small volume. An integrated circuit is also called a‘chip’.
Microprocessor-based system
A microprocessor based system consists of data input, storage, processing and output
devices, under the control of a CPU.
Microcontroller
This is a complete microprocessor-based control system built onto a single chip. It is
small and convenient but doesn’t do anything that could not be done with a
microprocessor and a few additional components.
8
Generally, there are three main types of microprocessor depending on their
use:
9
Computer Architecture
Computer Architecture refers to the internal design of a computer with its CPU, which
includes: Arithmetic and logic unit, Control unit, Registers, Memory for data and instructions,
Input/output interface and External storage functions.
Von-Neumann architecture: The same memory and bus are used to store both
Data and Instructions
10
Figure 5: Harvard computer architecture
The main advantage: Computers designed with the Harvard architecture are able
to run a program and access data independently, and therefore simultaneously.
Harvard architecture is more complicated but separate pipelines remove the
bottleneck that Von-Neumann creates.
Modified Harvard Architecture: The majority of modern computers
have no physical separation between the memory spaces used by both data
and instructions, therefore could be described technically as Von-
Neumann.
11
Classification of Computer Systems
A computer sequentially performs one operation at a time. The time required to
perform operations is called the 'Processing Speed' of the computer.
Computers are classified according to their processing speed. It depends not only
on the hardware characteristics of the system but also on the efficiency of its
software components.
Data Path Size: depends on the width of the internal CPU buses. Wider data
paths speed up CPU operations, since more information is transmitted in a single
transfer.
Other important hardware functions are the logic family, overlapping of CPU
instructions, memory bandwidth, I/O bandwidth etc.
12
operation, so the instructions are executed.
iv. Store the Result: The memory stores the result in the specified location,
and the execution/microprocessor cycle ends.
After completing one instruction, the CPU moves on to the next one. This fetch
and execute process is repeated until all of the instructions in a specific program
have been executed.
The CPU’s lifeblood, its heartbeat is the system clock, which synchronizes all
activities within the computer. Each step in the microprocessor cycle takes at
least one tick of the system clock called a 'Clock Cycle or T Cycle' e.g., one T
cycle for 8088 5MHz is 200 nanoseconds.
We measure the speed of an instruction by the number of clock cycles required
to execute it. A clock cycle is the microprocessor's smallest unit of time measurement.
13
thing at a time, if it is busy fetching an instruction it could not execute one.
The entire process of reading memory, incrementing the IP, and decoding the
instruction is known as the 'Fetch and Execute principle' of the stored program
computer.
A stored program computer works mainly on instructions held in store
(ROM/RAM); and these can be altered. One way of increasing the processing
speed of a microprocessor is to clock at a higher frequency. Another way is to
employ the 'Pipelining Technique'.
A computer performs sequentially one operation at a time i.e., CPU performs
all the tasks involved in processing an instruction such as fetching, decoding,
determining operands, and executing instructions serially on a one-at-a-time
basis. It is termed as 'Serial or Sequential Fetch/Execute Cycle'.
14
Figure 1: 8088/8086 CPU Architecture
Fig 5 shows that a model of 8088/86 CPU, which consists of two separate
processors, called the Bus Interface Unit (BIU) and the Execution Unit (EU).
Since these two units are entirely independent of each other, the 8088 can do
two things at the same time. Together they form a two-stage pipeline. Each
unit performs certain tasks associated with the instruction processing
simultaneously and this allows the 8088/86 to achieve a higher execution rate.
15
Execution Unit (EU): receives program instructions and data from the BIU,
executes these instructions, and stores the result in the general registers.
When the EU completes the execution of an instruction, it passes to the BIU any
results (destined for memory or I/O) and proceeds to the next instruction.
There are three conditions that will cause the EU to enter in a 'wait' mode.
i.Firstly, when an instruction requires access to a memory location not in the queue.
ii.The second condition occurs when the instruction to be executed is a “Branch/Jump”
instruction. In this case control is to be transferred to a new (non-sequential)
address.
iii.The last condition occurs during execution of instructions that are slow to execute.
This can cause the BIU to suspend fetching instructions.
16