Unit I

ET3491 EMBEDDED SYSTEM AND IOT DESIGN Unit-1
UNIT – I 8 BIT EMBEDDED PROCESSOR
Microcontrollers for an Embedded System – 8051 – Architecture – Addressing Modes – Instruction Set –
Program and Data Memory – Stacks – Interrupts – Timers/Counters – Serial Ports – Programming.
Microcontrollers for Embedded system:

 A Microcontroller is a single chip computer.
 A CPU with all the peripherals like RAM, ROM, I/O Ports, Timers, and ADCs etc. on the same chip.
For Ex: Motorola 6811, Intel 8051, Zilog Z8 and PIC 16X etc…
Microprocessor:
 A CPU built into a single VLSI chip is called a microprocessor.

 It is a general-purpose device and additional external circuitry is added to make it a microcomputer.
 The microprocessor contains arithmetic logic unit (ALU), Control unit, Instruction register, Program
counter (PC), clock circuit (internal or external), reset circuit (internal or external) and registers.
 But the microprocessor has no on chip I/O Ports, Timers, Memory etc.
 For example, Intel 8085 is an 8-bit microprocessor and Intel 8086/8088 a 16-bit microprocessor.
 The block diagram of the Microprocessor is shown in Fig.1
Fig.1: Block diagram of a Microprocessor.
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MICROCONTROLLER :
 A microcontroller is an integrated single chip, which consists of CPU, RAM, EPROM/PROM/ROM,

I/O ports, timers, interrupt controller.
 For example, Intel 8051 is 8-bit microcontroller and Intel 8096 is 16-bit microcontroller.
 The block diagram of Microcontroller is shown in Fig.2.
Fig.2.Block Diagram of a Microcontrolle r
Distinguish between Microprocessor and Microcontroller
S.No Microprocessor Microcontroller
1 A microprocessor is a general A microcontroller is a dedicated chip which

purpose device. is also called as single chip computer.
2 A microprocessor does not contain A microcontroller includes RAM, ROM,

on chip I/O Ports, Timers, serial and parallel interface, timers,
Memories etc. interrupt circuitry in a single chip.
3 Microprocessor is used as the CPU Microcontroller is used to perform control-

in microcomputer system. oriented applications.
4 Microprocessor instructions are Microcontroller instructions are both bit

nibble or byte addressable addressable as well as byte addressable.
5 Microprocessor based system Microcontroller based system design is

design is complex and expensive simple and cost effective
6 The Instruction set of The instruction sets are simple with less
microprocessor is complex with number of instructions.
large number of instructions.
*****************************************************************
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4.2: INTEL 8051 MICRCONTROLLER :
Draw the architectural block diagram of 8051 microcontrolle r and explain. (NOV 2011, MAY 2010, NOV
2009, NOV2008, May 2008, MAY 2007, MAY 2006, NOV 2016, May 2016)
Features of 8051 Microcontroller:
The 8051 is an 8-bit Controller:

 The CPU can works on only 8 bits of data at a time
 The 8051 has
 128 bytes of RAM
 4K bytes of on-chip ROM
 Two timers
 One serial port
 Four I/O ports, each 8 bits wide
 6 interrupt sources
ARCHITECTURE & BLOCK DIAGRAM OF 8051 MICROCONTROLLER:
 It has hardware architecture with RISC (Reduced Instruction Set Computer) concept.
 The block diagram of 8051 microcontroller is shown in Fig 3.
 8051 has 8-bit ALU.
 ALU can perform all the 8-bit arithmetic and logical operations in one machine cycle.
 The ALU is associated with two registers A & B
A and B Registers:
 The A and B registers are special function registers.
 A & B registers hold the results of many arithmetic and logical operations of 8051.
 The A register is also called the Accumulator.
 A register is used as a general register to accumulate the results of a large number of instructions.
 By default, it is used for all mathematical operations and data transfer operations between CPU and
external memory.
 The B register is mainly used for multiplication and division operations along with A register.
 Ex: MUL A B : DIV AB.
 It has no other function other than as a store data.
R registers:
 "R" registers are a set of eight registers that are named R0, R1, etc. up to R7.
 These registers are used as auxiliary registers in many operations.
 The "R" registers are also used to temporarily store values.
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Fig.3. Block Diagram of 8051 Microcontrolle r
Program Counter (PC) :

 8051 has a 16-bit program counter.
 The program counter holds address of the next instruction to be executed.
 After execution of one instruction, the program counter is incremented.
Data Pointe r Register (DPTR):
 It is a 16-bit register which is the only user-accessible.
 DPTR is used to point the data. 8051 will access external memory at the address indicated by DPTR.
 DPTR can also be used as two 8-registers DPH and DPL.
Stack Pointer Register (SP) :
 It is an 8-bit register which stores the address of the stack top.
 When a value is pushed onto the stack, the 8051 first increments the value of SP and then stores the
value.
 Similarly when a value is popped off the stack, the 8051 returns the value from the memory location
indicated by SP and then decrements the value of SP.
 Since the SP is only 8-bit wide.
 It is incremented or decremented by two.
 SP is modified directly by the 8051 by six instructions: PUSH, POP, ACALL, LCALL, RET, and RETI.
 It is also used intrinsically whenever an interrupt is triggered.
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Fig 3a: Internal architecture diagram of 8051 Microcontrolle r
Fig: Structure of registers
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Program Status Register (PSW):

Give PSW of 8051 and describe the use of each bit in PSW. (NOV 2015)
 The 8051 has an 8-bit PSW register which is also known as Flag register.
 In the 8-bit register only 6-bits are used by 8051.The two unused bits are user definable bits.
 In the 6-bits, four of them are conditional flags. They are Carry –CY, Auxiliary Carry-AC, Parity-P, and
Overflow-OV.
 These flag bits indicate some conditions of result after an instruction was executed.
 The bits PSW3 and PSW4 are denoted as RS0 and RS1.
 These bits are used to select the bank registers of the RAM location.
 The meaning of various bits of PSW register is shown below.
CY PSW.7 Carry Flag

AC PSW.6 Auxiliary Carry Flag
FO PSW.5 Flag 0 available for general purpose
RS1 PSW.4 Register Bank select bit 1
RS0 PSW.3 Register bank select bit 0
OV PSW.2 Overflow flag
--- PSW.1 User definable flag
P PSW.0 Parity flag .set/cleared by hardware.
 The selection of the register Banks and their addresses are given below.
RS1 RS0 Register Bank Address
0 0 0 00H-07H
0 1 1 08H-0FH
1 0 2 10H-17H
1 1 3 18H-1FH
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RAM & ROM:
 The 8051 microcontroller has 128 bytes of Internal RAM and 4K B of on chip ROM.
 The RAM is also known as Data memory and the ROM is known as program (Code) memory.
 Code memory holds program that is to be executed.
 Program Address Register holds address of the ROM/ Flash memory.
 Data Address Register holds address of the RAM.
I/O ports:
 The 8051 microcontroller has 4 parallel I/O ports, each of 8-bits.
 So, it provides 32 I/O lines for connecting the microcontroller to the peripherals.
 The four ports are P0 (Port 0), P1 (Port1), P2 (Port 2) and P3 (Port3).
ADDRESSING MODES OF 8051 :
Explain diffe rent types addressing modes of 8051 microcontroller. (NOV 2008, NOV 2015, April 2017)
 The way in which the data operands are specified is known as the addressing modes. There are various
methods of denoting the data operands in the instruction.
 The 8051 microcontroller supports 5 addressing modes. They are
1. Immediate addressing mode
2. Direct Addressing mode
3. Register addressing mode
4. Register indirect addressing mode
5. Indexed addressing mode
Immediate addressing mode:
 The addressing mode in which the data operand is a constant and it is a part of the instruction itself is
known as Immediate addressing mode.
 Normally the data must be preceded by a # sign.
 This addressing mode can be used to transfer the data into any of the registers including DPTR.
Examples:
 MOV A, # 27 H : The data (constant) 27 is moved to the accumulator register
 ADD R1, #45 H : Add the constant 45 to the contents of the accumulator
 MOV DPTR, # 8245H : Move the data 8245 into the data pointer register.
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Direct addressing mode:

 In the addressing mode, the data operand is in the RAM location (00 -7FH) and the address of the
data operand is given in the instruction.
 The direct addressing mode uses the lower 128 bytes of Internal RAM and the SFRs
Examples:
 MOV R1, 42H : Move the contents of RAM location 42 into R1 register
 MOV 49H, A : Move the contents of the accumulator into the RAM location 49.
 ADD A, 56H : Add the contents of the RAM location 56 to the accumulator
Register addressing mode :

 In the addressing mode, the data operands are available in the registers.
Examples:
 MOV A,R0 : Move the contents of the register R0 to the accumulator
 MOV P1, R2 :Move the contents of the R2 register into port 1
 MOV R5, R2 : This is invalid. The data transfer between the registers is not allowed.
Register Indirect addressing mode:
 In the addressing mode, a register is used as a pointer to the data memory block.
Examples:
 MOV A,@ R0 :Move the contents of RAM location whose address is in R0 into A (accumulator)
 MOV @ R1 , B : Move the contents of B into RAM location whose address is held by R1
 When R0 and R1 are used as pointers, they must be preceded by @ sign
 Advantage: It makes accessing the data more dynamic than static as in the case of direct
addressing mode.
Indexed addressing mode:

 This addressing mode is used in accessing the data elements of lookup table entries, located in program
ROM.
Example: MOVC A, @ A+DPTR
 The 16-bit register DPTR and register A are used to form the address of the data element stored in on-
chip ROM.
INSTRUCTIONS SET OF 8051:
Discuss in detail the 8051 instruction set. (NOV 2008)
Arithmetic instructions:
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With example, explain arithmetic instructions in 8051 microcontroller. (NOV 2012)
 ADD
• 8-bit addition between the accumulator (A) and a second operand.
• The result is always in the accumulator.
• The CY flag is set/reset appropriately.
 ADDC
• 8-bit addition between the accumulator, a second operand and the previous value of the
CY flag.
• Useful for 16-bit addition in two steps.
 DAA
• Decimal adjust the accumulator.
• Format the accumulator into a proper 2 digit packed BCD number.
• Operates only on the accumulator.
• Works only after the ADD instruction.
 SUBB
• Subtract with Borrow.
• Subtract an operand and the previous value of a borrow (carry) flag from the
accumulator.
• A  A - <operand> - CY.
• The result is always saved in the accumulator.
 INC
• Increment the operand by one.
• The operand can be a register, a direct address, an indirect address, the data pointer.
 DEC
• Decrement the operand by one.
• The operand can be a register, a direct address, an indirect address.
 MUL AB / DIV AB
• Multiply A by B and place result in A and B registers.
• Divide A by B and place quotient in A register & remainder in B register.
•
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Logical instructions in 8051.

 ANL : It performs AND logical operation between two operands.
 Work on byte sized operands or the CY flag.
• ANL A, Rn
• ANL A, direct
• ANL A, @Ri
• ANL A, #data
• ANL direct, A
• ANL direct, #data
• ANL C, bit
• ANL C, /bit
 ORL: It performs OR logical operation between two operands.
 Work on byte sized operands or the CY flag.
• ORL A, Rn
• ORL A, direct
• ORL A, @Ri
• ORL A, #data
 XRL
 Works on bytes only.
• XRL A, Rn
• XRL A, direct
 CPL / CLR
 Complement / Clear.
 Work on the accumulator or a bit.
• CLR P1.2
• CPL Rn
 RL / RLC / RR / RRC
 Rotate the accumulator.
• RL and RR without the carry
• RLC and RRC rotate through the carry.
• SWAP A: Swap the upper and lower nibbles of the accumulator.
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Data transfer instructions in 8051.

Briefly explain the data transfer instructions available in 8051 microcontroller . (NOV 2014)
MOV
 8-bit data transfer for internal RAM and the SFR.
• MOV A, Rn
• MOV A, direct
• MOV A, @Ri
• MOV A, #data
• MOV Rn, A
• MOV Rn, direct
• MOV Rn, #data
• MOV direct, A
• MOV direct, Rn
• MOV direct, direct
• MOV direct, @Ri
• MOV direct, #data
• MOV @Ri, A
• MOV @Ri, direct
• MOV @Ri, #data
 MOV
 1-bit data transfer involving the CY flag
• MOV C, bit
• MOV bit, C
 MOV
 16-bit data transfer involving the DPTR
• MOV DPTR, #data
 MOVC
 Move Code Byte
• Load the accumulator with a byte from program memory.
• Must use indexed addressing
• MOVC A, @A+DPTR
• MOVC A, @A+PC
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 MOVX
 Data transfer between the accumulator and a byte from external data memory.
• MOVX A, @Ri
• MOVX A, @DPTR
• MOVX @Ri, A
• MOVX @DPTR, A
 PUSH / POP
 Push and Pop a data byte onto the stack.
 The data byte is identified by a direct address from the internal RAM locations.
• PUSH DPL
• POP 40H
 XCH
 Exchange accumulator and a byte operand
• XCH A, Rn
• XCH A, direct
• XCH A, @Ri
 XCHD
 Exchange lower digit of accumulator with the lower digit of the memory location specified.
• XCHD A, @Ri
• The lower 4-bits of the accumulator are exchanged with the lower 4-bits of the internal
memory location identified indirectly by the index register.
• The upper 4-bits of each are not modified.
Boolean (or) Bit manipulation instructions in 8051.

 This group of instructions is associated with the single-bit operations of the 8051.
 This group allows manipulating the individual bits of bit addressable registers and memory locations as
well as the CY flag.
• The P, OV, and AC flags cannot be directly altered.
 This group includes:
• Set, clear, and, or complement, move.
• Conditional jumps.
 CLR
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• Clear a bit or the CY flag.

• CLR P1.1
• CLR C
 SETB
• Set a bit or the CY flag.
• SETB A.2
• SETB C
 CPL
• Complement a bit or the CY flag.
• CPL 40H; Complement bit 40 of the bit addressable memory
 ORL / ANL
• OR / AND a bit with the CY flag.
• ORL C, 20H; OR bit 20 of bit addressable memory with the CY flag
• ANL C, 34H; AND bit 34 of bit addressable memory with the CY flag.
 MOV
• Data transfer between a bit and the CY flag.
• MOV C, 3FH; Copy the CY flag to bit 3F of the bit addressable memory.
• MOV P1.2, C; Copy the CY flag to bit 2 of P1.
 JC / JNC
• Jump to a relative address if CY is set / cleared.
 JB / JNB
• Jump to a relative address if a bit is set / cleared.
• JB ACC.2, <label>
 JBC - Jump to a relative address, if a bit is set and clear the bit.
Branching instructions:
With example, explain branching instructions in 8051 microcontrolle r. (May 2010, NOV 2012)
Explain the working of program control transfer instructions of 8051. (May 2012)
 The 8051 provides four different types of unconditional jump instructions:

 Short Jump – SJMP
• Uses an 8-bit signed offset relative to the 1st byte of the next instruction.
• Long Jump – LJMP
• Uses a 16-bit address.
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• 3 byte instruction capable of referencing any location in the entire 64K of program
memory.
 Absolute Jump – AJMP
• Uses an 11-bit address.
• 2 byte instruction
• The 11-bit address is substituted for the lower 11-bits of the PC to calculate the 16-bit
address of the target.
• The location referenced must be within the 2K Byte memory.
 Indirect Jump – JMP
• JMP @A + DPTR
 The 8051 provides 2 forms for the CALL instruction:
 Absolute Call – ACALL
• Uses an 11-bit address similar to AJMP
• The subroutine must be within the same 2K page.
 Long Call – LCALL
• Uses a 16-bit address similar to LJMP
• The subroutine can be anywhere.
 Both forms push the 16-bit address of the next instruction on the stack and update the stack
pointer.
 The 8051 provides 2 forms for the return instruction:
 Return from subroutine – RET
• Pop the return address from the stack and continue execution there.
 Return from Interrupt Service Routine – RETI
• Pop the return address from the stack.
• Continue execution at the address retrieved from the stack.
• The PSW is not automatically restored.
 The 8051 supports 5 different conditional jump instructions.
 ALL conditional jump instructions use an 8-bit signed offset.
 Jump on Zero – JZ / JNZ
• Jump if the A == 0 / A != 0
• The check is done at the time of the instruction execution.
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 Jump on Carry – JC / JNC

• Jump if the C flag is set / cleared.
 Jump on Bit – JB / JNB
• Jump if the specified bit is set / cleared.
• Any addressable bit can be specified.
 Jump if the Bit is set then Clear the bit – JBC
• Jump if the specified bit is set.
• Then clear the bit.
 Compare and Jump if Not Equal – CJNE
 Compare the magnitude of the two operands and jump if they are not equal.
• The values are considered to be unsigned.
• The Carry flag is set / cleared appropriately.
• CJNE A, direct, rel
• CJNE Rn, #data, rel
• CJNE @Ri, #data, rel
 Decrement and Jump if Not Zero – DJNZ
 Decrement the first operand by 1 and jump to the location identified by the second operand if the
resulting value is not zero.
• DJNZ Rn, rel
• DJNZ direct, rel
 NOP – No operation
Memory organization :
Explain in detail the inte rnal memory organization of 8051 microcontroller (NOV 2014, May 2012, NOV
2011, NOV 2010, May 2010, MAY 2009, NOV 2008, NOV 2007)
 The 8051 microcontroller has 128 bytes of Internal RAM and 4kB of on chip ROM.
 The RAM is also known as Data memory and the ROM is known as program (Code) memory.
 Code memory holds the actual 8051 program to be executed.
 In 8051, memory is limited to 64KB.
 Code memory may be found on-chip, as ROM or EPROM.
 It may also be stored completely off- chip in an external ROM / EPROM.
 The 8051 has only 128 bytes of Internal RAM but it supports 64KB of external RAM.
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 Since the memory is off-chip, it is not as flexible for accessing and is also slower.
Structure of Internal RAM OF 8051(Data Memory) :

Explain the Data memory structure of 8051. (NOV 2011)
 Internal RAM is found on-chip on the 8051. So it is the fastest RAM available.
 It is flexible in terms of reading, writing and modifying its contents.
 Internal RAM is volatile.
 When the 8051 is reset, internal RAM is cleared.
 The 128 bytes of internal RAM is organized as below.
 Four register banks (Bank0, Bank1, Bank2 and Bank3) each of 8-bits (total 32 bytes).
 The default bank register is Bank0.
 The remaining Banks are selected with the help of RS0 and RS1 bits of PSW Register.
 16 bytes of bit addressable area and
 80 bytes of general purpose area (Scratch pad memory) of internal RAM as shown in the diagram below.
 This area is utilized by the microcontroller as a storage area for the operating stack.
 The 32 bytes of RAM from address 00 H to 1FH are used as working registers organized as four banks
of eight registers each.
 The registers are named as R0-R7.
 Each register can be addressed by its name or by its RAM address.
For example: MOV A, R7 or MOV R7,#05H
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Structure of Internal ROM (On –chip ROM / Program Memory / Code Memory):
 The 8051 microcontroller has 4KB of on chip ROM, but it can be extended up to 64KB.
 This ROM is also called program memory or code memory.
 The CODE segment is accessed using the program counter (PC) for opcode fetches and by DPTR for
data.
 The external ROM is accessed when the EA pin is connected to ground or the contents of program
counter exceeds 0FFFH.
 When the Internal ROM address is exceeded the 8051 automatically fetches the code bytes from the
external program memory.
SPECIAL FUNCTION REGISTERS (SFRs)
Write the available special function registers in 8051. Explain each register with its format and functions.
(April 2017, NOV 2015)
 In 8051 microcontroller, there are registers which uses the RAM addresses from 80h to FFh.
 They are used for certain specific operations. These registers are called Special Function Registers
(SFRs).
 Most of SFRs are bit addressable and other few registers are byte addressable.
 In these SFRs, some of them are related to I/O ports (P0, P1, P2 and P3) and some of them are for
control operations (TCON, SCON & PCON).
 Remaining are the auxiliary SFRs, that they don't directly configure the 8051.
 The list of SFRs and their functional names are given below.
 The * indicates the bit addressable SFRs

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S.No Symbol Name of SFR Address (Hex)
1 ACC* Accumulator 0E0
2 B* B-Register 0F0
3 PSW* Program Status word register 0DO
4 SP Stack Pointer Register 81
5 DPL Data pointer low byte 82
DPTR DPH Data pointer high byte 83
6 P0* Port 0 80
P1* Port 1 90
8 P2* Port 2 0A
9 P3* Port 3 0B
10 IP* Interrupt Priority control 0B8
11 IE* Interrupt Enable control 0A8
12 TMOD Timer mode register 89
13 TCON* Timer control register 88
14 TH0 Timer 0 Higher byte 8C
15 TL0 Timer 0 Lower byte 8A
16 TH1 Timer 1Higher byte 8D
17 TL1 Timer 1 lower byte 8B
18 SCON* Serial control register 98
19 SBUF Serial buffer register 99
20 PCON Power control register 87
Table: Special Function Registers
STACK in 8051 Microcontroller:

 The stack is a part of RAM used by the CPU to store information temporarily.
 This information may be either data or an address.
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 The register used to access the stack is called the Stack pointer (SP).
 SP is an 8-bit register. So, it can take values of 00 to FF H.
 When the 8051 is powered up, the SP register contains the value 07.i.e the RAM location value 08 is the
first location being used for the stack by the 8051 controller.
 There are two important instructions to handle stack. One is the PUSH and the other is the POP.
 The loading of data from CPU registers to the stack is done by PUSH.
 The loading of the contents of the stack back into a CPU register is done by POP.
Interrupts:
Explain interrupt structure of 8051 microcontroller. (NOV 2011, MAY 2009)
Interrupt Structure :
 An interrupt is an external or internal event that disturbs the microcontroller to inform it that a device
needs its service.
 The program which is associated with the interrupt is called the interrupt service routine (ISR) or
interrupt handle r.
 Upon receiving the interrupt signal, the microcontroller finishes current operation and saves the PC on
stack.
 Jumps to a fixed location in memory depending on type of interrupt.
 Starts to execute the interrupt service routine until RETI.
 Upon executing the RETI the microcontroller returns to the place where it was interrupted. Get pop PC
from stack.
 The 8051 microcontroller has FIVE interrupts in addition to Reset. They are
 Timer 0 overflow Interrupt

 Timer 1 overflow Interrupt
 External Interrupt 0(INT0)
 External Interrupt 1(INT1)
 Serial Port Interrupt
 Each interrupt has a specific place in code memory where program execution begins.
 External Interrupt 0: 0003 H

 Timer 0 overflow: 000B H
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 External Interrupt 1: 0013 H

 Timer 1 overflow: 001B H
 Serial Interrupt : 0023 H
 Upon reset all Interrupts are disabled & do not respond to the Microcontroller.
 These interrupts must be enabled by software. This is done by an 8-bit register called Interrupt Enable
Register (IE).
Inte rrupt Enable Register :
 EA : Global enable/disable. To enable the interrupts, this bit must be set high.
 --- : Undefined-reserved for future use.
 ET2 : Enable /disable Timer 2 overflow interrupt.
 ES : Enable/disable Serial port interrupts.
 EX1 : Enable/disable External interrupt1.
 EX0 : Enable/disable External interrupt0
 Upon reset, the interrupts have the following priority from top to down. The interrupt with the highest
PRIORITY gets serviced first.
1. External interrupt 0 (INT0)
2. Timer interrupt0 (TF0)
3. External interrupt 1 (INT1)
4. Timer interrupt1 (TF1)
5. Serial communication (RI+TI)
 Priority can also be set to “high” or “low” by 8-bit IP register.
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Inte rrupt priority register:
 IP.7: reserved
 IP.6: reserved
 IP.5: Timer 2 interrupt priority bit (8052 only)
 IP.4: Serial port interrupt priority bit
 IP.3: Timer 1 interrupt priority bit
 IP.2: External interrupt 1 priority bit
 IP.1: Timer 0 interrupt priority bit
 IP.0: External interrupt 0 priority bit
PROGRAMMING TIMERS OF 8051
1. Explain the different modes of operation of time rs in 8051 in detail with its associated registers.
Describe different modes of operation of time rs /counte rs in 8051 with its associated registers.
(NOV 2009, MAY 2009. May 2007, May 2016)
Draw and explain the functions of TCON and TMOD registers of 8051. (Dec 2008)
Explain the on-chip timer modes of an 8051 Microcontroller. (April 2010, NOV 2016)
Time r Registers.
 The 8051 has two timers/counters, they can be used either as timers (used to generate a time delay)
or as event counters.
TIMER 0:
 Timer 0 is a 16-bit register and can be treated as two 8-bit registers (TL0 & TH0).
 These registers can be accessed similar to any other registers like A, B or R1 etc
 Ex : The instruction MOV TL0,#07 moves the value 07 into lower byte of Timer0.
 Similarly MOV R1, TH0 saves the contents of TH0 in the R1 register.
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TIMER 1:
 Timer 1 is also a 16-bit register and can be treated as two 8-bit registers (TL1 & TH1).
 These registers can be accessed similar to any other registers like A, B or R1etc
 Ex : The instruction MOV TL1,#05 moves the value 05 into lower byte of Timer1.
 Similarly MOV R0,TH1 saves the contents of TH1 in the R0 register.
TMOD (Time r mode Register):

 The various operating modes of both the timers T0 and T1 are set by a TMOD register.
 TMOD is a 8-bit register.
 The lower 4 bits are for Timer 0
 The upper 4 bits are for Timer 1
 In each case,
 The lower 2 bits are used to set the timer mode
 The upper 2 bits to specify the operation
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GATE:
 This bit is used to start or stop the timers by hardware.
 When GATE= 1, the timers can be started / stopped by the external sources.
 When GATE= 0, the timers can be started or stopped by software instructions like SETB TRX
or CLR TRX.
C/T (Counter/Timer):
 This bit decides whether the timer is used as delay generator or event counter.
 When C / T = 0, timer is used as delay generator.
 When C / T =1, timer is used as an event counter.
 The clock source for the time delay is the crystal frequency of 8051.
 The clock source for the event counter is the external clock source.
M1, M0 (Mode):
 These two bits are the timer mode bits.
 The timers of the 8051 can be configured in four modes Mode0, Mode1, Mode2 & Mode 3.
 The selection and operation of the modes is shown below.
S.No M0 M1 Mode Ope ration

1 0 0 Mode 0 13-bit Time r mode.
8-bit Timer/counter THx with TLx as 5-bit
prescaler
2 0 1 Mode 1 16-bit Time r mode.16-bit timer /counter
THx and TLx are cascaded. There is no
presacler
3 1 0 Mode 2 8-bit auto reload.
8-bit auto reload timer/counter. THx holds a
value which is to be reloaded TLx each time
it overflows
4 1 1 Mode 3 Split timer mode
23
Mode 0: 13 bit Timer mode
Mode 1: 16 bit Timer mode
Mode 2: 8 bit auto reload mode
Mode 3: Split Timer mode
Figure: Modes of operation of Timer
24
TCON (Timer control register)

 TCON (timer control) register is an 8-bit register. TCON register is a bit-addressable register.
Bit Bit Description

Number Mnemonic
7 TF1 Timer 1 overflow flag
Cleared by hardware when processor vectors to interrupt routine.
Set by hardware on timer/counter overflow, when the timer 1 register overflows.
6 TR1 Timer 1 run control bit
Clear to turn off time/counter 1.
Set to turn on timer/counter 1.
5 TF0 Timer 0 overflow flag
Cleared by hardware when processor vectors to interrupt routine.
Set by hardware on timer/counter overflow, when the timer 0 register overflows.
4 TR0 Timer 0 run control bit
Clear to turn off time/counter 0.
Set to turn on timer/counter 0.
3 IE1 External interrupt 1 edge flag.
Cleared by hardware when interrupt is processed if edge-triggered.
Set by hardware when external interrupt is detected on INT1 pin.
2 IT1 External interrupt 1 type control bit
Clear to select low level active (level triggered) for external interrupt 1.
Set to select falling edge active (edge triggered) for external interrupt 1.
1 IE0 External interrupt 0 edge flag
Cleared by hardware when interrupt is processed if edge-triggered.
Set by hardware when external interrupt is detected on INT0 pin.
0 IT0 External interrupt 0 type control bit
Clear to select low level active (level triggered) for external interrupt 0.
Set to select falling edge active (edge triggered) for external interrupt 0.
Time rs of 8051 do starting and stopping by either software or hardware control

 For using software to start and stop the timer where GATE=0
 The start and stop of the timer are controlled by software using TR (timer start) bits TRX and CLRX
 The SETB instruction starts it, and it is stopped by the CLR instruction.
 These instructions start and stop the timers as long as GATE=0 in the TMOD register
 The hardware way of starting and stopping the timer is achieved by making GATE=1 in the
TMOD register.
25
The following are the characteristics and operations of mode 1:

1. It is a 16-bit timer.
2. It allows value from 0000 to FFFFH.
3. Value to be loaded into the timer register TL and TH.
4. After TH and TL are loaded with a 16-bit initial value, the timer must be started
 This is done by SETB TR0 for timer 0 and SETB TR1 for timer 1
5. After the timer is started, it starts to count up
 It counts up until it reaches its limit of FFFFH
 When it rolls over from FFFFH to 0000, it sets high a flag bit called TF (timer flag)
 Each timer has its own timer flag.
 There are TF0 for timer 0, and TF1 for timer 1.
6. Timer flag can be monitored,

 When this timer flag is raised, to stop the timer with the CLR instructions.
 CLR TR0 and CLR TR1, for timer 0 and timer 1 respectively.
 After the timer reaches its limit and rolls over.
 In order to repeat the process, TH and TL must be reloaded with the original value and TF must
be reloaded to 0.
To generate a time delay
1. Load the TMOD register indicating which timer is to be used and which timer mode is selected.
2. Load registers TL and TH with initial count value.
3. Start the timer
4. Keep monitoring the timer flag (TF) with the JNB TFx , target to see if it is raised
 Get out of the loop when TF becomes high
5. Stop the timer
6. Clear the TF flag for the next round
26
7. Go back to Step 2 to load TH and TL again.

Example 1:
In the following program, we create a square wave of 50% duty cycle (with equal portions high and
low) on the P1.5 bit. Timer 0 is used to generate the time delay. Analyze the program. (Nov 2014)
MOV TMOD,#01 ;Timer 0, mode 1(16-bit mode)
HERE: MOV TL0,#0F2H ;TL0=F2H, the low byte
MOV TH0,#0FFH ;TH0=FFH, the high byte
CPL P1.5 ;toggle P1.5
ACALL DELAY
SJMP HERE
DELAY: SETB TR0 ;start the timer 0
AGAIN: JNB TF0,AGAIN ;monitor timer flag 0 until it rolls over
CLR TR0 ;stop timer 0
CLR TF0 ;clear timer 0 flag
RET
In the above program notice the following steps.
1. TMOD is loaded.
2. FFF2H is loaded into TH0-TL0.
3. P1.5 is toggled for the high and low portions of the pulse.
4. The DELAY subroutine using the timer is called.
5. In the DELAY subroutine, timer 0 is started by the SETB TR0 instruction.
6. Timer 0 counts up with the passing of each clock, which is provided by the crystal oscillator.
 As the timer counts up, it goes through the states of FFF3, FFF4, FFF5, FFF6, and so on until it reaches
FFFFH.
 One more clock rolls it to 0, raising the timer flag (TF0=1). At that point, the JNB instruction falls
through.
7. Timer 0 is stopped by the instruction CLR TR0.
 The DELAY subroutine ends and the process is repeated.
Notice that to repeat the process, we must reload the TL and TH registers, and start the process is repeated.
Example 2:
27
In Example 1, calculate the amount of time delay in the DELAY subroutine generated by the timer.
Assume XTAL = 11.0592 MHz.
Solution:
 The timer works with a clock frequency of 1/12 of the XTAL frequency, we have 11.0592 MHz / 12 =
921.6 kHz as the timer frequency.
 As a result, each clock has a period of T =1/921.6kHz,T=1.085µs.
 In other words, Timer 0 counts up each 1.085µs resulting in delay = number of counts × 1.085 µs.
 The number of counts for the roll over is FFFFH – FFF2H = 0DH (13 decimal).
 Add one to 13 because of the extra clock needed when it rolls over from FFFF to 0 and raise the TF flag.
 This gives 14 × 1.085µs = 15.19µs for half the pulse. For the entire period it is T = 2 × 15.19µs =
30.38µs as the time delay generated by the timer.
(a) In hexadecimal
(FFFF – YYXX + 1) ×1.085 µs, where YYXX are TH, TL initial values respectively. Notice that value YYXX
are in hex.
(b) In decimal
Convert YYXX values of the TH, TL register to decimal to get a NNNN decimal, then (65536 - NNNN) ×
1.085 µs
Example 3:
In Example 1, calculate the frequency of the square wave generated on pin P1.5.
Solution:
 In the timer delay calculation of Example 1, we did not include the overhead due to instruction in the
loop.
 To get a more accurate timing, we need to add clock cycles due to these instructions in the loop.
 To do that, we use the machine cycle as shown below.
Cycles
HERE: MOV TL0,#0F2H 2
MOV TH0,#0FFH 2
CPL P1.5 1
ACALL DELAY 2
SJMP HERE 2
28
DELAY: SETB TR0 1

AGAIN: JNB TF0, AGAIN 14
CLR TR0 1
CLR TF0 1
RET 2
Total 28
T = 2 × 28 × 1.085 us = 60.76 µs and F = 16458.2 Hz
Example 4:
Find the delay generated by timer 0 in the following code, using both of the Methods. Do not include
the overhead due to instruction.
CLR P2.3 ;Clear P2.3
MOV TMOD,#01 ;Timer 0, 16-bitmode
HERE: MOV TL0,#3EH ;TL0=3Eh, the low byte
MOV TH0,#0B8H ;TH0=B8H, the high byte
SETB P2.3 ;SET high timer 0
SETB TR0 ;Start the timer 0
AGAIN: JNB TF0,AGAIN ;Monitor timer flag 0
CLR TR0 ;Stop the timer 0
CLR TF0 ;Clear TF0 for next round
CLR P2.3
Solution:
(FFFFH – B83E + 1) = 47C2H = 18370 in decimal and 18370 × 1.085 µs = 19.93145 ms
The following are the characteristics and operations of mode 2:

1. It is an 8-bit timer. It allows only values of 00 to FFH to be loaded into the timer register TH.
2. After TH is loaded with the 8-bit value, the 8051 copies value to TL register.
 Then the timer must be started.
 This is done by the instruction SETB TR0 for timer 0 and SETB TR1 for timer 1.
3. After the timer is started, it starts to count up by incrementing the TL register.
 It counts up until it reaches its limit of FFH
 When it rolls over from FFH to 00, it sets high the TF (timer flag)
 When the TL register rolls from FFH to 00 and TF is set to 1.
 TL is reloaded automatically with the original value kept by the TH register.
 To repeat the process, simply clear TF.
4. This makes mode 2 an auto-reload, in contrast with mode 1 in which the programmer has to reload
29
TH and TL
To generate a time delay

1. Load the TMOD value register indicating which timer is to be used, and the timer mode (mode 2) is selected.
2. Load the TH register with the initial count value.
3. Start timer.
4. Keep monitoring the timer flag (TF) with the JNB TFx, target, to see whether it is raised
Get out of the loop when TF goes high
5. Clear the TF flag.
6. Go back to Step4, since mode 2 is auto reload.
Example 5:
Assume XTAL = 11.0592 MHz, find the frequency of the square wave generated on pin P1.0.
MOV TMOD,#20H ;T1/8-bit/auto reload

MOV TH1,#5 ;TH1 = 5
SETB TR1 ;start the timer 1
BACK: JNB TF1,BACK ;till timer rolls over
CPL P1.0 ;P1.0 to hi, lo
CLR TF1 ;clear Timer 1 flag
SJMP BACK ;mode 2 is auto-reload
Solution:
 In mode 2, no need to reload TH since it is auto-reload.
 Now (256 - 05) × 1.085 µs =251 × 1.085 µs = 272.33 µs is the high portion of the pulse.
 Since it is a 50% duty cycle square wave, the period T is twice.
 As a result T = 2 × 272.33 µs = 544.67 µs and the frequency = 1.83597 kHz
5.2: Timers as counters

Timers can also be used as counters.
Which are used for counting events happening outside the 8051.
30
 When it is used as a counter, it is a pulse outside of the 8051 that increments the TH, TL register.
 TMOD and TH, TL registers are the same as in timer concept, except the source of the frequency.
 The C/T bit in the TMOD register decides the source of the clock for the timer
 When C/T = 1, the timer is used as a counter and gets its pulses from outside the 8051.
 The counter counts up as pulses are fed from pins 14 and 15.
 these pins are called T0 (timer 0 input) and T1 (timer 1 input)
 If GATE = 1, the start and stop of the timer are done externally through pins P3.2 and P3.3 for timers 0
and 1, respectively
 This hardware allows starting or stopping the timer externally at any time via a simple switch
31
 The frequency for the timer is always 1/12th the frequency of the crystal attached to the 8051.
Example 6:
Assuming that clock pulses are fed into pin T1, write a program for counter 1 in mode 2 to count the pulses and
display the state of the TL1 count on P2, which connects to 8 LEDs.
Solution:
MOV TM0D,#01100000B ;counter 1, mode 2, C/T=1 external pulses
MOV TH1,#0 ;clear TH1
SETB P3.5 ;make T1 input
AGAIN: SETB TR1 ;start the counter
BACK: MOV A,TL1 ;get copy of TL
MOV P2,A ;display it on port 2
JNB TF1,Back ;keep doing, if TF = 0
CLR TR1 ;stop the counter 1
CLR TF1 ;make TF=0
SJMP AGAIN ;keep doing it
 Notice in the above program the role of the instruction SETB P3.5.
 Since ports are set up for output when the 8051 is powered up.
 So, we make P3.5 an input port by making it high.
32
 In other words, we must configure (set high) the T1 pin (pin P3.5) to allow pulses to be fed into it.
5.3: SERIAL COMMUNICATION

2. Explain the serial programming of 8051 with its associated registers. (May 2014, 2013)(Or)
Explain how to program for sending and receiving data serially using 8051 (April 2010, 2011)
Explain 8051 serial port programming with examples. (May 2016, NOV 2012)
Explain the serial modes of operation of 8051 microcontrolle r. (May 2007)
RS232
 It is an interfacing standard RS232.
 It was set by the Electronics Industries Association (EIA) in 1960.
 The standard was set long before the advent of the TTL logic family.
 Its input and output voltage levels are not TTL compatible.
 In RS232, a 0 is represented by -3 to -25 V, while a 1 bit is +3 to +25 V.
 IBM introduced the DB-9 version of the serial I/O standard.
Handshake signals of MODEM

DTR (data terminal ready)
 When DTR =1, indicate that it is ready for communication.
DSR (data set ready)
 When DSR =1, indicate that it is ready for communication.
RTS (request to send)
33
 It asserts RTS to signal the modem that it has a byte of data to transmit.
CTS (clear to send)
 It is to receive, it sends out signal CTS,
DCD (data carrier detect)

 The modem asserts signal DCD to inform the DTE that a valid carrier has been detected.
RI (ring indicator)
 An output from the modem and an input to a PC indicates that the telephone is ringing.
MAX232
A line driver ( MAX232) is required to convert RS232 voltage levels to TTL levels, and vice versa.
 8051 has two pins that are used specifically for transferring and receiving data serially.
 These two pins are called TxD and RxD and are part of the port 3 (P3.0 and P3.1).
 These pins are TTL compatible.
 They require a line driver to make them RS232 compatible.
Baud rate:
 The baud rates in 8051 are programmable.
 8051 divides the crystal frequency by 12 to get machine cycle frequency.
 8051 UART circuitry divides the machine cycle frequency by 32.
 Timer 1 is used to set baud rate using TH1 register

34
Baud rate TH1 (decimal) TH1(Hex)

9600 -3 FD
4800 -6 FA
2400 -12 F4
1200 -24 E8
Explain in detail the serial communication registers of the 8051. (NOV 2009)
SBUF:
 It is an 8-bit register used for serial communication.
 For a byte data to be transferred via the TxD line:
 Byte must be placed in the SBUF register.
 Bytes are framed with the start and stop bits and transferred serially via the TxD line.
 SBUF holds the byte of data when it is received by 8051 RxD line.
 When the bits are received serially via RxD.
 8051 de-frames byte by eliminating the stop and start bits.
SCON:
 It is an 8-bit register used to program the start bit, stop bit and data bits of data framing.
SM0 SM1 SM2 REN TB8 RB8 TI RI
Bit Bit Description

Number Mnemonic
SCON.7 SM0 Serial port mode specifier
SCON.6 SM1 Serial port mode specifier
SCON.5 SM2 Used for multiprocessor communication
SCON.4 REN Set/Cleared by software to enable/disable reception
SCON.3 TB8 Not widely used
SCON.2 RB8 Not widely used
SCON.1 TI Transmit interrupt flag. Set by hardware at the begin of the stop bit mode 1.
And cleared by software
SCON.0 RI Receive interrupt flag. Set by hardware at the begin of the stop bit mode 1.
And cleared by software
35
SM0, SM1: Serial port mode specifiers

SM0 SM1
0 0 Serial Mode 0
0 1 Serial Mode 1; 8-bit data, 1 stop bit, 1 start bit
1 0 Serial Mode 2
1 1 Serial Mode 3
In programming the 8051 to transfer character bytes serially
1. TMOD register is loaded with the value 20H, indicating the use of timer 1 in mode 2 (8-bit auto-
reload) to set baud rate.
2. The TH1 is loaded with one of the values to set baud rate for serial data transfer.
3. The SCON register is loaded with the value 50H, indicating serial mode 1, where an 8-bit data is framed
with start and stop bits.
4. TR1 is set to 1 to start timer 1
5. TI is cleared by CLR TI instruction.
6. The character byte to be transferred serially is written into SBUF register.
7. The TI flag bit is monitored with the use of instruction JNB TI, xx, to see if the character has been
transferred completely.
8. To transfer the next byte, go to step 5.
Write a program for the 8051 to transfer letter “A” serially at 4800 baud, continuously.
Solution:
MOV TMOD, #20H ;timer 1, mode 2 (auto reload)

MOV TH1, #-6 ;4800 baud rate
MOV SCON, #50H ;8-bit, 1 stop, REN enabled
SETB TR1 ;start timer 1
AGAIN: MOV SBUF, #”A” ;letter “A” to trtansfer
HERE: JNB TI, HERE ;wait for the last bit
CLR TI ;clear TI for next char
SJMP AGAIN ;keep sending A
The steps that 8051 goes through in trans mitting a character via TxD
36
1. The byte character to be transmitted is written into the SBUF register

2. The start bit is transferred
3. The 8-bit character is transferred on bit at a time
4. The stop bit is transferred
 It is during the transfer of the stop bit that 8051 raises the TI flag, indicating that the last
character was transmitted
5. By monitoring the TI flag, we make sure that we are not overloading the SBUF
 If we write another byte into the SBUF before TI is raised, the un-transmitted portion of the
previous byte will be lost.
6. After SBUF is loaded with a new byte, the TI flag bit must be forced to 0 by CLR TI in order for this
new byte to be transferred
By checking the TI flag bit, we know whether or not the 8051 is ready to transfer another byte
 It must be noted that TI flag bit is raised by 8051 itself when it finishes data transfer
 It must be cleared by the programmer with instruction CLR TI
 If we write a byte into SBUF before the TI flag bit is raised, we risk the loss of a portion of the byte
being transferred
 The TI bit can be checked by the instruction JNB TI,xx Using an interrupt.
Write a program for the 8051 to transfer “YES” serially at 9600 baud, 8-bit data, 1 stop bit do this
continuously. (May 2006)
Solution:
AGAIN: MOV A, # “Y” ;transfer “Y”
ACALL TRANS
MOV A, # “E” ;transfer “E”
ACALL TRANS
MOV A, # “S” ;transfer “S”
ACALL TRANS
37
SJMP AGAIN ;keep doing it

;serial data transfer subroutine
TRANS: MOV SBUF, A ;load SBUF
HERE: JNB TI, HERE ;wait for the last bit
CLR TI ;get ready for next byte
RET `
In programming the 8051 to receive character bytes serially
1. TMOD register is loaded with the value 20H, indicating the use of timer 1 in mode
(8-bit auto-reload) to set baud rate
2. TH1 is loaded to set baud rate
3. The SCON register is loaded with the value 50H, indicating serial mode 1, where an 8-bit data is framed
with start and stop bits
4. TR1 is set to 1 to start timer 1
5. RI is cleared by CLR RI instruction
6. The RI flag bit is monitored with the use of instruction JNB RI, xx to see if an entire character has
been received yet
7. When RI is raised, SBUF has the byte, its contents are moved into a safe place.
8. To receive the next character, go to step 5.
Write a program for the 8051 to receive bytes of data serially and put them in P1, set the baud rate at 4800, 8-
bit data and 1 stop bit. (NOV 2016)
Solution:
HERE: JNB RI, HERE ;wait for char to come in
MOV A, SBUF ;saving incoming byte in A
MOV P1, A ;send to port 1
CLR RI ;get ready to receive next byte
SJMP HERE ;keep getting data
38
In receiving bit via its RxD pin, 8051 goes through the following steps.
1. It receives the start bit
 Indicating that the next bit is the first bit of the character byte it is about to receive
2. The 8-bit character is received one bit at time
3. The stop bit is received
 When receiving the stop bit 8051 makes RI = 1,indicating that an entire character byte has
been received.
5. After the SBUF contents are copied into a safe place.
 The RI flag bit must be forced to 0 by CLR RI in order to allow the next received character byte to be
placed in SBUF.
 Failure to do this causes loss of the received character.
There are two ways to increase the baud rate of data transfer
 To use a higher frequency crystal
 To change a bit in the PCON register
PCON
 PCON register is an 8-bit register
 When 8051 is powered up, SMOD is zero.
 We can set it to high by software and thereby double the baud rate.
 GF1, GF0: General flag bits
 PD: Power down mode
 IDL: Ideal mode
39
PIN Diagram of 8051 Microcontroller:
Explain Pin details of 8051 microcontroller. (MAY 2006)

Describe the functions of the following signals in 8051. RST, EA, PSEN and ALE. (NOV 2015)
 The 8051 microcontroller is available as a 40 pin DIP chip and it works at +5 volts DC.
 Among the 40 pins, a total of 32 pins are allotted for the four parallel ports P0, P1, P2 and P3 i.e each
port occupies 8-pins.
 The remaining pins are VCC, GND, XTAL1, XTAL2, RST, EA ,PSEN.
XTAL1, XTAL2:
 These two pins are connected to Quartz crystal oscillator which runs the on-chip oscillator.
 The quartz crystal oscillator is connected to the two pins along with a capacitor of 30pF as shown in the
circuit.
 If use a source other than the crystal oscillator, it will be connected to XTAL1 and XTAL2 is left
unconnected.
RST:
 The RESET pin is an input pin and it is an active high pin.

 When a high pulse is applied to this pin, the microcontroller will reset and terminate all activities.
 Upon reset all the registers will reset to 0000 Value and SP register will reset to 0007 value.
40
(Exte rnal Access):

 This pin is an active low pin.
 This pin is connected to ground when microcontroller is accessing the program code stored in the
external memory.
 This pin is connected to Vcc when it is accessing the program code in the on chip memory.
(Program Store Enable):

 This is an output pin which is active low.
 When the microcontroller is accessing the program code stored in the external ROM, this pin is
connected to the OE (Output Enable) pin of the ROM.
ALE (Address latch enable):
 This is an output pin, which is active high.
 This ALE pin will demultiplex the address and data bus.
 When the pin is high, the Address/ Data bus will act as address bus, otherwise the Address/ Data bus
will act as Data bus.
Figure: Pin diagram of 8051
41
P0.0- P0.7(AD0-AD7) :
 The port 0 pins multiplexed with Address/data pins.
 If the microcontroller is accessing external memory, these pins will act as address/data pins, otherwise
they are used for Port 0 pins.
P2.0- P2.7 (A8-A15) :
 The port2 pins are multiplexed with the higher order address pins.
 When the microcontroller is accessing external memory, these pins provide the higher order address
byte, otherwise they act as Port 2 pins.
P1.0- P1.7 :
 These 8-pins are dedicated to perform input or output port operations.
P3.0- P3.7:
 These 8-pins are meant for Port3 operations and also for some control operations like read, Write,
Timer0, Timer1, INT0, INT1, RxD and TxD.
Program 1: Using timers in 8051 write a program to generate square wave 100ms, 50%
duty cycle. (NOV 2014, May 2016, May 2012)
MOV TMOD, #01
Here: MOV TL0, #D7
MOV TH0, #B4
CPL P1.3
SETB TRO
Again: JNB TF0, Again
CLR TR0
CLR TF0
SJMP Here
42
Program 2: Write an 8051 ALP to multiply the given number 48H and 30H. (April 2017)
Mnemonics Comments
Opcode Operand
MOV A,#48 ;Store data1 in accumulator
MOV B,#30 ;Store data2 in B register
MUL AB ;Multiply both
MOV DPTR,#4500 ;Initialize memory location
MOVX @DPTR,A ;Store lower order result
INC DPTR ;Go to next memory location
MOV A,B ;Store higher order result
MOVX @DPTR,A
L1: SJMP L1 ;Stop the program
Program 3: Write a program to add two 16 bit numbers. The numbers are 8C8D and
8D8C. Place the sum in R7 and R6. R6 should have the lower byte. (NOV 2010)
Mnemonics Comments
Opcode Operand
MOV A, #8D ;Store LSB data1 in accumulator
MOV B, #8C ;Store LSB data2 in B register
ADD A, B ;Add both
MOV R6, A ;Store LSB result
MOV A, #8C ;Store MSB data1 in accumulator
MOV B, #8D ;Store MSB data2 in B register
ADD A, B ;Add both
MOV R7, A ;Store MSB result
L1: SJMP L1 ;Stop the program
43

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ET3491 EMBEDDED SYSTEM AND IOT DESIGN Unit-1

UNIT – I 8 BIT EMBEDDED PROCESSOR

Microcontrollers for Embedded system:

 A CPU built into a single VLSI chip is called a microprocessor.

Fig.1: Block diagram of a Microprocessor.

 A microcontroller is an integrated single chip, which consists of CPU, RAM, EPROM/PROM/ROM,

Fig.2.Block Diagram of a Microcontrolle r

Distinguish between Microprocessor and Microcontroller

S.No Microprocessor Microcontroller

1 A microprocessor is a general A microcontroller is a dedicated chip which

2 A microprocessor does not contain A microcontroller includes RAM, ROM,

3 Microprocessor is used as the CPU Microcontroller is used to perform control-

4 Microprocessor instructions are Microcontroller instructions are both bit

5 Microprocessor based system Microcontroller based system design is

4.2: INTEL 8051 MICRCONTROLLER :

Features of 8051 Microcontroller:

The 8051 is an 8-bit Controller:

ARCHITECTURE & BLOCK DIAGRAM OF 8051 MICROCONTROLLER:

Fig.3. Block Diagram of 8051 Microcontrolle r

Program Counter (PC) :

Fig 3a: Internal architecture diagram of 8051 Microcontrolle r

Fig: Structure of registers

Program Status Register (PSW):

 The meaning of various bits of PSW register is shown below.

CY PSW.7 Carry Flag

RS1 RS0 Register Bank Address

RAM & ROM:

ADDRESSING MODES OF 8051 :

Direct addressing mode:

Register addressing mode :

Indexed addressing mode:

Discuss in detail the 8051 instruction set. (NOV 2008)

With example, explain arithmetic instructions in 8051 microcontroller. (NOV 2012)

Logical instructions in 8051.

Data transfer instructions in 8051.

Boolean (or) Bit manipulation instructions in 8051.

• Clear a bit or the CY flag.

 The 8051 provides four different types of unconditional jump instructions:

 Jump on Carry – JC / JNC

Structure of Internal RAM OF 8051(Data Memory) :

SPECIAL FUNCTION REGISTERS (SFRs)

 The * indicates the bit addressable SFRs

S.No Symbol Name of SFR Address (Hex)

1 ACC* Accumulator 0E0

3 PSW* Program Status word register 0DO

4 SP Stack Pointer Register 81

5 DPL Data pointer low byte 82

DPTR DPH Data pointer high byte 83

10 IP* Interrupt Priority control 0B8

11 IE* Interrupt Enable control 0A8

12 TMOD Timer mode register 89

13 TCON* Timer control register 88

14 TH0 Timer 0 Higher byte 8C

15 TL0 Timer 0 Lower byte 8A

16 TH1 Timer 1Higher byte 8D

17 TL1 Timer 1 lower byte 8B

18 SCON* Serial control register 98

19 SBUF Serial buffer register 99

20 PCON Power control register 87