ADC & DAC - LPC23xx

features
10 bit successive approximation ADC
Yp Multiplexing can be used as G channel

or
can be used as 8 channel
to Power down mode

ADCs power hungry
0 Turning on ADC
To burn on ops PCON P as ADCON

d
torn on intADC
ADC control
only
to measurement o to 3V
range
we
10 bit conversion time I 2 Huns
Burst conversion mode for Single channel

as well as multiple channel
Individual result foreach Ald channel

regs
Channels in ADC
Aa
8channels
for Analog
In
Programming the ADC

Turning ON ADC
OFF By default I
Set bit 8 In PCONP
Set PCI K SELO 25 24

PCLK A
CPUSA COOLE CK Cage
Default
Ald Interrupt register ADOINTEN
8 channel each has a bit

2
Global
intrenable cry Mf Cho Chu chis Cha CHI CHO
If you want an interrupt when the Conversion

finishes then set the corresponding bit to 1
Raised intr goes in Status
beg
global intr enabled If this is I then every
conversion will generate an
intr
Programing Adoor veg
AID control register
31
23
1 I 1
24
16
3
15 8
7 O
Indicate on which channel conversion is to

be done
cno cns cha
analog Yp
Ca set these bits to 1
AD Controller CIK E 4.5MHz
Say CAU LIK 48MHz
PCLA 48 12MHz
4
value in UK divide 260
11Am
In min
Turn on Abc in Peon
Pevey and now
turn it on in control neg
I set PDN 1
Cin sample bits class associated with

Burst mode ofOper
If Burst bit I
2 conversion will
keep on going untill
Burse is made zero
setting the value of Chas will give different

resolution of Ocp
CLAS Clk cycles used no of bits ocp
000 0
0 0 I Yo 9
0 1 0 9 8
I
1
I
1 I I 4 3
shes is only possible in beast mode of
data transfer
In normal mode 10 bit result

Il Uk Cycles
i START tn not using Burst Conversion can be
started by means of Hw
CLAS Burst values don't matterhere
to start of Conn
Based on capture
Based on match
3
Larimorechannel
F match happen Ap is triggered conversion

complete
Interrupt is
set
Status register
Indicates whether the conversion occurred or not
overrun status
off
conversion status veg g
To
when conversion is done a corresponding channel
bit is set to 1 Indicating that louver is done
and data is available in data hey
Overton
overrun status bit is sets it overrun happens
ma overrun error generally happens with

burst mode of opere
If you don't evetrive your
data on time then prow
data is replaced with
new one
Actual data ADO Dro ADO Dra
10 bit data generally

Bits 15 6 15 265 70
Data 10 o
32 bit each
8 data
neg available one for each
channel
bit 30 overrun reporting
bit 31 completion of over son
B
Copy of bits present in ADOSTAT
A DOG DR
ivey
global data register
Bit 26 24 mentions the currently converted
channel
Acr Interrupt optional

If intr was raised then acknowledge
the intr
general method 5
write a O'into the
general vector address
evey
How to handle Conversion using into
example read A to D controller every 10 seconds
2 to do this
ways
Wayt Analog Yp connected to Cho
Program the timer for 10 see intr
Laymen
Every co see timer intr will be raised
Conversion
of conversion
by software n'start
Isr enable soc using Software mean
write into scare bits of AldCtrl neg
END
when conversion completes intr Is
generated
As part of ADC intr service routine
read data
veg
conversion complete check status
neg
G Bit31
a
status 21
do
read elata
when doing something additional to conversion
use this method
way 2 Program timer for internal compare for
10sec
elegant not enable timer interrupt
Program AID controller to correspond with

Internally the match
timer START Bits 100 Soc
works Matata
every w see A match happens 70 CHI
when successfull match happens
conversion gets triggered internally

do
conversion complete
Enable Abc Interrupt
Go to ADC's ISR and Read AD Data leg

LADODROS
If the sole purpose match is to measure ADC

of
method
then use this
DAC LPC 23N
generated data is
btw Aref to Vref
Always ON
2 Programming the DAC
Clasen Select the pin

Alternate frm
DAC has only I has to be prog
beg
The 1 Bit present is the Bias Gpo has to be
bit programed for
I eveg
BIAS O time 1ps current Zona
I s time 2.5ps Current 350pA

ADC & DAC - LPC23xx

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ADC & DAC - LPC23xx

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features

10 bit successive approximation ADC

Yp Multiplexing can be used as G channel

to Power down mode

To burn on ops PCON P as ADCON

Burst conversion mode for Single channel

Individual result foreach Ald channel

Programming the ADC

Set PCI K SELO 25 24

8 channel each has a bit

If you want an interrupt when the Conversion

Indicate on which channel conversion is to

Say CAU LIK 48MHz

Cin sample bits class associated with

setting the value of Chas will give different

In normal mode 10 bit result

F match happen Ap is triggered conversion

ma overrun error generally happens with

Actual data ADO Dro ADO Dra

10 bit data generally

Acr Interrupt optional

Program AID controller to correspond with

conversion gets triggered internally

Go to ADC's ISR and Read AD Data leg

If the sole purpose match is to measure ADC

2 Programming the DAC

Clasen Select the pin

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