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Chapter 1

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Processing cycle of a stored program computer

 The processing cycle is the series of steps involved with the execution of a single
instruction
 The processing required for a single instruction is called an instruction cycle
 In its simplest form , instruction processing consists of two steps
o The processor reads (fetches) instructions from memory one at a time and
executes each instruction
 Program execution consists of repeating the process of instruction fetch and
instruction execution
 The instruction execution may involve several operations and depends on the nature
of the instruction
 Program execution halts only if the machine is turned off, some sort of unrecoverable
error occurs, or a program instruction that halts the computer is encountered.

 In general processor has to do following thing to execute an instruction


o Instruction address calculation :
 Determine the address of the next instruction to be executed. Usually,
this involves adding a number to the address of the previous instruction
 In a typical processor, a register called the program counter (PC) holds
the address of the instruction to be fetched next.
 Unless told otherwise, the processor always increments the PC after
each instruction fetch so that it will fetch the next instruction in
sequence
o Instruction fetch : Read instruction from its memory location into the processor
 At the beginning of each instruction cycle, the processor fetches an
instruction from memory.
o Instruction operation decoding: Decode instruction to determine type of
operation to be performed and operand(s) to be used.
 The fetched instruction is loaded into a register in the processor known
as the instruction register (IR). The instruction contains bits that specify
the action the processor is to take. The processor interprets the
instruction and performs the required action.
o Operand address calculation : If the operation involves reference to an
operand in memory or available via I/O, then determine the address of the
operand
o Operand fetch: Fetch the operand from memory or read it in from I/O.
o Data operation: Perform the operation indicated in the instruction.
o Operand store : Write the result into memory or out to I/O
 *Note that not all instructions have all above phases
Micro-operation

 Each instruction that is executed during an instruction cycle made up of shorter sub
cycles (e.g., fetch, indirect, execute, and interrupt).
 The execution of each sub cycle involves one or more shorter operations, each of
which involves the processor registers. These operations are known as micro-
operation.
 A micro-operation is an elementary operation performed with the data stored in one or
more processor registers.

 Hence events of any instruction cycle can be described as a sequence of micro-


operations

Control unit

The control unit receives the instruction from memory and interprets the operation code bits. It
then issues a sequence of control signals to initiate micro-operations in internal computer
registers. For every operation code, the control unit issues a sequence of micro-operations
needed for the hardware implementation of the specified operation.

 The control unit performs two basic tasks:


o Sequencing: The control unit causes the processor to step through a series of
micro- operations in the proper sequence, based on the program being executed.
o Execution: The control unit causes each micro-operation to be performed
 Types of control unit :
o Hardwired control unit
o Microprogramed control unit
Hardwired Control unit
 When the control signals are generated by hardware using conventional logic design
technique, the control unit is said to be hardwired.
 This control unit is essentially a combinatorial circuit
 Its input logic signals are transformed into a set of output logic signals, which are the
control signals.
 To design this control unit we have to derive Boolean expression for each control
signal as a function of its input.
 In a modern complex processor, the number of Boolean equations needed to define the
control unit is very large. The task of implementing a combinatorial circuit that satisfies
all of these equations becomes extremely difficult.
 To implement a hardwired control unit as an interconnection of basic logic elements is
not easy task.
 The design must include logic for
o sequencing through micro-operations
o executing micro-operations
o Interpreting opcodes, and for making decisions based on ALU flags.
 It is difficult to design and test such a piece of hardware. Furthermore, the design is
relatively inflexible. For example, it is difficult to change the design if one wishes to
add a new machine instruction.
 The solution is to implement a microprogrammed control unit.
 Features of hardwired control unit
o It has fixed instructions
o High speed
o Expensive
o Complex
o No flexibility of adding new instructions
o RISC processor uses hardwired control unit
Microprogramed control unit

 The control unit generates control signals that specifies one or more micro-operations.
 The control unit initiates a series of sequential steps of micro-operations.
 During any given time, certain micro-operations are to be initiated, while other remains
idle.
 The control variables at any given time that represents one or more micro-operations is
a string of 1’s and 0’s called control word.
 A control unit whose binary control variables are stored in memory is called a
microprogrammed control unit.
 Each word in control memory contains within it a microinstruction.
 The microinstruction specifies one or more micro-operations for the system.
 The microinstruction specify various internal control signals for the execution of micro
operations.
 To execute microinstruction, turn on all the control lines indicated by a 1 bit; leave off
all control lines indicated by a 0 bit. The resulting control signals will cause one or more
micro-operations to be performed.
 A sequence of microinstructions constitutes a microprogram.

 Control memory address register specifies the address of the microinstruction and the
control data register holds the microinstruction read from the control memory.
 The microinstruction contains a control word that specifies one or more micro-
operations. Once these operations are executed, the control must determine the next
address of microinstruction.
 The location of the next microinstruction may be the one next in sequence, or it may be
located somewhere else in the control memory.
 For this reason it is necessary to use some bits of present microinstruction to control
the generation of the address of next microinstruction.
 The next address may also be the function of external input conditions.
 While the micro-operations are being executed, the next address is computed in the next
address generator circuit and then transferred into the control address register to read
the next microinstruction.
 Features of microprogrammed control unit
o Simplifies design of control unit
o Cheaper
o Less prone to error
o Slower than hardwired control unit
o CISC processor uses microprogrammed control unit
Register transfer language (RTL)

 A register transfer language is a system for expressing in symbolic form the micro-
operation sequences among the registers of a digital module.

Memory address register (MAR): Is connected to the address lines of the system bus. It
specifies the address in memory for a read or write operation.
Memory buffer register (MBR): Is connected to the data lines of the system bus. It contains
the value to be stored in memory or the last value read from memory.
Program counter (PC): Holds the address of the next instruction to be fetched.
Instruction register (IR): Holds the last instruction fetched.

Op code fetch sequence


 Address of next instruction is in PC

 Move that address to the memory address register (MAR) because this is the only
register connected to the address lines of the system bus.

 The desired address (in the MAR) is placed on the address bus
 Control unit issues READ command
 Result (data from memory) appears on data bus
 Data from data bus copied into MBR
 PC incremented by 1
 Data (instruction) moved from MBR to IR
Example: Fetch and execute cycle of MOV Rd,Rs in terms of RTL

Example : MVI R, 8 bit data

Example : MOV R,M


Example : MVI M, 8 bit data

Example: LXI Rp, 16 bit data


Eample: LDA 16 bit data

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