A

1. An attribute of the common source amplifier is:

b. Suitable for current amplifiers or transimpedance amplifiers

B
10. Breakdown in the NMOS transistor limits the maximum value of:

d. Drain-source voltage

C
8. Channel potential in the NMOS transistor near the drain end can lead to high fields causing:

a. Voltage saturation

H
4. How are electrons and holes generated by photons in semiconductors?

c. Electrons and holes are both generated by photons

7. How can one find an expression for R in doped semiconductors?

a. Use the Shockley Equations

9. How can the open circuit voltage gain be enhanced in a Common Source Amplifier with source degeneration?

b. Increasing the source resistance

4. How is the scaling down of dimensions and potentials achieved in FETs?

a. Scaling up the dimensions by "λ" and potentials by "κ"

3. How is the potential drop distributed in a biased NMOS capacitor in the flatband condition?
 a. Entirely across the oxide

6. How is the small signal capacitance defined for a MOS capacitor?

b. Change in voltage over change in charge

2. How is the short circuit output current gain calculated for a Current Amplifier?

d. By shorting the output resistance and applying a test current source at the input

6. How is the output resistance of a Common Source Amplifier calculated considering source degeneration?

b. Including the source resistance and removing the load resistance at the output

2. How is the short circuit output current gain calculated for a Current Amplifier?

d. By shorting the output resistance and applying a test current source at the input

6. How does the inversion charge in an NMOS capacitor change with a positive gate-to-bulk voltage
(V_CB)?

b. Decreases

4. How does the depletion region change when VCB is less than 0 for a PMOS capacitor?

a. Expands

9. How does the inversion layer charge change when VCB is not zero for NMOS capacitors?

b. Increases

9. How can the open circuit voltage gain be enhanced in a Common Source Amplifier with source degeneration?

d. Including source degeneration resistance to increase the overall resistance

I
2. In a Silicon crystal lattice, how many Silicon atoms surround each Silicon atom?

b. 4

3. In P-doped semiconductors, what is the role of electrons?

b. Minority carriers

10. In Gauss’s Law and Electrostatics, what is the value for Farads/m in Silicon?
 b. 10

3. In the NPN BJT basic operation, what biases the base-collector junction?

d. None of the above

8. In what regime of operation is the base-emitter junction forward biased and the base-collector junction forward
biased in an NPN BJT?

c. Saturation

2. In the context of PNP Bipolar Junction Transistors, what does a forward active operation involve?

a. Both base-collector and base-emitter junctions are forward biased

7. In a PNP BJT circuit, what can happen if the base-collector junction becomes forward biased?

a. Increased collector current

5. In which condition is the inversion layer charge density on the semiconductor surface the largest?

b. Depletion

1. In the NMOS transistor, the inversion layer charge is maximum near the:

b. Source end

5. In the NMOS transistor, potential drop near the drain end leads to:

a. Breakdown

2. In a PMOS transistor, the inversion charge is maximum at which end?

c. Source end

4. In the NFET Voltage Amplifier and Inverter, what does a high input voltage produce in terms of output
voltage?

a . A low output voltage

9. In the NFET Small Signal Model, what is the function of the Gate-Source capacitance?

c. Input impedance

4. In the context of Two-Port Amplifier Models, what makes a network unilateral?

d. Input and output resistances vary independently

9. In the NFET Small Signal Model, what is the function of the Gate-Source capacitance?

d. Coupling signal
3. In order to keep the source and drain PN-junctions with the substrate reverse biased at all times:

d. The N-substrate or N-well (for PFETs) is tied to the most positive voltage in the circuit

S
8. Shockley’s equations are related to:

a. Electron and hole current density

T
1. The basic set of equations governing the behavior of electrons and holes in semiconductors is described by:

d. Rate = G – R

9. The net charge density in semiconductor materials will create:

a. Excess electric fields

4. The small signal capacitance of an NMOS capacitor is defined as:

c. The charge density on the gate

7. The depletion region charge in an NMOS capacitor is dependent on:

a. Gate-to-bulk voltage (V_CB)

9. The surface potential in an NMOS capacitor can be changed by:

a. Gate voltage

2. The backgate effect in the NMOS transistor depends on the applied potential difference between:

a. Source and bulk

4. The current saturates in the NMOS transistor when:

b. Drain-source voltage exceeds threshold

6. The NMOS transistor threshold voltage is affected by the:

d. Inversion layer charge

7. The body effect in the NMOS transistor can be eliminated by:

 b. Shorting the bulk to the source

5. The drift velocity vs field curve for most materials is not linear due to what phenomenon?

d. Velocity saturation

5. The input resistance of the common gate amplifier can be small if:

c. The gate-source capacitance dominates

6. The open circuit voltage gain of the common gate amplifier can be:

a. Greater than unity

7. The output resistance of the common gate amplifier heavily depends on:

b. The bulk resistance

8. The common drain amplifiers are useful when:

c. Large input resistances and small output resistances are desired

9. The input resistance of the common drain amplifier is:

a. Infinite

10. The output resistance of the common drain amplifier can be small if:

a. The bulk resistance is low

WWhat
5. What do we call the quantity that describes how much current flows when an electric field is applied in a
semiconductor?

b. Drift current density

2. What does Moore's Law state about the number of transistors in a dense integrated circuit?

c. It doubles approximately every two years

5. What does thermal energy do to covalent bonds in a semiconductor?

c. Breaks bonds
9. What does the output conductance of a BJT depend on?

b. Collector current

5. What does Drain Induced Barrier Lowering (DIBL) refer to in short FETs?

b. Reduction of the potential barrier for electrons

9. What does the pinch-off condition in the NMOS transistor signify?

d. The channel is almost depleted of mobile carriers

1. What does the operation of the PMOS transistor best align with under the "gradual channel approximation"?

b. Horizontal direction electrostatics

1. What are the outermost electrons of a Silicon atom called?

a. Valence electrons

1. What are the two types of mobile charges in semiconductors?

d. Electrons and holes

8. What are the two material constants related to carrier transport as introduced by Einstein?

b. Mobility and diffusivity

6. What are the different regimes of operation for PNP Bipolar Junction Transistors?

b. Saturation, cutoff, and active

1. What are the fundamental set of equations governing the behavior of NMOS capacitors?

a. Accumulation, Flatband, Depletion, and Inversion Regimes

2. What are the assumptions made for a PMOS Capacitor in Equilibrium?

a. The potential in the metal gate is fixed

8. What are the different regimes for a PMOS Capacitor?

c. Accumulation, Depletion, Inversion

2. What are the typical metal contacts used in a NMOS transistor?

d. Silicide
3. What is the energy required to break a covalent bond in Silicon called?

c. Valence energy

4. What is the charge of a hole in a semiconductor?

b. Positive

6. What is the notation used for electron density in Semiconductor Physics?

b a. n

7. What is the energy unit typically used to measure thermal energy?

d. Kelvins

8. What is the condition called when the rate of electron-hole generation equals the rate of recombination?

c. Generation-recombination equilibrium

9. What is the purpose of doping in semiconductors?

c. Control electronic properties

2. What is the mean free path for electrons in pure Silicon as mentioned in the lecture?

c. 1 μm

3. What is the constant called that represents the hole mobility in pure Silicon?

c. Hole mobility

7. What is the mechanism by which current flows in semiconductors due to non-uniform carrier densities?

a. Diffusion

10. What is the potential of P-doped semiconductors denoted by in relation to the doping density terms?

a. Φa

9. What is the constant potential value used as a reference in semiconductors?

a. Zero

2. What is the Golden Rule of Thumb when trying to understand semiconductor devices?

a. Always focus on the majority carriers

6. What is the solution for excess minority carriers in semiconductor recombination out of thermal
equilibrium?

a. Decays exponentially to zero

7. What is the simplified model for a BJT in forward active operation with an ideal diode and current-
controlled current source?

a. Ebers-Moll model

3. What is the Ebers-Moll model used for in PNP Bipolar Junction Transistors (BJTs)?

c. Describing the behavior in forward active operation

8. What is a critical lesson provided regarding the operation of a PNP BJT in a simple amplifier circuit?

d. Avoiding forward biasing the base-collector junction

2. What is a consequence of power dissipation going as V_DD^2 in a digital chip?

b. The performance of smaller FETs cannot be traded-off

c. Smaller FETs consume less power

6. What is one advantage of the Double-Gate FET in mitigating short channel effects?

c. Minimizing the value of the length parameter

8. What is a feature of the Multiple-Fin FinFET compared to the Single-Fin FinFET?

a. Smaller footprint

b. Reduced current drive

9. What is a characteristic of CMOS Analog Circuits aiming to operate in the Terahertz range (100-1000
GHz)?

a. Fast switching speeds

10. What is a significant achievement of Prof. Afshari's group at Cornell regarding CMOS RF imaging chips?

d. Making CMOS Analog Circuits go Terahertz (100-1000 GHz)

1. What is the fundamental set of equations governing the behavior of PMOS capacitors?

d. Equations specific to PMOS capacitors

5. What is the effect on the inversion charge and depletion region when VCB is greater than 0 for a PMOS
capacitor?

a. Inversion charge decreases, depletion region expands

1. What is the main topic of the lecture "MOSFET Characteristics and Small Signal Circuit Models"?

b. Operation of MOS transistor

8. What is the purpose of the N-well in the Standard CMOS Process?

a. Isolating P channel

10. What is the primary role of a PFET in a common-source voltage amplifier?

a. Amplify voltage

1. What is essential for the requirements of a Common Source (CS) amplifier?

b. Large input resistance and small output resistance

3. What is crucial for determining the input resistance of a Transimpedance Amplifier?

d. Placing the load resistance that the circuit will drive at the output

8. What is significant when determining the transconductance gain of a CS Amplifier?

a. Using a test current source at the input and measuring the resulting voltage

10. What is the key factor when calculating the transconductance gain of a CS Amplifier with source degeneration?

a. Applying a test voltage source at the input and input current at the output

c. Blending the transconductance gain with source degeneration resistance

2. What is a characteristic of common gate amplifiers?

a. The gate terminal is "common" between the input and the output

8. What is the purpose of the N-well in the Standard CMOS Process?

a. Isolating P channel

10. What is the primary role of a PFET in a common-source voltage amplifier?

a. Amplify voltage

1. What is essential for the requirements of a Common Source (CS) amplifier?

b. Large input resistance and small output resistance

3. What is crucial for determining the input resistance of a Transimpedance Amplifier?

b. Applying a test voltage source and measuring the resulting current at the input

8. What is significant when determining the transconductance gain of a CS Amplifier?

 a. Using a test current source at the input and measuring the resulting voltage

10. What is the key factor when calculating the transconductance gain of a CS Amplifier with source degeneration?

a. Applying a test voltage source at the input and input current at the output

2. What is a characteristic of common gate amplifiers?

a. The gate terminal is "common" between the input and the output

4. What is the short circuit current gain of the common gate amplifier?

b. 1.0

4. What happens to carrier mobility with more doping (n-type or p-type) in a semiconductor?

c. Decreases

4. What happens in the emitter region of a PNP BJT during operation?

c. Electrons are injected into the base region

8. What happens to the inversion layer charge when the gate voltage increases above the threshold
voltage?

a. Becomes zero

3. What happens to the inversion layer charge when there's a change in VCB (Channel Contact Bias)?

a. It remains constant

3. What happens when the FET is in the cut-off regime in a NFET Voltage Amplifier and Inverter circuit?

b. The FET is turned off

6. What happens when the output voltage becomes too small in a PFET CS Voltage Amplifier?

b. FET goes into cut-off

6. What defines the current gain of a BJT in forward active operation?

b. The ratio of collector and emitter currents

10. What limits the output voltage swing in BJT amplifiers?

c. Saturation region
10. What should be done to prevent a PNP BJT from entering the cutoff region?

a. Reducing the base current

3. What new physics emerges at nano-scales enabling the design of better FETs?

b. Quantum transport

7. What determines the flatband voltage in a PMOS capacitor?

d. Surface potential

10. What principle relates the dielectric constants and electric field components across the interface of two
media?

d. Interface Charge Density Law

3. What assumption helps simplify the operation of the MOS transistor in the horizontal and vertical
directions?

c. The gradual channel approximation

3. What condition is met when the current saturates in a PMOS transistor?

a. V_DS < V_GS

4. What effect can decrease the current in a PMOS transistor at high fields?

b. Velocity saturation

6. What limits the maximum value of V_DS in a PMOS transistor during breakdown?

c. Drain-source voltage

5. What region of operation provides a large slope in the NFET Voltage Amplifier and Inverter?

c. Linear region

7. What relation holds true for all small signal amplifier models?

a. Transconductance x Output resistance = Open circuit voltage gain

When
5. When turning off light in a semiconductor where electrons and holes were previously generated, how
does thermal equilibrium get restored?

a. Excess carriers decay exponentially

Which
10. Which elements can act as electron donors in Silicon?

c. Group V

6. Which equation relates the ratio of resistivity to conductivity in semiconductors?

a. Ohm's Law

c. Einstein's Relation

5. Which operation puts the NPN transistor in the forward active operation?

d. Forward bias

5. Which parameter defines the current gain of a BJT in forward active operation?

d. Beta (β) factor

9. Which part of a PNP BJT indicates the metal emitter and collector contacts?

c. P+ region

7. Which technology is described as the choice for sub-30 nm FETs due to better control over short channel
effects?

b. Fin-FET

c. Multiple-Fin FinFET

2. Which region is created in the substrate near the oxide interface in an NMOS capacitor in equilibrium?

b. Inversion Region

10. Which region in an NMOS capacitor experiences the entire potential drop when the gate voltage is above
the flatband voltage?

a. Accumulation

7. Which capacitance is associated with the drain and bulk PN junction in a NFET?

d. Drain-bulk capacitance

5. Which approach is used to find the open circuit voltage gain of a Common Source Amplifier?

b. Removing the load resistance at the output and applying a test voltage source at the input
7. Which capacitance is associated with the drain and bulk PN junction in a NFET?

d. Drain-bulk capacitance

Why
1. Why are smaller FETs (shorter channel lengths) faster in both analog and digital applications?

b. They have smaller rise and fall times