Design and Implementation of OFDM (Orthogonal Frequency Division Multiplexing) Using VHDL and FPGA

International Journal of Engineering and Advanced Technology (IJEAT)
ISSN: 2249 – 8958, Volume-1, Issue-6, August 2012
Design and Implementation of OFDM

(Orthogonal Frequency Division Multiplexing)
using VHDL and FPGA
Manjunath Lakkannavar, Ashwini Desai
 main problem using this method is inflexibility of design

Abstract— Orthogonal Frequency Division Multiplexing process involved and the longer time to market period for the
(OFDM) is a multi carrier modulation technique which divides the designed chip. Another method that can be used to implement
available spectrum into many carriers. OFDM uses the spectrum OFDM is general purpose Microprocessor or Micro
efficiently compared to FDMA by spacing the channels much Controller. Power PC 7400 and DSP Processor is an example
closer together and making all carriers orthogonal to one another of microprocessor that is capable to implement fast vector
to prevent interference between the closely spaced carriers. OFDM
provides high bandwidth efficiency because the carriers are
operations. This processor is highly programmable and
orthogonal to each others and multiple carriers share the data flexible in terms of changing the OFDM design into the
among themselves. The main advantage of this transmission system. The disadvantages of using this hardware are: it needs
technique is their robustness to channel fading in wireless memory and other peripheral chips to support the operation.
communication environment. The main objective of this project is Besides that, it uses the most power usage and memory space,
to design and implement a base band OFDM transmitter and and would be the slowest in terms of time to produce the
receiver using FPGA. This project focuses on the core processing output compared to other hardware.
block of an OFDM system, which are the Fast Fourier Transform Field-Programmable Gate Array (FPGA) is an example of
(FFT) block and the Inverse Fast Fourier Transform (IFFT). The
work also includes in designing a mapping module, serial to
VLSI circuit which consists of a “sea of NAND gates”. This
parallel and parallel to serial converter module. The 8 points IFFT hardware is programmable and the designer has full control
/ FFT decimation-in-frequency (DIF) with radix-2 algorithm is over the actual design implementation without the need (and
analyzed in detail to produce a solution that is suitable for FPGA delay) for any physical IC fabrication facility. An FPGA
implementation. The FPGA implementation of the project is combines the speed, power, and density attributes of an ASIC
performed using Very High Speed Integrated Circuit (VHSIC) with the programmability of a general purpose processor
Hardware Descriptive Language (VHDL). This performance of will give advantages to the OFDM system. An FPGA could
the coding is analyzed from the result of timing simulation using
be reprogrammed for new functions by a base station to meet
Xilinx.
future needs particularly when new design is going to
Index Terms— FFT, FPGA, IFFT, OFDM, VHDL fabricate into chip. This will be the best choice for OFDM
implementation since it gives flexibility to the program
I. INTRODUCTION design besides the low cost hardware component compared to
With the rapid growth of digital communication [5] in others.
recent years, the need for high-speed data transmission has
been increased. The mobile telecommunications industry II. METHODOLOGY
faces the problem of providing the technology that is able to The aim is to design an OFDM transmitter and receiver
support a variety of services ranging from voice using FPGA [3]. The OFDM signal is generated by
communication with a bit rate of a few kbps to wireless implementing the Inverse Fast Fourier Transform (IFFT)
multimedia in which bit rate up to 2 Mbps. Many systems function at the transmitter. At the receiver end, the Fast
have been proposed and OFDM system has gained much Fourier Transform (FFT) is implemented.
attention for different reasons. Although OFDM was first The objective is to use High-Speed-Integrated-Circuit
developed in the 1960s, only in recent years, it has been (VHSIC) Hardware Description Language (VHDL) to
recognized as an outstanding method for high-speed cellular produce VHDL codes that carry out FFT and IFFT function.
data communication where its implementation relies on very Figure 1 and 2 shows a detailed OFDM transmitter and
high-speed digital signal processing. This method has only receiver communications system. In this project, the main
recently become available with reasonable prices versus focus is in the FFT and IFFT part of the OFDM system [4].
performance of hardware implementation.
Since OFDM is carried out in the digital domain, there are
several methods to implement the system. One of the methods
to implement the system is using ASIC (Application Specific
Integrated Circuit). ASICs are the fastest, smallest, and
lowest power way to implement OFDM into hardware. The
Manuscript received on August 2012.

Manjunath Lakkannavar, Electronics and Communication
Engineering, Visvesvaraya Technological University/ VTU Extension Figure 1: OFDM Transmitter
Centre, UTL Technologies Limited, Bangalore, India, The input symbols are input into the transmitter in series at
Ashwini Desai, Electronics and Communication Engineering, R symbols/second. These symbols pass through a serial to
Visvesvaraya Technological University / KLESCET, Belgaum, India,
211
Design and Implementation of OFDM (Orthogonal Frequency Division Multiplexing) using VHDL and FPGA
parallel converter and output data on M lines in parallel. The III. RESULTS
data rate on every M line is R/M symbols/second. A symbol in
this parallel stream of data is denoted as Xi, k. The index i refer A. Simulation Result of Transmitter.
to which sub channel the symbol belongs to, and i ranges from
1 to M. The k denotes the k-th collection of M symbols. The
sub symbol collection from X1,k to XM, k makes up an
OFDM symbol.
The M symbols are sent to an Inverse Fast Fourier
Transform (IFFT) block that performs N-point IFFT
operation. The IFFT transform a spectrum (amplitude and
phase of each component) into a time domain signal. An IFFT
converts a number of complex data points, of length that is
power of 2, into the same number of points in time domain.
Each data point in frequency spectrum used for an FFT or
IFFT operation is called a bin. The output is N time-domain
samples.
In order to preserve the sub-carrier orthogonality and the Figure 3: Simulation result of Transmitter.
independence of subsequent OFDM symbols, a cyclic guard
B. Simulation Result of Receiver
interval is introduced. Time and frequency synchronization
can be established by means of cyclic extension in the prefix
and the postfix period.
In this case, assumed a cyclic prefix of length Lp samples is
pre-pended to the N samples to form a cyclically extended
OFDM symbol. The cyclic prefix is simply the last Lp samples
of the N inverse Fast Fourier Transform output samples.
For example, assumed N=4 and Lp=2. If the outputs of a 4
point inverse Fourier transform is [1 2 3 4]. The cyclic prefix
will be [3 4]. The cyclically extended symbol would be [3 4 1 2
3 4]. Therefore, the length of the transmitted OFDM symbol is
N+ Lp.
Pre-pending the cyclic prefix aids in removing the effects of
the channel at the receiver. ISI can occur when multi path Figure 4: Simulation result of Receiver.
channel cause delayed version of previous OFDM symbol to
corrupt the current received symbol. If the value of Lp is VI. CONCLUSION
greater than or equal to the size of the transmission channel,
The objective is the implementing the core processing
the ISI will only affect the cyclic prefix.
blocks of an Orthogonal Frequency Division Multiplexing
The actual OFDM symbol will arrive unchanged. The cyclic
(OFDM) system, namely the Fast Fourier Transform (FFT)
prefix makes the OFDM symbol appear periodic over the band
and Inverse Fast Fourier Transform (IFFT).
of interest. The cyclically extended symbols are passed
The Fast Fourier Transform (FFT) and Inverse Fast Fourier
through a parallel-to-serial converter. They are transmitted in
Transform (FFT) have been chosen to implement the design
series across the channel response of the OFDM symbol with
instead of the Discrete Fourier Transform and Inverse
the frequency response of the channel.
Discrete Fourier Transform because they offer better speed
with less computational time. These methods requires the odd
and even samples inputs are process separately before they are
combine to give the final output. The result of the
computation is in integer bits which might comprises of real
and imaginary components. The decimal value of the output
if greater than 0.5 is approximated to 1 and vice versa.
The design implementation i s done using VHDL coding.
Direct mathematical metho d is adopted because it is an
efficient and optimized method instead of the structural
implementation which is based on butterfly operation.
Figure 2: OFDM Receiver
The received symbol is in time domain and it is VII. ACKNOWLEDGMENT
distorted due to the effect of the channel. The received The authors would like thank the support of Department of
signal goes through a serial to parallel converter and Electronics and Communication Engineering, KLECET,
cyclic prefix removal. Belgaum, Karnataka and UTL Technologies Limited,
After the cyclic prefix removal, the signals are passed Bangalore, Karnataka.
through an N-point fast Fourier transform to convert the
signal to frequency domain. The output of the FFT is
formed from the first M samples of the output.
212
International Journal of Engineering and Advanced Technology (IJEAT)
ISSN: 2249 – 8958, Volume-1, Issue-6, August 2012
REFERENCES
[1]. “Orthogonal Frequency Division Multiplexing (OFDM) Explained”,
Magis Networks, Inc., February 8, 2001, www.magisnetworks.com.
[2]. “An Introduction to OFDM”, International Engineering Consortium
(IEC), http://www.iec.org/online/tutorial/ofdm/topic04.html.
[3]. Design of an OFDM Transmitter and Receiver using FPGA, Loo Kah
Cheng, UTM, 2004.
[4]. Implementation of 8 point IFFT and FFT for OFDM System, Nor
Hafizah Bt Abdul Satar, UTM, 2004.
[5]. “Advantages of OFDM”
http//pic.qcslink.com/introPLC/AdvOFDM.htm.
[6]. Communication Systems, Simon Haykin, 4th Edition, Wiley 2000.
Manjunath Lakkannavar was born in Dharwad, Karnataka in 1986. He

received the B.E. degree in Electronics and Communication Engineering
from SDMCET, Dharwad, Karnataka in 2008, and M.Tech degree in VLSI
Design and Embedded Systems from KLECET, Belgaum, Karnataka in
2010. In 2010, he joined UTL Technologies Limited as Associate
Consultant-VLSI department. His research interests are, Image Processing,
Digital Communications, etc. He became a Guest of Honor and Session
Chair for International Conference, 2012.
Ashwini Desai born in Karnataka. She received B.E. in Electronics and

Communication Engineering and M.Tech in VLSI Design and Embedded
Systems. Her research work is Algorithm for Physical Design of VLSI
Systems. She is working as a Professor in Electronics and Communication
Engineering Department in KLECET, Belgaum with an experience of 17
years. She is perusing PhD.
213

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International Journal of Engineering and Advanced Technology (IJEAT)

ISSN: 2249 – 8958, Volume-1, Issue-6, August 2012

Design and Implementation of OFDM

 main problem using this method is inflexibility of design

Manuscript received on August 2012.

Manjunath Lakkannavar was born in Dharwad, Karnataka in 1986. He

Ashwini Desai born in Karnataka. She received B.E. in Electronics and

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