Lab 9 Binary and Decimal Counters

IC: 7493(counter), 74161(counter), 7400 (NAND), 7447(decoder), 7-segment-display and 7 resistors for the
display.

For each experiment, when the circuit is working, have the lab instructor check it.

The IC type 7493 is such a ripple counter with the diagram shown below. The 4 JKFF can be connected
to count in binary or in BCD. The 7493 IC can be operate as a 3-bit counter using input B and flip-flops
QB, QC and QD. It can operate as a 4-bit counter using input A if output QA is connected to input B.
Therefore, to operate the circuit as a 4-bit counter, it is necessary to have an external connection
between pin 12 and pin 1. The reset inputs, R1 and R2 must be grounded. The clock must be applied to
input A at pin 14. The 4 flip-flop outputs for the counter are taken from QA, QB, QC and QD
respectively, with QA being the least significant bit.
1. Binary counter: Connect the IC to operate as a 4-bit binary counter by wiring the external terminals below.
This is done by connect a wire from pin 12 (output QA) to pin 1 (input B). Input A at pin 14 is connected a
clock. The two reset inputs, R1 and R2, are connected to ground. (1) Verify the count goes from 0000 to
1111. (2) Disconnect the input of the counter at pin 14 from the pushbutton, and connect it to a clock
generator that produces a train of pulses at a low frequency of about 1 pulse per second. This will provide an
automatic binary count.
2. BCD counter: The BCD representation using the binary number from 0000 to 1001 to represent the coded
decimal digits from 0 to 9. IC type 7493 can be operated as a BCD counter by making the external
connections shown below. Outputs QB and QD are connected to the two reset inputs, R1 and R2.When
both R1 and R2 equal to 1, all four cells in the counter clear to 0 irrespective of the input clock. The
counter starts from 0, and every input pulse increments it by 1 until it reaches the count of 1001. The next
pulse changes the output to 1010, making QB and QD equal to 1. This momentary output cannot be
sustained, because the 4 cells immediately clear to 0, with the result that the output goes to 0000. Thus the
pulse after the count of 1001 changes the output to 0000, producing a BCD count. (1) Connect the IC to
operate as a BCD counter, and also connect the outputs of the counter to a 7447 decoder and seven segment
display. Connect the clock input to a push button and verify that the count goes from 0000 to 1001. (2)
Disconnect the clock input from the push button and connect it to a clock generator. Observe the counts.
(Keep the circuit for the next experiment)

3.Other Counters: IC type 7493 can be connected to count from 0 to a variety of final counts. This is
done by connecting one or two outputs to the reset inputs, R1 and R2. Thus, if R1 is connected to QA
instead of QB in Experiment 2, the resulting count will be from 0000 to 1000, which is 1 less than 1001
(QD=1 and QA=1). Utilizing your knowledge of how R1 and R2 affect the final count, connect the 7493
IC to count from 0000 to the following final counts:
(a) 0101 (b) 0111 (c) 1011.
Draw the diagram for each counter below, connect each circuit and verify its count sequence by
applying clocks from the push button and observing the output count in the indicator lamps. If the initial
count starts with a value greater than the final count, keep applying input pulses until the output clears to
0.
4. Digital Clock: Counters with a MOD number larger than 16 can be created by cascading 7493 counters.
The MOD number is equal to the product of the individual MOD numbers. For example, a MOD 80 counter
can be implemented as shown in the following figure (general block diagram, all of the wiring is not
shown).

The following is a general block diagram for a digital clock. A 24-hour clock is to be designed using 6
counters. Implement the 24-hour clock in MultiSIM using 7493 ICs. Use six 7-segment displays (DCD-Hex
from Indicator menu) to display the time. Use a 5V, 1kHz output clock generator from the AC source menu
box.

1KHZ
4

For testing, it is quicker to run two identical MOD 60 counters from the same clock instead of waiting for the
seconds to trigger the minutes. Also run the MOD 24 directly from the clock to save time.

5. Binary counter with parallel load

IC type 74161 is a four-bit synchronous binary counter with parallel load and asynchronous clear. The pin
assignments to the inputs and outputs are shown in below. When the load signal is enabled, the four data
inputs are transferred into four internal flip-flops, QA through QD, with QD being the most significant bit.
There are two count-enable inputs called P and T. Both must be 1 for the counter to operate. The function
table is given below, with one exception: The load input in 74161 is enabled when equal to 0. To load the
input data, the clear input must be equal to 1 and the load input must be equal to 0. The two count inputs
have don’t care conditions and may be equal to either 1 or 0. The internal flip-flops trigger on the positive
transition of the clock pulse. The circuit functions are a counter when the load input is equal to 1 and both
count inputs P and T are equal to 1. If either P or T goes to 0, the output does not change. The carry out
output is equal to 1 when all four data outputs are equal to 1.
a. Perform an experiment to verify the operation of the 74161 IC according to the function table with the
data inputs set to 0101. The counter should count from 5 to 15.
b. Show how the 74161 IC, together with a two-input NAND gate, can be made to operate as a synchronous
BCD counter that counts from 0000 to 1001. Do not use the clear input. Use the NAND gate to detect the
count of 1001, which then causes all 0’s to be loaded into the counter.
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Review Questions: Answer the following questions after the lab is completed.

1. What is the maximum MOD # of a counter constructed with 6 flip-flops?

2. A 90 MHz clock signal is applied to a ripple counter. The output frequency of the final flip-flop is 4.5
MHz. How many flip-flops are used in this counter circuit?

3. The clock period of a ripple counter must be longer than the total propagation delays through all of the
flip-flops. For proper operation, the period / frequency should be:

Tmin = N x tpd where tpd is the propagation delay

If the propagation delay is 15ns for a J-K FF, what is the largest MOD counter that can be constructed to
ensure the counter will operate for frequencies > 12 MHz?

4. What is the largest MOD counter that can be implemented by cascading two 7493 components together?