MASTER IN SCIENCES AND TECHNOLOGY

ELECTRONIC EMBEDDED
SYSTEMS
COURSE OUTLINE 2022 - 2024

In partnership with
TABLE OF CONTENTS

A. Course Structure ........................................................................ 1

B. Programme Objectives......................................................... 3
C. Attendance Policy..................................................................... 3
D. Evaluation......................................................................................... 5
E. Fraud & Cheating........................................................................ 6
F. Awarding The Master’s Degree......................................... 6
G. Retaking Exams............................................................................ 7
H. Requirement For Academic Progress......................... 8
I. Courses & ECTS Credits........................................................... 11
J. Course Curriculum & Syllabus........................................... 15
K. Internship / Professional Thesis....................................... 37
L. The Study Board.......................................................................... 38
1

A COURSE STRUCTURE
The Master’s Programme comprises:
For students with a 4-year Bachelor’s Degree minimum and with a
specialisation in Electronics / Instrumentation / Automation / Electrical
Engineering -
◌ Semester 2 – Academic (on campus)
◌ Semester 3 – Academic (on campus)
◌ Semester 4 – Internship (company/laboratory)

For students with a 3-year Bachelor’s Degree OR a 4-year Bachelor’s

Degree in another engineering stream OR choosing to join the first
semester -
◌ Semester 1 – Academic (on campus)
◌ Semester 2 – Academic (on campus)
◌ Semester 3 – Academic (on campus)
◌ Semester 4 – Internship (company/laboratory)

The first three academic semesters* are offered between September

2022 and January 2024.

Lectures, tutorials, lab work, practical work, projects, conferences and /

or seminars make up the academic semesters. Evaluation, in the form
of tests, quizzes, exams, etc. is conducted on a regular basis. Faculty
members are from ESIGELEC and/or INSA Rouen, from partner
companies and from partner universities in France or abroad.

The final semester is devoted to industrial or research experience,

during which students must do a mandatory internship in a company
or laboratory for a period of 4 months (min.) to 6 months (max.). While
ESIGELEC and/or INSA Rouen provide assistance to find internships,
students are expected to play an active part, as internships are not
offered automatically.

* 2 academic semesters in the case of students granted direct entry into the second semester,
beginning February 2023
 2

The students have up to a maximum of two years, after the final

academic semester:
◌ to find and complete the internship,
◌ to submit a professional thesis and make an oral presentation
before a convened jury,
◌ and to clear all the ECTS credits of the Master’s Programme.

Failure to meet these requirements may result in the degree not being
awarded.

The Student Status

After completion of the academic semesters at ESIGELEC, students
have a maximum of two years to find and finish the internship, submit
the professional thesis, complete the oral presentation, and clear all the
ECTS credits of the Master’s Programme, failing which they will not be
awarded the degree from ESIGELEC and INSA Rouen, except in some
exceptional cases, approved both by ESIGELEC and INSA Rouen.
Students will retain the Registered Student status till the end of the
academic year 2023/2024.

Students who, at the end of the academic year 2023/2024 (likewise

for 2024/2025), have already started but have not yet: completed the
internship / submitted the professional thesis / completed the oral
presentation and have cleared all the ECTS credits of the academic
semesters will retain the Registered Student status for the academic
year 2024/2025 (likewise for 2025/2026), without having to pay the
applicable fees.

Students who, at the end of the academic year 2023/2024 (likewise

for 2024/2025), have not started the internship or obtained the
required ECTS credits for the academic semesters, must re-register
for the academic year 2024/2025 (likewise for 2025/2026), by paying
the applicable fees, failing which, they will be struck off the rolls of
ESIGELEC and will cease to be students of the school.
3

The validity of the Registered Student status will end automatically

and immediately after the student will be presented to the official jury
of ESIGELEC and INSA Rouen OR after a maximum duration of two
years after completion of the academic semesters, whichever is earlier,
except in some very specific cases approved both by ESIGELEC and
INSA Rouen.

B PROGRAMME OBJECTIVES
The Master’s Programme seeks to equip the students with the relevant
knowledge, professional skills and practical experience in electronic
embedded systems for industry or for research. They will learn how
to design, develop and implement electronic embedded systems in
different sectors. Students will also acquire basic managerial skills.

The international environment at ESIGELEC allows students to discover

new cultures and languages. Students must appear for the TCF / TEF
certification exams in French (or TOEIC for French speaking students).
The mandatory internship gives the students a hands-on experience
in the work environment. Our graduates find job opportunities as
developers, project managers, consultants or researchers in the field of
electronic embedded systems.

C ATTENDANCE POLICY
ESIGELEC views class attendance as the student’s individual
responsibility. Students are expected to comply with ESIGELEC’s
attendance policy throughout their study period. All lectures, tutorials,
practical work, projects, conferences and seminars are mandatory.
Attendance will be monitored by the faculty members at the beginning
of each class and the attendance sheet will be maintained by the
Studies Office of ESIGELEC.
 4

Late entry into class:

If a student is late by 10 or more minutes, he/she will be refused entry
into the classroom and the faculty member will make a note in the
attendance register. Such cases will be considered as unjustified
absence. If a student is late less than 10 minutes, he / she will be
accepted into the classroom and the faculty will make a note in the
attendance register.

3 late entries of less than 10 minutes will be considered as 1 case of

unjustified absence.

Absence from class:

A student who is absent for medical reasons must submit a medical
certificate within 3 working days, in order for the absence to be excused.
Leave letters in the case of other accepted anticipated absences
must be signed at least 3 days prior to the absence, by the Academic
Coordinator of the Master’s Programme, in order for the absence to be
excused. No other justifications of absence will be excused by ESIGELEC.

Penalty:
Students will receive an oral warning after 5 occurrences (unjustified
absence). A stern oral warning will be given after 10 instances. 20 such
cases may lead to the student’s dismissal from ESIGELEC.

Absence from examination:

Only students whose absence from an examination has been excused
will be allowed to re-take the examination.
Students whose absence from an examination has not been excused
will be marked 0/20 in the said examination and will not be authorized
to retake the examination.
5

D EVALUATION
Evaluation may include tests, quizzes, presentations or other formats
as decided by the faculty members, who may also authorise the use
of reference documents or calculators, if they deem it necessary. Each
such test will be graded on a maximum mark of 20.

Scores & ECTS credits (European Credit Transfer System)

◌ The Master’s Programme is divided into several weighted courses,
all of which include one or more weighted modules. Each course
represents a certain number of credits.
◌ The score of a module is the average of the weighted scores of
the different evaluation processes conducted within the same
module.
◌ The score of a course is the result of the weighted averages of all
modules of the course.
◌ The final overall score of the student is the result of the weighted
averages of all courses of the Master’s Programme.
◌ The total number of ECTS credits of the Master’s Programme is
equal to the total of all the ECTS credits of its courses.
◌ One ECTS credit corresponds to about 25 hours of course work
(lectures, tutorials, lab work, projects, practical work, evaluation,
individual work).
◌ Students who are granted entry directly to the second semester,
beginning February 2023, will automatically be awarded 30
ECTS credits, equivalent to the first semester of the Master’s
Programme.
◌ A statement of marks is sent to the students at the end of each
academic semester and also after they are evaluated by the Jury
of ESIGELEC and INSA Rouen.
 6

E FRAUD AND CHEATING

Students indulging in fraudulent practices / cheating during an exam
/ oral presentation / project / practical work / internship report will be
marked 0/20 for that piece of course work, evaluation exercise, report
or exam. Examples of plagiarism, fraud or cheating, include, but are
not limited to:

◌ Duplication of another student’s work during a written

assignment / exam.
◌ Use of a reference document or calculator not authorized by
the faculty member during an evaluation exercise.
◌ Plagiarism (>20%) of reports, presentations, or computing
programs, obtained by any means (book, magazine, other
students, electronic files, Internet, work previously submitted in
another course).

F AWARDING THE MASTER’S DEGREE

Each academic semester at ESIGELEC carries a total of 30 ECTS credits.
The internship, professional thesis and oral presentation also carry
a total of 30 ECTS credits. A student must obtain a minimum score
of 10/20 in a course to be awarded the allocated ECTS credits of the
course.

The Master’s Degree is awarded if the student has obtained a minimum

average score of 10/20 in each course, thereby obtaining the total
number of 120 credits.

The jury of ESIGELEC and INSA Rouen for the Master’s Degree comprises
the President, faculty members of ESIGELEC and/or INSA Rouen, and
representatives of the managing staff of ESIGELEC and/or INSA Rouen.
This jury, chosen by the General Director of ESIGELEC, convenes up
to a maximum of four times per year, i.e. April, July, September and
December.
7

The Master in Sciences and Technology - Electronic Embedded

Systems, awarded by ESIGELEC and INSA Rouen to students who
have successfully cleared all requirements, is accredited by the French
Ministry of Higher Education and Research.

G RETAKING EXAMS
If a student has obtained less than 10/20 in one or more courses in the
academic semesters at ESIGELEC, the student will be asked to retake
one or more exams in one or more modules of the courses concerned,
as advised by the Academic Coordinator of the Master’s Programme
(even if the final overall score of the student in the Master’s Programme
is greater than 10/20).

Retaken exams will be conducted by the Office of Graduate Student

Affairs:

◌ in July, for courses completed in semester 1,

◌ in August / September, for courses completed in semester 2,
◌ in February after completion of semester 3, for courses completed
in semester 3.

The score(s) obtained from exam(s) retaken replace the previous

score(s) obtained by the student in the module(s) concerned and a new
average score will be calculated for the course(s) concerned.

If the student does not retake an exam as advised by the Academic

Coordinator, the student will be marked 0/20 for the module.

The new average(s) of the course(s) must be greater than 10/20 to obtain
the requisite credits.
 8

H REQUIREMENT FOR ACADEMIC PROGRESS

UPON COMPLETION OF ACADEMIC YEAR 1 AND

RETAKEN EXAMS
◌ A student who obtains 60 ECTS credits will gain entry into
academic year 2.

◌ A student who obtains between 42 and 59 ECTS credits will be

allowed to continue with academic year 2, but will have to retake,
in academic year 2, all or some of the exams in all or some of
the modules of all the courses of academic year 1, for which the
student has not yet obtained the requisite credits, and as advised
by the Academic Coordinator of the Master’s Programme.

◌ A student who obtains between 18 and 41 ECTS credits will have

to redo academic year 1 (but only the courses for which the
requisite ECTS credits have not yet been obtained), the following
academic year. Failure to clear the 60 required ECTS credits of
academic year 1 after redoing academic year 1 may result the
entry into academic year 2 refused and the degree not being
awarded.

◌ A student who does not obtain a minimum of 18 ECTS credits will

be disqualified from the programme and will not be awarded
the degree.
9

UPON COMPLETION OF ACADEMIC YEAR 2 AND

RETAKEN EXAMS
◌ A student must obtain a total number of 120 ECTS credits for
academic years 1 & 2 to be awarded the Master’s Degree.

◌ A student who fails to clear all the ECTS credits for academic
year 1 before the end of academic year 2 will be required to redo
academic year 1 (but only the courses of academic year 1 for
which the requisite ECTS credits have not yet been obtained),
the following academic year, or will be disqualified from the
programme and will not be awarded the degree, if the student
would also be required to redo one or two semesters of academic
year 2 due to his/her scores obtained in academic year 2. Failure
to clear the 60 required ECTS credits after redoing academic
year 1 the following academic year, may result the degree not
being awarded.

◌ A student who obtains between 21 and 29 ECTS credits for

semester 3 will have to retake, during the following academic
year, all or some of the exams in all or some of the modules, of
all or some of the courses of semester 3, for which the student
has not yet obtained the requisite credits and as advised by
the Academic Coordinator of the Master’s Programme. If the
student fails to obtain the 30 ECTS credits of semester 3 during
the next academic year, he/she will be required to redo semester
3 (but only the courses for which the requisite ECTS credits of
semester 3 have not yet been obtained), the following academic
year, or will be disqualified from the programme and will not be
awarded the degree, if academic year 1 was already repeated.
Failure to obtain the 30 ECTS credits of semester 3 after redoing
semester 3 the following academic year, may result the degree
not being awarded.
 10

◌ A student who obtains between 10 and 20 ECTS credits for

semester 3 will be:
• Disqualified from the programme if academic year 1 was
already repeated or if academic year 1 will have to be
repeated,
OR
• Be required to redo semester 3 (but only the courses of
semester 3 for which the requisite ECTS credits have not yet
been obtained) the following academic year, if academic
year 1 was not already repeated and if academic year 1
will not have to be repeated. Failure to clear the 30 ECTS
credits of semester 3 after redoing semester 3 the following
academic year, may result the degree not being awarded.
◌ A student who obtains less than 10 ECTS credits in semester 3
will be disqualified from the Master’s programme and will not be
awarded the degree.
◌ If a student doesn’t obtain the 30 ECTS credits of semester
4 (Internship), the Academic Coordinator of the Master’s
Programme may:
• Instruct the student to submit a fresh professional thesis
and/or redo the oral presentation, within a maximum period
of 2 years, after the final academic semester,.
OR
• Instruct the student to redo a fresh internship, including
submission of a professional thesis and an oral presentation,
within a maximum period of 2 years, after the final academic
semester.
OR
• Deny the award of 30 ECTS, on the grounds of misconduct
during the internship.

A student can only redo courses of one academic year (academic year 1
or academic year 2), and can redo only once a course or the internship,
during the Master’s Programme.

In the event that the curriculum is revised and if some modules are
replaced by newer ones, students who are required to redo modules,
i.e. attend classes and appear for the exams, must do so for the new
modules.
 I COURSES & ECTS CREDITS

Duration ECTS
Courses Modules Weight
(hours) Credits

Semester 1: 30 Credits / 354 hours

Introduction to Object
Oriented Programming with 40 3
Java

Fundamentals of Data
Computer Science 1 8
Communication and 24 2
Networking

Fundamentals of Web-Centric
30 3
Development

Binary Logic & Digital

30 3
Functions
Digital Electronics 9
LabView 30 3

C Programming 30 3

Cross Cultural Awareness and

36 3
Working in a Team
Communication &
French as a Foreign Language 6
Language
OR
60 3
English as a Foreign
Language

Bibliographical Study 12 1

Specialized Courses
Digital Electronics Project 32 3 7
for EES

Fundamentals of Electronics 30 3

Total Credits 30
 Duration ECTS
Courses Modules Weight
(hours) Credits

Semester 2: 30 Credits / 392 hours

Microprocessors 60 4

VHDL & Logic

30 2
Digital Systems Synthesis 8

Communication
30 2
Busses

Embedded Real Time Operating

30 3
Operating Systems 6
Systems
Embedded Linux 30 3

Embedded C
30 2
programming
Embedded
Analysis & Design with 6
Software 32 2
UML

Embedded Java 30 2

Smart Sensors 30 3
Instrumentation 6
Specific
30 3
Instrumentation

French as a Foreign
Language
Communication
OR 60 4 4
& Language 2
English as a Foreign
Language

Total Credits 30
 Duration ECTS
Courses Modules Weight
(hours) Credits

Semester 3: 30 Credits / 330 hours

MtoM Communication 30 4

Embedded Python Programming

30 3 10
Communication & Image Treatments

Android Programming 30 3

System on Chip 20 2
Embedded
DSP Processors 20 2 6
Electronics
Safety Systems 20 2

Oral Communication
14 1
& Presentation Skills

Communication French as a Foreign

5
& Language 3 Language
OR 60 4
English as a Foreign
Language

Project Project Management 26 2

Development & 9
R&D Project 80 7
Management

Total Credits 30

Semester 4: Internship of 4 to 6 months

All modules are delivered face-to-face, on campus, with all required safety
measures. However, modules may be delivered partially or totally online and/or
through distance mode, in keeping with possible changes in the health crisis or
any other circumstances beyond our control and as advised by the relevant French
Government authorities.
15

J COURSE CURRICULUM & SYLLABUS

Introduction to Object-Oriented Programming with

JAVA
Module Code: MSTSI12 Duration: 40h
Objectives
At the end of this module students will be able to:
◌ Write, test and set up a Java programme and documentation
from a given situation
◌ Use vocabulary relating to OO languages within the framework
of Java
◌ Explain the design and set up for the life-cycle of a Java
programme / explain the design
◌ Process and working of a Java program (define bytecode and
explain the role of a JVM)
◌ Document code and create the Javadoc
◌ Respect Java writing code structures
◌ Use existing classes and packages
◌ Use basic Eclipse functions: editing, compiling, operating,
importing and debugging

List of topics
◌ Storing information, communicating information, making
choices, creating repetitions
◌ Initiation to Object-Oriented programming
◌ From algorithms to writing functions, classes and objects, UML
classes
◌ Collecting objects (a fixed amount and undetermined amount),
using UML
 16

Fundamentals of Data Communication & Networking

Module Code: MSTSI13 Duration: 24h
Objectives
At the end of this module students will be able to:
◌ Understand the very basic operation of communication networks
◌ Distinguish between different communication technologies
◌ Distinguish between different communication services
◌ Choose communication technologies and services appropriate
for given requirements
◌ Get a better understanding of the Internet communication
services they use in everyday life

List of topics
◌ Basics of information transmission
◌ Classical telecommunications services
◌ Integration of telecommunication services
◌ Principles of networking and protocols
◌ TCP/IP communication architecture
◌ LAN/WLAN technologies
◌ MobilityFundamentals of Web-centric Development

Fundamentals of Web-centric Development

Module Code: MSTSI14 Duration: 30h
Objectives
At the end of this module students will be able to explain:
◌ How the web relates to the Internet
◌ What HTTP is
◌ The notions of web server and web client
◌ The role of PHP, HTML,CSS, Javascript languages
◌ The major steps of a web project implementation
◌ The value of validation for web site security
17

The student will also be able to create a Web site which:

◌ Is dynamic
◌ Follows the separation of content and presentation principle
◌ Is in keeping with HTML5 and CSS standards
◌ Is secured against SQL injections and defacement attacks
◌ Is in project mode, using especially the Git version control
system

List of topics
◌ Introduction to the internet and World Wide Web
◌ HTML (Hypertext Markup Language)
◌ Editing and viewing HTML
◌ Headers, titles, meta-tags
◌ Special characters
◌ Lists
◌ Tables
◌ Basic forms
◌ Metatags
◌ Cascading Style Sheets
◌ Embedded Anchors, Images, Links, Objects
◌ Dynamic web pages with PHP
◌ Introduction to javascript

Binary Logic & Digital Functions

Module Code: MSTEE11 Duration: 30h
Objectives
At the end of this module, students will be able to: analyse and design
digital functions

List of topics
◌ Basic concepts of probability:
◌ Number representation
◌ Fundamentals of Boolean algebra
◌ Construction of elementary gates
 18

◌ Circuits developed from combinatory logic (comparator,

decoder and demultiplexer)
◌ Introduction to sequential logic and its basic components (D,
RS, RSH, and JK flip flop circuits)
◌ Registers and counters
◌ Designing and creating a sequential system

LabView
Module Code: MSTEE15 Duration: 30h
Objectives
◌ Design a program with LabVIEW for an electrocardiogram that
monitors real and “noisy” data. This program must:
◌ respect design standards
◌ use standard programming and signal processing tools seen in
the 2nd year
◌ The application must respect standard LabVIEW practices
(taken from the Certified LabVIEW Developer (CLD) test) and use
a modular and evolving architecture
List of topics
◌ Fundamental programming notions in LabVIEW
◌ LabVIEW programming
◌ Creating an interface
◌ Learning good LabVIEW practices for form and structure in
programming

C Programming
Module Code: MSTEE10 Duration: 30h
Objectives
At the end of this module, students will be able to write and develop a
programme in C language, using:
◌ Functions: definitions, interests, prototypes
◌ 1 & 2 D arrays: syntax, use, parameters
◌ String functions: manipulating chains of characters
◌ Pointers: syntax, manipulation, using them correctly
◌ Structures: syntax, manipulation, establishing parameters
◌ Binary and text files: manipulation and relation to structures
◌ Dynamic allocation
19

List of topics
◌ Algorithms, processors, fundamentals, environment and
variables
◌ Simplified architecture of a computer
◌ C Language: programming structure, declarations, control
structures (if, switch, while, do while, for), entries / exits (printf,
scanf, fflush role)
◌ Environment for development
◌ 1D arrays
◌ Review of general notions for arrays, functions, character chains,
structures, pointers, dynamic allocation, files

Cross Cultural Awareness and Working in a Team

Module Code: MSTCCAWT Duration: 36h
Objective
At the end of this module students will be able to:
◌ Recognise the different elements that make up culture
◌ Demonstrate the role culture plays on general and professional
communication and behaviour
◌ Suggest ways to begin respecting and reconciling the cultural
differences that make a difference
◌ Analyse the cultural elements inherent in different situations
◌ Evaluate the relative importance of different cultural elements
in different communication situations
◌ Apply different cultural orientations to correctly analyse
different situations
◌ Interact more sensitively within international teams
◌ Develop a capacity for culturally sensitive critical analysis
◌ Sensitively interpret different elements of verbal and non-verbal
communication
◌ Sensitively analyse critical incidents
◌ Clearly distinguish between objective and subjective culture
◌ Integrate a new team from an initial team
 20

List of topics
◌ Modern leadership models and their application
◌ The influence of national cultures on leadership
◌ The building and management of international, multi-
discipline, remote and virtual teams

Bibliographical Study
Module Code: MSTEE40 Duration: 12h

Objectives
At the end of the module, students will be able to :
◌ Learn to create and conduct a short oral presentation on a
technical topic given to them at the beginning of the semester
◌ Acquire basic skills and methods on searching for information
and oral presentations
◌ Enhance their skills to search for information and conduct oral
presentations
◌ Learn to deliver an effective oral presentation in order
demonstrate their understanding of the subject

List of topics
◌ Team working
◌ Information searching
◌ Oral presentation

Digital Electronics Project

Module Code: MSTEE41 Duration: 32h

Objecives
At the end of the module, students will be able to:
◌ Acquire basic practical skills in Digital Electronics
◌ Familiarise themselves with a real-world situation similar to that
of future professional environments
◌ Acquire skills to exercise their initiative and independence
◌ Improve their organizational, interpersonal and communication
skills
◌ Acquire time management skills
21

Fundamentals of Electronics
Module Code: MSTEE13 Duration: 30h

Objectives
At the end of this module, students will be able to:
◌ Put together an electrical circuit in the form of a four-terminal
network (transmit gain, input / output impedance)
◌ Transcribe a situation into a simulation diagram
◌ Choose the type of analysis (polarisation or time-frequency
analysis)
◌ Identify function block diagrams
◌ Design a cabling schema from a given electric schema (using
BNC connectors correctly)
◌ Measure voltage using oscilloscopes, multimeters and dB
meters
◌ Create various wave forms, recognize them using an
oscilloscope and change settings
◌ Measure input/output impedance
◌ Measure frequency response
◌ Interpret results of the aforementioned measurements
◌ Use Excel to plot graphs and schemas

List of topics
◌ Electrical circuits
◌ Simulation schema
◌ Block diagrams
◌ Cabling and electric schema
◌ Measurement
◌ Generation of various signals
◌ Generation of plot graphs
 22

Microprocessors
Module Code: MSTSEE21 Duration: 60h

Objectives
At the end of this module, students will be able to:
◌ Understand the architecture of microprocessors
◌ Program microprocessors
◌ Study the evolution of their architecture

List of topics
◌ Microprocessor architecture (ALU, control unit, registers, buses)
◌ Data and processors (address decoding, synchronization)
◌ Vital signals of processors (clocks, power supply, reset)
◌ Microprocessor programming (languages, registers, addresses,
instructions)
◌ Execution time, routines, passing parameters
◌ Principles and how exceptions/interruptions work
◌ Inputs/outputs
◌ Case study (MSP430)

VHDL & Logic Synthesis

Module Code: MSTSEE22 Duration: 30h

Objectives
At the end of this module, students will be able to:
◌ Program logic devices (PLD)
◌ Develop programs using VHDL language

List of topics
◌ Review of combinatory and sequential logic
◌ The different families of programmable logic devices
◌ Practice with synthesis tools (Xilinx or Altera targets, Quartus or
ISE tools, Modelsim)

Communication Busses
Module Code: MSTSEE23 Duration: 30h

Objectives
23

At the end of this module, students will be able to:

◌ Use the most widely used communication busses in the field of
embedded processors
◌ Understand technical specifications

List of topics
◌ RS-485
◌ I2C BUS, SPI BUS
◌ CAN BUS
◌ ARINC bus

Real Time Operating Systems

Module Code: MSTSEE24 Duration: 30h

Objectives
At the end of this module, the students will be able to:
◌ Understand why real-time executive is used in embedded
systems
◌ Describe the four major categories of services provided by an
executive
◌ Describe the necessary required materials to implement an
executive in real-time
◌ Learn the various commercial aspects of executive suppliers
◌ Describe the role of scheduling, how it works and the major
variations
◌ Calculate task times for simple situations
◌ List attribution rules for task priority
◌ Describe how the principle elements for synchronization are
presented in executives
◌ Describe the characteristics and how an email inbox works
◌ Design and develop a simple multitasking application with
MicroC / OSI
 24

List of topics
◌ Fundamentals of multitasking and real-time
◌ A scheduler: its role and how it works
◌ Why real-time executives are used in embedded systems
◌ Necessary materials
◌ Categories of executives and their markets
◌ A real-time kernel: MicroC/OSII (Micro-Controller Operating
Systems Version 2)
◌ Memory management
◌ Intertask communication and synchronization tools
◌ Using MicroC/OSII and microcontrollers

Embedded Linux
Module Code: MSTSEE25 Duration: 30h

Objectives
At the end of the module, the students will be able to:
◌ Understand the possibilities and uses of the Linux kernel for an
embedded IT project.
◌ Learn the principle software tools used in the Linux/Unix world
and how to use them to develop.
◌ Write a device driver for specific Linux run material
◌ Combine tools to create advanced functions with a minimum
of programming

List of topics
◌ Introduction to Linux.
◌ How an OS fits in an embedded system.
◌ History of Linux and Unix systems.
◌ Linux compared to other embedded operating systems.
◌ Fundamental tools: command lines, shell scripts.
◌ Linux development tools.
◌ C programming with embedded systems.
◌ Linux drivers.
◌ Web connections and Remote Administration Tools (RATs).t
25

Embedded C Programming
Module Code: MSTSEE26 Duration: 30h

Objectives
At the end of this module, students will:
◌ Be familiar with the C coding practices for embedded systems
◌ Be familiar with the elements and tools for embedded software
validation
◌ Develop, write and test a C language program (as per design
specifications) to be used with a microprocessor with respect of
good practices like MISRA-C rules
◌ Analyse and enumerate the various phases of development for
a software project: the V cycle

List of topics
◌ Specificities of C Language for embedded systems (variables,
memory organization, physical address access, etc.)
◌ Programming methods
◌ Software analysis and validation tools and principles for
embedded systems

Analysis & Design with UML

Module Code: MSTISI2A Duration: 32h

Objectives
At the end of this module students will be able to:
◌ Be familiar with the process for designing software applications,
with a special focus on the Unified Modelling Language (UML)
and Java as design tools
◌ Be familiar with the major steps in software design, including
the development of user requirements, specifications, data
bases, user interfaces, and software models
 26

List of topics
◌ Overview of software design: challenges, accomplishments, and
failures
◌ Overview of software lifecycle model and its variants
◌ Overview of object oriented design – Java classes, objects,
inheritance, associations
◌ Requirements analysis and use case design – UML use case and
sequence diagrams
◌ Class design – UML class diagrams
◌ Modeling activities and interactions – UML activity and state
diagrams

Embedded Java
Module Code: MSTSEE27 Duration: 30h

Objectives
At the end of this module, students will:
◌ Be familiar with a computer language which can be used to
develop graphic applications under Windows for personal
embedded systems like Pocket PCs

List of topics
◌ Java ME environment: interface and syntax
◌ Basics of programming in the Java ME environment

Smart Sensors
Module Code: MSTSEE32 Duration: 30h

Objectives
At the end of this module, students will:
◌ Be familiar with the principles and the advantages of smart
sensors through different applications
27

List of topics
◌ Sensors and interfacing circuits
◌ Applications of smart sensors
◌ Architecture and components of smart sensors
◌ Practice with smart sensors

Specific Instrumentation
Module Code: MSTSEE29 Duration: 30h

Objectives
At the end of this module, students will be able to:
◌ Manage the entire information sampling chain in an
instrumentation-type embedded system

List of topics
◌ The measurement chain: physical signal to digital processing
◌ Sensors: types, technology
◌ Signal conditioning: transport, filtering, amplification
◌ Sampling: period, response time
◌ Information security: accuracy, lifetime, redundancy

MtoM Communication
Module Code: MSTSEE31 Duration: 30h

Objectives
At the end of this module, students will:
◌ Be familiar with the principles of communication between
machines, needing no human action

List of topics
◌ Sensors and servers
◌ Cellular networks
◌ Applications
◌ Protocols of MtoM communication
 28

Python Programming & Image Treatments

Module Code: MSTSEE36 Duration: 30h

Objectives
The Python language is today, one of the most useful programming
tool for engineers and is used in several applicative areas including
embedded systems. The objective of this elective is to understand the
environment, the tools and the scope of this language.

List of topics
◌ Python Development Environment
• Python distribution and their installation
• Python as a script language
• Python as a programming language
• Interactive Python (Jupiter-notebook)
• Comparison with other programming languages
• Installing important libraries (PIP)
◌ Python Basics
• The first program
• Docstrings
• Blocks and indentation
• First Control structures
◌ Simple data types and expressions
• Boolean
• Integer
• Float
• Complex numbers
• Strings
• Bytes
◌ More data types
• Lists
• Tuples
• Sets
• Dictionaries
• Strings
• Numpy
• Arrays
29

◌ Control structures
• Loops
• Alternatives
• Exceptions
◌ Comprehension and slicing
◌ Object oriented Python
• Class definition
• Class instantiation
• Generators and iterators
◌ Files
• Files
• Serialization
• Important file formats
◌ Specialized topics (optional)
• Writing and installing your own libraries
• Regular expressions

Android Programming
Module Code: MSTSEE32 Duration: 30h

Objectives
At the end of this module, students will be able to:
◌ Understand the challenges and possibilities of mobile platforms
◌ Use the Android development environment
◌ Create a user interface
◌ Develop communication applications
◌ Develop an application using persistent data
◌ Develop a multimedia application
◌ Develop an application that works with Googlemaps
◌ Make and publish an Android application
 30

List of topics
◌ Embedded applications, possibilities, Android SDK
◌ Using views, creating advanced user interfaces
◌ Intent classes
◌ Persistent data
◌ Multimedia
◌ Geolocalisation
◌ Publishing Embedded applications, possibilities, Android SDK
◌ Using views, creating advanced user interfaces
◌ Intent classes
◌ Persistent data
◌ Multimedia
◌ Geolocalisation
◌ Publishing

System on Chip
Module Code: MSTSEE33 Duration: 20h

Objectives
At the end of this module, students will understand and be able to
implement a complete embedded system on a chip (SoC)
List of topics
◌ Main components of SoC systems
◌ Related embedded solutions on chips
◌ Defining an intellectual property tool
◌ Integration of a solution
◌ Xilinx Spartan or Microsemi SmartFusion components

DSP Processors
Module Code: MSTSEE34 Duration: 20h

Objectives
At the end of this module, students will:
◌ Be familiar with the main DSP (digital signal processing)
algorithms and their impact on DSP architecture
31

List of topics
◌ Sampling, convolution
◌ Linear filtering
◌ Fourier transforms
◌ STM32F407VG ARM based processor

Safety Systems
Module Code: MSTSEE35 Duration: 20h

Objectives
At the end of this module, students will:
◌ Understand the role EMC phenomena play in the field of
embedded systems, by studying automotive examples

List of topics
◌ EMC (Electromagnetic Compatibility) issues for electronics
◌ Cause and effect
◌ Prevention and solutions
◌ The automotive field: an overview

Oral Communication & Presenting Skills

Module Code: MSTOCPS Duration: 14h

Objectives
At the end of this module students will:
◌ Have a clear model of what constitutes successful and
unsuccessful presentations
◌ Have practiced giving formal presentations in English.
◌ Be more aware of their own downfalls when presenting

List of topics
◌ Methods for putting together an oral presentation
◌ Practice
 32

Project Management
Module Code: MSTPM Duration: 26h

Objectives
At the end of this module students will be able to:
◌ Appreciate the need for project management including formal
methods, as a recognised discipline
◌ Appreciate the need for effective planning, control and delivery
mechanisms
◌ Understand the complexities of different types of computing
projects and some of the methods used to manage them
◌ Apply some of the skills and knowledge learned in any future
project (including during other module(s) of this course, and, in
particular, documentation for development project)

List of topics
◌ What is a project? The need for PM, formal methods
◌ Managing large, complex, international projects
◌ Un peu de franglais (PM culture and language in English and in
French)
◌ Management of projects, project life cycle, roles of the project
manager and stakeholders
◌ Stakeholder management, scope, creep
◌ Work planning, project breakdown structures and estimating
◌ Resource planning, estimating, management
◌ Risk identification, analysis, management
◌ PERT and Gantt charts, their use and shortcomings
◌ PM planning tools (including practical sessions with MS Project)
◌ Change control, documentation, configuration management
◌ Project control, quality, documentation, delivery management
◌ Project closure; maintenance projects
◌ Types of computing projects and risks; computing PM methods
◌ Cost-benefit analysis and project accounting may be touched
upon, but are not in the scope of this course
33

Research & Development Project

Module Code: MSTPRDP Duration: 80h

Objectives
At the end of this module students will be able to:
◌ Improve their organizational skills (within a team, facing
deadlines) and manage their time
◌ Improve their communication skills
◌ Work in a real-world situation close to their future professional
environments
◌ Filter and identify relevant online information according to a
targeted subject
◌ Constitute a bibliographical study
◌ Develop functional specifications and success strategies
◌ Estimate the workload of each identified task
◌ Analyse their production capacity
◌ Design and build computer applications with current standards
and new opportunities
◌ Integrate research approaches
◌ Evaluate the quality level for a developed application
◌ Present their work and justify the outcome

List of topics
◌ State of the art practices
◌ Technical / feasibility studies
◌ Research methodologies and approaches
◌ Information processing
◌ Experimental results and evaluation
 34

French as a Foreign Language

Module Code: MSTFRE1, MSTFRE2, MSTFRE3 Duration: 180h

Objectives
At the end of this module students will be able to:
◌ Oral comprehension
• Understand standard French used in everyday situations at
work, school, etc.
◌ Written comprehension
• Understand texts written in standard French used in everyday
situations such at work, school, etc.
◌ Oral expression
• Participate in a regular day-to-day conversation on familiar
topics
• Ask and exchange information
• Prepare and give a short formal presentation
◌ Written expression
• Write short, clear and coherent texts on familiar / everyday
situations with basic grammar and vocabulary

List of topics
◌ Revision of grammar and vocabulary
◌ Preparation for the Test of French Language (TCF or TEF)
35

English as a Foreign Language

Module Code: MSTENG1 MSTENG2 MSTENG3 Duration: 180h

Objectives
At the end of this module students will be able to:
◌ Oral comprehension
• Understand standard English used in everyday situations at
work, school, etc.
◌ Written comprehension
• Understand texts written in standard English used in
everyday situations such at work, school, etc.
◌ Oral expression
• Participate in a regular day-to-day conversation on familiar
topics
• Ask and exchange information
• Prepare and give a short formal presentation
◌ Written expression
• Write short, clear and coherent texts on familiar / everyday
situations with basic grammar and vocabulary

List of topics
◌ Revision of grammar and vocabulary
◌ Preparation for the Test of English for International
Communication (TOEIC)
36
37

K INTERNSHIP / PROFESSIONAL THESIS

The internship will take place either in a company or in a research
laboratory in a university. Students are encouraged to do their
internship in France or in another European country, but may choose
to do so elsewhere in the world too. The duration of the internship is of
4 months (min.) to 6 months (max.). ESIGELEC and INSA Rouen provide
assistance to students to find internships but they are expected to play
an active part, as the internships are not offered automatically.

A professional thesis will have to be submitted upon completion of

the internship and the students will have to make an oral presentation
before a convened jury, at ESIGELEC or at the representative offices of
ESIGELEC abroad (or remotely, upon special written request, authorised
by the school).

An internship form, providing all required information must be filled and

submitted to the Internship Department at ESIGELEC, as soon as the
student has obtained an offer. The Head of the Internship Department
and the Academic Coordinator of the Master’s Programme will validate
and approve the information (if relevant) by duly signing on the said
form. ESIGELEC, the company / research laboratory and the student
will then countersign an Internship Agreement (if required) issued
at ESIGELEC. A copy of the agreement is retained by ESIGELEC, the
company or research laboratory and the student.

A faculty member of ESIGELEC or INSA Rouen will be assigned the task

of visiting or contacting the student at least once during the internship.
In the event of questions regarding the internship, the preparation of
the oral presentation and/or the professional thesis, the student may
remain in contact either with the assigned faculty member or the
Academic Coordinator of the Master’s Programme, during the period
of the internship or thereafter.

The topic of the professional thesis chosen by the student must be

communicated to the Academic Coordinator of the Master’s Programme
for approval, within the first month of starting the internship.
 38

The professional thesis (2 hard copies by post and 1 soft copy in Word
or pdf via intranet) must be submitted to ESIGELEC at least 3 weeks
before the oral presentation before a Jury comprising of a President
(from ESIGELEC or INSA Rouen), one faculty member from ESIGELEC
or INSA Rouen and the industrial tutor (if possible). This presentation
must be done within four months, at the latest, of completion of the
internship. The total duration of the oral presentation will be of 60
minutes (30 min. presentation + 15 min. Q&A + 15 min. deliberation
among jury members).

These presentations are typically organized at the end of March, at

the end of June, in the beginning of September and at the end of
November each year.

A student has a maximum period of 2 years after the final academic

semester, to find the internship, complete it, submit the professional
thesis and conduct the oral presentation before a convened jury, after
successful completion of the internship.

L THE STUDY BOARD

The Board of Studies, whose members are representatives from
industry, universities, INSA Rouen & ESIGELEC, oversees the course
content and recommends changes when necessary.

The Board of Studies, which meets at least once a year, also ensures
that the course content and laboratories are streamlined in keeping
with the changing industry requirements. A meeting between the
Academic Coordinator of the Master’s Programme and all faculty
members is convened at the end of each module, to assess the relevance
of the content, equipment and issues which may have occurred while
delivering the module.

A meeting is also convened every two months between the Academic

Coordinator of the Master’s Programme and the students to discuss
academic and non-academic issues.
41

School of Engineering
Supported by the Chamber of Commerce and Industry of Rouen

ESIGELEC
Technopôle du Madrillet
Avenue Galilée BP10024
76801 Saint-Etienne du Rouvray - France
Phone: +33 (0)2 32 91 58 58 | Fax: +33 (0)2 32 91 58 59
www.esigelec.fr

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