26 Chapter 3 (X - 86 Family)
26 Chapter 3 (X - 86 Family)
26 Chapter 3 (X - 86 Family)
INTRODUCTION
TO
X – 86 FAMILY
BLOCK DIAGRAM
OF
8086
MICROPROCESSOR
BUS INTERFACE UNIT ( BIU)
1. QUEUE
2. SEGMENT REGISTERS
3. INSTRUCTION POINTER
QUEUE
Stores them
Speeds up Fetches 6
in the FIFO
program bytes of
register to be
execution instruction
used by
ahead of time
Execution
Unit (E.U.)
SEGMENT REGISTERS
Four 16 – bit segment registers are used
to store the starting address of memory
segment.
The four segment registers are:
1.Extra Segment ( E.S. )
2.Code Segment ( C.S. )
3.Stack Segment ( S.S. )
4.Data Segment ( D.S. )
INSTRUCTION POINTER ( I.P. )
• Code segment contains starting
address of segment having code
bytes
OF 16 – BIT
VERSION OF
X – 86 FAMILY
Programming Model of 8085 Microprocessor
PROGRAMMING MODEL
OF 32 – BIT
VERSION OF
X – 86 FAMILY
SERIES
OF
MICROPROCESSORS IN
X – 86 FAMILY
SERIES INTRODUCED ADDRESS DATA MEMORY FEATURES
BY INTEL IN BUS BUS CAPACITY
THE YEAR
8086 1978 20 - BIT 16 - BIT 1 MB •Supports Multiplication
and Division operations.
80286 1982 24 - BIT 16 - BIT REAL : 1 MB •Works in Real and
PROTECTED : Protected modes.
16 MB • IBM made PC/AT using
80286.
4) 64 – BIT DATA BUS – The 64 –bit Data Bus will increase the
processing speed of the Pentium processor as it will have twice
the speed of a 32 – bit processor.
Important Board
Exam Questions for
Chapter 3
Q1. Draw the flag register of the 16-bit
version of X-86 microprocessor.
Q2. Draw the flag register of the 32-bit
version of X-86 microprocessor.
Q3. Explain the programming model
of 16-bit version of X-86 family.