DSP Lock-In Amplifier Model SR830: Stanford Research Systems

DSP Lock-In Amplifier model SR830
1290 D Reamwood Avenue Sunnyvale, CA 94089 USA Phone: (408) 744-9040 Fax: (408) 744-9049 www.thinkSRS.com e-mail: info@thinkSRS.com
Copyright 1999 All Rights Reserved Revision 1.5 11/99
Stanford Research Systems
TABLE OF CONTENTS
GENERAL INFORMATION
Safety and Preparation for Use Specifications Abridged Command List 1-3 1-5 1-7 REAR PANEL Power Entry Module IEEE-488 Connector RS232 Connector Aux Inputs (A/D Inputs) Aux Outputs (D/A Outputs) X and Y Outputs Signal Monitor Output Trigger Input TTL Sync Output Preamp Connector Using SRS Preamps 4-27 4-27 4-27 4-27 4-27 4-27 4-28 4-28 4-28 4-28 4-29
GETTING STARTED
Your First Measurements The Basic Lock-in X, Y, R and Outputs, Offsets and Expands Storing and Recalling Setups Aux Outputs and Inputs 2-1 2-3 2-7 2-9 2-13 2-15
SR830 BASICS
What is a Lock-in Amplifier? What Does a Lock-in Measure? The SR830 Functional Diagram Reference Channel Phase Sensitive Detectors Time Constants and DC Gain DC Outputs and Scaling Dynamic Reserve Signal Input Amplifier and Filters Input Connections Intrinsic (Random) Noise Sources External Noise Sources Noise Measurements 3-1 3-3 3-5 3-7 3-9 3-11 3-13 3-15 3-17 3-19 3-21 3-23 3-25
PROGRAMMING
GPIB Communications RS232 Communications Status Indicators and Queues Command Syntax Interface Ready and Status GET (Group Execute Trigger) DETAILED COMMAND LIST Reference and Phase Input and Filter Gain and Time Constant Display and Output Aux Input and Output Setup Auto Functions Data Storage Data Transfer Interface Status Reporting STATUS BYTE DEFINITIONS Serial Poll Status Byte Service Requests Standard Event Status Byte LIA Status Byte Error Status Byte PROGRAM EXAMPLES Microsoft C, Nationall Instr GPIB USING SR530 PROGRAMS 5-1 5-1 5-1 5-1 5-2 5-2 5-3 5-4 5-5 5-6 5-8 5-9 5-10 5-11 5-12 5-15 5-19 5-20
OPERATION
Power On/Off and Power On Tests Reset [Keys] Spin Knob Front Panel BNC Connectors Key Click On/Off Front Panel Display Test Display Off Operation Keypad Test Standard Settings FRONT PANEL Signal Input and Filters Sensitivity, Reserve, Time Constants CH1 Display and Output CH2 Display and Output Reference Auto Functions Setup Interface Warning Messages 4-1 4-1 4-1 4-1 4-2 4-2 4-2 4-2 4-3 4-4
5-21 5-22 5-22 5-23 5-23
4-5 4-7 4-12 4-15 4-18 4-21 4-23 4-24 4-26
5-25 5-31
Table of Contents
TESTING
Introduction Preset Serial Number Firmware Revision Test Record If A Test Fails Necessary Equipment Front Panel Display Test Keypad Test PERFORMANCE TESTS Self Tests DC Offset Common Mode Rejection Amplitude Accuracy and Flatness Amplitude Linearity Frequency Accuracy Phase Accuracy Sine Output Amplitude DC Outputs and Inputs Input Noise Performance Test Record 6-1 6-1 6-1 6-1 6-1 6-1 6-1 6-2 6-2
CIRCUITRY
Circuit Boards CPU and Power Supply Board DSP Logic Board Analog Input Board PARTS LISTS DSP Logic Board Analog Input Board CPU and Power Supply Board Front Panel Display Boards Miscellaneous SCHEMATIC DIAGRAMS CPU and Power Supply Board Display Board Keypad Board DSP Logic Board Analog Input Board 7-1 7-3 7-5 7-7
7-9 7-15 7-21 7-24 7-30
6-3 6-5 6-7 6-9 6-11 6-13 6-15 6-17 6-19 6-21 6-23
SAFETY AND PREPARATION FOR USE WARNING

Dangerous voltages, capable of causing injury or death, are present in this instrument. Use extreme caution whenever the instrument covers are removed. Do not remove the covers while the unit is plugged into a live outlet.
CAUTION This instrument may be damaged if operated with the LINE VOLTAGE SELECTOR set for the wrong AC line voltage or if the wrong fuse is installed. LINE VOLTAGE SELECTION The SR830 operates from a 100V, 120V, 220V, or 240V nominal AC power source having a line frequency of 50 or 60 Hz. Before connecting the power cord to a power source, verify that the LINE VOLTAGE SELECTOR card, located in the rear panel fuse holder, is set so that the correct AC input voltage value is visible. Conversion to other AC input voltages requires a change in the fuse holder voltage card position and fuse value. Disconnect the power cord, open the fuse holder cover door and rotate the fuse-pull lever to remove the fuse. Remove the small printed circuit board and select the operating voltage by orienting the printed circuit board so that the desired voltage is visible when pushed firmly into its slot. Rotate the fuse-pull lever back into its normal position and insert the correct fuse into the fuse holder.
LINE FUSE Verify that the correct line fuse is installed before connecting the line cord. For 100V/120V, use a 1 Amp fuse and for 220V/240V, use a 1/2 Amp fuse. LINE CORD The SR830 has a detachable, three-wire power cord for connection to the power source and to a protective ground. The exposed metal parts of the instrument are connected to the outlet ground to protect against electrical shock. Always use an outlet which has a properly connected protective ground. SERVICE Do not attempt to service or adjust this instrument unless another person, capable of providing first aid or resuscitation, is present. Do not install substitute parts or perform any unauthorized modifications to this instrument. Contact the factory for instructions on how to return the instrument for authorized service and adjustment.
1-3
1-4
SR830 DSP LOCK-IN AMPLIFIER SPECIFICATIONS

SIGNAL CHANNEL Voltage Inputs Current Input Full Scale Sensitivity Input Impedance Gain Accuracy Input Noise Signal Filters CMRR Dynamic Reserve Harmonic Distortion REFERENCE CHANNEL Frequency Range Reference Input Phase Resolution Absolute Phase Error Relative Phase Error Orthogonality Phase Noise Phase Drift Harmonic Detect Acquisition Time DEMODULATOR Zero Stability Time Constants Single-ended (A) or differential (A-B). 106 or 10 8 Volts/Amp. 2 nV to 1 V in a 1-2-5-10 sequence (expand off). Voltage: 10 M+25 pF, AC or DC coupled. Current: 1 k to virtual ground. 1% from 20C to 30C (notch filters off). 6 nV/Hz at 1 kHz (typical). 60 (50) Hz and 120(100) Hz notch filters (Q=4). 90 dB at 100 Hz (DC Coupled). Greater than 100 dB (with no signal filters). -80 dB.
1 mHz to 102 kHz TTL (rising or falling edge) or Sine. Sine input is1 M, AC coupled (>1 Hz). 400 mV pk-pk minimum signal. 0.01 <1 <0.01 90 0.001 External synthesized reference: 0.005 rms at 1 kHz, 100 ms, 12 dB/oct. Internal reference: crystal synthesized, <0.0001 rms at 1 kHz. <0.01/C below 10 kHz <0.1/C to 100 kHz Detect at Nxf where N<19999 and Nxf<102 kHz. (2 cycles + 5 ms) or 40 ms, whichever is greater.
Harmonic Rejection INTERNAL OSCILLATOR Frequency Frequency Accuracy Frequency Resolution Distortion Output Impedance Amplitude Amplitude Accuracy Amplitude Stability Outputs
Digital displays have no zero drift on all dynamic reserves. Analog outputs: <5 ppm/C for all dynamic reserves. 10 s to 30 s (reference > 200 Hz). 6, 12, 18, 24 dB/oct rolloff. up to 30000 s (reference < 200 Hz). 6, 12, 18, 24 dB/oct rolloff. Synchronous filtering available below 200 Hz. -80 dB
1 mHz to 102 kHz. 25 ppm + 30 Hz 4 1/2 digits or 0.1 mHz, whichever is greater. f<10 kHz, below -80 dBc. f>10 kHz, below -70 dBc.1 Vrms amplitude. 50 4 mVrms to 5 Vrms (into a high impedance load) with 2 mV resolution. (2 mVrms to 2.5 Vrms into 50 load). 1% 50 ppm/C Sine output on front panel. TTL sync output on rear panel. When using an external reference, both outputs are phase locked to the external reference.
1-5
SR830 DSP Lock-In Amplifier

DISPLAYS Channel 1 4 1/2 digit LED display with 40 segment LED bar graph. X, R, X Noise, Aux Input 1 or 2. The display can also be any of these quantities divided by Aux Input 1 or 2. 4 1/2 digit LED display with 40 segment LED bar graph. Y, , Y Noise, Aux Input 3 or 4. The display can also be any of these quantities divided by Aux Input 3 or 4. X, Y and R may be offset up to 105% of full scale. X, Y and R may be expanded by 10 or 100. 4 1/2 digit LED display. Display and modify reference frequency or phase, sine output amplitude, harmonic detect, offset percentage (X, Y or R), or Aux Outputs 1-4. 16k points from both Channel 1 and Channel 2 display may be stored internally. The internal data sample rate ranges from 512 Hz down to 1 point every 16 seconds. Samples can also be externally triggered. The data buffer is accessible only over the computer interface.
Channel 2
Offset Expand Reference
Data Buffer
INPUTS AND OUTPUTS Channel 1 Output Channel 2 Output X and Y Outputs Aux. Outputs Aux. Inputs
Trigger Input Monitor Output GENERAL Interfaces
Output proportional to Channel 1 display, or X. Output Voltage: 10 V full scale. 10 mA max output current. Output proportional to Channel 2 display, or Y. Output Voltage: 10 V full scale. 10 mA max output current. Rear panel outputs of cosine (X) and sine (Y) components. Output Voltage: 10 V full scale. 10 mA max output current. 4 BNC Digital to Analog outputs. 10.5 V full scale, 1 mV resolution. 10 mA max output current. 4 BNC Analog to Digital inputs. Differential inputs with1 M input impedance on both shield and center conductor. 10.5 V full scale, 1 mV resolution. TTL trigger input triggers stored data samples. Analog output of signal amplifiers (before the demodulator).
Preamp Power Power Dimensions Weight Warranty
IEEE-488 and RS232 interfaces standard. All instrument functions can be controlled through the IEEE-488 and RS232 interfaces. Power connector for SR550 and SR552 preamplifiers. 40 Watts, 100/120/220/240 VAC, 50/60 Hz. 17"W x 5.25"H x 19.5"D 30 lbs. One year parts and labor on materials and workmanship.
1-6
COMMAND LIST
VARIABLES i,j,k,l,m f x,y,z s Integers Frequency (real) Real Numbers String
REFERENCE and PHASE PHAS (?) {x} FMOD (?) {i} FREQ (?) {f} RSLP (?) {i} HARM (?) {i} SLVL (?) {x} INPUT and FILTER ISRC (?) {i} IGND (?) {i} ICPL (?) {i} ILIN (?) {i} GAIN and TIME CONSTANT SENS (?) {i} RMOD (?) {i} OFLT (?) {i} OFSL (?) {i} SYNC (?) {i} DISPLAY and OUTPUT DDEF (?) i {, j, k} FPOP (?) i {, j} OEXP (?) i {, x, j} SETUP OUTX (?) {i} OVRM (?) {i} KCLK (?) {i} ALRM (?) {i} SSET i RSET i AOFF i AUX INPUT/OUTPUT OAUX ? i AUXV (?) i {, x}
page 5-4 5-4 5-4 5-4 5-4 5-4 page 5-5 5-5 5-5 5-5 page 5-6 5-6 5-6 5-6 5-7
description Set (Query) the Phase Shift to x degrees. Set (Query) the Reference Source to External (0) or Internal (1). Set (Query) the Reference Frequency to f Hz.Set only in Internal reference mode. Set (Query) the External Reference Slope to Sine(0), TTL Rising (1), or TTL Falling (2). Set (Query) the Detection Harmonic to 1 i 19999 and if 102 kHz. Set (Query) the Sine Output Amplitude to x Vrms. 0.004 x 5.000. description Set (Query) the Input Configuration to A (0), A-B (1) , I (1 M) (2) or I (100 M) (3). Set (Query) the Input Shield Grounding to Float (0) or Ground (1). Set (Query) the Input Coupling to AC (0) or DC (1). Set (Query) the Line Notch Filters to Out (0), Line In (1) , 2xLine In (2), or Both In (3). description Set (Query) the Sensitivity to 2 nV (0) through 1 V (26) rms full scale. Set (Query) the Dynamic Reserve Mode to HighReserve (0), Normal (1), or Low Noise (2). Set (Query) the Time Constant to 10 s (0) through 30 ks (19). Set (Query) the Low Pass Filter Slope to 6 (0), 12 (1), 18 (2) or 24 (3) dB/oct. Set (Query) the Synchronous Filter to Off (0) or On below 200 Hz (1).
AUTO FUNCTIONS AGAN ARSV APHS AOFF i
page 5-10 5-10 5-10 5-10 5-10 5-10 page 5-11 5-11 5-11 5-11
page description 5-8 Set (Query) the CH1 or CH2 (i=1,2) display to XY, R, XnYn, Aux 1,3 or Aux 2,4 (j=0..4) and ratio the display to None, Aux1,3 or Aux 2,4 (k=0,1,2). 5-8 Set (Query) the CH1 (i=1) or CH2 (i=2) Output Source to X or Y (j=1) or Display (j=0). 5-8 Set (Query) the X, Y, R (i=1,2,3) Offset to x percent ( -105.00 x 105.00) and Expand to 1, 10 or 100 (j=0,1,2). 5-8 Auto Offset X, Y, R (i=1,2,3). page description 5-9 Query the value of Aux Input i (1,2,3,4). 5-9 Set (Query) voltage of Aux Output i (1,2,3,4) to x Volts. -10.500 x 10.500. description Set (Query) the Output Interface to RS232 (0) or GPIB (1). Set (Query) the GPIB Overide Remote state to Off (0) or On (1). Set (Query) the Key Click to Off (0) or On (1). Set (Query) the Alarms to Off (0) or On (1). Save current setup to setting buffer i (1i9). Recall current setup from setting buffer i (1i9).
description Auto Gain function. Same as pressing the [AUTO GAIN] key. Auto Reserve function. Same as pressing the [AUTO RESERVE] key. Auto Phase function. Same as pressing the [AUTO PHASE] key. Auto Offset X,Y or R (i=1,2,3).
1-7

DATA STORAGE SRAT (?) {i} SEND (?) {i} TRIG TSTR (?) {i} STRT PAUS REST page 5-13 5-13 5-13 5-13 5-13 5-13 5-14 description Set (Query) the DataSample Rate to 62.5 mHz (0) through 512 Hz (13) or Trigger (14). Set (Query) the Data Scan Mode to 1 Shot (0) or Loop (1). Software trigger command. Same as trigger input. Set (Query) the Trigger Starts Scan modeto No (0) or Yes (1). Start or continue a scan. Pause a scan. Does not reset a paused or done scan. Reset the scan. All stored data is lost.
DATA TRANSFER OUTP? i OUTR? i SNAP?i,j{,k,l,m,n} OAUX? i SPTS? TRCA? i,j,k TRCB? i,j,k TRCL? i,j,k FAST (?) {i} STRD INTERFACE pRST pIDN? LOCL(?) {i} OVRM (?) {i} TRIG
page 5-15 5-15 5-15 5-16 5-16 5-16 5-16 5-17 5-17 5-18 page 5-19 5-19 5-19 5-19 5-19
description Query the value of X (1), Y (2), R (3) or (4). Returns ASCII floating point value. Query the value of Display i (1,2). Returns ASCII floating point value. Query the value of 2 thru 6 paramters at once. Query the value of Aux Input i (1,2,3,4). Returns ASCII floating point value. Query the number of points stored in Display buffer. Read k1 points starting at bin j0 from Display i (1,2) buffer in ASCII floating point. Read k1 points starting at bin j0 from Display i (1,2) buffer in IEEE binary floating point. Read k1 points starting at bin j0 from Display i (1,2) buffer in non-normalized binary floating point. Set (Query) Fast Data Transfer Mode On (1) or Off (0).On will transfer binary X and Y every sample during a scan over the GPIB interface. Start a scan after 0.5sec delay. Use with Fast Data Transfer Mode. description Reset the unit to its default configurations. Read the SR830 device identification string. Set (Query) the Local/Remote state to LOCAL (0), REMOTE (1), or LOCAL LOCKOUT (2). Set (Query) the GPIB Overide Remote state to Off (0) or On (1). Software trigger command. Same as trigger input.
STATUS pCLS pESE (?) {i} {,j} pSTB? {i} pPSC (?) {i} ERRE (?) {i} {,j} ERRS? {i} LIAE (?) {i} {,j} LIAS? {i}
pESR? {i} pSRE (?) {i} {,j}
page description 5-20 Clear all status bytes. 5-20 Set (Query) the Standard Event Status Byte Enable Register to the decimal value i (0-255). pESE i,j sets bit i (0-7) to j (0 or 1). pESE? queries the byte. pESE?i queries only bit i. 5-20 Query the Standard Event Status Byte. If i is included, only bit i is queried. 5-20 Set (Query) the Serial Poll Enable Register to the decimal value i (0-255). pSRE i,j sets bit i (07) to j (0 or 1). pSRE? queries the byte, pSRE?i queries only bit i. 5-20 Query the Serial Poll Status Byte. If i is included, only bit i is queried. 5-20 Set (Query) the Power On Status Clear bit to Set (1) or Clear (0). 5-20 Set (Query) the Error Status Enable Register to the decimal value i (0-255). ERRE i,j sets bit i (0-7) to j (0 or 1). ERRE? queries the byte, ERRE?i queries only bit i. 5-20 Query the Error Status Byte. If i is included, only bit i is queried. 5-20 Set (Query) the LIA Status Enable Register to the decimal value i (0-255). LIAE i,j sets bit i (0-7) to j (0 or 1). LIAE? queries the byte, LIAE?i queries only bit i. 5-20 Query the LIA Status Byte. If i is included, only bit i is queried.
1-8
SR830 DSP Lock-In Amplifier STATUS BYTE DEFINITIONS

SERIAL POLL STATUS BYTE (5-21) bit 0 1 2 3 4 5 6 7 name SCN IFC ERR LIA MAV ESB SRQ Unused name INP Unused QRY Unused EXE CMD URQ PON LIA STATUS BYTE (5-23) bit 0 1 2 3 4 5 6 7 bit 0 1 2 3 4 5 6 7 name RSRV/INPT FILTR OUTPT UNLK RANGE TC TRIG Unused
STANDARD EVENT STATUS BYTE (5-22) bit 0 1 2 3 4 5 6 7
usage No data is being acquired No command execution in progress Unmasked bit in error status byte set Unmasked bit in LIA status byte set The interface output buffer is non-empty Unmasked bit in standard status byte set SRQ (service request) has occurred usage Set on input queue overflow Set on output queue overflow
Set when command execution error occurs Set when an illegal command is received Set by any key press or knob rotation Set by power-on
ERROR STATUS BYTE (5-23) name Unused Backup Error RAM Error Unused ROM Error GPIB Error DSP Error Math Error usage
usage Set when on RESERVE or INPUT overload Set when on FILTR overload Set when on OUTPT overload Set when on reference unlock Set when detection freq crosses 200 Hz Set when time constant is changed Set when unit is triggered Set when battery backup fails Set when RAM Memory test finds an error
Set when ROM Memory test finds an error Set when GPIB binary data transfer aborts Set when DSP test finds an error Set when an internal math error occurs
1-9
1-10
GETTING STARTED YOUR FIRST MEASUREMENTS

The sample measurements described in this section are designed to acquaint the first time user with the SR830 DSP Lock-In Amplifier. Do not be concerned that your measurements do not exactly agree with these exercises. The focus of these measurement exercises is to learn how to use the instrument. It is highly recommended that the first time user step through some or all of these exercises before attempting to perform an actual experiment. The experimental procedures are detailed in two columns. The left column lists the actual steps in the experiment. The right column is an explanation of each step.
[Keys] Knob
Front panel keys are referred to in brackets such as [Display] where 'Display' is the key label. The knob is used to adjust parameters which are displayed in the Reference display.
2-1
Getting Started
2-2
The Basic Lock-in
THE BASIC LOCK-IN

This measurement is designed to use the internal oscillator to explore some of the basic lock-in functions. You will need BNC cables. Specifically, you will measure the amplitude of the Sine Out at various frequencies, sensitivities, time constants and phase shifts.
1. Disconnect all cables from the lock-in. Turn the power on while holding down the [Setup] key. Wait until the power-on tests are completed.
When the power is turned on with the [Setup] key pressed, the lock-in returns to its standard default settings. See the Standard Settings list in the Operation section for a complete listing of the settings. The Channel 1 display shows X and Channel 2 shows Y.
2. Connect the Sine Out on the front panel to the A input using a BNC cable.
The lock-in defaults to the internal oscillator reference set at 1.000 kHz. The reference mode is indicated by the INTERNAL led. In this mode, the lock-in generates a synchronous sine output at the internal reference frequency. The input impedance of the lock-in is 10 M. The Sine Out has an output impedance of 50. Since the Sine Output amplitude is specified into a high impedance load, the output impedance does not affect the amplitude. The sine amplitude is 1.000 Vrms and the sensitivity is 1 V(rms). Since the phase shift of the sine output is very close to zero, Channel 1 (X) should read close to 1.000 V and Channel 2 (Y) should read close to 0.000 V.
3. Press [Auto Phase]
Automatically adjust the reference phase shift to eliminate any residual phase error. This should set the value of Y to zero.
4. Press [Phase]
Display the reference phase shift in the Reference display. The phase shift should be close to zero.
5. Press the [+90] key.
This adds 90 to the reference phase shift. The value of X drops to zero and Y becomes minus the magnitude (-1.000 V).
2-3
The Basic Lock-in

Use the knob to adjust the phase shift until Y is zero and X is equal to the positive amplitude. The knob is used to adjust parameters which are shown in the Reference display, such as phase, amplitude and frequency. The final phase value should be close to zero again. Use the Auto Phase function to return Y to zero and X to the amplitude.
Press [Auto Phase]
6. Press [Freq]
Show the internal oscillator frequency in the Reference display. The knob now adjusts the frequency. The measured signal amplitude should stay within 1% of 1 V and the phase shift should stay close to zero (the value of Y should stay close to zero). The internal oscillator is crystal synthesized with 25 ppm of frequency error. The frequency can be set with 4 1/2 digit or 0.1 mHz resolution, whichever is greater.
Use the knob to adjust the frequency to 10 kHz.
Use the knob to adjust the frequency back to 1 kHz.
7. Press [Ampl]
Show the sine output amplitude in the Reference display. As the amplitude is changed, the measured value of X should equal the sine output amplitude. The sine amplitude can be set from 4 mV to 5 V rms into high impedance (half the amplitude into a 50 load).
Use the knob to adjust the amplitude to 0.01 V.
8. Press [Auto Gain]
The Auto Gain function will adjust the sensitivity so that the measured magnitude (R) is a sizable percentage of full scale. Watch the sensitivity indicators change.
9. Press [Sensitivity Up] to select 50 mV full scale. Change the sensitivity back to 20 mV.
Parameters which have many options, such as sensitivity and time constant, are changed with up and down keys. The sensitivity and time constant are indicated by leds.
10. Press [Time Constant Down] to change the time constant to 300 s.
The values of X and Y become noisy. This is because the 2f component of the output (at 2 kHz) is no longer attenuated completely by the low pass filters. Let's leave the time constant short and change the filter slope.
Press [Time Constant Up] to change the time constant to 3 ms.
2-4
The Basic Lock-in

Parameters which have only a few values, such as filter slope, have only a single key which cycles through all available options. Press the corresponding key until the desired option is indicated by an led. The X and Y outputs are somewhat noisy at this short time constant and only 1 pole of low pass filtering. The outputs are less noisy with 2 poles of filtering. Press [Slope/Oct] again to select 12 dB/oct. Press [Slope/Oct] twice to select 24 db/oct. With 4 poles of low pass filtering, even this short time constant attenuates the 2f component reasonably well and provides steady readings. Let's leave the filtering short and the outputs noisy for now. Press [Slope/Oct] again to select 6 db/oct. Show the internal reference frequency on the Reference display. 12. Press [Freq] At a reference frequency of 55 Hz and a 6 db/oct, 3 ms time constant, the output is totally dominated by the 2f component at 100 Hz.
11. Press the [Slope/Oct] key until 6 dB/oct is selected.
Use the knob to adjust the frequency to 55.0 Hz.
This turns on synchronous filtering whenever the detection frequency is below 200 Hz. 13. Press [Sync Filter] Synchronous filtering effectively removes output components at multiples of the detection frequency. At low frequencies, this filter is a very effective way to remove 2f without using extremely long time constants. The outputs are now very quiet and steady, even though the time constant is very short. The response time of the synchronous filter is equal to the period of the detection frequency (18 ms in this case).
This concludes this measurement example. You should have a feeling for the basic operation of the front panel. Basic lock-in parameters have been introduced and you should be able to perform simple measurements.
2-5
The Basic Lock-in
2-6
X, Y, R and
X, Y, R and
This measurement is designed to use the internal oscillator and an external signal source to explore some of the display types. You will need a synthesized function generator capable of providing a 100 mVrms sine wave at 1.000 kHz (the DS335 from SRS will suffice), BNC cables and a terminator appropriate for the generator function output. Specifically, you will display the lock-in outputs when measuring a signal close to, but not equal to, the internal reference frequency. This setup ensures changing outputs which are more illustrative than steady outputs. The displays will be configured to show X, Y, R and .
When the power is turned on with the [Setup] key pressed, the lock-in returns to its standard settings. See the Standard Settings list in the Operation section for a complete listing of the settings. The Channel 1 display shows X and Channel 2 shows Y.
2. Turn on the function generator, set the frequency to 1.0000 kHz (exactly) and the amplitude to 500 mVrms. Connect the function output (sine wave) from the synthesized function generator to the A input using a BNC cable and appropriate terminator.
The input impedance of the lock-in is 10 M. The generator may require a terminator. Many generators have either a 50 or 600 output impedance. Use the appropriate feedthrough or T termination if necessary. In general, not using a terminator means that the function output amplitude will not agree with the generator setting. The lock-in defaults to the internal oscillator reference set at 1.000 kHz. The reference mode is indicated by the INTERNAL led. In this mode, the internal oscillator sets the detection frequency. The internal oscillator is crystal synthesized so that the actual reference frequency should be very close to the actual generator frequency. The X and Y displays should read values which change very slowly. The lock-in and the generator are not phase locked but they are at the same frequency with some slowly changing phase.
3. Press [Freq]
Show the internal oscillator frequency on the Reference display. By setting the lock-in reference 0.2 Hz away from the signal frequency, the X and Y outputs are 0.2 Hz sine waves (frequency difference between reference and signal). The X and Y output displays
Use the knob to change the frequency to 999.8 Hz.
2-7
X, Y, R and
should now oscillate at about 0.2 Hz (the accuracy is determined by the crystals of the generator and the lock-in).
4. Press [Channel 1 Display] to select R.
The default Channel 1 display is X. Change the display to show R. R is phase independent so it shows a steady value (close to 0.500 V).
5. Press [Channel 2 Display] to select .
The default Channel 2 display is Y. Change the display to show . The phase between the reference and the signal changes by 360 approximately every 5 sec (0.2 Hz difference frequency). The bar graph in this case is scaled to 180. The bar graph should be a linear phase ramp at 0.2 Hz.
6. Press [Freq] Use the knob to adjust the frequency slowly to try to stop the rotation of the phase.
Show the internal oscillator frequency. As the internal reference frequency gets closer to the signal frequency, the phase rotation gets slower and slower. If the frequencies are EXACTLY equal, then the phase is constant.
7. Use a BNC cable to connect the TTL SYNC output from the generator to the Reference Input of the lock-in.
By using the signal generator as the external reference, the lock-in will phase lock its internal oscillator to the signal frequency and the phase will be a constant. Select external reference mode. The lock-in will phase lock to the signal at the Reference Input. With a TTL reference signal, the slope needs to be set to either rising or falling edge. The phase is now constant. The actual phase depends upon the phase difference between the function output and the sync output from the generator. The external reference frequency (as measured by the lock-in) is displayed on the Reference display. The UNLOCK indicator should be OFF (successfully locked to the external reference).
Press [Source] to turn the INTERNAL led off.
Press [Trig] to select POS EDGE.
The displays may be stored in the internal data buffers at a programmable sampling rate. This allows storage of 16000 points of both displays.
2-8
Outputs, Offsets and Expands
OUTPUTS, OFFSETS and EXPANDS

This measurement is designed to use the internal oscillator to explore some of the basic lock-in outputs. You will need BNC cables and a digital voltmeter (DVM). Specifically, you will measure the amplitude of the Sine Out and provide analog outputs proportional to the measurement. The effect of offsets and expands on the displayed values and the analog outputs will be explored.
When the power is turned on with the [Setup] key pressed, the lock-in returns to its standard settings. See the Standard Settings list in the Operation section for a complete listing of the settings. The Channel 1 display shows X and Channel 2 shows Y.
2. Connect the Sine Out on the front panel to the A input using a BNC cable.
The lock-in defaults to the internal oscillator reference set at 1.000 kHz. The reference mode is indicated by the INTERNAL led. In this mode, the lock-in generates a synchronous sine output at the internal reference frequency. The input impedance of the lock-in is 10 M. The Sine Out has an output impedance of 50. Since the Sine Output amplitude is specified into a high impedance load, the output impedance does not affect the amplitude. The sine amplitude is 1.000 Vrms and the sensitivity is 1 V(rms). Since the phase shift of the sine output is very close to zero, Channel 1 (X) should read close to 1.000 V and Channel 2 (Y) should read close to 0.000 V.
3. Connect the CH1 OUTPUT on the front panel to the DVM. Set the DVM to read DC Volts.
The CH1 output defaults to X. The output voltage is simply (X/Sensitivity - Offset)xExpandx10V. In this case, X = 1.000 V, the sensitivity = 1 V, the offset is zero percent and the expand is 1. The output should thus be 10 V or 100% of full scale.
4. Press [Ampl] Use the knob to adjust the sine amplitude to 0.5 V.
Display the sine output amplitude. Set the amplitude to 0.5 V. The Channel 1 display should show X=0.5 V and the CH1 output voltage should be 5 V on the DVM (1/2 of full scale).
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5. Press [Channel 1 Auto Offset] X, Y and R may all be offset and expanded separately. Since Channel 1 is displaying X, the OFFSET and [Expand] keys below the Channel 1 display set the X offset and expand. The display determines which quantity (X or R) is offset and expanded. Auto Offset automatically adjusts the X offset (or Y or R) such that X (or Y or R) becomes zero. In this case, X is offset to zero. The offset should be about 50%. Offsets are useful for making relative measurements. In analog lock-ins, offsets were generally used to remove DC output errors from the lock-in itself. The SR830 has no DC output errors and the offset is not required for most measurements. The offset affects both the displayed value of X and any analog output proportional to X. The CH1 output voltage should be zero in this case. The Offset indicator turns on at the bottom of the Channel 1 display to indicate that the displayed quantity is affected by an offset. Press [Channel 1 Offset Modify] Show the Channel 1 (X) offset in the Reference display. Change the offset to 40% of full scale. The output offsets are a percentage of full scale. The percentage does not change with the sensitivity. The displayed value of X should be 0.100 V (0.5 V - 40% of full scale). The CH1 output voltage is (X/Sensitivity - Offset)xExpandx10V. CH1 Out = (0.5/1.0 - 0.4)x1x10V = 1 V Press [Channel 1 Expand] to select x10. With an expand of 10, the display has one more digit of resolution (100.00 mV full scale). The Expand indicator turns on at the bottom of the Channel 1 display to indicate that the displayed quantity is affected by a non-unity expand. The CH1 output is (X/Sensitivity - Offset)xExpandx10V. In this case, the output voltage is CH1 Out = (0.5/1.0 - 0.4)x10x10V = 10V The expand allows the output gain to be increased by up to 100. The output voltage is limited to 10.9 V and any output which tries to be greater will
Use the knob to adjust the X offset to 40.0%
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turn on the OVLD indicator in the Channel 1 display. With offset and expand, the output voltage gain and offset can be programmed to provide control of feedback signals with the proper bias and gain for a variety of situations. Offsets add and subtract from the displayed values while expand increases the resolution of the display.
6. Connect the DVM to the X output on the rear panel.
The X and Y outputs on the rear panel always provide voltages proportional to X and Y (with offset and expand). The X output voltage should be 10 V, just like the CH1 output.
7. Connect the DVM to the CH1 OUTPUT on the front panel again.
The front panel outputs can be configured to output different quantities while the rear panel outputs always output X and Y. NOTE: Outputs proportional to X and Y (rear panel, CH1 or CH2) have 100 kHz of bandwidth. The CH1 and CH2 outputs, when configured to be proportional to the displays (even if the display is X or Y) are updated at 512 Hz and have a 200 Hz bandwidth. It is important to keep this in mind if you use very short time constants.
Press [Channel 1 Output] to select Display.
CH1 OUTPUT can be proportional to X or the display. Choose Display. The display is X so the CH1 output should remain 10.0 V (but its bandwidth is only 200 Hz instead of 100 kHz). Let's change CH1 to output R. The X and Y offset and expand functions are output functions, they do NOT affect the calculation of R or . Thus, Channel 1 (R) should be 0.5V and the CH1 output voltage should be 5V (1/2 of full scale). The Channel 1 offset and expand keys now set the R offset and expand. The X offset and expand are still set at 40% and x10 as reflected at the rear panel X output. See the DC Outputs and Scaling discussion in the Lock-In Basics section for more detailed information on output scaling.
Press [Channel 1 Display] to select R.
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Storing and Recalling Setups
STORING and RECALLING SETUPS

The SR830 can store 9 complete instrument setups in non-volatile memory.
1. Turn the lock-in on while holding down the [Setup] key. Wait until the power-on tests are completed. Disconnect any cables from the lock-in.
When the power is turned on with the [Setup] key pressed, the lock-in returns to its standard settings. See the Standard Settings list in the Operation section for a complete listing of the settings. Change the lock-in setup so that we have a nondefault setup to save.
2. Press [Sensitivity Down] to select 100 mV. Press [Time Constant Up] to select 1 S.
Change the sensitivity to 100 mV. Change the time constant to 1 second.
3. Press [Save]
The Reference display shows the setup number (1-9). The knob selects the setup number. Press [Save] again to complete the save operation. Any other key aborts the save. The current setup is now saved as setup number 3.
Use the knob to select setup number 3. Press [Save] again.
4. Turn the lock-in off and on while holding down the [Setup] key. Wait until the power-on tests are complete.
Change the lock-in setup back to the default setup. Now let's recall the lock-in setup that we just saved. Check that the sensitivity and time constant are 1V and 100 ms (default values).
5. Press [Recall] Use the knob to select setup number 3. Press [Recall] again.
The Reference display shows the setup number. The knob selects the setup number. Press [Recall] again to complete the recall operation. Any other key aborts the recall. The sensitivity and time constant should be the same as those in effect when the setup was saved.
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Storing and Recalling Setups
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Aux Outputs and Inputs
AUX OUTPUTS and INPUTS

This measurement is designed to illustrate the use of the Aux Outputs and Inputs on the rear panel. You will need BNC cables and a digital voltmeter (DVM). Specifically, you will set the Aux Output voltages and measure them with the DVM. These outputs will then be connected to the Aux Inputs to simulate external DC voltages which the lock-in can measure.
When the power is turned on with the [Setup] key pressed, the lock-in returns to its standard settings. See the Standard Settings list in the Operation section for a complete listing of the settings.
2. Connect Aux Out 1 on the rear panel to the DVM. Set the DVM to read DC volts.
The 4 Aux Outputs can provide programmable voltages between -10.5 and +10.5 volts. The outputs can be set from the front panel or via the computer interface.
3. Press [Aux Out] until the Reference display shows the level of Aux Out 1( as indicated by the AxOut1 led below the display). Use the knob to adjust the level to 10.00 V.
Show the level of Aux Out 1 on the Reference display.
Change the output to 10V. The DVM should display 10.0 V. Change the output to -5V. The DVM should display -5.0 V. The 4 outputs are useful for controlling other parameters in an experiment, such as pressure, temperature, wavelength, etc.
Use the knob to adjust the level to -5.00 V.
4. Press [Channel 1 Display] to select AUX IN 1.
Change the Channel 1 display to measure Aux Input 1. The Aux Inputs can read 4 analog voltages. These inputs are useful for monitoring and measuring other parameters in an experiment, such as pressure, temperature, position, etc. We'll use Aux Out 1 to provide an analog voltage to measure.
5. Disconnect the DVM from Aux Out 1. Connect AuxOut 1 to Aux In 1 on the rear panel.
Channel 1 should now display -5 V (Aux In 1).
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Aux Outputs and Inputs

6. Press [Channel 2 Display] to select AUX IN 3. Change the Channel 2 display to measure Aux Input 3.
7. Connect Aux Out 1 to Aux In 3 on the rear panel.
Channel 2 should now display -5 V (Aux In 3). The Channel 1 and 2 displays may be ratio'ed to the Aux Input voltages. See the Basics section for more about output scaling. The displays may be stored in the internal data buffers at a programmable sampling rate. This allows storage of not only the lock-in outputs, X,Y, R or , but also the values of the Aux Inputs. See the Programming section for more details.
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SR830 BASICS WHAT IS A LOCK-IN AMPLIFIER?

Lock-in amplifiers are used to detect and measure very small AC signals - all the way down to a few nanovolts! Accurate measurements may be made even when the small signal is obscured by noise sources many thousands of times larger. Lock-in amplifiers use a technique known as phase-sensitive detection to single out the component of the signal at a specific reference frequency AND phase. Noise signals at frequencies other than the reference frequency are rejected and do not affect the measurement. experiment at the reference frequency. In the diagram below, the reference signal is a square wave at frequency r. This might be the sync output from a function generator. If the sine output from the function generator is used to excite the experiment, the response might be the signal waveform shown below. The signal is Vsig sin(rt + sig ) where V sig is the signal amplitude. The SR830 generates its own sine wave, shown as the lock-in reference below. The lock-in reference is VLsin(Lt + ref). Reference sig Signal
Why use a lock-in?

Let's consider an example. Suppose the signal is a 10 nV sine wave at 10 kHz. Clearly some amplification is required. A good low noise amplifier will have about 5 nV/Hz of input noise. If the amplifier bandwidth is 100 kHz and the gain is 1000, then we can expect our output to be 10 V of signal (10 nV x 1000) and 1.6 mV of broadband noise (5 nV/Hz x 100 kHz x 1000). We won't have much luck measuring the output signal unless we single out the frequency of interest. If we follow the amplifier with a band pass filter with a Q=100 (a VERY good filter) centered at 10 kHz, any signal in a 100 Hz bandwidth will be detected (10 kHz/Q). The noise in the filter pass band will be 50 V (5 nV/Hz x 100 Hz x 1000) and the signal will still be 10 V. The output noise is much greater than the signal and an accurate measurement can not be made. Further gain will not help the signal to noise problem. Now try following the amplifier with a phasesensitive detector (PSD). The PSD can detect the signal at 10 kHz with a bandwidth as narrow as 0.01 Hz! In this case, the noise in the detection bandwidth will be only 0.5 V (5 nV/Hz x .01 Hz x 1000) while the signal is still 10 V. The signal to noise ratio is now 20 and an accurate measurement of the signal is possible.
ref Lock-in Reference The SR830 amplifies the signal and then multiplies it by the lock-in reference using a phase-sensitive detector or multiplier. The output of the PSD is simply the product of two sine waves. V psd = V sig VLsin(rt + sig )sin(Lt + ref) = 1/2 Vsig V Lcos([ r - L]t + sig - ref) 1/2 Vsig V Lcos([ r + L]t + sig + ref) The PSD output is two AC signals, one at the difference frequency ( r - L) and the other at the sum frequency ( r + L). If the PSD output is passed through a low pass filter, the AC signals are removed. What will be left? In the general case, nothing. However, if r equals L, the difference frequency component will be a DC signal. In this case, the filtered PSD output will be V psd = 1/2 Vsig V Lcos(sig - ref)
What is phase-sensitive detection?

Lock-in measurements require a frequency reference. Typically an experiment is excited at a fixed frequency (from an oscillator or function generator) and the lock-in detects the response from the
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SR830 Basics
This is a very nice signal - it is a DC signal proportional to the signal amplitude. sync) which is always phase-locked to the reference oscillator.
Narrow band detection

Now suppose the input is made up of signal plus noise. The PSD and low pass filter only detect signals whose frequencies are very close to the lockin reference frequency. Noise signals at frequencies far from the reference are attenuated at the PSD output by the low pass filter (neither noise ref nor noise +ref are close to DC). Noise at frequencies very close to the reference frequency will result in very low frequency AC outputs from the PSD (|noise -ref| is small). Their attenuation depends upon the low pass filter bandwidth and roll-off. A narrower bandwidth will remove noise sources very close to the reference frequency, a wider bandwidth allows these signals to pass. The low pass filter bandwidth determines the bandwidth of detection. Only the signal at the reference frequency will result in a true DC output and be unaffected by the low pass filter. This is the signal we want to measure.
Magnitude and phase

Remember that the PSD output is proportional to Vsig cos where = (sig - ref). is the phase difference between the signal and the lock-in reference oscillator. By adjusting ref we can make equal to zero, in which case we can measure Vsig (cos=1). Conversely, if is 90, there will be no output at all. A lock-in with a single PSD is called a single-phase lock-in and its output is V sig cos. This phase dependency can be eliminated by adding a second PSD. If the second PSD multiplies the signal with the reference oscillator shifted by 90, i.e. VLsin(Lt + ref + 90), its low pass filtered output will be V psd2 = V psd2 ~ 1/2 Vsig V Lsin(sig - ref) V sig sin
Where does the lock-in reference come from?

We need to make the lock-in reference the same as the signal frequency, i.e. r = L. Not only do the frequencies have to be the same, the phase between the signals can not change with time, otherwise cos(sig - ref) will change and V psd will not be a DC signal. In other words, the lock-in reference needs to be phase-locked to the signal reference. Lock-in amplifiers use a phase-locked-loop (PLL) to generate the reference signal. An external reference signal (in this case, the reference square wave) is provided to the lock-in. The PLL in the lock-in locks the internal reference oscillator to this external reference, resulting in a reference sine wave at r with a fixed phase shift of ref. Since the PLL actively tracks the external reference, changes in the external reference frequency do not affect the measurement.
Now we have two outputs, one proportional to cos and the other proportional to sin. If we call the first output X and the second Y, X = Vsig cos Y = Vsig sin
these two quantities represent the signal as a vector relative to the lock-in reference oscillator. X is called the 'in-phase' component and Y the 'quadrature' component. This is because when =0, X measures the signal while Y is zero. By computing the magnitude (R) of the signal vector, the phase dependency is removed. R = (X 2 + Y2)1/2 = Vsig R measures the signal amplitude and does not depend upon the phase between the signal and lock-in reference. A dual-phase lock-in, such as the SR830, has two PSD's, with reference oscillators 90 apart, and can measure X, Y and R directly. In addition, the phase between the signal and lock-in reference, can be measured according to = tan -1 (Y/X)
All lock-in measurements require a reference signal.

In this case, the reference is provided by the excitation source (the function generator). This is called an external reference source. In many situations, the SR830's internal oscillator may be used instead. The internal oscillator is just like a function generator (with variable sine output and a TTL
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SR830 Basics
WHAT DOES A LOCK-IN MEASURE?

So what exactly does the SR830 measure? Fourier's theorem basically states that any input signal can be represented as the sum of many, many sine waves of differing amplitudes, frequencies and phases. This is generally considered as representing the signal in the "frequency domain". Normal oscilloscopes display the signal in the "time domain". Except in the case of clean sine waves, the time domain representation does not convey very much information about the various frequencies which make up the signal. frequencies is removed by the low pass filter following the multiplier. This "bandwidth narrowing" is the primary advantage that a lock-in amplifier provides. Only inputs at frequencies at the reference frequency result in an output.
RMS or Peak?
Lock-in amplifiers as a general rule display the input signal in Volts RMS. When the SR830 displays a magnitude of 1V (rms), the component of the input signal at the reference frequency is a sine wave with an amplitude of 1 Vrms or 2.8 V pk-pk. Thus, in the previous example with a 2 V pk-pk square wave input, the SR830 would detect the first sine component, 1.273sin(t). The measured and displayed magnitude would be 0.90 V (rms) (1/2 x 1.273).
What does the SR830 measure?

The SR830 multiplies the signal by a pure sine wave at the reference frequency. All components of the input signal are multiplied by the reference simultaneously. Mathematically speaking, sine waves of differing frequencies are orthogonal, i.e. the average of the product of two sine waves is zero unless the frequencies are EXACTLY the same. In the SR830, the product of this multiplication yields a DC output signal proportional to the component of the signal whose frequency is exactly locked to the reference frequency. The low pass filter which follows the multiplier provides the averaging which removes the products of the reference with components at all other frequencies. The SR830, because it multiplies the signal with a pure sine wave, measures the single Fourier (sine) component of the signal at the reference frequency. Let's take a look at an example. Suppose the input signal is a simple square wave at frequency f. The square wave is actually composed of many sine waves at multiples of f with carefully related amplitudes and phases. A 2V pk-pk square wave can be expressed as S(t) = 1.273sin(t) + 0.4244sin(3t) + 0.2546sin(5t) + ... where = 2f. The SR830, locked to f will single out the first component. The measured signal will be 1.273sin(t), not the 2V pk-pk that you'd measure on a scope. In the general case, the input consists of signal plus noise. Noise is represented as varying signals at all frequencies. The ideal lock-in only responds to noise at the reference frequency. Noise at other
Degrees or Radians?
In this discussion, frequencies have been referred to as f (Hz) and (2f radians/sec). This is because people measure frequencies in cycles per second and math works best in radians. For purposes of measurement, frequencies as measured in a lock-in amplifier are in Hz. The equations used to explain the actual calculations are sometimes written using to simplify the expressions. Phase is always reported in degrees. Once again, this is more by custom than by choice. Equations written as sin(t + ) are written as if is in radians mostly for simplicity. Lock-in amplifiers always manipulate and measure phase in degrees.
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SR830 Basics
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SR830 Basics
THE FUNCTIONAL SR830

The functional block diagram of the SR830 DSP Lock-In Amplifier is shown below. The functions in the gray area are handled by the digital signal processor (DSP). We'll discuss the DSP aspects of the SR830 as they come up in each functional block description.
Low Noise Differential Amp A Voltage B Current I
50/60 Hz Notch Filter
100/120 Hz Notch Filter
Gain
DC Gain Offset Expand 90 Phase Shift Phase Sensitive Detector Low Pass Filter Y Out
R and Calc
Reference In Sine or TTL Discriminator
PLL Phase Locked Loop Internal Oscillator
Phase Shifter Phase Sensitive Detector
Low Pass Filter DC Gain Offset Expand
X Out
Sine Out
TTL Out
SR830 FUNCTIONAL BLOCK DIAGRAM
Discriminator
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SR830 Basics
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SR830 Basics
REFERENCE CHANNEL
A lock-in amplifier requires a reference oscillator phase-locked to the signal frequency. In general, this is accomplished by phase-locking an internal oscillator to an externally provided reference signal. This reference signal usually comes from the signal source which is providing the excitation to the experiment. When an external reference is used, this internal oscillator sine wave is phase-locked to the reference. The rising zero crossing is locked to the detected reference zero crossing or edge. In this mode, the SINE OUT provides a sine wave phaselocked to the external reference. At low frequencies (below 10 Hz), the phase locking is accomplished digitally by the DSP. At higher frequencies, a discrete phase comparator is used. The internal oscillator may be used without an external reference. In the Internal Reference mode, the SINE OUT provides the excitation for the experiment. The phase-locked-loop is not used in this mode since the lock-in reference is providing the excitation signal. The TTL OUT on the rear panel provides a TTL sync output. The internal oscillator's rising zero crossings are detected and translated to TTL levels. This output is a square wave.
Reference Input
The SR830 reference input can trigger on an analog signal (like a sine wave) or a TTL logic signal. The first case is called External Sine. The input is AC coupled (above 1 Hz) and the input impedance is 1 M. A sine wave input greater than 200 mV pk will trigger the input discriminator. Positive zero crossings are detected and considered to be the zero for the reference phase shift. TTL reference signals can be used at all frequencies up to 102 kHz. For frequencies below 1 Hz, a TTL reference signal is required. Many function generators provide a TTL SYNC output which can be used as the reference. This is convenient since the generator's sine output might be smaller than 200 mV or be varied in amplitude. The SYNC signal will provide a stable reference regardless of the sine amplitude. When using a TTL reference, the reference input trigger can be set to Pos Edge (detect rising edges) or Neg Edge (detect falling edges). In each case, the internal oscillator is locked (at zero phase) to the detected edge.
Reference Oscillators and Phase

The internal oscillator sine wave is not the reference signal to the phase sensitive detectors. The DSP computes a second sine wave, phase shifted by ref from the internal oscillator (and thus from an external reference), as the reference input to the X phase sensitive detector. This waveform is sin(rt + ref). The reference phase shift is adjustable in .01 increments. The input to the Y PSD is a third sine wave, computed by the DSP, shifted by 90 from the second sine wave. This waveform is sin(rt + ref + 90). Both reference sine waves are calculated to 20 bits of accuracy and a new point is calculated every 4 s (256 kHz). The phase shifts (ref and the 90 shift) are also exact numbers and accurate to better than .001. Neither waveform is actually output in analog form since the phase sensitive detectors are actually multiply instructions inside the DSP.
Internal Oscillator
The internal oscillator in the SR830 is basically a 102 kHz function generator with sine and TTL sync outputs. The oscillator can be phase-locked to the external reference. The oscillator generates a digitally synthesized sine wave. The digital signal processor, or DSP, sends computed sine values to a 16 bit digital-toanalog converter every 4 s (256 kHz). An antialiasing filter converts this sampled signal into a low distortion sine wave. The internal oscillator sine wave is output at the SINE OUT BNC on the front panel. The amplitude of this output may be set from 4 mV to 5 V.
Phase Jitter
When an external reference is used, the phaselocked loop adds a little phase jitter. The internal oscillator is supposed to be locked with zero phase shift relative the external reference. Phase
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SR830 Basics
jitter means that the average phase shift is zero but the instantaneous phase shift has a few millidegrees of noise. This shows up at the output as noise in phase or quadrature measurements. Phase noise can also cause noise to appear at the X and Y outputs. This is because a reference oscillator with a lot of phase noise is the same as a reference whose frequency spectrum is spread out. That is, the reference is not a single frequency, but a distribution of frequencies about the true reference frequency. These spurious frequencies are attenuated quite a bit but still cause problems. The spurious reference frequencies result in signals close to the reference being detected. Noise at nearby frequencies now appears near DC and affects the lock-in output. Phase noise in the SR830 is very low and generally causes no problems. In applications requiring no phase jitter, the internal reference mode should be used. Since there is no PLL, the internal oscillator and the reference sine waves are directly linked and there is no jitter in the measured phase. (Actually, the phase jitter is the phase noise of a crystal oscillator and is very, very small).
Harmonic Detection
It is possible to compute the two PSD reference sine waves at a multiple of the internal oscillator frequency. In this case, the lock-in detects signals at Nxfref which are synchronous with the reference. The SINE OUT frequency is not affected. The SR830 can detect at any harmonic up to N=19999 as long as Nxfref does not exceed 102 kHz.
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SR830 Basics
THE PHASE SENSITIVE DETECTORS (PSD's)

The SR830 multiplies the signal with the reference sine waves digitally. The amplified signal is converted to digital form using a 16 bit A/D converter sampling at 256 kHz. The A/D converter is preceded by a 102 kHz anti-aliasing filter to prevent higher frequency inputs from aliasing below 102 kHz. The signal amplifier and filters will be discussed later. This input data stream is multiplied, a point at a time, with the computed reference sine waves described previously. Every 4 s, the input signal is sampled and the result is multiplied by the two reference sine waves (90 apart). present, 1000 times or 60 dB greater than the full scale signal, the analog PSD measures the signal with an error. The error is caused by non-linearity in the multiplication (the error at the output depends upon the amplitude of the input). This error can be quite large (10% of full scale) and depends upon the noise amplitude, frequency, and waveform. Since noise generally varies quite a bit in these parameters, the PSD error causes quite a bit of output uncertainty. In the digital lock-in, the dynamic reserve is limited by the quality of the A/D conversion. Once the input signal is digitized, no further errors are introduced. Certainly the accuracy of the multiplication does not depend on the size of the numbers. The A/D converter used in the SR830 is extremely linear, meaning that the presence of large noise signals does not impair its ability to correctly digitize a small signal. In fact, the dynamic reserve of the SR830 can exceed 100 dB without any problems. We'll talk more about dynamic reserve a little later. An analog linear PSD multiplies the signal by an analog reference sine wave. Any amplitude variation in the reference amplitude shows up directly as a variation in the overall gain. Analog sine wave generators are susceptible to amplitude drift, especially as a function of temperature. The digital reference sine wave has a precise amplitude and never changes. This eliminates a major source of gain error in a linear analog lock-in. The overall performance of a lock-in amplifier is largely determined by the performance of its phase sensitive detectors. In virtually all respects, the digital PSD outperforms its analog counterparts. We've discussed how the digital signal processor in the SR830 computes the internal oscillator and two reference sine waves and handles both phase sensitive detectors. In the next section, we'll see the same DSP perform the low pass filtering and DC amplification required at the output of the PSD's. Here again, the digital technique eliminates many of the problems associated with analog lockin amplifiers.
Digital PSD vs Analog PSD

The phase sensitive detectors (PSD's) in the SR830 act as linear multipliers, that is, they multiply the signal with a reference sine wave. Analog PSD's (both square wave and linear) have many problems associated with them. The main problems are harmonic rejection, output offsets, limited dynamic reserve and gain error. The digital PSD multiplies the digitized signal with a digitally computed reference sine wave. Because the reference sine waves are computed to 20 bits of accuracy, they have very low harmonic content. In fact, the harmonics are at the -120 dB level! This means that the signal is multiplied by a single reference sine wave (instead of a reference and its many harmonics) and only the signal at this single reference frequency is detected. The SR830 is completely insensitive to signals at harmonics of the reference. In contrast, a square wave multiplying lock-in will detect at all of the odd harmonics of the reference (a square wave contains many large odd harmonics). Output offset is a problem because the signal of interest is a DC output from the PSD and an output offset contributes to error and zero drift. The offset problems of analog PSD's are eliminated using the digital multiplier. There are no erroneous DC output offsets from the digital multiplication of the signal and reference. In fact, the actual multiplication is totally free from errors. The dynamic reserve of an analog PSD is limited to about 60 dB. When there is a large noise signal
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SR830 Basics
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SR830 Basics
TIME CONSTANTS and DC GAIN

Remember, the output of the PSD contains many signals. Most of the output signals have frequencies which are either the sum or difference between an input signal frequency and the reference frequency. Only the component of the input signal whose frequency is exactly equal to the reference frequency will result in a DC output. The low pass filter at the PSD output removes all of the unwanted AC signals, both the 2F (sum of the signal and the reference) and the noise components. This filter is what makes the lock-in such a narrow band detector. stages of filtering with a maximum roll off of 12 dB/oct. This limitation is usually due to space and expense. Each filter needs to have many different time constant settings. The different settings require different components and switches to select them, all of which is costly and space consuming. The digital signal processor in the SR830 handles all of the low pass filtering. Each PSD can be followed by up to four filter stages for up to 24 dB/oct of roll off. Since the filters are digital, the SR830 is not limited to just two stages of filtering. Why is the increased roll off desirable? Consider an example where the reference is at 1 kHz and a large noise signal is at 1.05 kHz. The PSD noise outputs are at 50 Hz (difference) and 2.05 kHz (sum). Clearly the 50 Hz component is the more difficult to low pass filter. If the noise signal is 80 dB above the full scale signal and we would like to measure the signal to 1% (-40 dB), then the 50 Hz component needs to be reduced by 120 dB. To do this in two stages would require a time constant of at least 3 seconds. To accomplish the same attenuation in four stages only requires 100 ms of time constant. In the second case, the output will respond 30 times faster and the experiment will take less time.
Time Constants
Lock-in amplifiers have traditionally set the low pass filter bandwidth by setting the time constant. The time constant is simply 1/2f where f is the -3 dB frequency of the filter. The low pass filters are simple 6 dB/oct roll off, RC type filters. A 1 second time constant referred to a filter whose -3 dB point occurred at 0.16 Hz and rolled off at 6 dB/oct beyond 0.16 Hz. Typically, there are two successive filters so that the overall filter can roll off at either 6 dB or 12 dB per octave. The time constant referred to the -3 dB point of each filter alone (not the combined filter). The notion of time constant arises from the fact that the actual output is supposed to be a DC signal. In fact, when there is noise at the input, there is noise on the output. By increasing the time constant, the output becomes more steady and easier to measure reliably. The trade off comes when real changes in the input signal take many time constants to be reflected at the output. This is because a single RC filter requires about 5 time constants to settle to its final value. The time constant reflects how slowly the output responds, and thus the degree of output smoothing. The time constant also determines the equivalent noise bandwidth (ENBW) for noise measurements. The ENBW is NOT the filter -3 dB pole, it is the effective bandwidth for Gaussian noise. More about this later.
Synchronous Filters
Another advantage of digital filtering is the ability to do synchronous filtering. Even if the input signal has no noise, the PSD output always contains a component at 2F (sum frequency of signal and reference) whose amplitude equals or exceeds the desired DC output depending upon the phase. At low frequencies, the time constant required to attenuate the 2F component can be quite long. For example, at 1 Hz, the 2F output is at 2 Hz and to attenuate the 2 Hz by 60 dB in two stages requires a time constant of 3 seconds. A synchronous filter, on the other hand, operates totally differently. The PSD output is averaged over a complete cycle of the reference frequency. The result is that all components at multiples of the reference (2F included) are notched out completely. In the case of a clean signal, almost no additional filtering would be required. This is
Digital Filters vs Analog Filters

The SR830 improves on analog filters in many ways. First, analog lock-ins provide at most, two
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SR830 Basics
increasingly useful the lower the reference frequency. Imagine what the time constant would need to be at 0.001 Hz! In the SR830, synchronous filters are available at detection frequencies below 200 Hz. At higher frequencies, the filters are not required (2F is easily removed without using long time constants). Below 200 Hz, the synchronous filter follows either one or two stages of normal filters. The output of the synchronous filter is followed by two more stages of normal filters. This combination of filters notches all multiples of the reference frequency and provides overall noise attenuation as well. the dynamic reserve is increased to 80dB, then this offset needs to be 10 times smaller still. This is one of the reasons why analog lock-ins do not perform well at very high dynamic reserve. The digital lock-in does not have an analog DC amplifier. The output gain is yet another function handled by the digital signal processor. We already know that the digital PSD has no DC output offset. Likewise, the digital DC amplifier has no input offset. Amplification is simply taking input numbers and multiplying by the gain. This allows the SR830 to operate with 100 dB of dynamic reserve without any output offset or zero drift.
Long Time Constants

Time constants above 100 seconds are difficult to accomplish using analog filters. This is simply because the capacitor required for the RC filter is prohibitively large (in value and in size!). Why would you use such a long time constant? Sometimes you have no choice. If the reference is well below 1 Hz and there is a lot of low frequency noise, then the PSD output contains many very low frequency components. The synchronous filter only notches multiples of the reference frequency, the noise is filtered by the normal filters. The SR830 can provide time constants as long as 30000 seconds at reference frequencies below 200 Hz. Obviously you don't use long time constants unless absolutely necessary, but they're available.
What about resolution?

Just like the analog lock-in where the noise can not exceed the input range of the PSD, in the digital lock-in, the noise can not exceed the input range of the A/D converter. With a 16 bit A/D converter, a dynamic reserve of 60 dB means that while the noise has a range of the full 16 bits, the full scale signal only uses 6 bits. With a dynamic reserve of 80 dB, the full scale signal uses only 2.5 bits. And with 100 dB dynamic reserve, the signal is below a single bit! Clearly multiplying these numbers by a large gain is not going to result in a sensible output. Where does the output resolution come from? The answer is filtering. The low pass filters effectively combine many data samples together. For example, at a 1 second time constant, the output is the result of averaging data over the previous 4 or 5 seconds. At a sample rate of 256 kHz, this means each output point is the exponential average of over a million data points. (A new output point is computed every 4 s and is a moving exponential average). What happens when you average a million points? To first order, the resulting average has more resolution than the incoming data points by a factor of million . This represents a gain of 20 bits in resolution over the raw data. A 1 bit input data stream is converted to 20 bits of output resolution. The compromise here is that with high dynamic reserve (large DC gains), some filtering is required. The shortest time constants are not available when the dynamic reserve is very high. This is not really a limitation since presumably there is noise which is requiring the high dynamic reserve and thus substantial output filtering will also be required.
DC Output Gain
How big is the DC output from the PSD? It depends on the dynamic reserve. With 60 dB of dynamic reserve, a noise signal can be 1000 times (60 dB) greater than a full scale signal. At the PSD, the noise can not exceed the PSD's input range. In an analog lock-in, the PSD input range might be 5V. With 60 dB of dynamic reserve, the signal will be only 5 mV at the PSD input. The PSD typically has no gain so the DC output from the PSD will only be a few millivolts! Even if the PSD had no DC output errors, amplifying this millivolt signal up to 10 V is error prone. The DC output gain needs to be about the same as the dynamic reserve (1000 in this case) to provide a 10 V output for a full scale input signal. An offset as small as 1 mV will appear as 1 V at the output! In fact, the PSD output offset plus the input offset of the DC amplifier needs to be on the order of 10 V in order to not affect the measurement. If
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SR830 Basics
DC OUTPUTS and SCALING

The SR830 has X and Y outputs on the rear panel and Channel 1 and 2 (CH1 and CH2) outputs on the front panel. defined as X, Y or R, the output scale is also 10 V full scale. Lock-in amplifiers are designed to measure the RMS value of the AC input signal. All sensitivities and X, Y and R outputs and displays are RMS values. Phase is a quantity which ranges from -180 to +180 regardless of the sensitivity. When CH2 outputs a voltage proportional to , the output scale is 18/Volt or 180=10V.
X and Y Rear Panel Outputs

The X and Y rear panel outputs are the outputs from the two phase sensitive detectors with low pass filtering, offset and expand. These outputs are the traditional outputs of an analog lock-in. The X and Y outputs have an output bandwidth of 100 kHz.
CH1 and CH2 Front Panel Outputs

The two front panel outputs can be configured to output voltages proportional to the CH1 and CH2 displays or X and Y. If the outputs are set to X or Y, these outputs duplicate the rear panel outputs. If they are set to Display, the output is updated at 512 Hz. The CH1 display can be defined as X, R, X Noise, Aux Input 1 or 2, or any of these quantities divided by Aux Input 1 or 2. The CH2 display can be defined as Y, , Y Noise, Aux Input 3 or 4, or any of these quantities divided by Aux Input 3 or 4. If a display is defined as simply X or Y, this display, when output through the CH1 or CH2 output BNC, will only update at 512 Hz. It is better in this case to set output to X or Y directly, rather than the display.
X, Y and R Output Offset and Expand

The SR830 has the ability to offset the X, Y and R outputs. This is useful when measuring deviations in the signal around some nominal value. The offset can be set so that the output is offset to zero. Changes in the output can then be read directly from the display or output voltages. The offset is specified as a percentage of full scale and the percentage does not change when the sensitivity is changed. Offsets up to 105% can be programmed. The X, Y and R outputs may also be expanded. This simply takes the output (minus its offset) and multiplies by an expansion factor. Thus, a signal which is only 10% of full scale can be expanded to provide 10 V of output rather than only 1 V. The normal use for expand is to expand the measurement resolution around some value which is not zero. For example, suppose a signal has a nominal value of 0.9 mV and we want to measure small deviations, say 10 V or so, in the signal. The sensitivity of the lock-in needs to be 1 mV to accommodate the nominal signal. If the offset is set to 90% of full scale, then the nominal 0.9 mV signal will result in a zero output. The 10 V deviations in the signal only provide 100 mV of DC output. If the output is expanded by 10, these small deviations are magnified by 10 and provide outputs of 1 VDC. The SR830 can expand the output by 10 or 100 provided the expanded output does not exceed full scale. In the above example, the 10 V deviations can be expanded by 100 times before they exceed full scale (at 1 mV sensitivity).
X, Y, R and Output scales

The sensitivity of the lock-in is the rms amplitude of an input sine (at the reference frequency) which results in a full scale DC output. Traditionally, full scale means 10 VDC at the X, Y or R BNC output. The overall gain (input to output) of the amplifier is then 10 V/sensitivity. This gain is distributed between AC gain before the PSD and DC gain following the PSD. Changing the dynamic reserve at a given sensitivity changes the gain distribution while keeping the overall gain constant. The SR830 considers 10 V to be full scale for any output proportional to simply X, Y or R. This is the output scale for the X and Y rear panel outputs as well as the CH1 and CH2 outputs when configured to output X or Y. When the CH1 or CH2 outputs are proportional to a display which is simply
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SR830 Basics
The analog output with offset and expand is Output = (signal/sensitivity - offset) x Expand x10V where offset is a fraction of 1 (50%=0.5), expand is 1, 10 or 100, and the output can not exceed 10 V. In the above example, Output = (0.91mV/1mV - 0.9) x 10 x 10V = 1V for a signal which is 10 V greater than the 0.9 mV nominal. (Offset = 0.9 and expand =10). The X and Y offset and expand functions in the SR830 are output functions, they do NOT affect the calculation of R or . R has its own output offset and expand. where offset is a fraction of 1 (50%-0.5), expand is 1, 10 or 100, and the display can not exceed 100%. For example, if the sensitivity is 1V and CH1 display is showing X/Aux 1. If X= 500 mV and Aux 1= 2.34 V, then the display value is (0.5/1.0)x100/2.34 or 21.37%. This value is affected by the sensitivity, offset and X expand. In the case of , the full scale sensitivity is always 180. The Ratio indicator below the display is on whenever a display is showing a ratio quantity.
Display output scaling

What about CH1 or CH2 outputs proportional to ratio displays? The output voltage will simply be the displayed percentage times 10V full scale. In the above example, the displayed ratio of 21.37% will output 2.137V from the CH1 output.
CH1 and CH2 Displays

The CH1 display can show X, R, X Noise, Aux Input 1 or 2, or any of these quantities divided by Aux Input 1 or 2. The CH2 display can show Y, , Y Noise, Aux Input 3 or 4, or any of these quantities divided by Aux Input 3 or 4. Output offsets ARE reflected in the displays. For example, if CH1 is displaying X, it is affected by the X offset. When the X output is offset to zero, the displayed value will drop to zero also. Any display which is showing a quantity which is affected by a non-zero offset will display a highlighted Offset indicator below the display. Output expands do NOT increase the displayed values of X, Y or R. Expand increases the resolution of the X, Y or R value used to calculate the displayed value. For example, CH1 when displaying X does not increase its displayed value when X is expanded. This is because the expand function increases the resolution with which the signal is measured, not the size of the input signal. The displayed value will show an increased resolution but will continue to display the original value of X minus the X offset. Any display which is showing a quantity which is affected by a non-unity expand will display a highlighted Expand indicator below the display. Ratio displays are displayed as percentages. The displayed percentage for X/Aux 1 would be Display % = (signal/sensitivity-offset)xExpandx100 Aux In 1 (in Volts)
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SR830 Basics
DYNAMIC RESERVE
We've mentioned dynamic reserve quite a bit in the preceding discussions. It's time to clarify dynamic reserve a bit. because the DC output amplifier is running at very high gain and low frequency noise and offset drift at the PSD output or the DC amplifier input will be amplified and appear large at the output. The noise is more tolerable than the DC drift errors since increasing the time constant will attenuate the noise. The DC drift in an analog lock-in is usually on the order of 1000ppm/C when using 60 dB of dynamic reserve. This means that the zero point moves 1% of full scale over 10C temperature change. This is generally considered the limit of tolerable. Lastly, dynamic reserve depends on the noise frequency. Clearly noise at the reference frequency will make its way to the output without attenuation. So the dynamic reserve at fref is 0dB. As the noise frequency moves away from the reference frequency, the dynamic reserve increases. Why? Because the low pass filter after the PSD attenuates the noise components. Remember, the PSD outputs are at a frequency of |fnoise -fref|. The rate at which the reserve increases depends upon the low pass filter time constant and roll off. The reserve increases at the rate at which the filter rolls off. This is why 24 dB/oct filters are better than 6 or 12 dB/oct filters. When the noise frequency is far away, the reserve is limited by the gain distribution and overload level of each gain element. This reserve level is the dynamic reserve actual reserve 60 dB 60 dB specified reserve
What is dynamic reserve really?

Suppose the lock-in input consists of a full scale signal at fref plus noise at some other frequency. The traditional definition of dynamic reserve is the ratio of the largest tolerable noise signal to the full scale signal, expressed in dB. For example, if full scale is 1 V, then a dynamic reserve of 60 dB means noise as large as 1 mV (60 dB greater than full scale) can be tolerated at the input without overload. The problem with this definition is the word 'tolerable'. Clearly the noise at the dynamic reserve limit should not cause an overload anywhere in the instrument - not in the input signal amplifier, PSD, low pass filter or DC amplifier. This is accomplished by adjusting the distribution of the gain. To achieve high reserve, the input signal gain is set very low so the noise is not likely to overload. This means that the signal at the PSD is also very small. The low pass filter then removes the large noise components from the PSD output which allows the remaining DC component to be amplified (a lot) to reach 10 V full scale. There is no problem running the input amplifier at low gain. However, as we have discussed previously, analog lock-ins have a problem with high reserve because of the linearity of the PSD and the DC offsets of the PSD and DC amplifier. In an analog lock-in, large noise signals almost always disturb the measurement in some way. The most common problem is a DC output error caused by the noise signal. This can appear as an offset or as a gain error. Since both effects are dependent upon the noise amplitude and frequency, they can not be offset to zero in all cases and will limit the measurement accuracy. Because the errors are DC in nature, increasing the time constant does not help. Most lock-ins define tolerable noise as noise levels which do not affect the output more than a few percent of full scale. This is more severe than simply not overloading. Another effect of high dynamic reserve is to generate noise and drift at the output. This comes about
40 dB
20 dB low pass filter bandwidth 0 dB fref referred to in the specifications. The above graph shows the actual reserve vs the frequency of the noise. In some instruments, the fnoise
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SR830 Basics
signal input attenuates frequencies far outside the lock-in's operating range (fnoise>>100 kHz). In these cases, the reserve can be higher at these frequencies than within the operating range. While this may be a nice specification, removing noise at frequencies very far from the reference does not require a lock-in amplifier. Lock-ins are used when there is noise at frequencies near the signal. Thus, the dynamic reserve for noise within the operating range is more important. decrease and the output noise will decrease also. In general, do not run with more reserve than necessary. Certainly don't use High Reserve when there is virtually no noise at all. The frequency dependence of dynamic reserve is inherent in the lock-in detection technique. The SR830, by providing more low pass filter stages, can increase the dynamic reserve close to the reference frequency. The specified reserve applies to noise signals within the operating range of the lock-in, i.e. frequencies below 100 kHz. The reserve at higher frequencies is actually higher but is generally not that useful.
Dynamic reserve in the SR830

The SR830, with its digital phase sensitive detectors, does not suffer from DC output errors caused by large noise signals. The dynamic reserve can be increased to above 100 dB without measurement error. Large noise signals do not cause output errors from the PSD. The large DC gain does not result in increased output drift. In fact, the only drawback to using ultra high dynamic reserves (>60 dB) is the increased output noise due to the noise of the A/D converter. This increase in output noise is only present when the dynamic reserve is above 60 dB AND set to High Reserve or Normal. However, the Low Noise reserve can be very high as we'll see shortly. To set a scale, the SR830's output noise at 100 dB dynamic reserve is only measurable when the signal input is grounded. Let's do a simple experiment. If the lock-in reference is at 1 kHz and a large signal is applied at 9.5 kHz, what will the lock-in output be? If the signal is increased to the dynamic reserve limit (100 dB greater than full scale), the output will reflect the noise of the signal at 1 kHz. The spectrum of any pure sine generator always has a noise floor, i.e. there is some noise at all frequencies. So even though the applied signal is at 9.5 kHz, there will be noise at all other frequencies, including the 1 kHz lock-in reference. This noise will be detected by the lock-in and appear as noise at the output. This output noise will typically be greater than the SR830's own output noise. In fact, virtually all signal sources will have a noise floor which will dominate the lock-in output noise. Of course, noise signals are generally much noisier than pure sine generators and will have much higher broadband noise floors. If the noise does not reach the reserve limit, the SR830's own output noise may become detectable at ultra high reserves. In this case, simply lower the dynamic reserve and the DC gain will
Minimum dynamic reserve (Low Noise)

The SR830 always has a minimum amount of dynamic reserve. This minimum reserve is the Low Noise reserve setting. The minimum reserve changes with the sensitivity (gain) of the instrument. At high gains (full scale sensitivity of 50 V and below), the minimum dynamic reserve increases from 37 dB at the same rate as the sensitivity increases. For example, the minimum reserve at 5 V sensitivity is 57 dB. In many analog lock-ins, the reserve can be lower. Why can't the SR830 run with lower reserve at this sensitivity? The answer to this question is - Why would you want lower reserve? In an analog lock-in, lower reserve means less output error and drift. In the SR830, more reserve does not increase the output error or drift. More reserve can increase the output noise though. However, if the analog signal gain before the A/D converter is high enough, the 5 nV/Hz noise of the signal input will be amplified to a level greater than the input noise of the A/D converter. At this point, the detected noise will reflect the actual noise at the signal input and not the A/D converter's noise. Increasing the analog gain (decreasing the reserve) will not decrease the output noise. Thus, there is no reason to decrease the reserve. At a sensitivity of 5 V, the analog gain is sufficiently high so that A/D converter noise is not a problem. Sensitivities below 5 V do not require any more gain since the signal to noise ratio will not be improved (the front end noise dominates). The SR830 does not increase the gain below the 5 V sensitivity, instead, the minimum reserve increases. Of course, the input gain can be decreased and the reserve increased, in which case the A/D converter noise might be detected in the absence of any signal input.
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SIGNAL INPUT AMPLIFIER and FILTERS

A lock-in can measure signals as small as a few nanovolts. A low noise signal amplifier is required to boost the signal to a level where the A/D converter can digitize the signal without degrading the signal to noise. The analog gain in the SR830 ranges from roughly 7 to 1000. As discussed previously, higher gains do not improve signal to noise and are not necessary. The overall gain (AC plus DC) is determined by the sensitivity. The distribution of the gain (AC versus DC) is set by the dynamic reserve. with a 100 ms time constant and 6 dB/oct of filter roll off. The ENBW of a 100 ms, 6 dB/oct filter is 2.5 Hz. The lock-in will measure the input noise with an ENBW of 2.5 Hz. This translates to 7.9 nVrms at the input. At the output, this represents about 0.16% of full scale (7.9 nV/5 V). The peak to peak noise will be about 0.8% of full scale. All of this assumes that the signal input is being driven from a low impedance source. Remember resistors have Johnson noise equal to 0.13xR nVrms/Hz. Even a 50 resistor has almost 1 nVrms/Hz of noise! A signal source impedance of 2k will have a Johnson noise greater than the SR830's input noise. To determine the overall noise of multiple noise sources, take the square root of the sum of the squares of the individual noise figures. For example, if a 2k source impedance is used, the Johnson noise will be 5.8 nVrms/Hz. The overall noise at the SR830 input will be [52 + 5.82]1/2 or 7.7 nVrms/Hz. We'll talk more about noise sources later in this section. At lower gains (sensitivities above 50 V), there is not enough gain at high reserve to amplify the input noise to a level greater than the noise of the A/D converter. In these cases, the output noise is determined by the A/D noise. Fortunately, at these sensitivities, the DC gain is low and the noise at the output is negligible.
Input noise
The input noise of the SR830 signal amplifier is about 5 nVrms/Hz. What does this noise figure mean? Let's set up an experiment. If an amplifier has 5 nVrms/Hz of input noise and a gain of 1000, then the output will have 5 Vrms/Hz of noise. Suppose the amplifier output is low pass filtered with a single RC filter (6 dB/oct roll off) with a time constant of 100 ms. What will be the noise at the filter output? Amplifier input noise and Johnson noise of resistors are Gaussian in nature. That is, the amount of noise is proportional to the square root of the bandwidth in which the noise is measured. A single stage RC filter has an equivalent noise bandwidth (ENBW) of 1/4T where T is the time constant (RxC). This means that Gaussian noise at the filter input is filtered with an effective bandwidth equal to the ENBW. In this example, the filter sees 5 Vrms/Hz of noise at its input. It has an ENBW of 1/(4x100ms) or 2.5 Hz. The voltage noise at the filter output will be 5 Vrms/Hz x 2.5Hz or 7.9 Vrms. For Gaussian noise, the peak to peak noise is about 5 times the rms noise. Thus, the output will have about 40 V pk-pk of noise. Input noise for a lock-in works the same way. For sensitivities below about 5 V full scale, the input noise will determine the output noise (at minimum reserve). The amount of noise at the output is determined by the ENBW of the low pass filter. See the discussion of noise later in this section for more information on ENBW. The ENBW depends upon the time constant and filter roll off. For example, suppose the SR830 is set to 5 V full scale
Notch filters
The SR830 has two notch filters in the signal amplifier chain. These are pre-tuned to the line frequency (50 or 60 Hz) and twice the line frequency (100 or 120 Hz). In circumstances where the largest noise signals are at the power line frequencies, these filters can be engaged to remove noise signals at these frequencies. Removing the largest noise signals before the final gain stage can reduce the amount of dynamic reserve required to perform a measurement. To the extent that these filters reduce the required reserve to either 60 dB or the minimum reserve (whichever is higher), then some improvement might be gained. If the required reserve without these notch filters is below 60 dB or if the minimum reserve is sufficient, then these filters do not significantly improve
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the measurement. Using either of these filters precludes making measurements in the vicinity of the notch frequencies. These filters have a finite range of attenuation, generally 10 Hz or so. Thus, if the lock-in is making measurements at 70 Hz, do not use the 60 Hz notch filter! The signal will be attenuated and the measurement will be in error. When measuring phase shifts, these filters can affect phase measurements up to an octave away.
Anti-aliasing filter
After all of the signal filtering and amplification, there is an anti-aliasing filter. This filter is required by the signal digitization process. According to the Nyquist criterion, signals must be sampled at a frequency at least twice the highest signal frequency. In this case, the highest signal frequency is 100 kHz and the sampling frequency is 256 kHz so things are ok. However, no signals above 128 kHz can be allowed to reach the A/D converter. These signals would violate the Nyquist criterion and be undersampled. The result of this undersampling is to make these higher frequency signals appear as lower frequencies in the digital data stream. Thus a signal at 175 kHz would appear below 100 kHz in the digital data stream and be detectable by the digital PSD. This would be a problem. To avoid this undersampling, the analog signal is filtered to remove any signals above 154 kHz (when sampling at 256 kHz, signals above 154 kHz will appear below 102 kHz). This filter has a flat pass band from DC to 102 kHz so as not to affect measurements in the operating range of the lock-in. The filter rolls off from 102 kHz to 154 kHz and achieves an attenuation above 154 kHz of at least 100 dB. Amplitude variations and phase shifts due to this filter are calibrated out at the factory and do not affect measurements. This filter is transparent to the user.
Input Impedance
The input impedance of the SR830 is 10 M. If a higher input impedance is desired, then the SR550 remote preamplifier must be used. The SR550 has an input impedance of 100 M and is AC coupled from 1 Hz to 100 kHz.
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SR830 Basics
INPUT CONNECTIONS
In order to achieve the best accuracy for a given measurement, care must be taken to minimize the various noise sources which can be found in the laboratory. With intrinsic noise (Johnson noise, 1/f noise or input noise), the experiment or detector must be designed with these noise sources in mind. These noise sources are present regardless of the input connections. The effect of noise sources in the laboratory (such as motors, signal generators, etc.) and the problem of differential grounds between the detector and the lock-in can be minimized by careful input connections. There are two basic methods for connecting a voltage signal to the lock-in - the single-ended connection is more convenient while the differential connection eliminates spurious pick-up more effectively.
Differential Voltage Connection (A-B)

The second method of connection is the differential mode. The lock-in measures the voltage difference between the center conductors of the A and B inputs. Both of the signal connections are shielded from spurious pick-up. Noise pickup on the shields does not translate into signal noise since the shields are ignored. When using two cables, it is important that both cables travel the same path between the experiment and the lock-in. Specifically, there should not be a large loop area enclosed by the two cables. Large loop areas are susceptible to magnetic pickup.
Experiment Signal Source SR830 Lock-In A + Loop Area B R
Single-Ended Voltage Connection (A)

In the first method, the lock-in uses the A input in a single-ended mode. The lock-in detects the signal as the voltage between the center and outer conductors of the A input only. The lock-in does not force the shield of the A cable to ground, rather it is internally connected to the lock-in's ground via a resistor. The value of this resistor is selected by the user. Float uses 10 k and Ground uses 10. This avoids ground loop problems between the experiment and the lock-in due to differing ground potentials. The lock-in lets the shield 'quasi-float' in order to sense the experiment ground. However, noise pickup on the shield will appear as noise to the lock-in. This is bad since the lock-in cannot reject this noise. Common mode noise, which appears on both the center and shield, is rejected by the 100 dB CMRR of the lock-in input, but noise on only the shield is not rejected at all.
Grounds may be at different potentials
Common Mode Signals

Common mode signals are those signals which appear equally on both center and shield (A) or both A and B (A-B). With either connection scheme, it is important to minimize both the common mode noise and the common mode signal. Notice that the signal source is held near ground potential in both illustrations above. If the signal source floats at a nonzero potential, the signal which appears on both the A and B inputs will not be perfectly cancelled. The common mode rejection ratio (CMRR) specifies the degree of cancellation. For low frequencies, the CMRR of 100 dB indicates that the common mode signal is canceled to 1 part in 105. Even with a CMRR of 100 dB, a 100 mV common mode signal behaves like a 1 V differential signal! This is especially bad if the common mode signal is at the reference frequency (this happens a lot due to ground loops). The CMRR decreases by about 6 dB/ octave (20 dB/decade) starting at around 1 kHz.
Experiment Signal Source
SR830 Lock-In A + R
Grounds may be at different potentials
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SR830 Basics
Current Input (I)
The current input on the SR830 uses the A input BNC. The current input has a 1 k input impedance and a current gain of either 106 or 108 Volts/Amp. Currents from 1 A down to 2 fA full scale can be measured. The impedance of the signal source is the most important factor to consider in deciding between voltage and current measurements. For high source impedances, greater than 1 M (106 gain) or 100 M (108 gain), and small currents, use the current input. Its relatively low impedance greatly reduces the amplitude and phase errors caused by the cable capacitance-source impedance time constant. The cable capacitance should still be kept small to minimize the high frequency noise gain of the current preamplifier. For moderate to low source impedances, or larger currents, the voltage input is preferred. A small value resistor may be used to shunt the signal current and generate a voltage signal. The lock-in then measures the voltage across the shunt resistor. Select the resistor value to keep the shunt voltage small (so it does not affect the source current) while providing enough signal for the lock-in to measure. Which current gain should you use? The current gain determines the input current noise of the lockin as well as its measurement bandwidth. Signals far above the input bandwidth are attenuated by 6 dB/oct. The noise and bandwidth are listed below. Gain 106 108 Noise 130 fA/Hz 13 fA/Hz Bandwidth 70 kHz 700 Hz
AC vs DC Coupling
The signal input can be either AC or DC coupled. The AC coupling high pass filter passes signals above 160 mHz (0.16 Hz) and attenuates signals at lower frequencies. AC coupling should be used at frequencies above 160 mHz whenever possible. At lower frequencies, DC coupling is required. A DC signal, if not removed by the AC coupling filter, will multiply with the reference sine wave and produce an output at the reference frequency. This signal is not normally present and needs to be removed by the low pass filter. If the DC component of the signal is large, then this output will be large and require a long time constant to remove. AC coupling removes the DC component of the signal without any sacrifice in signal as long as the frequency is above 160 mHz. The current input current to voltage preamplifier is always DC coupled. AC coupling can be selected following the current preamplifier to remove any DC current signal.
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SR830 Basics
INTRINSIC (RANDOM) NOISE SOURCES

Random noise finds its way into experiments in a variety of ways. Good experimental design can reduce these noise sources and improve the measurement stability and accuracy. There are a variety of intrinsic noise sources which are present in all electronic signals. These sources are physical in origin. Slope 6 dB/oct 12 dB/oct 18 dB/oct 24 dB/oct ENBW 1/(4T) 1/(8T) 3/(32T) 5/(64T) Wait Time 5T 7T 9T 10T
Johnson noise
Every resistor generates a noise voltage across its terminals due to thermal fluctuations in the electron density within the resistor itself. These fluctuations give rise to an open-circuit noise voltage, V noise (rms) = ( 4k TRf)
1/2
The signal amplifier bandwidth determines the amount of broadband noise that will be amplified. This affects the dynamic reserve. The time constant sets the amount of noise which will be measured at the reference frequency. See the SIGNAL INPUT AMPLIFIER discussion for more information about Johnson noise.
Shot noise
Electric current has noise due to the finite nature of the charge carriers. There is always some nonuniformity in the electron flow which generates noise in the current. This noise is called shot noise. This can appear as voltage noise when current is passed through a resistor, or as noise in a current measurement. The shot noise or current noise is given by Inoise (rms) = (2q If)
1/2
where k=Boltzmann's constant (1.38x10-23 J/K), T is the temperature in Kelvin (typically 300K), R is the resistance in Ohms, and f is the bandwidth in Hz. f is the bandwidth of the measurement. Since the input signal amplifier in the SR830 has a bandwidth of approximately 300 kHz, the effective noise at the amplifier input is Vnoise = 70R nVrms or 350R nV pk-pk. This noise is broadband and if the source impedance of the signal is large, can determine the amount of dynamic reserve required. The amount of noise measured by the lock-in is determined by the measurement bandwidth. Remember, the lock-in does not narrow its detection bandwidth until after the phase sensitive detectors. In a lock-in, the equivalent noise bandwidth (ENBW) of the low pass filter (time constant) sets the detection bandwidth. In this case, the measured noise of a resistor at the lock-in input, typically the source impedance of the signal, is simply V noise (rms) = 0.13 R ENBW nV
where q is the electron charge (1.6x10 -19 Coulomb), I is the RMS AC current or DC current depending upon the circuit, and f is the bandwidth. When the current input of a lock-in is used to measure an AC signal current, the bandwidth is typically so small that shot noise is not important.
1/f noise
The ENBW is determined by the time constant and slope as shown in the following table. Wait time is the time required to reach 99% of its final value. T= Time Constant
Every 10 resistor, no matter what it is made of, has the same Johnson noise. However, there is excess noise in addition to Johnson noise which arises from fluctuations in resistance due to the current flowing through the resistor. For carbon composition resistors, this is typically 0.1 V-3 V of rms noise per Volt of applied across the resistor. Metal film and wire-wound resistors have about 10 times less noise. This noise has a 1/f spectrum and makes measurements at low frequencies more difficult. Other sources of 1/f noise include noise found in
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quencies more difficult. Other sources of 1/f noise include noise found in vacuum tubes and semiconductors.
Total noise
All of these noise sources are incoherent. The total random noise is the square root of the sum of the squares of all the incoherent noise sources.
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SR830 Basics
EXTERNAL NOISE SOURCES

In addition to the intrinsic noise sources discussed in the previously, there are a variety of external noise sources within the laboratory. Most of these noise sources are asynchronous, i.e. they are not related to the reference and do not occur at the reference frequency or its harmonics. Examples include lighting fixtures, motors, cooling units, radios, computer screens, etc. These noise sources affect the measurement by increasing the required dynamic reserve or lengthening the time constant. Some noise sources, however, are related to the reference and, if picked up in the signal, will add or subtract from the actual signal and cause errors in the measurement. Typical sources of synchronous noise are ground loops between the experiment, detector and lock-in, and electronic pick up from the reference oscillator or experimental apparatus. Many of these noise sources can be minimized with good laboratory practice and experiment design. There are several ways in which noise sources are coupled into the signal path. For example, if the noise source is a power circuit, then f = 60 Hz and V noise = 120 V. Cstray can be estimated using a parallel plate equivalent capacitor. If the capacitance is roughly an area of 1 cm2 at a separated by 10 cm, then Cstray is 0.009 pF. The resulting noise current will be 400 pA (at 60 Hz). This small noise current can be thousands of times larger than the signal current. If the noise source is at a higher frequency, the coupled noise will be even greater. If the noise source is at the reference frequency, then the problem is much worse. The lock-in rejects noise at other frequencies, but pick-up at the reference frequency appears as signal! Cures for capacitive noise coupling include: 1) Removing or turning off the noise source. 2) Keeping the noise source far from the experiment (reducing Cstray). Do not bring the signal cables close to the noise source. 3) Designing the experiment to measure voltages with low impedance (noise current generates very little voltage). 4) Installing capacitive shielding by placing both the experiment and detector in a metal box.
Capacitive coupling
An AC voltage from a nearby piece of apparatus can couple to a detector via a stray capacitance. Although Cstray may be very small, the coupled noise may still be larger than a weak experimental signal. This is especially damaging if the coupled noise is synchronous (at the reference frequency).
Stray Capacitance Experiment Noise Source
Inductive coupling
An AC current in a nearby piece of apparatus can couple to the experiment via a magnetic field. A changing current in a nearby circuit gives rise to a changing magnetic field which induces an emf (d B/dt) in the loop connecting the detector to the experiment. This is like a transformer with the experiment-detector loop as the secondary winding.
B(t) Experiment
Detector
We can estimate the noise current caused by a stray capacitance by, i = C stray dV = C stray V noise dt
Detector
where is 2 times the noise frequency, Vnoise is the noise amplitude, and Cstray is the stray capacitance.
Noise Source
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SR830 Basics
Cures for inductively coupled noise include: 1) Removing or turning off the interfering noise source. 2) Reduce the area of the pick-up loop by using twisted pairs or coaxial cables, or even twisting the 2 coaxial cables used in differential connections. 3) Using magnetic shielding to prevent the magnetic field from crossing the area of the experiment. 4) Measuring currents, not voltages, from high impedance detectors.
Microphonics
Not all sources of noise are electrical in origin. Mechanical noise can be translated into electrical noise by microphonic effects. Physical changes in the experiment or cables (due to vibrations for example) can result in electrical noise over the entire frequency range of the lock-in. For example, consider a coaxial cable connecting a detector to a lock-in. The capacitance of the cable is a function of its geometry. Mechanical vibrations in the cable translate into a capacitance that varies in time, typically at the vibration frequency. Since the cable is governed by Q=CV, C dV + V dC = dQ = i dt dt dt taking the derivative, we have Mechanical vibrations in the cable which cause a dC/dt will give rise to a current in the cable. This current affects the detector and the measured signal. Some ways to minimize microphonic signals are: 1) Eliminate mechanical vibrations near the experiment. 2) Tie down cables carrying sensitive signals so they do not move. 3) Use a low noise cable that is designed to reduce microphonic effects.
Resistive coupling or ground loops

Currents flowing through the ground connections can give rise to noise voltages. This is especially a
Experiment Detector
I(t)
Noise Source
problem with reference frequency ground currents. In this illustration, the detector is measuring the signal relative to a ground far from the rest of the experiment. The experiment senses the detector signal plus the voltage due to the noise source's ground return current passing through the finite resistance of the ground between the experiment and the detector. The detector and the experiment are grounded at different places which, in this case, are at different potentials. Cures for ground loop problems include: 1) Grounding everything to the same physical point. 2) Using a heavy ground bus to reduce the resistance of ground connections. 3) Removing sources of large ground currents from the ground bus used for small signals.
Thermocouple effects
The emf created by junctions between dissimilar metals can give rise to many microvolts of slowly varying potentials. This source of noise is typically at very low frequency since the temperature of the detector and experiment generally changes slowly. This effect is large on the scale of many detector outputs and can be a problem for low frequency measurements, especially in the mHz range. Some ways to minimize thermocouple effects are: 1) Hold the temperature of the experiment or detector constant. 2) Use a compensation junction, i.e. a second junction in reverse polarity which generates an emf to cancel the thermal potential of the first junction. This second junction should be held at the same temperature as the first junction.
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SR830 Basics
NOISE MEASUREMENTS
Lock-in amplifiers can be used to measure noise. Noise measurements are generally used to characterize components and detectors. The SR830 measures input signal noise AT the reference frequency. Many noise sources have a frequency dependence which the lock-in can measure. is computed. This is the mean value of X over some past history. The present mean value of X is subtracted from the present value of X to find the deviation of X from the mean. Finally, the moving average of the absolute value of the deviations is calculated. This calculation is called the mean average deviation or MAD. This is not the same as an RMS calculation. However, if the noise is Gaussian in nature, then the RMS noise and the MAD noise are related by a constant factor. The SR830 uses the MAD method to estimate the RMS noise of X and Y. The advantage of this technique is its numerical simplicity and speed. The noise calculations for X and Y occur at 512 Hz. At each sample, the mean and moving average of the absolute value of the deviations is calculated. The averaging time (for the mean and average deviation) depends upon the time constant. The averaging time is selected by the SR830 and ranges from 10 to 80 times the time constant. Shorter averaging times yield a very poor estimate of the noise (the mean varies rapidly and the deviations are not averaged well). Longer averaging times, while yielding better results, take a long time to settle to a steady answer. To change the settling time, change the time constant. Remember, shorter settling times use smaller time constants (higher noise bandwidths) and yield noisier noise estimates. X and Y noise are displayed in units of Volts/Hz. The ENBW of the time constant is already factored into the calculation. Thus, the mean displayed value of the noise should not depend upon the time constant. The SR830 performs the noise calculations all of the time, whether or not X or Y noise are being displayed. Thus, as soon as X noise is displayed, the value shown is up to date and no settling time is required. If the sensitivity is changed, then the noise estimate will need to settle to the correct value.
How does a lock-in measure noise?

Remember that the lock-in detects signals close to the reference frequency. How close? Input signals within the detection bandwidth set by the low pass filter time constant and roll-off appear at the output at a frequency f=fsig -fref. Input noise near fref appears as noise at the output with a bandwidth of DC to the detection bandwidth. For Gaussian noise, the equivalent noise bandwidth (ENBW) of a low pass filter is the bandwidth of the perfect rectangular filter which passes the same amount of noise as the real filter. The ENBW is determined by the time constant and slope as shown below. Wait time is the time required to reach 99% of its final value. T= Time Constant Slope 6 dB/oct 12 dB/oct 18 dB/oct 24 dB/oct ENBW 1/(4T) 1/(8T) 3/(32T) 5/(64T) Wait Time 5T 7T 9T 10T
Noise estimation
The noise is simply the standard deviation (root of the mean of the squared deviations)of the measured X, Y or R . The above technique, while mathematically sound, can not provide a real time output or an analog output proportional to the measured noise. For these measurements, the SR830 estimates the X or Y noise directly. To display the noise of X, for example, simply set the CH1 display to X noise. The quantity X noise is computed from the measured values of X using the following algorithm. The moving average of X
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SR830 Basics
3-26
FRONT PANEL
CH1 Display CH2 Display Ref Display
Signal Inputs
Analog Outputs
Ref Input
Sine Output
Power
The power switch is on the rear panel. The SR830 is turned on by pushing the switch up. The serial number (5 digits) is shown in the CH1 and CH2 displays and the firmware version is shown in the Ref display at power on. A series of internal tests are performed at this point. DATA BATT Performs a read/write test to the processor RAM. The nonvolatile backup memory is tested. Instrument settings are stored in nonvolatile memory and are retained when the power is turned off. Checks the processor ROM. Checks the digital signal processor (DSP). If the backup memory check passes, then the instrument returns to the settings in effect when the power was last turned off (User). If there is a memory error, then the stored settings are lost and the standard (Std) settings are used. To reset the unit, hold down the [Setup] key while the power is turned on. The unit will use the standard settings. The standard setup is listed on the next page. The keys are grouped and labelled according to function. This manual will refer to a key with brackets such as [Key]. A complete description of the keys follows in this section.
PROG DSP rCAL
Reset
[Keys]
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Front Panel
Knob
The knob is used to adjust parameters in the Reference display. The parameters which may be adjusted are internal reference frequency, reference phase shift, sine output amplitude, harmonic detect number, offsets, Aux Output levels, and various Setup parameters. If the computer interface has placed the unit in the REMOTE state, indicated by the REMOTE led, then the keys and the knob are disabled. Attempts to change the settings from the front panel will display the message 'LOCL LOut' indicating local control is locked out by the interface. The reference input can be a sine wave (rising zero crossing detected) or a TTL pulse or square wave (rising or falling edge). The input impedance is 1 M AC coupled (>1 Hz) for the sine input. For low frequencies (<1 Hz), it is necessary to use a TTL reference signal. The TTL input provides the best overall performance and should be used whenever possible. The internal oscillator output has a 50 output impedance and varies in amplitude from 4 mVrms to 5 Vrms. The output level is specified into a high impedance load. If the output is terminated in a low impedance, such as 50, the amplitude will be less than the programmed amplitude (half for a 50 load). This output is active even when an external reference is used. In this case, the sine wave is phase locked to the reference and its amplitude is programmable. A TTL sync output is provided on the rear panel. This output is useful for triggering scopes and other equipment at the reference frequency. The TTL sync output is a square wave derived from the zero crossings of the sine output.
Local Lockout
Reference Input
Sine Out
CH1 & CH2 Outputs
The Channel 1 and Channel 2 outputs can be configured to output a voltage from -10 V to +10 V proportional to X or Y or the CH1 and CH2 Displays. 10 V is full scale. The outputs can source 10 mA maximum. The input mode may be single-ended, A, or differential, A-B. The A and B inputs are voltage inputs with 10 M, 25 pF input impedance. Their connector shields are isolated from the chassis by 10 (Ground) or 1 k (Float). Do not apply more than 50 V to either input. The shields should never exceed 1 V. The I (current) input is 1 k to a virtual ground. Press the [Phase] and [Harm#] keys together to toggle the key click on and off. To test the front panel displays, press the [Phase] and [Freq] keys together. All of the LED's will turn on. Press [Phase] to decrease the number of on LED's to half on, a single LED and no LED's on. Use the knob to move the turned on LED's across the panel. Press [Freq] to increase the number of on LED's. Make sure that every LED can be turned on. Press any other key to exit this test mode. To operate with the front panel displays off, press [Phase] and [Freq]
Signal Inputs
Key Click On/Off Front Panel Display Test
Display Off Operation
4-2
Front Panel
together to enter the front panel test mode. Press [Phase] to decrease the number of on LED's until all of the LED's are off. The SR830 is still operating, the output voltages are updated and the unit responds to interface commands. To change a setting, press any key other than [Phase] or [Freq] to return to normal operation, change the desired parameter, then press [Phase] and [Freq] together to return to the test mode. Turn the LED's all off with the [Phase] key.
Keypad Test
To test the keypad, press the [Phase] and [Ampl] keys together. The CH1 and CH2 displays will read 'PAd codE' and a number of LED indicators will be turned on. The LED's indicate which keys have not been pressed yet. Press all of the keys on the front panel, one at a time. As each key is pressed, the key code is displayed in the Reference display, and the nearest indicator LED turns off. When all of the keys have been pressed, the display will return to normal. To return to normal operation without pressing all of the keys, simply turn the knob.
4-3
Front Panel STANDARD SETTINGS

If the [Setup] key is held down when the power is turned on, the lock-in settings will be set to the defaults shown below rather than the settings that were in effect when the power was last turned off. The default settings may also be recalled using the iRST command over the computer interface. In this case, the communications parameters and status registers are not changed.
REFERENCE / PHASE Phase Reference Source Harmonic # Sine Amplitude Internal Frequency Ext Reference Trigger INPUT / FILTERS Source Grounding Coupling Line Notches GAIN / TC Sensitivity Reserve Time Constant Filter dB/oct. Synchronous DISPLAY CH1 CH2 Ratio Reference
0.000 Internal 1 1.000 Vrms 1.000 kHz Sine
OUTPUT / OFFSET CH1 Output CH2 Output All Offsets All Expands AUX OUTPUTS All Output Voltages SETUP Output To GPIB Address RS232 Baud Rate Parity Key Click Alarms Override Remote DATA STORAGE Sample Rate Scan Mode Trigger Starts STATUS ENABLE REGISTERS
X Y 0.00% 1
0.000 V
A Float AC Out
1V Low Noise 100 ms 12 dB Off
GPIB 8 9600 None On On On
1 Hz Loop No
X Y None Frequency
Cleared
4-4
Front Panel Signal Input and Filters
[Input]
The [Input] key selects the front end signal input configuration. The input amplifier can be either a single-ended (A) or differential (A-B) voltage or a current (I). The voltage inputs have a 10 M, 25 pF input impedance. Their connector shields are isolated from the chassis by either 10 (Ground) or 10 k (Float). Do not apply more than 50 V to either input. The shields should never exceed 1 V. The current input uses the A connector. The input is 1 k to a virtual ground. The largest allowable DC current before overload is 10 A (1 M gain) or 100 nA (100 M gain). No current larger than 10 mA should ever be applied to this input. The current gain determines the input current noise as well as the input bandwidth. The 100 M gain has 10 times lower noise but 100 times lower bandwidth. Make sure that the signal frequency is below the input bandwidth. The noise and bandwidth are listed below. Gain 1M 100M Noise 130 fA/Hz 13 fA/Hz Bandwidth 70 kHz 700 Hz
The impedance of the current source should be greater than 1 M when using the 1M gain or 100 M when using the 100M gain. Changing the current gain does not change the instrument sensitivity. Sensitivities above 10 nA require a current gain of 1 M. Sensitivities between 20 nA and 1 A automatically select the 1 M current gain. At sensitivities below 20 nA, changing the sensitivity does not change the current gain. The message 'IGAn chG' is displayed to indicate that the current gain has been changed to 1 M as a result of changing the sensitivity.
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Front Panel
INPUT OVLD
The OVLD led in this section indicates an INPUT overload. This occurs for voltage inputs greater than 1.4Vpk (unless removed by AC coupling) or current inputs greater than 10 A DC or 1.4 A AC (1M gain) or 100 nA DC or 14 nA AC (100M gain). Reduce the input signal level. This key selects the input coupling. The signal input can be either AC or DC coupled. The current input is coupled after the current to voltage conversion. The current input itself is always DC coupled (1 k to virtual ground). The AC coupling high pass filter passes signals above 160 mHz and attenuates signals at lower frequencies. AC coupling should be used at frequencies above 160 mHz whenever possible. At lower frequencies, DC coupling is required. AC coupling results in gain and phase errors at low frequencies. Remember, the Reference Input is AC coupled when a sine reference is used. This also results in phase errors at low frequencies.
[Couple]
[Ground]
This key chooses the shield grounding configuration. The shields of the input connectors (A and B) are not connected directly to the lock-in chassis ground. In Float mode, the shields are connected by 10 k to the chassis ground. In Ground mode, the shields are connected by 10 to ground. Typically, the shields should be grounded if the signal source is floating and floating if the signal source is grounded. Do not exceed 1 V on the shields. This key selects no line notch filters, the line frequency or twice line frequency notch, or both filters. The line notch filters are pre-tuned to the line frequency (50 or 60 Hz) and twice the line frequency (100 or 120 Hz). These filters have an attenuation depth of at least 30 dB. These filters have a finite range of attenuation, generally 10 Hz or so. If the reference frequency is 70 Hz, do not use the 60 Hz notch filter! The signal will be attenuated and the phase shifted. See the SR830 Basics section for a discussion of when these filters improve a measurement.
[Notch]
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Front Panel Sensitivity, Reserve and Time Constants
[Sensitivity Up/Dn]
The [Sensitivity Up] and [Sensitivity Down] keys select the full scale sensitivity. The sensitivity is indicated by 1-2-5 times 1, 10 or 100 with the appropriate units. The full scale sensitivity can range from 2 nV to 1 V (rms) or 2 fA to 1 A (rms). The sensitivity indication is not changed by the X, Y, or R output expand. The expand functions increase the output scale as well as the display resolution. Changing the sensitivity may change the dynamic reserve. Sensitivity takes precedence over dynamic reserve. See the next page for more details.
Auto Gain
Pressing the [AUTO GAIN] key will automatically adjust the sensitivity based upon the detected signal magnitude (R). Auto Gain may take a long time if the time constant is very long. If the time constant is greater than 1 second, Auto Gain will abort.
RESERVE OVLD [Reserve]
The OVLD led in the Sensitivity section indicates that the signal amplifier is overloaded. Change the sensitivity or increase the dynamic reserve. This key selects the reserve mode, either Low Noise, Normal or High Reserve. The actual reserve (in dB) depends upon the sensitivity. When the reserve is High, the SR830 automatically selects the maximum reserve available at the present full scale sensitivity. When the reserve is Low, the minimum available reserve is selected. Normal is between the maximum and minimum reserve. Changing the sensitivity may change the actual reserve, NOT the reserve mode.
4-7
Front Panel
The actual dynamic reserves (in dB) for each sensitivity are listed below. Sensitivity 1V 500 mV 200 mV 100 mV 50 mV 20 mV 10 mV 5 mV 2 mV 1 mV 500 V 200 V 100 V 50 V 20 V 10 V 5 V 2 V 1 V 500 nV 200 nV 100 nV 50 nV 20 nV 10 nV 5 nV 2 nV Low Noise 0 6 4 0 6 4 0 6 4 10 16 24 30 36 44 50 56 64 70 76 84 90 96 104 110 116 124 Normal 0 6 14 10 16 24 20 26 34 40 46 54 60 66 74 80 86 94 100 106 114 120 126 134 140 146 154 High Reserve 0 6 14 20 26 34 40 46 54 60 66 74 80 86 94 100 106 114 120 126 134 140 146 154 160 166 174
Do not use ultra high dynamic reserves above 120 dB unless absolutely necessary. It will be very likely that the noise floor of any interfering signal will obscure the signal at the reference and make detection difficult if not impossible. See the SR830 Basics section for more information.
Auto Reserve
Pressing [AUTO RESERVE] will change the reserve mode to the minimum reserve required. Auto Reserve will not work if there are low frequency noise sources which overload infrequently.
[Time Constant Up/Dn]
This key selects the time constant. The time constant may be set from 10 s to 30 s (detection freq.>200 Hz) or 30 ks (detection freq. <200 Hz). The detection frequency is the reference frequency times the harmonic detect number. The time constant is indicated by 1 or 3 times 1, 10 or 100 with the appropriate units. The maximum time constant is 30 s if the detection frequency is above 200 Hz and 30 ks if the detection frequency is below 200 Hz. The actual range switches at 203.12 Hz when the frequency is increasing and at 199.21 Hz when the frequency is decreasing. The time constant may not be adjusted beyond the maximum for the present detection frequency. If
4-8
Front Panel
the detection frequency is below 200 Hz and 100 s is the time constant and the frequency increases above 200 Hz, the time constant WILL change to 30 s. Decreasing the frequency back below 200 Hz will NOT change the time constant back to 100 s. The absolute minimum time constant is 10 s. The actual minimum time constant depends upon the filter slope and the DC gain in the low pass filter (dynamic reserve plus expand). The minimum time constant is only restricted if the dynamic reserve plus expand is high and the filter slope is low - not a normal operating situation. The tables below list the minimum time constants for the different filter slopes and gains. 6 dB/oct DC gain (dB) <45 <55 <65 <75 <85 <95 <105 <115 <125 <135 <145 <155 <165 <175 DC gain (dB) <55 <75 <95 <115 <135 <155 <175 DC gain (dB) <62 <92 <122 <152 <182 DC gain (dB) <72 <112 <152 <182 min time constant 10 s 30 s 100 s 300 s 1 ms 3 ms 10 ms 30 ms 100 ms 300 ms 1s 3s 10 s 30 s min time constant 10 s 30 s 100 s 300 s 1 ms 3 ms 10 ms min time constant 10 s 30 s 100 s 300 s 1 ms min time constant 10 s 30 s 100 s 300 s
12 dB/oct
18 dB/oct
24 dB/oct
To use these tables, choose the correct table for the filter slope in use. Calculate the DC gain by adding the reserve to the expand (expressed in dB). Find the smallest DC gain entry which is larger than the gain in use.
4-9
Front Panel
Read the minimum time constant for this entry. For example, if the slope is 12 dB/oct, the reserve is 64 dB, and the X expand is 10 (20 dB), then the DC gain is 84 dB and the min time constant is 100 s. Time constant is a low priority parameter. If the sensitivity, dynamic reserve, filter slope, or expand is changed, and the present time constant is below the new minimum, the time constant WILL change to the new minimum. Remember, changing the sensitivity may change the reserve and thus change the time constant. The message 'tc chnG' will be displayed to indicate that the time constant has been changed, either by increasing the detection frequency above 200 Hz, or by changing the sensitivity, dynamic reserve, filter slope, or expand. The time constant also determines the equivalent noise bandwidth (ENBW) of the low pass filter. This is the measurement bandwidth for X and Y noise and depends upon the time constant and filter slope. (See the Noise discussion in the SR830 Basics section.)
FILTER OVLD
The OVLD led in the Time Constant section indicates that the low pass filters have overloaded. Increase the time constant or filter roll-off, or decrease the dynamic reserve.
Analog Outputs with Short Time Constants

When using short time constants below 10 ms, the X and Y analog outputs from the rear panel or the CH1 and CH2 outputs configured to output X or Y should be used. These outputs have a 100 kHz bandwidth and are accurate even with short time constants. CH1 or CH2 outputs proportional to the Displays (even if X or Y is displayed) are updated at a 512 Hz rate. These outputs do not accurately reflect high frequency outputs.
[Slope /oct]
This key selects the low pass filter slope (number of poles). Each pole contributes 6 dB/oct of roll off. Using a higher slope can decrease the required time constant and make a measurement faster. The filter slope affects the minimum time constant (see above). Changing the slope may change the time constant if the present time constant is shorter than the minimum time constant at the new filter slope. Pressing this key selects no synchronous filtering or synchronous filtering on below 200 Hz. In the second case, the synchronous filter is switched on whenever the detection frequency decreases below 199.21 Hz and switched off when the detection frequency increases above 203.12 Hz. The detection frequency is the reference frequency times the harmonic detect number. The SYNC indicator in the CH1 display is turned on whenever synchronous filtering is active. When the synchronous filter is on, the phase sensitive detectors (PSD's) are followed by 2 poles of low pass filtering, the synchronous filter, then 2 more poles of low pass filtering. The low pass filters are set by the time constant and filter slope. If the filter slope requires less then 4 poles (<24 dB/oct), then the unused poles are set to a minimum time constant.
[Sync Filter]
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Front Panel
The poles which are set by the time constant are the ones closest to the PSD's. For example, if the time constant is 100 ms with 12 dB/oct slope and synchronous filtering is on, then the PSD's are followed by two poles of low pass filtering with 100 ms time constant, the synchronous filter, then two poles of minimum time constant. Synchronous filtering removes outputs at harmonics of the reference frequency, most commonly 2xf. This is very effective at low reference frequencies since 2xf outputs would require very long time constants to remove. The synchronous filter does NOT attenuate broadband noise (except at the harmonic frequencies). The low pass filters remove outputs due to noise and interfering signals. See the SR830 Basics section for a discussion of time constants and filtering.
Note: The synchronous filter averages the outputs over a complete period. Each period is divided into 128 equal time slots. At each slot, the average over the previous 128 slots is computed and output. This results in an output rate of 128xf. This output is then smoothed by the two poles of filtering which follow the synchronous filter.
The settling time of the synchronous filter is one period of the detection frequency. If the amplitude, frequency, phase, time constant or slope is changed, then the outputs will settle for one period. These transients are because the synchronous filter provides a steady output only if the input is repetitive from period to period. The transient response also depends upon the time constants of the regular filters. Very short time constants (<<period) have little effect on the transient response. Longer time constants (<period) can magnify the amplitude of a transient. Much longer time constants ( period) will increase the settling time far beyond a period.
4-11
Front Panel CH1 Display and Output
[Display]
This key selects the Channel 1 display quantity. Channel 1 may display X, R, X Noise, Aux Input 1 or Aux Input 2. The numeric display has the units of the input signal. The bar graph is full scale sensitivity for X, R and X Noise, and 10V for the Aux Inputs. Ratio displays are shown in % and the bar graph is scaled to 100%. See the SR830 Basics section for a complete discussion of scaling. The OVLD led in the display indicates that the Channel 1 output is overloaded (greater than 1.09 times full scale). This can occur if the sensitivity is too low or if the output is expanded such that the output voltage would exceed 10V. This indicator is turned while an auto function is in progress. When the synchronous output filter is selected AND the detection frequency is below 200 Hz, then the SYNC indicator will be on. If the detection frequency is above 200 Hz, synchronous filtering is not active and SYNC is off. This key selects ratio measurements on Channel 1. The Channel 1 display may show X, R, X Noise, Aux Input 1 or Aux Input 2 divided by Aux Input 1 or 2. The denominator is indicated by the AUX IN leds above this
OUTPUT OVLD
AUTO SYNC
[Ratio]
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Front Panel
key. The Ratio indicator in the display is on to indicate a ratio measurement. Pressing this key until the AUX IN leds and the Ratio indicator are off returns the measurement to non-ratio mode.
[Output]
This key selects the CH1 OUTPUT source. The Channel 1 Output can provide an analog output proportional to the Display or X. The output proportional to X has a bandwidth of 100 kHz (the output is updated at 256 kHz). This output is the traditional X output of a lock-in. Output proportional to the display (even if the display is simply X) has a bandwidth of 200 Hz (updated at 512 Hz). Remember, The X output has 100 kHz of bandwidth. The Display output should only be used if the time constant is sufficiently long such that there are no high frequency outputs.
CH1 Offset and Expand
The X and R outputs may be offset and expanded separately. Choose either X or R with the [Display] key to adjust the X or R offset and expand. X and R analog outputs are determined by Output = (signal/sensitivity - offset) x Expand x 10 V The output is normally 10 V for a full scale signal. The offset subtracts a percentage of full scale from the output. Expand multiplies the remainder by a factor from 1, 10 or 100. Output offsets ARE reflected in displays which depend upon X or R. X and Y offsets do NOT affect the calculation of R and . Output expands do NOT increase the displayed values of X or R. Expand increases the display resolution. If the display is showing a quantity which is affected by an offset or a non-unity expand, then the Offset and Expand indicators are turned on below the display. See the SR830 Basics section for a complete discussion of scaling, offsets and expands.
[Offset On/Off]
Pressing this key turns the X or R offset (as selected by the [Display] key) on or off. The Offset indicator below the display turns on when the displayed quantity is offset. This key allows the offset to be turned on and off without adjusting the actual offset percentage. This key displays the X or R offset percentage (as selected by the [Display] key) in the Reference Display. Use the knob to adjust the offset. The Channel 1 display reflects the offset as it is adjusted while the Reference display shows the actual offset percentage. The offset ranges from -105.00% to 105.00% of full scale. The offset percentage does not change with sensitivity - it is an output function. To return the Reference Display to its original display, press the desired reference
[Modify]
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Front Panel
display key ([Phase], [Freq], [Ampl], [Harm #] or [Aux Out]). [Auto Offset] Pressing this key automatically sets the X or R offset percentage to offset the selected output quantity to zero. Pressing this key selects the X and R Expand. Use the [Display] key to select either X or R. The expand can be 1 (no expand), 10 or 100. If the expand is 10 or 100, the Expand indicator below the display will turn on. The output can never exceed full scale when expanded. For example, if an output is 10% of full scale, the largest expand (with no offset) which does not overload is 10. An output expanded beyond full scale will be overloaded. Short Time Constant Limitations A short time constant places a limit on the total amount of DC gain (reserve plus expand) available. If the time constant is short, the filter slope low and the dynamic reserve high, then increasing the expand may change the time constant. See the table of time constants and DC gains in the Gain and Time Constant section.
[Expand]
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Front Panel CH2 Display and Output
[Display]
This key selects the Channel 2 display quantity. Channel 2 may display Y, , Y Noise, Aux Input 3 or Aux Input 4. The numeric display has the units of the input signal. The bar graph is full scale sensitivity for Y and Y Noise, 180 for , and 10V for the Aux Inputs. Ratio displays are shown in % and the bar graph is scaled to 100%. See the SR830 Basics section for a complete discussion of scaling. The OVLD led in the display indicates that the Channel 2 output is overloaded (greater than 1.09 times full scale). This can occur if the sensitivity is too low or if the output is expanded such that the output voltage would exceed 10V. This indicator is turned while an auto function is in progress. The TRIG indicator flashes whenever a trigger is received at the rear panel trigger input AND internal data storage is triggered. This key selects ratio measurements on Channel 2. The Channel 2 display may show Y, , Y Noise, Aux Input 3 or Aux Input 4 divided by Aux Input 3 or 4. The denominator is indicated by the AUX IN leds above this key. The Ratio indicator in the display is on to indicate a ratio measurement. Pressing this key until the AUX IN leds and the Ratio indicator are
OUTPUT OVLD
AUTO TRIG [Ratio]
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Front Panel
[Output]
off returns the measurement to non-ratio mode. This key selects the CH2 OUTPUT source. The Channel 2 Output can provide an analog output proportional to the Display or Y. The output proportional to Y has a bandwidth of 100 kHz (the output is updated at 256 kHz). This output is the traditional Y output of a lock-in. Output proportional to the display (even if the display is simply Y) has a bandwidth of 200 Hz (updated at 512 Hz). Remember, The Y output has 100 kHz of bandwidth. The Display output should only be used if the time constant is sufficiently long such that there are no high frequency outputs.
CH2 Offset and Expand
The Y output may be offset and expanded. Choose Y with the [Display] key to adjust the Y offset and expand. The Y analog output is determined by Output = (signal/sensitivity - offset) x Expand x 10 V The output is normally 10 V for a full scale signal. The offset subtracts a percentage of full scale from the output. Expand multiplies the remainder by a factor from 1, 10 or 100. Y Output offset IS reflected in displays which depend upon Y. X and Y offsets do NOT affect the calculation of R or . Y Output expand does NOT increase the displayed value Y. Expand increases the display resolution. If the display is showing a quantity which is affected by an offset or a non-unity expand, then the Offset and Expand indicators are turned on below the display. See the SR830 Basics section for a complete discussion of scaling, offsets and expands.
[Offset On/Off]
Pressing this key turns the Y offset on or off. The Offset indicator below the display turns on when the displayed quantity is offset. This key allows the offset to be turned on and off without adjusting the actual offset percentage. This key displays the Y offset percentage in the Reference Display. Use the knob to adjust the offset. The Channel 2 display reflects the offset as it is adjusted while the Reference display shows the actual offset. The offset ranges from -105.00% to 105.00% of full scale. The offset percentage does not change with sensitivity - it is an output function. To return the Reference Display to its original display, press the desired reference display key ([Phase], [Freq], [Ampl], [Harm #] or [Aux Out]). Pressing this key automatically sets the Y offset percentage to offset the Y output to zero.
[Modify]
[Auto Offset]
4-16
Front Panel
[Expand] Pressing this key selects the Y Expand. The expand can be 1 (no expand), 10 or 100. If the expand is 10 or 100, the Expand indicator below the display will turn on. The output can never exceed full scale when expanded. For example, if an output is 10% of full scale, the largest expand (with no offset) which does not overload is 10. An output expanded beyond full scale will be overloaded. Short Time Constant Limitations A short time constant places a limit on the total amount of DC gain (reserve plus expand) available. If the time constant is short, the filter slope low and the dynamic reserve high, then increasing the expand may change the time constant. See the table of time constants and DC gains in the Gain and Time Constant section.
4-17
Front Panel Reference
[Phase]
Pressing this key displays the reference phase shift in the Reference display. The knob may be used to adjust the phase. The phase shift ranges from -180 to +180 with 0.01 resolution. When using an external reference, the reference phase shift is the phase between the external reference and the digital sine wave which is multiplying the signal in the PSD. This is also the phase between the sine output and the digital sine wave used by the PSD in either internal or external reference mode. Changing this phase shift only shifts internal sine waves. The effect of this phase shift can only be seen at the lock-in outputs X, Y and . R is phase independent.
Auto Phase
Pressing [AUTO PHASE] will adjust the reference phase shift so that the measured signal phase is 0. This is done by subtracting the present measured value of from the reference phase shift. It will take several time constants for the outputs to reach their new values. Auto Phase may not result in a zero phase if the measurement is noisy or changing. If is not stable, Auto Phase will abort.
4-18
Front Panel
[+90]
and [-90]
The [+90] and [-90] keys add or subtract 90.000 from the reference phase shift. The phase does not need to be displayed to use these keys.
Zero Phase
Pressing the [+90] and [-90] keys together will set the reference phase shift to 0.00.
[Freq]
Pressing this key displays the reference frequency in the Reference display. If the reference mode is external, then the measured reference frequency is displayed. The knob does nothing in this case. If the harmonic number is greater than 1 and the external reference goes above 102 kHz/N where N is the harmonic number, then the harmonic number is reset to 1. The reference will always track the external reference signal. If the reference mode is internal, then the internal oscillator frequency is displayed. The oscillator frequency may adjusted with the knob. The frequency has 4 1/2 digits or 0.1 mHz resolution, whichever is larger. The frequency can range from 0.001 Hz to 102.00 kHz. The upper limit is decreased if the harmonic number is greater than 1. In this case, the upper limit is 102 kHz/N where N is the harmonic number.
[Ampl]
Pressing this key displays the Sine Output Amplitude in the Reference display. Use the knob to adjust the amplitude from 4 mVrms to 5 Vrms with 2 mV resolution. The output impedance of the Sine Out is 50. If the signal is terminated in 50, the amplitude will be half of the programmed value. When the reference mode is internal, this is the excitation source provided by the SR830. When an external reference is used, this sine output provides a sine wave phase locked to the external reference. The rear panel TTL Output provides a TTL square wave at the reference frequency. This square wave is generated by discriminating the zero crossings of the sine output. This signal can provide a trigger or sync signal to the experiment when the internal reference source is used. This signal is also available when the reference is externally provided. In this case, the TTL Output is phase locked to the external reference.
[Harm #]
The SR830 can detect signals at harmonics of the reference frequency. The SR830 multiplies the input signal with digital sine waves at a multiple of the reference. Only signals at this harmonic will be detected. Signals at the original reference frequency are not detected and are attenuated as if they were noise. Whenever the harmonic detect number is greater than 1, the HARM# indicator in the Reference display will flash to remind you that the SR830 is detecting signals at a multiple of the reference frequency. Always check the harmonic detect number before making any measurements.
4-19
Front Panel
If the harmonic number is set to N, then the internal reference frequency is limited to 102 kHz/N. If an external reference is used and the reference frequency exceeds 102 kHz/N, then N is reset to 1. The SR830 will always track the external reference. Pressing this key displays the harmonic number in the Reference display. The harmonic number may be adjusted using the knob. Harmonics up to 19999 times the reference can be detected as long as the harmonic frequency does not exceed 102 kHz. An attempt to increase the harmonic frequency above 102 kHz will display the message 'hAr ovEr' indicating harmonic number over range.
[Source]
This key selects the reference mode. The normal mode is External reference (no indicator). The Internal mode is indicated by the INTERNAL led. When the reference source is External, the SR830 will phase lock to the external reference provided at the Reference Input BNC. The SR830 will lock to frequencies between 0.001 Hz and 102.0 kHz. Use the [Freq] key to display the external frequency. When the reference source is Internal, the SR830's synthesized internal reference is used as the reference. The Reference Input BNC is ignored in this case. In this mode, the Sine Out or TTL Sync Out provides the excitation for the measurement. Use the [Freq] key to display and adjust the frequency.
[Trig]
This key selects the external reference input trigger mode. When either POS EDGE or NEG EDGE is selected, the SR830 locks to the selected edge of a TTL square wave or pulse train. For reliable operation, the TTL signal should exceed 3.5 V when high and be less then 0.5 V when low. The input is directed past the analog discriminator and is DC coupled into a TTL input gate. This input mode should be used whenever possible since it is less noise prone than the sine wave discriminator. For very low frequencies (<1 Hz), a TTL reference MUST be used. SINE input mode locks the SR830 to the rising zero crossings of an analog signal at the Reference Input BNC. This signal should be a clean sine wave at least 200 mVpk in amplitude. In this input mode, the Reference Input is AC coupled (above 1 Hz) with an input impedance of 1 M. Sine reference mode can not be used at frequencies far below 1 Hz. At very low frequencies, the TTL input modes must be used.
UNLOCK
The UNLOCK indicator turns on if the SR830 can not lock to the external reference.
4-20
Front Panel Auto Functions
Pressing an Auto Function key initiates an auto function which may take some time. The AUTO leds in the CH1 and CH2 displays will be on while the function is in progress. A multi-tone sound will indicate when the auto function is complete and the AUTO leds will turn off.
[Auto Reserve]
Pressing [AUTO RESERVE] will adjust the dynamic reserve to the minimum reserve required. To do this, the reserve is decreased until the analog input amplifier is overloaded. The reserve is then increased to remove the overload. Auto Reserve will work only if the overloading noise source has a frequency greater than a few Hz. Lower frequency noise sources may overload so infrequently that Auto Reserve can not detect it. [AUTO RESERVE] does not change the notch prefilter settings.
[Auto Gain]
[AUTO GAIN] will adjust the sensitivity so that the detected signal magnitude is a sizable percentage of full scale. Many time constants are required to determine whether a particular sensitivity will overload or not. Auto Gain thus takes a longer time when the time constant is long. Auto Gain will not run if the time constant is greater than 1 second since the total time required could be far too long to be useful. The message 'tc ovEr' will be displayed to indicate that the time constant is too long for Auto Gain to run.
[Auto Phase]
[AUTO PHASE] adjusts the reference phase shift so that the measured signal phase is 0. This is done by subtracting the measured value of from the programmed reference phase shift. It will take several time constants for the outputs to reach their new values during which time will move towards 0. Do not press [AUTO PHASE] again until the outputs have stabilized. When the measurement is noisy or if the outputs are changing, Auto Phase may not result in a zero phase. Auto Phase will not run if the value of is unstable. The message 'PhAS bAd' will be displayed to indicate that the phase is unstable and Auto Phase will not run.
Auto Setup
There is no truly reliable way to automatically setup a lock-in amplifier for
4-21
Front Panel
all possible input signals. In most cases, the following procedure should setup the SR830 to measure the input signal.
1.Press [AUTO GAIN] to set the sensitivity. 2.Press [AUTO RESERVE]. 3.Adjust the time constant and roll-off until there is no Time Constant overload. 4.Press [AUTO PHASE] if desired. 5.Repeat if necessary. At very low frequencies, the auto functions may not function properly. This is because very low frequency signals overload very infrequently and the time constants used tend to be very long.
4-22
Front Panel Setup
[Save]
Nine amplifier setups may be stored in non-volatile memory.To save a setup, press [Save] to display the buffer number (1..9) in the CH2 display. Use the knob to select the desired buffer number. Press [Save] again to store the setup in the buffer, or any other key to abort the save process. The message 'SAvE n donE' is displayed if the setup is successfully saved. The message 'SAve not donE' is displayed if the save process is aborted.
[Recall]
Nine amplifier setups may be stored in non-volatile memory.To recall a setup, press [Recall] to display the buffer number (1..9) in the CH2 display. Use the knob to select the desired buffer number. Press [Recall] again to recall the setup in the buffer, or any other key to abort the recall process. When a setup is recalled, any data presently in the data buffer is lost. The message 'rcal n donE' is displayed if the setup is successfully recalled. The message 'rcal not donE' is displayed if the recall process is aborted. The message 'rcal dAtA Err' is displayed if the recalled setup is not valid. This is usually because a setup has never been saved into the selected buffer.
[Aux Out]
The 4 Aux Outputs may be programmed from the front panel. Press [Aux Out] until the desired output (1-4) is displayed in the Reference display. The AxOut indicators below the display indicate which output (1-4) is displayed. The knob may then be used to adjust the output level from -10.5V to +10.5V. Press [Phase], [Freq], [Ampl] or [Harm#] to return the display to normal.
4-23
Front Panel Interface
[Setup]
Pressing the [Setup] key cycles through GPIB/RS232, ADDRESS, BAUD, PARITY and QUEUE. In each case, the appropriate parameter is displayed in the Reference display and the knob is used for adjustment. Press [Phase], [Freq], [Ampl], [Harm#] or [Aux Out] to return the display to normal and leave Setup. GPIB/RS232 The SR830 only outputs data to one interface at a time. Commands may be received over both interfaces but responses are directed only to the selected interface. Make sure that the selected interface is set correctly before attempting to program the SR830 from a computer. The first command sent by any program should be to set the output to the correct interface. Setup GPIB/RS232 displays the output interface. Use the knob to select GPIB or RS232. ADDRESS Setup ADDRESS displays the GPIB address. Use the knob to select an address from 0 to 30. Setup BAUD displays the RS232 baud rate. Use the knob to adjust the baud rate from 300 to 19200 baud. Setup PARITY displays the RS232 parity. Use the knob to select Even, Odd or None. The last 256 characters received by the SR830 may be displayed to help find programming errors. Setup QUEUE will display 6 characters (2 per display) in hexadecimal (see below). Turn the knob left to move farther back in the buffer, turn the knob right to move towards the most recently received characters. A '.' is displayed to indicate the ends of the buffer. All characters are changed to upper case, spaces are removed, and command delimiters are changed to linefeeds (0A). To leave this display, press [Setup] to return to GPIB/RS232 before pressing [Phase], [Freq], [Ampl], [Harm#] or [Aux Out] to return the display to normal and leave Setup.
BAUD
PARITY
QUEUE
4-24
Front Panel
Hex 2A 2B 2C 2D 2E 30 31 32 33 Hex 0A 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F ASCII p + , . 0 1 2 3 ASCII linefeed A B C D E F G H I J K L M N O Hex 34 35 36 37 38 39 3B 3F ASCII 4 5 6 7 8 9 ; ?
Hex 50 51 52 53 54 55 56 57 58 59 5A
ASCII P Q R S T U V W X Y Z
[Local]
When a host computer places the unit in the REMOTE state, no keypad input or knob adjustment is allowed. The REMOTE indicator is on above the [Local] key. To return to front panel operation, press the [Local] key. This led is on when the front panel is locked out by a computer interface. No front panel adjustments may be made. This indicator is on whenever a GPIB Service Request is generated by the SR830. SRQ stays on until a serial poll is completed. This indicator flashes when there is activity on the computer interface. Flashes whenever there is a computer interface error such as an illegal command or out of range parameter is received.
REMOTE SRQ ACTIVE ERROR
4-25
Front Panel WARNING MESSAGES

The SR830 displays various warning messages whenever the operation of the instrument is not obvious. The two tone warning alarm sounds when these messages are displayed. Display LOCL LOut Warning Message LOCAL LOCKOUT Meaning If the computer interface has placed the unit in the REMOTE state, indicated by the REMOTE led, then the keys and the knob are disabled. Attempts to change the settings from the front panel will display this message. Indicates that the current conversion gain has been changed to 1 M as a result of changing the sensitivity. Sensitivities from 20 nA to 1 A require 1 M current gain. Indicates that the time constant has been changed, either by increasing the detection frequency from below 200 Hz to above 200 Hz, or by changing the sensitivity, dynamic reserve, filter slope, or expand. An attempt to increase the harmonic detect frequency above 102 kHz will display this message. Indicates that the time constant is too long (>1s) for Auto Gain to run. Indicates that the phase is unstable and Auto Phase will not run. This message is displayed if the recalled setup is not valid. This is usually because a setup has never been saved into the selected buffer. Indicates unit may not be precisely locked at very low frequency.
IGAn chG
IGAIN CHANGE
tc chnG
TC CHANGE
hAr ovEr
HARMONIC OVER
tc ovEr
TC OVER
PhAS bAd rcal dAtA Err
PHASE BAD RECALL DATA ERR
undr
UNDR
4-26
REAR PANEL
Power Entry Module
The power entry module is used to fuse the AC line voltage input, select the line voltage, and block high frequency noise from entering or exiting the instrument. Refer to the first page of this manual for instructions on selecting the correct line voltage and fuse. The 24 pin IEEE-488 connector allows a computer to control the SR830 via the IEEE-488 (GPIB) instrument bus. The address of the instrument is set with the [Setup] key. The RS232 interface connector is configured as a DCE (transmit on pin 3, receive on pin 2). The baud rate and parity are programmed with the [Setup] key. To connect the SR830 to a PC serial adapter, which is usually a DTE, use a straight thru serial cable. These are auxiliary analog inputs which can be digitized by the SR830. The range is -10.5V to +10.5V and the resolution is 16 bits (1/3 mV). The input impedance is 1 M. These inputs may be displayed on the CH1 and CH2 displays. These inputs allow signals other than the lock-in outputs to be acquired (and stored). Furthermore, ratio quantities such as X/Aux1 may be displayed (and stored).
IEEE-488 Connector
RS232 Connector
AUX IN 1-4 (A/D Inputs)
AUX OUT 1-4 (D/A Outputs) These are auxiliary analog outputs. The range is -10.5V to +10.5V and
the resolution is 1 mV. The output impedance is <1 and the output current is limited to 10 mA. These outputs may be programmed from the front panel ([Aux Out])or via the computer interfaces.
X and Y
The X and Y lock-in outputs are always available at these connectors. The bandwidth of these outputs is 100 kHz. A full scale input signal will generate 10V at these outputs. The output impedance is <1 and the output current is limited to 10 mA.
4-27
Rear Panel
These outputs are affected by the X and Y offsets and expands. The actual outputs are X Output = (X/sensitivity - offset)xExpandx10V Y Output = (Y/sensitivity - offset)xExpandx10V where the offset is a percentage of full scale and the expand is an integer from 1, 10 or 100. The offsets and expand are set from the front panel.
MONITOR OUT
This BNC provides a buffered output from the signal amplifiers and prefilters. This is the signal just before the A/D converter and PSD. The output impedance is <1 and the output current is limited to 10 mA. The gain from the signal input to the monitor output is the overall gain minus the dynamic reserve minus 3dB. The overall gain is 10V divided by the sensitivity. The actual dynamic reserve is specified in the description of the [Reserve] key. For example, if the sensitivity is 10 mV, the gain is 60dB. If the dynamic reserve is 20dB, then the gain from the input to the monitor output is 60-20-3=37dB or a gain of 71. A 10 mV (rms) input will result in a .7 Vrms or1 Vpk output. The gain is only accurate to about 1.5dB or 20%. This output is useful for determining the cause of input overloads and the effects of prefiltering. However, because the analog gain never exceeds 2000, very small signals may not be amplified enough to viewed at the monitor output.
TRIG IN
This TTL input may be used to trigger stored data samples and/or to start data acquisition. If Trigger Start is selected, then a rising edge will start data storage. If the sample rate is also Trigger, then samples are recorded at every subsequent trigger. (The first trigger starts the scan and takes the first data point, subsequent triggers record the rest of the data points.) When the sample rate is set to Trigger, samples are recorded whenever there is a rising edge at the Trigger input. The maximum sample rate is 512 Hz. Data storage is available through the computer interface only. This output is the TTL sync output for the internal oscillator. The output is a square wave whose edges are linked to the sine wave zero crossings. This is useful when the sine output amplitude is small and a synchronous trigger is required (to a scope for example). This output is active even when locked to an external reference. This 9 pin "D" connector provides power and control signals to external preamplifiers such as the SR550 and SR552. The power connections are described below. Pin 1 2 6 7 8 Voltage +20V +5V -20V Signal Ground Ground
TTL OUT
PREAMP CONNECTOR
4-28
Rear Panel
Using SRS Preamps
When using either the SR550 or SR552, connect the power cable (standard 9 pin D connectors) from the preamp to the rear panel preamp connector on the SR830. Use BNC cables to connect the A output from the preamp to the A input of the SR830. The B output from the preamp (preamp ground) may be connected to the B input of the SR830. In this case, use A-B as the input configuration. Be sure to twist the A and B cables so that there is no differential noise pickup between the cables.
The SR550 and SR552 are AC coupled from 1 Hz to 100 kHz. Set the SR830 to AC coupled since the signal must be above
1 Hz. The SR550 has an input impedance of 100 M, the SR552 has 100 k.
The SR830 does NOT compensate for the gain of the preamp. The SR830 sets both preamps to their maximum gains.
Measurements made by the SR830 with a preamp need to be divided by the gain of the preamp. The SR550 has a gain of 10 and the SR552 has a gain of 100.
4-29
Rear Panel
4-30
REMOTE PROGRAMMING
INTRODUCTION
The SR830 DSP Lock-in Amplifier may be remotely programmed via either the RS232 or GPIB (IEEE-488) interfaces. Any computer supporting one of these interfaces may be used to program the SR830. Both interfaces are receiving at all times, however, the SR830 will send responses to only one interface. Specify the output interface with the [Setup] key or use the OUTX command at the beginning of every program to direct the responses to the correct interface. completed. To help find program errors, the SR830 can display its receive buffer on the displays. Use the [Setup] key to access the QUEUE display. The last 256 characters received by the SR830 may be displayed in hexadecimal ASCII. See the OPERATION section for a complete description.
COMMAND SYNTAX
Communications with the SR830 uses ASCII characters. Commands may be in either UPPER or lower case and may contain any number of embedded space characters. A command to the SR830 consists of a four character command mnemonic, arguments if necessary, and a command terminator. The terminator must be a linefeed <lf> or carriage return <cr> on RS232, or a linefeed <lf> or EOI on GPIB. No command processing occurs until a command terminator is received. Commands function identically on GPIB and RS232 whenever possible. Command mnemonics beginning with an asterisk "i" are IEEE488.2 (1987) defined common commands. These commands also function identically on RS232. Commands may require one or more parameters. Multiple parameters are separated by commas (,). Multiple commands may be sent on one command line by separating them with semicolons (;). The difference between sending several commands on the same line and sending several independent commands is that when a command line is parsed and executed, the entire line is executed before any other device action proceeds. There is no need to wait between commands. The SR830 has a 256 character input buffer and processes commands in the order received. If the buffer fills up, the SR830 will hold off handshaking on the GPIB and attempt to hold off handshaking on RS232. Similarly, the SR830 has a 256 character output buffer to store outputs until the host computer is ready to receive. If either buffer overflows, both buffers are cleared and an error reported. The present value of a particular parameter may
COMMUNICATING WITH GPIB

The SR830 supports the IEEE-488.1 (1978) interface standard. It also supports the required common commands of the IEEE-488.2 (1987) standard. Before attempting to communicate with the SR830 over the GPIB interface, the SR830's device address must be set. The address is set with the [Setup] key and may be set between 1 and 30.
COMMUNICATING WITH RS232

The SR830 is configured as a DCE ( transmit on pin 3, receive on pin 2) device and supports CTS/ DTR hardware handshaking. The CTS signal (pin 5) is an output indicating that the SR830 is ready, while the DTR signal (pin 20) is an input that is used to control the SR830's data transmission. If desired, the handshake pins may be ignored and a simple 3 wire interface (pins 2,3 and 7) may be used. The RS232 interface baud rate and parity must be set. These are set with the [Setup] key. The RS232 word length is always 8 bits.
STATUS INDICATORS AND QUEUES

To assist in programming, the SR830 has 4 interface status indicators. The ACTIVE indicator flashes whenever a character is received or transmitted over either interface. The ERROR indicator flashes when an error, such as an illegal command, or parameter out of range, has been detected. The REMOTE indicator is on whenever the SR830 is in a remote state (front panel locked out). The SRQ indicator is on when the SR830 generates a service request. SRQ stays on until a serial poll is
5-1
Remote Programming
be determined by querying the SR830 for its value. A query is formed by appending a question mark "?" to the command mnemonic and omitting the desired parameter(s) from the command. Values returned by the SR830 are sent as a string of ASCII characters terminated by a carriage return <cr> on RS232 and by a line-feed <lf> on GPIB. If multiple queries are sent on one command line (separated by semicolons, of course) the answers will be returned individually, each with a terminator. Examples of Command Formats FMOD 1 <lf> FREQ 10E3 <lf> iIDN? <lf> STRT <lf> OUTP? 1 <lf> Set reference source to internal Set the internal reference frequency to 10000 Hz (10 kHz) Queries the device identification Starts data acquisition Queries the value of X and LIAS? status query commands may be used to query the Status Bytes. Since the SR830 processes one command at a time, the status query will not be processed until the previous operation is finished. Thus a response to the status query in itself signals that the previous command is finished. The query response may then be checked for various errors.
GET (GROUP EXECUTE TRIGGER)

The GPIB interface command GET is the same as the TRIG command. GET is the same as a trigger input. GET only has an effect if the sampling rate is triggered or if triggers start a scan.
INTERFACE READY AND STATUS

The Interface Ready bit (bit 1) in the Serial Poll Status Byte signals that the SR830 is ready to receive and execute a command. When a command is received, this bit is cleared indicating that an operation is in progress. While the operation is in progress, no other commands will be processed. Commands received during this time are stored in the buffer to be processed later. Only GPIB serial polling will generate a response while a command is in progress. When the command execution terminates, the Interface Ready bit is set again and new commands will be processed. Since most commands execute very quickly, the host computer does not need to continually check the Interface Ready bit. Commands may be sent one after another and they will be processed immediately. When using the GPIB interface, serial polling may be used to check the Interface Ready bit in the Serial Poll Byte while an operation is in progress. After the Interface Ready bit becomes set, signalling the completion of the command, then the ERR or ESB bit may be checked to verify successful completion of the command. If the RS232 interface is used, or serial polling is not available, then the iSTB?, iESR?, ERRS?,
5-2
Remote Programming DETAILED COMMAND LIST

The four letter mnemonic in each command sequence specifies the command. The rest of the sequence consists of parameters. Multiple parameters are separated by commas. Parameters shown in { } are optional or may be queried while those not in { } are required. Commands that may be queried have a question mark in parentheses (?) after the mnemonic. Commands that may ONLY be queried have a ? after the mnemonic. Commands that MAY NOT be queried have no ?. Do not send ( ) or { } as part of the command. The variables are defined as follows. i, j, k, l, m integers x, y, z real numbers f frequency s string All numeric variables may be expressed in integer, floating point or exponential formats ( i.e., the number five can be either 5, 5.0, or .5E1). Strings are sent as a sequence of ASCII characters.
Remember! All responses are directed only to the selected output interface! Use the OUTX command to select the correct interface at the beginning of every program.
5-3
Remote Programming REFERENCE and PHASE COMMANDS

PHAS (?) {x} The PHAS command sets or queries the reference phase shift. The parameter x is the phase (real number of degrees). The PHAS x command will set the phase shift to x. The value of x will be rounded to 0.01. The phase may be programmed from -360.00 x 729.99 and will be wrapped around at 180. For example, the PHAS 541.0 command will set the phase to -179.00 (541-360=181=-179). The PHAS? queries the phase shift. The FMOD command sets or queries the reference source. The parameter i selects internal (i=1) or external (i=0). The FREQ command sets or queries the reference frequency. The FREQ? query command will return the reference frequency (in internal or external mode). The FREQ f command sets the frequency of the internal oscillator. This command is allowed only if the reference source is internal. The parameter f is a frequency (real number of Hz). The value of f will be rounded to 5 digits or 0.0001 Hz, whichever is greater. The value of f is limited to 0.001 f 102000. If the harmonic number is greater than 1, then the frequency is limited to nxf 102 kHz where n is the harmonic number. RSLP (?) {i} The RSLP command sets or queries the reference trigger when using the external reference mode. The parameter i selects sine zero crossing (i=0), TTL rising edge (i=1), , or TTL falling edge (i=2). At frequencies below 1 Hz, the a TTL reference must be used. The HARM command sets or queries the detection harmonic. This parameter is an integer from 1 to 19999. The HARM i command will set the lock-in to detect at the ith harmonic of the reference frequency. The value of i is limited by ixf 102 kHz. If the value of i requires a detection frequency greater than 102 kHz, then the harmonic number will be set to the largest value of i such that ixf 102 kHz. The SLVL command sets or queries the amplitude of the sine output. The parameter x is a voltage (real number of Volts). The value of x will be rounded to 0.002V. The value of x is limited to 0.004 x 5.000.
FMOD (?) {i}
FREQ (?) {f}
HARM (?) {i}
SLVL (?) {x}
5-4
Remote Programming INPUT and FILTER COMMANDS

ISRC (?) {i} The ISRC command sets or queries the input configuration. The parameter i selects A (i=0), A-B (i=1), I (1 M) (i=2) or I (100 M) (i=3). Changing the current gain does not change the instrument sensitivity. Sensitivities above 10 nA require a current gain of 1 M. Sensitivities between 20 nA and 1 A automatically select the 1 M current gain. At sensitivities below 20 nA, changing the sensitivity does not change the current gain. IGND (?) {i} The IGND command sets or queries the input shield grounding. The parameter i selects Float (i=0) or Ground (i=1). The ICPL command sets or queries the input coupling. The parameter i selects AC (i=0) or DC (i=1). The ILIN command sets or queries the input line notch filter status. The parameter i selects Out or no filters (i=0), Line notch in (i=1), 2xLine notch in (i=2) or Both notch filters in (i=3).
ICPL (?) {i}
ILIN (?) {i}
5-5
Remote Programming GAIN and TIME CONSTANT COMMANDS

SENS (?) {i} The SENS command sets or queries the sensitivity. The parameter i selects a sensitivity below. i 0 1 2 3 4 5 6 7 8 9 10 11 12 sensitivity 2 nV/fA 5 nV/fA 10 nV/fA 20 nV/fA 50 nV/fA 100 nV/fA 200 nV/fA 500 nV/fA 1 V/pA 2 V/pA 5 V/pA 10 V/pA 20 V/pA i 13 14 15 16 17 18 19 20 21 22 23 24 25 26 sensitivity 50 V/pA 100 V/pA 200 V/pA 500 V/pA 1 mV/nA 2 mV/nA 5 mV/nA 10 mV/nA 20 mV/nA 50 mV/nA 100 mV/nA 200 mV/nA 500 mV/nA 1 V/A
RMOD (?) {i}
The RMOD command sets or queries the reserve mode. The parameter i selects High Reserve (i=0), Normal (i=1) or Low Noise (minimum) (i=2). See the description of the [Reserve] key for the actual reserves for each sensitivity. The OFLT command sets or queries the time constant. The parameter i selects a time constant below. i 0 1 2 3 4 5 6 7 8 9 time constant 10 s 30 s 100 s 300 s 1 ms 3 ms 10 ms 30 ms 100 ms 300 ms i 10 11 12 13 14 15 16 17 18 19 time constant 1s 3s 10 s 30 s 100 s 300 s 1 ks 3 ks 10 ks 30 ks
OFLT (?) {i}
Time constants greater than 30s may NOT be set if the harmonic x ref. frequency (detection frequency) exceeds 200 Hz. Time constants shorter than the minimum time constant (based upon the filter slope and dynamic reserve) will set the time constant to the minimum allowed time constant. See the Gain and TIme Constant operation section. OFSL (?) {i} The OFSL command sets or queries the low pass filter slope. The parameter i selects 6 dB/oct (i=0), 12 dB/oct (i=1), 18 dB/oct (i=2) or 24 dB/oct (i=3).
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Remote Programming
SYNC (?) {i} The SYNC command sets or queries the synchronous filter status. The parameter i selects Off (i=0) or synchronous filtering below 200 Hz (i=1). Synchronous filtering is turned on only if the detection frequency (reference x harmonic number) is less than 200 Hz.
5-7
Remote Programming DISPLAY and OUTPUT COMMANDS

DDEF (?) i {, j, k} The DDEF command selects the CH1 and CH2 displays. The parameter i selects CH1 (i=1) or CH2 (i=2) and is required. The DDEF i, j, k command sets display i to parameter j with ratio k as listed below. CH1 (i=1) display X R X Noise Aux In 1 Aux In 2 ratio none Aux In 1 Aux In 2 CH2 (i=2) display Y Y Noise Aux In 3 Aux In 4 ratio none Aux In 3 Aux In 4
j 0 1 2 3 4 k 0 1 2
j 0 1 2 3 4 k 0 1 2
The DDEF? i command queries the display and ratio of display i. The returned string contains both j and k separated by a comma. For example, if the DDEF? 1 command returns "1,0" then the CH1 display is R with no ratio. FPOP (?) i {, j} The FPOP command sets or queries the front panel (CH1 and CH2) output sources. The parameter i selects CH1 (i=1) or CH2 (i=2) and is required. The FPOP i, j command sets output i to quantity j where j is listed below. CH1 (i=1) output quantity CH 1 Display X CH2 (i=2) output quantity CH 2 Display Y
j 0 1 OEXP (?) i {, x, j}
j 0 1
The OEXP command sets or queries the output offsets and expands. The parameter i selects X (i=1), Y (i=2) or R (i=3) and is required. The parameter x is the offset in percent (-105.00 x 105.00). The parameter j selects no expand (j=0), expand by 10 (j=1) or 100 (j=2). The OEXP i, x, j command will set the offset and expand for quantity i. This command requires BOTH x and j. The OEXP? i command queries the offset and expand of quantity i. The returned string contains both the offset and expand separated by a comma. For example, if the OEXP? 2 command returns "50.00,1" then the Y offset is 50.00% and the Y expand is 10. Setting an offset to zero turns the offset off. Querying an offset which is off will return 0% for the offset value.
AOFF i
The AOFF i command automatically offsets X (i=1), Y (i=2) or R (i=3) to zero. The parameter i is required. This command is equivalent to pressing the [Auto Offset] keys.
5-8
Remote Programming AUX INPUT and OUTPUT COMMANDS

OAUX? i The OAUX? command queries the Aux Input values. The parameter i selects an Aux Input (1, 2, 3 or 4) and is required. The Aux Input voltages are returned as ASCII strings with units of Volts. The resolution is 1/3 mV. This command is a query only command. The AUXV command sets or queries the Aux Output voltage when the output. The parameter i selects an Aux Output (1, 2, 3 or 4) and is required. The parameter x is the output voltage (real number of Volts) and is limited to -10.500 x 10.500. The output voltage will be set to the nearest mV.
AUXV (?) i {, x}
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Remote Programming
SETUP COMMANDS
OUTX (?) {i}
The OUTX command sets the output interface to RS232 (i=0) or GPIB (i=1). The OUTX i command should be sent before any query commands to direct the responses to the interface in use. In general, every GPIB interface command will put the SR830 into the REMOTE state with the front panel deactivated. To defeat this feature, use the OVRM 1 command to overide the GPIB remote. In this mode, the front panel is not locked out when the unit is in the REMOTE state. The OVRM 0 command returns the unit to normal remote operation. The KCLK command sets or queries the key click On (i=1) or Off (i=0) state. The ALRM command sets or queries the alarm On (i=1) or Off (i=0) state. The SSET i command saves the lock-in setup in setting buffer i (1i9). The setting buffers are retained when the power is turned off. The RSET i command recalls the lock-in setup from setting buffer i (1i9). Interface parameters are not changed when a setting buffer is recalled with the RSET command. If setting i has not been saved prior to the RSET i command, then an error will result.
OVRM i
KCLK (?) {i}
ALRM (?) {i}
SSET i
RSET i
5-10
Remote Programming AUTO FUNCTIONS

AGAN The AGAN command performs the Auto Gain function. This command is the same as pressing the [Auto Gain] key. Auto Gain may take some time if the time constant is long. AGAN does nothing if the time constant is greater than 1 second. Check the command execution in progress bit in the Serial Poll Status Byte (bit 1) to determine when the function is finished. The ARSV command performs the Auto Reserve function. This command is the same as pressing the [Auto Reserve] key. Auto Reserve may take some time. Check the command execution in progress bit in the Serial Poll Status Byte (bit 1) to determine when the function is finished. The APHS command performs the Auto Phase function. This command is the same as pressing the [Auto Phase] key. The outputs will take many time constants to reach their new values. Do not send the APHS command again without waiting the appropriate amount of time. If the phase is unstable, then APHS will do nothing. Query the new value of the phase shift to see if APHS changed the phase shift. The AOFF i command automatically offsets X (i=1), Y (i=2) or R (i=3) to zero. The parameter i is required. This command is equivalent to pressing the [Auto Offset] keys.
ARSV
APHS
AOFF i
5-11
Remote Programming DATA STORAGE COMMANDS

Data Storage The SR830 can store up to 16383 points from both the Channel 1 and Channel 2 displays in an internal data buffer. The data buffer is NOT retained when the power is turned off. The data buffer is accessible only via the computer interface. Configure the displays to show the desired quantity (with appropriate ratio, offset and expand). The data buffer stores the quantities which are displayed. Only quantities which are displayed on the CH1 or CH2 displays can be stored. Frequency, for example, can not be stored. Data Points and Bins Data points stored in the buffer are sometimes referred to by their bin position within the buffer. The oldest data point is bin0, the next point is bin1, etc. A buffer with N points numbers them from 0 to N-1. Sample Rate The Sample Rate can be varied from 512 Hz down to 62.5 mHz (1 point every 16 sec). The sample rate sets how often points are added to the storage buffer. Both displays are sampled at the same rate (and at the same times). In addition to the internal sample rates, samples can be triggered by an external TTL trigger. In this mode, a sample is recorded within 2 ms of a rising edge trigger on the rear panel Trigger input. Triggers which occur faster than 512 Hz are ignored. Storage Time The buffer holds 16383 samples taken at the sample rate. The entire storage time is 16383 divided by the sample rate. End of Scan When the buffer becomes full, data storage can stop or continue. The first case is called 1 Shot (data points are stored for a single buffer length). At the end of the buffer, data storage stops and an audio alarm sounds. The second case is called Loop. In this case, data storage continues at the end of the buffer. The data buffer will store 16383 points and start storing at the beginning again. The most recent 16383 points will be contained in the buffer. Once the buffer has looped around, the oldest point (at any time) is at bin#0 and the most recent point is at bin#16382. The default mode is Loop. Starting and Stopping a Scan The STRT, PAUS and REST commands are used to control data storage. Basically, the STRT command starts data storage after a reset or pause. The PAUS command pauses data storage but does not reset the buffer. The REST stops data storage and resets the buffer data. In addition, the rear panel Trigger input can be used to start data storage. To select this mode, use the TSTR command. In this mode, a rising TTL trigger will act the same as the STRT command. The sample rate can be either internal or Triggered. In the first case, the trigger starts the storage and data is sampled at the programmed sample rate (up to 512 Hz). In the latter case, the first trigger will start the storage and data will be sampled at every subsequent trigger.
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Remote Programming
Aliasing Effects In any sampled data stream, it is possible to sample a high frequency signal such that it will appear to be a much lower frequency. This is called aliasing. For example, suppose the lock-in is detecting a signal near 1 Hz with a relatively short time constant. The X output will have a DC component and a 2 Hz component (2xf). If the sample rate is 2 Hz, then the samples may be taken as illustrated below.
1 second
The samples represent a sine wave much slower than 2 Hz that isn't actually present in the output! In this case, a much higher sampling rate will solve the problem. Aliasing occurs whenever the output signal being sampled contains signals at frequencies greater than 1/2 the sample rate. The effect is most noticeable when trying to sample an output frequency at an integer multiple of the sample rate (as above). The above aliasing problem will be the same for a 1 kHz output (500 times the sample rate) as for the 2 Hz output. Generally, the highest possible sample rate should be used given the desired storage time. The lock-in time constant and filter slope should be chosen to attenuate signals at frequencies higher than 1/2 the sample rate as much as possible.
SRAT (?) {i}
The SRAT command sets or queries the data sample rate. The parameter i selects the sample rate listed below. i 0 1 2 3 4 5 6 quantity 62.5 mHz 125 mHz 250 mHz 500 mHz 1 Hz 2 Hz 4 Hz i 7 8 9 10 11 12 13 14 quantity 8 Hz 16 Hz 32 Hz 64 Hz 128 Hz 256 Hz 512 Hz Trigger
SEND (?) {i}
The SEND command sets or queries the end of buffer mode. The parameter i selects 1 Shot (i=0) or Loop (i=1). If Loop mode is used, make sure to pause data storage before reading the data to avoid confusion about which point is the most recent. The TRIG command is the software trigger command. This command has the same effect as a trigger at the rear panel trigger input. The TSTR command sets or queries the trigger start mode. The parameter i=1 selects trigger starts the scan and i=0 turns the trigger start feature off. The STRT command starts or resumes data storage. STRT is ignored if storage is already in progress.
TRIG
TSTR (?) {i}
STRT
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Remote Programming
PAUS The PAUS command pauses data storage. If storage is already paused or reset then this command is ignored. The REST command resets the data buffers. The REST command can be sent at any time - any storage in progress, paused or not, will be reset. This command will erase the data buffer.
REST
5-14
Remote Programming DATA TRANSFER COMMANDS

OUTP ? i The OUTP? i command reads the value of X, Y, R or . The parameter i selects X (i=1), Y (i=2), R (i=3) or (i=4). Values are returned as ASCII floating point numbers with units of Volts or degrees. For example, the response might be "-1.01026". This command is a query only command. The OUTR? i command reads the value of the CH1 or CH2 display. The parameter i selects the display (i=1 or 2). Values are returned as ASCII floating point numbers with units of the display. For example, the response might be "-1.01026". This command is a query only command. The SNAP? command records the values of either 2, 3, 4, 5 or 6 parameters at a single instant. For example, SNAP? is a way to query values of X and Y (or R and ) which are taken at the same time. This is important when the time constant is very short. Using the OUTP? or OUTR? commands will result in time delays, which may be greater than the time constant, between reading X and Y (or R and ). The SNAP? command requires at least two parameters and at most six parameters. The parameters i, j, k, l, m, n select the parameters below. i,j,k,l,m,n 1 2 3 4 5 6 7 8 9 10 11 parameter X Y R Aux In 1 Aux In 2 Aux In 3 Aux In 4 Reference Frequency CH1 display CH2 display
OUTR ? i
SNAP ? i,j {,k,l,m,n}
The requested values are returned in a single string with the values separated by commas and in the order in which they were requested. For example, the SNAP?1,2,9,5 will return the values of X, Y, Freq and Aux In 1. These values will be returned in a single string such as "0.951359,0.0253297,1000.00,1.234". The first value is X, the second is Y, the third is f, and the fourth is Aux In 1. The values of X and Y are recorded at a single instant. The values of R and are also recorded at a single instant. Thus reading X,Y OR R, yields a coherent snapshot of the output signal. If X,Y,R and are all read, then the values of X,Y are recorded approximately 10s apart from R,. Thus, the values of X and Y may not yield the exact values of R and from a single SNAP? query. The values of the Aux Inputs may have an uncertainty of up to 32s. The frequency is computed only every other period or 40 ms, whichever is longer.
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Remote Programming
The SNAP? command is a query only command. The SNAP? command is used to record various parameters simultaneously, not to transfer data quickly. OAUX? i The OAUX? command reads the Aux Input values. The parameter i selects an Aux Input (1, 2, 3 or 4) and is required. The Aux Input voltages are returned as ASCII strings with units of Volts. The resolution is 1/3 mV. This command is a query only command. The SPTS? command queries the number of points stored in the buffer. Both displays have the same number of points. If the buffer is reset, then 0 is returned. Remember, SPTS? returns N where N is the number of points - the points are numbered from 0 (oldest) to N-1 (most recent). The SPTS? command can be sent at any time, even while storage is in progress. This command is a query only command. The TRCA? command queries the points stored in the Channel i buffer. The values are returned as ASCII floating point numbers with the units of the trace. Multiple points are separated by commas and the final point is followed by a terminator. For example, the response with two points might be "-1.234567e-009,+7.654321e-009,". The parameter i selects the display buffer (i=1, 2) and is required. Points are read from the buffer starting at bin j (j0). A total of k bins are read (k1). To read a single point, set k=1. Both j and k are required. If j+k exceeds the number of stored points (as returned by the SPTS? query), then an error occurs. Remember, SPTS? returns N where N is the total number of bins - the TRCA? command numbers the bins from 0 (oldest) to N-1 (most recent). If data storage is set to Loop mode, make sure that storage is paused before reading any data. This is because the points are indexed relative to the most recent point which is continually changing. TRCB ? i, j, k The TRCB? command queries the points stored in the Channel i buffer. The values are returned as IEEE format binary floating point numbers (with the units of the trace). There are 4 bytes per point. Multiple points are not separated by any delimiter. The bytes can be read directly into a floating point array (in most languages). Do not query the IFC (no command in progress) status bit after sending the TRCB command. This bit will not be set until the transfer is complete. When using the GPIB interface, EOI is sent with the final byte. The points must be read using a binary transfer (see your GPIB interface card software manual). Make sure that the software is configured to NOT terminate reading upon receipt of a CR or LF. When using the RS232 interface, the word length must be 8 bits. The points must be read as binary bytes (no checking for linefeeds, carriage returns or other control characters). Most serial interface drivers are designed for ASCII text only and will not work here. In addition, the data transfer does not pause between bytes. The receiving interface must always be ready to receive the next byte. In general, using binary trans-
SPTS ?
TRCA ? i, j, k
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Remote Programming
fers on the RS232 interface is not recommended. The parameter i selects the display buffer (i=1, 2) and is required. Points are read from the buffer starting at bin j (j0). A total of k bins are read (k1) for a total transfer of 4k bytes. To read a single point, set k=1. Both j and k are required. If j+k exceeds the number of stored points (as returned by the SPTS? query), then an error occurs. Remember, SPTS? returns N where N is the total number of bins - the TRCB? command numbers the bins from 0 (oldest) to N-1 (most recent). If data storage is set to Loop mode, make sure that storage is paused before reading any data. This is because the points are indexed relative to the most recent point which is continually changing. TRCL ? i, j, k The TRCL? command queries the points stored in the Channel i buffer. The values are returned in a non-normalized floating point format (with the units of the trace). There are 4 bytes per point. Multiple points are not separated by any delimiter. The bytes CANNOT be read directly into a floating point array. Each point consists of four bytes. Byte 0 is the LSB and Byte 3 is the MSB. The format is illustrated below. 16 bits exp 0 byte3 byte2 16 bits mantissa byte1 byte0
The mantissa is a signed 16 bit integer (-32768 to 32767). The exponent is a signed integer whose value ranges from 0 to 248 (thus byte 3 is always zero). The value of a data point is simply, value = m x 2 (exp-124) where m is the mantissa and exp is the exponent. The data within the SR830 is stored in this format. Data transfers using this format are faster than IEEE floating point format. If data transfer speed is important, the TRCL? command should be used. Do not query the IFC (no command in progress) status bit after sending the TRCL command. This bit will not be set until the transfer is complete. When using the GPIB interface, EOI is sent with the final byte. The points must be read using a binary transfer (see your GPIB interface card software manual). Make sure that the software is configured to NOT terminate reading upon receipt of a CR or LF. When using the RS232 interface, the word length must be 8 bits. The points must be read as binary bytes (no checking for linefeeds, carriage returns or other control characters). Most serial interface drivers are designed for ASCII text only and will not work here. In addition, the data transfer does not pause between bytes. The receiving interface must always be ready to receive the next byte. In general, using binary trans-
5-17
Remote Programming
always be ready to receive the next byte. In general, using binary transfers on the RS232 interface is not recommended. The parameter i selects the display buffer (i=1, 2) and is required. Points are read from the buffer starting at bin j (j0). A total of k bins are read (k1) for a total transfer of 4k bytes. To read a single point, set k=1. Both j and k are required. If j+k exceeds the number of stored points (as returned by the SPTS? query), then an error occurs. Remember, SPTS? returns N where N is the total number of bins - the TRCB? command numbers the bins from 0 (oldest) to N-1 (most recent). If data storage is set to Loop mode, make sure that storage is paused before reading any data. This is because the points are indexed relative to the most recent point which is continually changing. FAST (?) {i} The FAST command sets the fast data transfer mode on and off. The parameter i selects On (i=1) or Off (i=0). When the fast transfer mode is on, whenever data is sampled and stored, the values of X and Y are automatically transmitted over the GPIB interface (this mode is not available over RS232). The sample rate sets the frequency of the data transfers. It is important that the receiving interface be able to keep up with the transfers. FAST only sends data when data is being stored. If the storage buffer is single-shot and full, then no data will be transferred. The values of X and Y are transferred as signed integers, 2 bytes long (16 bits). X is sent first followed by Y for a total of 4 bytes per sample. The values range from -32768 to 32767. The value 30000 represents full scale (i.e. the sensitivity). Offsets and expands are included in the values of X and Y. The transferred values are (raw data - offset) x expand. The resulting value must still be a 16 bit integer. The value 30000 now represents full scale divided by the expand factor. At fast sample rates, it is important that the receiving interface be able to keep up. If the SR830 finds that the interface is not ready to receive a point, then the fast transfer mode is turned off. The fast transfer mode may be turned off with the FAST0 command. Make sure that the SR830 transmit buffer is empty by doing a dummy query before a FAST transfer (for example, send SPTS? and read the answer and ignore it). The transfer mode should be turned on (using FAST1) before storage is started. Then use the STRD command (see below) to start data storage. After sending the STRD command, immediately make the SR830 a talker and the controlling interface a listener. Remember, the first transfer will occur with the very first point. STRD After using FAST1 to turn on fast data transfer, use the STRD command to start the data storage. STRD starts data storage after a delay of 0.5 sec. This delay allows the controlling interface to place itself in the read mode before the first data points are transmitted. Do not use the STRT command to start the scan. See the programming examples at the end of this section.
5-18
Remote Programming INTERFACE COMMANDS

iRST The iRST command resets the SR830 to its default configurations. The communications setup is not changed. All other modes and settings are set to their default conditions and values. This command takes some time to complete. This command resets any data scan in progress. Data stored in the buffers will be lost. The iIDN? query returns the SR830's device identification string. This string is in the format "Stanford_Research_Systems,SR830,s/n00111,ver1.000". In this example, the serial number is 00111 and the firmware version is 1.000. LOCL (?) {i} The LOCL command sets the local/remote function. If i=0 the SR830 is LOCAL, if i=1 the SR830 will go REMOTE, and if i=2 the SR830 will go into LOCAL LOCKOUT state. The states duplicate the GPIB local/remote states. In the LOCAL state both command execution and keyboard input are allowed. In the REMOTE state command execution is allowed but the keyboard and knob are locked out except for the [LOCAL] key which returns the SR830 to the LOCAL state. In the LOCAL LOCKOUT state all front panel operation is locked out, including the [LOCAL] key. The REMOTE indicator is directly above the [LOCAL] key. The Overide Remote mode must be set to No in order for the front panel to be locked out. If Overide Remote is Yes, then the front panel is active even in the REMOTE state. OVRM (?) {i} The OVRM command sets or queries the GPIB Overide Remote Yes/No condition. The parameter i selects No (i=0) or Yes (i=1). When Overide Remote is set to Yes, then the front panel is not locked out when the unit is in the REMOTE state. The REMOTE indicator will still be on and the [LOCAL] key will still return the unit to the Local state. The default mode is Overide Remote Yes. To lock-out the front panel, use the OVRM0 command before local lock-out. TRIG The TRIG command is the software trigger command. This command has the same effect as a trigger at the rear panel trigger input.
iIDN?
5-19
Remote Programming STATUS REPORTING COMMANDS

The Status Byte definitions follow this section. iCLS The iCLS command clears all status registers. The status enable registers are NOT cleared. The iESE i command sets the standard event enable register to the decimal value i (0-255). The iESE i,j command sets bit i (0-7) to j (0 or 1). The iESE? command queries the value (0-255) of the status byte enable register. The iESE? i command queries the value (0 or 1) of bit i. The iESR? command queries the value of the standard event status byte. The value is returned as a decimal number from 0 to 255. The iESR? i command queries the value (0 or 1) of bit i (0-7). Reading the entire byte will clear it while reading bit i will clear just bit i. The iSRE i command sets the serial poll enable register to the decimal value i (0-255). The iSRE i,j command sets bit i (0-7) to j (0 or 1).The iSRE? command queries the value (0-255) of the serial poll enable register. The iSRE? i command queries the value (0 or 1) of bit i. The iSTB? command queries the value of the serial poll status byte. The value is returned as a decimal number from 0 to 255. The iSTB? i command queries the value (0 or 1) of bit i (0-7). Reading this byte has no effect on its value. The iPSC command sets the value of the power-on status clear bit. If i=1 the power-on status clear bit is set and all status registers and enable registers are cleared on power up. If i=0 the bit is cleared and the status enable registers maintain their values at power down. This allows a service request to be generated at power up. The ERRE i command sets the error status enable register to the decimal value i (0-255). The ERRE i,j command sets bit i (0-7) to j (0 or 1). The ERRE? command queries the value (0-255) of the error status enable register. The ERRE? i command queries the value (0 or 1) of bit i. The ERRS? command queries the value of the error status byte. The value is returned as a decimal number from 0 to 255. The ERRS? i command queries the value (0 or 1) of bit i (0-7). Reading the entire byte will clear it while reading bit i will clear just bit i. The LIAE command sets the lock-in (LIA) status enable register to the decimal value i (0-255). The LIAE i,j command sets bit i (0-7) to j (0 or 1). The LIAE? command queries the value of the LIA status enable register. The LIAE? i command queries the value (0 or 1) of bit i. The LIAS? command queries the value of the lock-in (LIA) status byte. The value is returned as a decimal number from 0 to 255. The LIAS? i command queries the value (0 or 1) of bit i (0-7). Reading the entire byte will clear it while reading bit i will clear just bit i.
iESE (?) {i} {,j}
iESR? {i}
iSRE (?) {i} {,j}
iSTB? {i}
iPSC (?) {i}
ERRE (?) {i} {,j}
ERRS? {i}
LIAE (?) {i} {,j}
LIAS? {i}
5-20
Remote Programming STATUS BYTE DEFINITIONS

The SR830 reports on its status by means of four status bytes: the Serial Poll Status byte, the Standard Event Status byte, the LIA Status byte, and the Error Status byte. The status bits are set to 1 when the event or state described in the tables below has occurred or is present. SERIAL POLL STATUS BYTE bit 0 name SCN usage No scan in progress (Stop or Done). A Paused scan is considered to be in progress. No command execution in progress. An enabled bit in the error status byte has been set. An enabled bit in the LIA status byte has been set. The interface output buffer is non-empty. An enabled bit in the standard status byte has been set. SRQ (service request) has occurred.
1 2
IFC ERR
LIA
4 5
MAV ESB
6 7
SRQ Unused
The ERR, LIA, and ESB bits are set whenever any bit in both their respective status bytes AND enable registers is set. Use the FSRE, FESE, ERRE and LIAE commands to set enable register bits. The ERR, LIA and ESB bits are not cleared until ALL enabled status bits in the Error, LIA and Standard Event status bytes are cleared (by reading the status bytes or using FCLS). Using FSTB? to read the Serial Poll Status Byte A bit in the Serial Poll status byte is NOT cleared by reading the status byte using FSTB?. The bit stays set as long as the status condition exists. This is true even for SRQ. SRQ will be set whenever the same bit in the serial poll status byte AND enable register is set. This is independent of whether a serial poll has occurred to clear the service request. Using SERIAL POLL Except for SRQ, a bit in the Serial Poll status byte is NOT cleared by serial polling the status byte. When reading the status byte using a serial poll, the SRQ bit signals that the SR830 is requesting service. The SRQ bit will be set (1) the first time the SR830 is polled following a service request. The serial poll automatically clears the service request. Subsequent serial polls will return SRQ cleared (0) until another service request occurs. Polling the status byte and reading it with FSTB? can return different values for SRQ. When polled, SRQ indicates a service request has occurred. When read, SRQ indicates that an enabled status bit is set.
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Remote Programming
SERVICE REQUESTS (SRQ) A GPIB service request (SRQ) will be generated whenever a bit in both the Serial Poll Status byte AND Serial Poll Enable register is set. Use FSRE to set bits in the Serial Poll Enable register. A service request is only generated when an enabled Serial Poll Status bit becomes set (changes from 0 to 1). An enabled status bit which becomes set and remains set will generate a single SRQ. If another service request from the same status bit is desired, the requesting status bit must first be cleared. In the case of the ERR, LIA and ESB bits, this means clearing the enabled bits in the ERR, LIA and ESB status bytes (by reading them). Multiple enabled bits in these status bytes will generate a single SRQ. Another SRQ (from ERR, LIA or ESB) can only be generated after clearing the ERR, LIA or ESB bits in the Serial Poll status byte. To clear these bits, ALL enabled bits in the ERR, LIA or ESB status bytes must be cleared. The controller should respond to the SRQ by performing a serial poll to read the Serial Poll status byte to determine the requesting status bit. Bit 6 (SRQ) will be reset by the serial poll. For example, to generate a service request when a RESRV overload occurs, bit 0 in the LIA Status Enable register needs to be set (LIAE 1 command) and bit 3 in the Serial Poll Enable register must be set (FSRE 8 command). When a reserve overload occurs, bit 0 in the LIA Status byte is set. Since bit 0 in the LIA Status byte AND Enable register is set, this ALSO sets bit 3 (LIA) in the Serial Poll Status byte. SInce bit 3 in the Serial Poll Status byte AND Enable register is set, an SRQ is generated. Bit 6 (SRQ) in the Serial Poll Status byte is set. Further RESRV overloads will not generate another SRQ until the RESRV overload status bit is cleared. The RESRV status bit is cleared by reading the LIA Status byte (with LIAS?). Presumably, the controller is alerted to the overload via the SRQ, performs a serial poll to clear the SRQ, does something to try to remedy the situation (change gain, experimental parameters, etc.) and then clears the RESRV status bit by reading the LIA status register. A subsequent RESRV overload will then generate another SRQ.
STANDARD EVENT STATUS BYTE
bit 0
name INP
usage Set on input queue overflow (too many commands received at once, queues cleared).
1 2
Unused QRY Set on output queue overflow (too many responses waiting to be transmitted, queues cleared).
3 4
Unused EXE Set when a command can not execute correctly or a parameter is out of range. Set when an illegal command is received. Set by any key press or knob rotation. Set by power-on.
5 6 7
CMD URQ PON
The bits in this register remain set until cleared by reading them or by the iCLS command.
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Remote Programming
LIA STATUS BYTE bit 0 name INPUT/RESRV usage Set when an Input or Amplifier overload is detected. Set when a Time Constant filter overload is detected. Set when an Output overload is detected. Set when a reference unlock is detected. Set when the detection frequency switches ranges (harmonic x ref. frequency decreases below 199.21 Hz or increases above 203.12 Hz). Time constants above 30 s and Synchronous filtering are turned off in the upper frequency range. Set when the time constant is changed indirectly, either by changing frequency range, dynamic reserve, filter slope or expand. Set when data storage is triggered. Only if samples or scans are in externally triggered mode.
FILTR
2 3 4
OUTPT UNLK RANGE
TC
TRIG
unused
The LIA Status bits stay set until cleared by reading or by the iCLS command.
ERROR STATUS BYTE
bit 0 1
name Unused Backup Error
usage
Set at power up when the battery backup has failed. Set when the RAM Memory test finds an error.
2 3 4 5 6 7
RAM Error Unused ROM Error GPIB Error DSP Error Math Error
Set when the ROM Memory test finds an error. Set when GPIB fast data transfer mode aborted. Set when the DSP test finds an error. Set when an internal math error occurs.
The Error Status bits stay set until cleared by reading or by the iCLS command.
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Remote Programming
5-24
Remote Programming EXAMPLE PROGRAM 1 Using Microsoft C (v5.1) with the National Instruments GPIB card on the IBM PC.
To successfully interface the SR830 to a PC via the GPIB interface, the instrument, interface card, and interface drivers must all be configured properly. To configure the SR830, the GPIB address must be set using the [Setup] key. The default GPIB address is 8; use this address unless a conflict occurs with other instruments in your system. The SR830 will be set to GPIB address 8 whenever a reset is performed (power on with the [Setup] key down). Make sure that you follow all the instructions for installing the GPIB card. The National Instruments card cannot be simply unpacked and put into your computer. To configure the card you must set jumpers and switches on the card to set the I/O address and interrupt levels. You must run the program "IBCONF" to configure the resident GPIB driver for you GPIB card. Please refer to the National Instruments manual for information. In this example, the following options must be set with IBCONF: Device name: Device address: Terminate Read on EOS: LIA 8 No (for binary transfers)
Once all the hardware and GPIB drivers are configured, use "IBIC". This terminal emulation program allows you to send commands to the SR830 directly from your computer's keyboard. If you cannot talk to the SR830 via "IBIC", then your programs will not run. Use the simple commands provided by National Instruments. Use "IBWRT" and "IBRD" to write and read from the SR830. After you are familiar with these simple commands, you can explore more complex programming commands. /*******************************************************************************************************/ /* Example program using Microsoft C V5.1 and the National Instruments GPIB card. Connect the Sine Out to the A Input with a BNC cable. Run this program by typing the program name followed by a space and the device name. The device name is the name used in IBCONF to configure the National Instruments driver. For example, if the program is called LIATEST and the above configuration is used, then type LIATEST LIA. Binary X and Y data will be transferred for 10 seconds to the PC using the FAST transfer command. After the fast transfer is complete, the existing magnitude (R) data in the data buffer will be transferred in IEEE floating point format as well as the LIA non-normalized floating point format (faster transfer) */ #include <conio.h> #include <stdio.h> #include <stdlib.h> #include <string.h> #include <math.h> #include "decl.h" #define SR830 argv[1] /* function prototypes */
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Remote Programming
void void void void void void void main(int, char *[]); txLia(char *); initGpib(char *); setupLia(void); printOutBinaryResults(void); printOutIEEEResults(void); printOutLIAResults(void);
/* National Instruments Interface Function Prototypes (488.1 Calls - see the National software manual). These are declared in "decl.h" int ibfind(char*); void ibwrt(int,char *,int); void ibrd(int,char *,unsigned long); void ibrsp(int,char *); void ibeos(int,int); void ibtmo(int,int); */ /* global variables */ int lia; int rxBuf[660*2]; float rfBuf[1000]; /* SR830 handle */ /* FAST mode data buffer */ /* Floating point data buffer */
void main(int argc, char *argv[]) { int nPts,i; char tstr[20]; if (argc<2) { printf("\nUsage: liatest <devName>\n"); exit(1); } else initGpib(SR830); txLia("OUTX1"); setupLia(); /* Set the SR830 to output responses to the GPIB port */ /* Setup the SR830 */
printf("\nAcquiring Data\n"); ibtmo(lia,0); /* turn off timeout for lia or set the timeout longer than the scan (10 seconds). The timeout measures the time to transfer the FULL number of bytes, not the time since the most recent byte is received.*/ txLia("FAST1;STRD"); /* Turn FAST mode data transfer ON, then start scan using the STRD start after delay command. The STRD command MUST be used if the scan is to be started by this program! Do NOT use STRT. */
/* take data for 10 seconds and then stop */ ibrd(lia,(char *)rxBuf,2564L); /* get FAST mode data for 10 seconds. 10 seconds of data at 64 Hz sample rate has 64*10 + 1 points, each point consists of X (2 bytes) and Y (2 bytes) for a total of 4*(64*10+1) = 2564 bytes. */
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Remote Programming
i=(int)ibcnt; txLia("PAUS"); printOutBinaryResults(); /* save total number of bytes read */ /* pause the data storage so no new points are taken */ /* format and print the results */
printf("\n%d bytes received.\nPress <Enter> to continue.",i); getch(); printf("\n"); printf("Reading Results in IEEE Binary Format\n"); txLia("SPTS?"); /* how many points in CH1 (R) buffer? */ ibrd(lia,tstr,20L); /* get the answer */ sscanf(tstr,"%d",&nPts); /* convert from a string to an int */ printf ("SPTS?=%d\n",nPts); sprintf(tstr,"TRCB?1,0,%d",nPts); ibwrt(lia,tstr,strlen(tstr)); /* use TRCB? to read the points in IEEE floating point format */ /* note that we cannot use txLia here because the IFC RDY bit will not be set until the transfer is complete! */ ibrd(lia,(char *)rfBuf,(long)nPts*4L); /* read directly into a FLOAT array, 4 bytes per point */ printf ("\nReceived %d bytes in IEEE binary format\n",ibcnt); printOutIEEEResults(); /* format and print results */ printf ("Press <Enter> to continue"); getch(); printf("\n"); printf("Reading Results in LIA Binary Format\n"); sprintf(tstr,"TRCL?1,0,%d",nPts); /* use TRCL? to read the points in LIA floating point format */ ibwrt(lia,tstr,strlen(tstr)); /* note that we cannot use txLia here because the IFC RDY bit will not be set until the transfer is complete! */ ibrd(lia,(char *)rfBuf,(long)nPts*4L); /* read into FLOAT array but the values are NOT floats! */ printf ("\nReceived %d bytes in LIA binary format\n",ibcnt); printOutLIAResults(); /* format and print results */ printf ("End of Program"); } void printOutBinaryResults(void) { /* calculates the first 10 values of R based on the X and Y values taken in FAST mode by the SR830 */ int i; float x,y,r; int *ptr; printf("\n\n"); ptr = rxBuf; /* ptr points to the first X,Y pair of values. X and Y are each integers. */ for (i=0;i<10;i++) { x = (float) (*ptr++) /(float) 30000.0; /* 30000 is full scale which is 1 V in this case */ y = (float) (*ptr++) /(float) 30000.0; /* for other scales, multiply by the full scale voltage */ r = (float) sqrt(x*x + y*y); /* compute R from X and Y */ printf("%d %e\n",i,r); } }
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Remote Programming
void printOutIEEEResults(void) { /* prints the first 10 values of R transferred in IEEE floating point format by the SR830 */ int i; printf("\n\n"); for (i=0;i<10;i++) printf("%d %e\n",i,rfBuf[i]); } void printOutLIAResults(void) { /* calculates the first 10 values of R transferred in LIA float format by the SR830 */ int i,mant,exp; int *ptr; float val; printf("\n\n"); ptr =(int *) rfBuf;
/* this is simple since the values are already IEEE floats */
/* ptr points to integers in rfBuf, not floats! */
for (i=0;i<10;i++) { mant = *ptr++; /* first comes the mantissa (16 bits) */ exp = *ptr++ - 124; /* then the binary exponent (16 bits) offset by 124 */ val = (float) mant * (float) pow(2.0,(double) exp); printf("%d %e\n",i,val); } } void initGpib(char *devName) { if ((lia=ibfind(devName))<0) { printf("\nCannot Find SR830 \n\a"); exit(1); } } void txLia(char *str) { char serPol; ibwrt(lia,str,strlen(str)); do { ibrsp(lia,&serPol); /* now poll for IFC RDY */ } while ((serPol&2)==0); /* until the command finishes executing */ } void setupLia(void) { txLia("*RST");
/* initialize the lock-in */
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Remote Programming
txLia("SRAT10; SEND0"); /* set 64 Hz sample rate, stop at end */ txLia("DDEF1,1,0; DDEF2,1,0"); /* set CH1=R, CH2=theta. Buffers store CH1 and CH2 */ printf("Scan is Initialized, Press <Enter> to Begin Scan..."); getch(); }
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Remote Programming
5-30
Remote Programming USING SR530 PROGRAMS WITH THE SR830

The SR830 responds to most SR530 programming commands. This allows the SR830 to drop into an existing SR530 application with a minimum of program changes. Of course, some changes will be required and some features are unique to one instrument or the other. For example, SR530 commands can not put the SR830 into a configuration which is not allowed by the SR830. All program routines which query the SR530 status MUST be rewritten to query the equivalent SR830 status using the SR830 status commands. The SR530 emulation mode is intended to facilitate the transition to the SR830. New applications programs should use the SR830 commands in order to take advantage of all of the SR830 features. The SR575 program will NOT run reliably with the SR830. This is because the SR575 is optimized for speed and the SR830 command execution time for some commands is longer than in the SR530. The SR530 commands are documented in the SR530 manual. SR530 command parameters follow the SR530 conventions. Exceptions are noted below.
OUTX i
The SR830 OUTX i command sets the output interface to RS232 (i=0) or GPIB (i=1). The OUTX i command MUST be at the start of ANY SR830 program to direct responses to the interface in use. The SR530 is always in external reference mode. Use the FMOD 0 command to set the SR830 to external reference. To use the SR830 internal oscillator, use the FMOD 1 command.
FMOD i
AX AY AR
The AX, AY and AR commands auto offset the X, Y and R outputs. Unlike the SR530, the X and Y offsets have no effect on R. The AP command performs the Auto Phase function. AP has no effect if the phase is unstable. The SR830 has no bandpass filter. This command is emulated but no changes are made to the SR830 configuration. Changes the Reference display. Change the dynamic reserve. Unlike the SR530, all reserves are allowed at all sensitivities. Change the Channel m expand. n=2 selects expand by 100. Note that expands in the SR830 affect the X and Y BNC outputs as well as the Display outputs. The F command Reads the frequency. The F x command sets the internal oscillator frequency to x Hz. Change the sensitivity from 10 nV (n=1) to 500 mV (n=24). Settings below 100 nV are always allowed. The 1V sensitivity can be set using G25. Querying this sensitivity returns a value of 24.
AP
B {n}
C {n} D {n}
E m {,n}
F {x}
G {n}
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Remote Programming
H The SR830 does not sense the pre-amplifier. This command is emulated and always returns 0. Change the remote/local status. The SR830 Override Remote mode can override the I2 command. Use the OVRM command to change this. Not implemented. Do not use. Not implemented. Do not use. Change the line notch filter status. Change the reference mode to 2f. This command actually sets the harmonic detect number to n+1 in order to access harmonics higher than 2f. Change the noise bandwidth. This command has no effect on the time constants. If the S4 command is used to change the display to Xnoise,Ynoise, then the N m command changes the effective ENBW with which the output noise will be reported when queried using the Q1 or Q2 commands. The N command only affects the response to Q1 or Q2 and only if the S4 command is used first.
I {n}
J K L m {,n} M {n}
N {m}
OX {n} {,v} OY {n} {,v} OR {n} {,v}
Change the X, Y or R offsets. Remember, v is an input voltage (not a percentage) for the SR530. Unlike the SR530, the X and Y offsets have no effect on R. Change the reference phase shift. The value of v is limited to -360.0v729.99. The phase shift is also defined differently for the SR830. Check the sense of phase rotation if your application is phase sensitive.
P {v}
Q1 Q2 QX QY
Read the output values in Volts or degrees. When the current input is selected, the outputs are returned in Amps. Change the reference input mode. Change the Output displays. The SR830 only responds if n=0 (X,Y), n=2 (R,) or n=4 (Xnoise,Ynoise). Change the time constant. If m=1, then T1,n sets the time constant from 1 ms (n=1) to 30 ks (n=16). Time constants greater than 30 s are available only if the detection frequency is below 200 Hz. The time constant slope is not changed. The T1 query returns a maximum value of 11, even if the time constant is greater than 100 s.
R {n} S {n}
T m {,n}
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Remote Programming
If m=2: T2,0 changes the slope to 6 dB/oct, time constant not changed. T2,1 changes the time constant to 100 ms with 12 dB/oct slope. T2,2 changes the time constant to 1 s with 12 dB/oct slope. Use the T2,n command to change the filter slope, then use T1,n to select the time constant. U m {,n} V {n} Not implemented. Do not use. Change the value of the SRQ mask. This command changes the serial poll enable register of the SR830. The serial poll byte is that of the SR830 not the SR530! Programs which query the SR530 status need to be changed to query the equivalent SR830 status byte. Not implemented. Do not use. Set or query the auxiliary analog ports. If n=1,2,3 or 4, the value of Aux Input n is returned. If n=5 or 6, then the Xn,v sets the value of Aux Output 1 or 2 to v Volts. The X5 ratio is NOT implemented. Ratio outputs must be done using the SR830 display ratio mode. Not implemented. Do not use. Use the SR830 status commands to read the SR830 status bytes. Reset the SR830. The instrument is reset to the SR830 default setup listed in the Operation section. This differs slightly from the SR530 default. (The sensitivity is set to 1 V, not 500 mV).
Wn X n {,v}
Y {n}
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Remote Programming
5-34
PERFORMANCE TESTS
Introduction
The performance tests described in this section are designed to verify with a high degree of confidence that the unit is performing correctly. The results of each test may be recorded on the test sheet at the end of this section.
Serial Number
If you need to contact Stanford Research Systems, please have the serial number of your unit available. The 5-digit serial number is printed on a label affixed to the rear panel. The serial number is also displayed on the CH1 and CH2 displays when the unit is powered on. The firmware revision code is shown on the Reference display when the unit is powered on. Throughout this section, it will be necessary to preset the lock-in into a known default state. To do this, turn the power off. Turn the power back on while holding down the [Setup] key. The unit will perform power up tests and then assume the default settings. Each test generally starts with a preset. This procedure will be referred to as {PRESET}. The lock-in should be turned on and allowed to warm up for at least an hour before any tests are performed. The self test does not require any warm up period. It is necessary to turn the unit off and on to preset it. As long as the unit is powered on immediately, this will not affect the test results.
Firmware Revision Preset
Warm Up
Test Record
Make a copy of the SR830 Performance Test Record at the end of this section. Fill in the results of the tests on this record. This record will allow you to determine whether the tests pass or fail and also to preserve a record of the tests. If a test fails, you should check the settings and connections of any external equipment and, if possible, verify its operation using a DVM, scope or some other piece of test equipment. After checking the setup, repeat the test from the beginning to make sure that the test was performed correctly. If the test continues to fail, contact Stanford Research Systems for further instructions. Make sure that you have the unit's serial number and firmware revision code handy. Have the test record on hand as well.
If A Test Fails
Necessary Equipment
The following equipment is necessary to complete the performance tests. The suggested equipment or its equivalent should be used. 1. Frequency Synthesizer Freq Range 1 Hz to 1 MHz Freq Accuracy better than 5 ppm Amplitude Accuracy 0.2 dB from 1 Hz to 100 kHz Harmonic Distortion -65 dBc
6-1
Performance Tests
Spurious TTL SYNC Recommended -55 dBc available SRS DS335
2. AC Calibrator Freq Range 10 Hz to 100 kHz Amplitude 1 mV to 10 V Accuracy 0.1% External phase locking capability Recommended 3. DC Voltmeter Range Accuracy Recommended Fluke 5200A
19.999 V, 4 1/2 digits 0.005% Fluke 8840A
4. Feedthrough Terminations Impedance 50
Front Panel Display Test
To test the front panel displays, press the [Phase] and [Freq] keys together. All of the LED's will turn on. Press [Phase] to decrease the number of on LED's to half on, a single LED and no LED's on. Use the knob to move the turned on LED's across the panel. Press [Freq] to increase the number of on LED's. Make sure that every LED can be turned on. Press any other key to exit this test mode. To test the keypad, press the [Phase] and [Ampl] keys together. The CH1 and CH2 displays will read 'Pad code' and a number of LED indicators will be turned on. The LED's indicate which keys have not been pressed yet. Press all of the keys on the front panel, one at a time. As each key is pressed, the key code is displayed in the Reference display, and nearest indicator LED turns off. When all of the keys have been pressed, the display will return to normal. To return to normal operation without pressing all of the keys, simply turn the knob.
Keypad Test
6-2
Performance Tests
1. Self Tests
The self tests check the lock-in hardware. These are functional tests and do not relate to the specifications. These tests should be checked before any of the performance tests.
Setup
No external setup is required for this test.
Procedure
1) {PRESET} (Turn on the lock-in with the [Setup] key pressed) Check the results of the DATA, BATT, PROG and DSP tests. 2) This completes the functional hardware tests. Enter the results of this test in the test record at the end of this section.
6-3
Performance Tests
6-4
Performance Tests
2. DC Offset
This test measures the DC offset of the input.
Setup
Connect a 50 terminator to the A input. This shorts the input so the lock-in's own DC offset will be measured.
Procedure
1) {PRESET} (Turn the lock-in off and on with the [Setup] key pressed) 2) Press the keys in the following sequence: [Freq] Use the knob to set the frequency to 1.00 Hz. [Sensitivity Down] Set the sensitivity to 1 mV. [CH1 Display] Set the Channel 1 display to R. 3) Wait at least 10 seconds, then record the reading of R. 4) Press [Couple] Select DC coupling. 5) Wait 10 seconds, then record the reading of R. 6) This completes the DC offset test. Enter the results of this test in the test record at the end of this section.
6-5
Performance Tests
6-6
Performance Tests
3. Common Mode Rejection

This test measures the common mode rejection of the lock-in.
Setup
We will use the internal oscillator sine output to provide the signal. Connect the Sine Out to both the A and B inputs of the lock-in. Use equal length cables from A and B to a BNC TEE. Connect the cable from the Sine Out to the TEE. Do not use any termination.
Procedure
1) {PRESET} (Turn the lock-in off and on with the [Setup] key pressed) 2) Press the keys in the following sequence: [Freq] Use the knob to adjust the frequency to 100.0 Hz. [Channel 1 Display] Set the Channel 1 display to R. 3) The value of R should be 1.000 V (within 2%). 4) Press [Couple] Select DC coupling. [Input] Select A-B. [Sensitivity Down] Set the sensitivity to 200 V. 5) Record the value of R. 6) This completes the CMRR measurement test. The common mode rejection is 20log(1.0/R) where R is in Volts. Enter the results of this test in the test record at the end of this section.
6-7
Performance Tests
6-8
Performance Tests
4. Amplitude Accuracy and Flatness

This test measures the amplitude accuracy and frequency response.
Setup
We will use the frequency synthesizer to provide an accurate frequency and the AC calibrator to provide a sine wave with an exact amplitude. Connect the output of the frequency synthesizer to the phase lock input of the calibrator. Connect the output of the AC calibrator to the A input of the lock-in. Be sure to use the appropriate terminations where required. Connect the TTL SYNC output of the synthesizer to the Reference Input of the lock-in. Set the Synthesizer to: Function Sine Frequency 1 kHz Amplitude 0.5 Vrms Offset off or 0V Sweep off Modulation none Set the AC Calibrator to: Frequency 1 kHz Amplitude 1.000 Vrms Voltage Off Phase Lock On Sense Internal
Procedure
1) {PRESET} (Turn the lock-in off and on with the [Setup] key pressed) 2) Press the keys in the following sequence: [Source] Select External reference mode (INTERNAL led off). [Trig] Select POS EDGE. [Channel 1 Display] Set the Channel 1 display to R. [Slope/Oct] Select 24 dB/oct. 3) Amplitude accuracy is verified at 1 kHz and various sensitivities. For each sensitivity setting in the table below, perform steps 3a through 3c. Sensitivity 1V 200 mV 100 mV 20 mV 10 mV AC Calibrator Amplitude 1.0000 Vrms 200.00 mVrms 100.000 mVrms 20.000 mVrms 10.000 mVrms
a) Set the AC calibrator to the amplitude shown in the table.
6-9
Performance Tests
b) Press [Sensitivity Up/Dn] Select the sensitivity from the table. c) Wait for the R reading to stabilize. Record the value of R for each sensitivity. 4) Frequency response is checked at frequencies above 1 kHz. The test frequencies are listed below. Test Frequencies 24 kHz 48 kHz 72 kHz 96 kHz a) Set the AC calibrator to 1 kHz and an amplitude of 200.00 mVrms. b) Set the frequency synthesizer to 1 kHz. c) Press [Sensitivity Up/Dn] Set the sensitivity 200 mV. d) Set the AC calibrator and frequency synthesizer to the frequency in the table. e) Wait for the R reading to stabilize. Record the value of R. f) Repeat steps 4d and 4e for all of the frequencies listed. 5) This completes the amplitude accuracy and frequency response test. Enter the results of this test in the test record at the end of this section.
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Performance Tests
5. Amplitude Linearity
This test measures the amplitude linearity. This tests how accurately the lock-in measures a signal smaller than full scale.
Setup
We will use the frequency synthesizer to provide an accurate frequency and the AC calibrator to provide a sine wave with an exact amplitude. Connect the output of the frequency synthesizer to the phase lock input of the calibrator. Connect the output of the AC calibrator to the A input of the lock-in. Be sure to use the appropriate terminations where required. Connect the TTL SYNC output of the synthesizer to the Reference Input of the lock-in. Set the Synthesizer to: Function Sine Frequency 1 kHz Amplitude 0.5 Vrms Offset off or 0V Sweep off Modulation none Set the AC Calibrator to: Frequency 1 kHz Amplitude 1.0000 Vrms Voltage Off Phase Lock On Sense Internal
Procedure
1) {PRESET} (Turn the lock-in off and on with the [Setup] key pressed) 2) Press the keys in the following sequence: [Source] Select External reference mode (INTERNAL led off). [Trig] Select POS EDGE. [Channel 1 Display] Set the Channel 1 display to R. [Slope/Oct] Select 24 dB/oct. 3) For each of the amplitudes listed below, perform steps 3a through 3c. AC Calibrator Amplitudes 1.0000 Vrms 100.00 mVrms 10.000 mVrms a) Set the AC calibrator to the amplitude in the table. b) Wait for the R reading to stabilize. Record the value of R. 4) This completes the amplitude linearity test. Enter the results of this test in the test record at the end of this section.
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Performance Tests
6-12
Performance Tests
6. Frequency Accuracy
This test measures the frequency accuracy of the lock-in. This tests the accuracy of the frequency counter inside the unit. The counter is used only in external reference mode. The internal oscillator frequency is set by a crystal and has 25 ppm frequency accuracy.
Setup
We will use the frequency synthesizer to provide the reference signal. Connect the TTL SYNC output of the frequency synthesizer to the Reference input of the lock-in.
Procedure
1) {PRESET} (Turn the lock-in off and on with the [Setup] key pressed) 2) Set the frequency synthesizer to a frequency of 10 kHz. 3) Press the keys in the following sequence: [Source] Select External reference mode (INTERNAL led off). [Trig] Select POS EDGE. 4) The lock-in should be locked to the external reference. The frequency is displayed at the bottom of the screen. Record the frequency reading. 5) This completes the frequency accuracy test. Enter the results of this test in the test record at the end of this section.
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Performance Tests
6-14
Performance Tests
7. Phase Accuracy
This test measures the phase accuracy of the lock-in. Due to the design of the lock-in, the phase accuracy can be determined by measuring the phase of the internal oscillator Sine Out.
Setup
Connect the Sine Out to the A input of the lock-in using a 1 meter BNC cable. Do not use any termination.
Procedure
1) {PRESET} (Turn the lock-in off and on with the [Setup] key pressed) 2) Press the keys in the following sequence: [Slope /Oct] Select 24 dB/oct. [Couple] Select DC coupling. [Channel 1 Display] Set the Channel 1 display to R. [Channel 2 Display] Set the Channel 2 display to . 3) The value of R should be 1.000 V (2%) and the value of should 0 (1). 4) Phase accuracy is checked at various frequencies. The test frequencies are listed below. Test Frequencies 10 Hz 100 Hz 1 kHz 10 kHz a) Press [Freq] Use the knob to set the internal oscillator to the frequency from the table. b) Wait for the readings to stabilize. Record the value of . c) Repeat steps 4a and 4b for all frequencies in the table. 5) This completes the phase accuracy test. Enter the results of this test in the test record at the end of this section.
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Performance Tests
6-16
Performance Tests
8. Sine Output Amplitude Accuracy and Flatness

This test measures the amplitude accuracy and frequency response of the internal oscillator Sine Out.
Setup
We will use the lock-in to measure the Sine Out. Connect the Sine Out to the A input of the lock-in.
Procedure
1) {PRESET} (Turn the lock-in off and on with the [Setup] key pressed) 2) Press the keys in the following sequence: [Channel 1 Display] Set the Channel 1 display to R. 3) Amplitude accuracy is verified at 1 kHz using various sensitivities. For each sine amplitude and sensitivity setting in the table below, perform steps 3a through 3b. Sensitivity 1V 200 mV 50 mV 10 mV Sine Output Amplitude 1.000 Vrms 0.200 Vrms 0.050 Vrms 0.010 Vrms
a) Press [Ampl] Use the knob to set the sine amplitude to the value in the table. [Sensitivity Up/Dn] Set the sensitivity to the value in the table. b) Wait for the R reading to stabilize. Record the value of R. c) Repeat 3a and 3b for each amplitude in the table. 4) Frequency response is checked at frequencies above 1 kHz. The sine amplitude is set to 1 Vrms for all frequencies. The test frequencies are listed below. Test Frequencies 24 kHz 48 kHz 72 kHz 96 kHz c) Press [Sensitivity Up] Set the sensitivity to 1 V. [Ampl] Use the knob to set the sine amplitude to 1.00 V.
6-17
Performance Tests
d) Press [Freq] Use the knob to set the internal oscillator frequency to the value in the table. e) Wait for the R reading to stabilize. Record the value of R. f) Repeat steps 4d and 4e for all of the frequencies listed. 5) This completes the sine output amplitude accuracy and frequency response test. Enter the results of this test in the test record at the end of this section.
6-18
Performance Tests
9. DC Outputs and Inputs

This test measures the DC accuracy of the DC outputs and inputs of the lock-in.
Setup
We will use the digital voltmeter (DVM) to measure the DC outputs of the lock-in. Then we will use one of the outputs to generate a voltage to measure on the DC inputs. Connect a 50 termination to the A input.
Procedure
1) {PRESET} (Turn the lock-in off and on with the [Setup] key pressed) 2) For the CH1 and CH2 outputs, repeat steps 2a through 2e. a) Connect the CH1 (or CH2) output to the DVM. Set the DVM to 19.999 V range. b) Press [Channel 1 (or 2) Offset On/Off] Turn the offset on. c) For each of the offsets in the table below, repeat steps 2d and 2e. Offsets (%) -100.00 -50.00 0.00 50.00 100.00 d) Press [Channel 1 (or 2) Offset Modify] Show the offset in the Reference display. Use the knob to set the offset to the value in the table. e) Record the DVM reading. 3) For each Aux Output (1, 2, 3 and 4), repeat steps 3a through 3e. a) Press [Aux Out] Display the correct Aux Output level on the Reference display. b) Connect the selected Aux Output (on the rear panel) to the DVM.
6-19
Performance Tests
c) For each output voltage in the table below, repeat steps 3d and 3e. Output Voltages -10.000 -5.000 0.000 5.000 10.000 d) Use the knob to adjust the Aux Output level to the value from the table. e) Record the DVM reading. 4) Press [Aux Out] Display Aux Out 1 on the Reference display. 5) For Aux Inputs 1 and 2, repeat steps 5a through 5e. a) Connect Aux Out 1 to Aux Input 1 (or 2) with a BNC cable. b) Press [Channel 1 Display] Set the Channel 1 display to AUX IN 1 (or 2) c) For each output voltage in table 3c above, repeat steps 5d and 5e. d) Use the knob to adjust the Aux Out 1 level to the values from the table above. e) Record the Aux Input 1 (or 2) value from the Channel 1 display. 6) For Aux Inputs 3 and 4, repeat steps 6a through 6e. a) Connect Aux Out 1 to Aux Input 3 (or 4) with a BNC cable. b) Press [Channel 2 Display] Set the Channel 2 display to AUX IN 3 (or 4) c) For each output voltage in table 3c above, repeat steps 6d and 6e. d) Use the knob to adjust the Aux Out 1 level to the values from the table above. e) Record the Aux Input 3 (or 4) value from the Channel 1 display. 7) This completes the DC outputs and inputs test. Enter the results of this test in the test record at the end of this section.
6-20
Performance Tests
10. Input Noise

This test measures the lock-in input noise.
Setup
Connect a 50 termination to the A input. This grounds the input so the lock-in's own noise is measured.
Procedure
1) {PRESET} (Turn the lock-in off and on with the [Setup] key pressed) 2) Press the keys in the following sequence: [Sensitivity Down] Set the sensitivity to 100 nV. [Channel 1 Display] Set the Channel 1 display to X Noise. 3) Wait until the reading of Channel 1 stabilizes. Record the value of Channel 1. 4) This completes the noise test. Enter the results of this test in the test record at the end of this section.
6-21
Performance Tests
6-22
Page 1 of 4
SR830 Performance Test Record

Serial Number Firmware Revision Equipment Used Tested By Date
1. Self Tests
Test DATA BATT PROG DSP Pass ____ ____ ____ ____ Fail ____ ____ ____ ____
2. DC Offset
Input Coupling AC DC Reading _______ _______ Upper Limit 0.500 mV 0.500 mV
3. Common Mode Rejection

Frequency 100 Hz Reading _______ Upper Limit 30 V
4. Amplitude Accuracy and Flatness

Sensitivity 1V 200 mV 100 mV 20 mV 10 mV Sensitivity 200 mV 200 mV 200 mV 200 mV Calibrator Ampl. 1.0000 Vrms 200.00 mVrms 100.000 mVrms 20.000 mVrms 10.000 mVrms Frequency 24 kHz 48 kHz 72 kHz 96 kHz Lower Limit 0.9900 V 198.00 mV 99.00 mV 19.800 mV 9.900 mV Lower Limit 198.00 mV 198.00 mV 198.00 mV 198.00 mV Reading _______ _______ _______ _______ _______ Reading _______ _______ _______ _______ Upper Limit 1.0100 V 202.00 mV 101.00 mV 20.200 mV 10.100 mV Upper Limit 202.00 mV 202.00 mV 202.00 mV 202.00 mV
6-23
Page 2 of 4

5. Amplitude Linearity
Sensitivity 1V Calibrator Ampl. 1.0000 Vrms 100.00 mVrms 10.000 mVrms Lower Limit 0.9900 V 0.0990 V 0.0098 V Reading _______ _______ _______ Upper Limit 1.0100 V 0.1010 V 0.0102 V
6. Frequency Accuracy
Input Frequency 10 kHz Lower Limit 9.990 kHz Reading _______ Upper Limit 10.010 kHz
7. Phase Accuracy
Frequency 10 Hz 100 Hz 1 kHz 10 kHz Lower Limit -1.0 deg -1.0 deg -1.0 deg -1.0 deg Reading _______ _______ _______ _______ Upper Limit +1.0 deg +1.0 deg +1.0 deg +1.0 deg
8. Sine Output Amplitude and Flatness

Sensitivity 1V 200 mV 50 mV 10 mV Sine Ampl. 1.000 Vrms Sine Output Ampl. 1.000 Vrms 0.200 Vrms 0.050 Vrms 0.010 Vrms Frequency 24 kHz 48 kHz 72 kHz 96 kHz Lower Limit 0.9800 V 196.00 mV 49.000 mV 9.800 mV Lower Limit 0.9800 V 0.9800 V 0.9800 V 0.9800 V Reading _______ _______ _______ _______ Reading _______ _______ _______ _______ Upper Limit 1.0200 V 204.00 mV 51.000 mV 10.200 mV Upper Limit 1.0200 V 1.0200 V 1.0200 V 1.0200 V
9. DC Outputs and Inputs

Output CH1 Offset -100.00 -50.00 0.00 50.00 100.00 Lower Limit 9.980 V 4.980 V -0.010 V -5.020 V -10.020 V Reading _______ _______ _______ _______ _______ Upper Limit 10.020 V 5.020 V 0.010 V -4.980 V -9.980 V
6-24
Page 3 of 4

9. DC Outputs and Inputs (continued)
Output CH2 Offset -100.00 -50.00 0.00 50.00 100.00 Voltage -10.000 -5.000 0.000 5.000 10.000 Voltage -10.000 -5.000 0.000 5.000 10.000 Voltage -10.000 -5.000 0.000 5.000 10.000 Voltage -10.000 -5.000 0.000 5.000 10.000 Lower Limit 9.980 V 4.980 V -0.010 V -5.020 V -10.020 V Lower Limit -10.020 V -5.020 V -0.010 V 4.980 V 9.980 V Lower Limit -10.020 V -5.020 V -0.010 V 4.980 V 9.980 V Lower Limit -10.020 V -5.020 V -0.010 V 4.980 V 9.980 V Lower Limit -10.020 V -5.020 V -0.010 V 4.980 V 9.980 V Reading _______ _______ _______ _______ _______ Reading _______ _______ _______ _______ _______ Reading _______ _______ _______ _______ _______ Reading _______ _______ _______ _______ _______ Reading _______ _______ _______ _______ _______ Upper Limit 10.020 V 5.020 V 0.010 V -4.980 V -9.980 V Upper Limit -9.980 V -4.980 V 0.010 V 5.020 V 10.020 V Upper Limit -9.980 V -4.980 V 0.010 V 5.020 V 10.020 V Upper Limit -9.980 V -4.980 V 0.010 V 5.020 V 10.020 V Upper Limit -9.980 V -4.980 V 0.010 V 5.020 V 10.020 V
Output AUX OUT 1
Output AUX OUT 2
Output AUX OUT 3
Output AUX OUT 4
6-25
Page 4 of 4

9. DC Outputs and Inputs (continued)
Input AUX IN 1 Voltage -10.000 -5.000 0.000 5.000 10.000 Voltage -10.000 -5.000 0.000 5.000 10.000 Voltage -10.000 -5.000 0.000 5.000 10.000 Voltage -10.000 -5.000 0.000 5.000 10.000 Lower Limit -10.040 V -5.030 V -0.020 V 4.970 V 9.960 V Lower Limit -10.040 V -5.030 V -0.020 V 4.970 V 9.960 V Lower Limit -10.040 V -5.030 V -0.020 V 4.970 V 9.960 V Lower Limit -10.040 V -5.030 V -0.020 V 4.970 V 9.960 V Reading _______ _______ _______ _______ _______ Reading _______ _______ _______ _______ _______ Reading _______ _______ _______ _______ _______ Reading _______ _______ _______ _______ _______ Upper Limit -9.960 V -4.970 V 0.020 V 5.030 V 10.040 V Upper Limit -9.960 V -4.970 V 0.020 V 5.030 V 10.040 V Upper Limit -9.960 V -4.970 V 0.020 V 5.030 V 10.040 V Upper Limit -9.960 V -4.970 V 0.020 V 5.030 V 10.040 V
Input AUX IN 2
Input AUX IN 3
Input AUX IN 4
10. Input Noise

Frequency 1 kHz Sensitivity 100 nV Min Reserve Reading _______ Upper Limit 8 nV/Hz
6-26
CIRCUIT DESCRIPTION
CPU and Power Supply Board
DSP Logic Board
Analog Input Board
Keypad Board
Display Board
CAUTION
Always disconnect the power cord and wait at least one minute before opening the unit. Dangerous power supply voltages may be present even after the unit has been unplugged. Check the LED at the front edge of the power supply board. The unit is safe only if the LED is OFF. If the LED is ON, then DO NOT attempt any service on the unit. This unit is to be serviced by qualified service personnel only. There are no user serviceable parts inside.
CIRCUIT BOARDS
The SR830 has five main printed circuit boards. The five boards shown contain most of the active circuitry of the unit. The rear panel circuit board only provides connections to the BNC connectors on the rear panel.
NOTICE: Schematics may not show current part numbers or values. Refer to parts list for current part numbers or values.
7-1
Circuit Description
7-2
Circuit Description
CPU and POWER SUPPLY BOARD

The CPU board contains the microprocessor system. All display, front panel, disk, and computer interfaces are on this board. MICROPROCESSOR SYSTEM The microprocessor, U101, is an 80C186 microcontroller which integrates a fast 16 bit processor, counter-timers, interrupt controller, DMA controller, and I/O decoding into a single component. The 80C186 uses a 24.00 MHz crystal, X101, as its oscillator. The instruction clock cycle is 2 oscillator cycles or 12.0 MHz. The data and lower 16 bits of address are multiplexed on AD0-AD15. U201, U202, U203 latch the address A0-A19 at the beginning of each memory or I/O cycle. U204 and U205 are bidirectional data bus drivers which are active during the data read/write portion of each memory or I/O cycle. The 80C186 can address 1 Mbyte of memory and 64k of I/O space. The memory is mapped into 2 256kbyte blocks. Each block has 2 sockets, one for the low byte and one for the high byte of data. U303 and U304 are 128kbyte EPROMS holding the program boot firmware. This memory is mapped at C0000H to FFFFFH (256k). U401 and U402 are 128kbyte CMOS static RAMs mapped at 00000H to 3FFFFH (256k). U401 and U402 are backed up by the battery. Q401 provides power down RAM protection. This memory is system memory. 3 of the 7 80C186's peripheral chip select strobes are used by peripherals on the CPU board. -PCS0 is decoded into 16 I/O strobes which access the displays, keypad and knob, etc. -PCS1 decodes the the GPIB controller. -PCS2 selects the UART. FRONT PANEL INTERFACE U614 and U615 buffer the front panel connector cable. The Display Board holds the front panel logic. SPIN KNOB The knob is an optical encoder buffered by U612. Each transition of its outputs is clocked into U610 or U611 and generates an interrupt at the output of U602A. The processor keeps track of the knob's position continuously. SPEAKER The speaker is driven by a timer on the 80C186. The timer outputs a square wave which is enabled by U602B and drives the speaker through Q705. GPIB INTERFACE The GPIB (IEEE-488) interface is provided by U902, a TMS9914A controller. U903 and U904 buffer data I/O to the GPIB connector. U902 is programmed to provide an interrupt to the processor whenever there is bus activity addressed to the unit. RS232 INTERFACE The SCN2641 UART, U905, provides all of the UART functions as well as baud rate generation. Standard baud rates up to 19.2k can be generated from the 3.6864 MHz clock. U906 buffers the outgoing data and control signals. Incoming signals are received by U705A and U705B. If the host computer asserts DTR, RS232 data output from the unit will cease. The RS232 port is a DCE and may be connected to a PC using a standard serial cable (not a "null modem" cable). EXPANSION CONNECTOR All control of the data acquisition hardware is through the signals on the 30 pin expansion connector.
7-3
Circuit Description
POWER SUPPLY
CAUTION: Dangerous voltages are present on this circuit board whenever the instrument is attached to an AC power source and the rear panel power switch is "on". Always disconnect the power cord and wait at least one minute before opening the unit. Check the LED at the front edge of the power supply board. The unit is safe only if the LED is OFF. If the LED is ON, then DO NOT attempt any service on the unit. UNREGULATED POWER SUPPLIES A power entry module, with RF line filter, is used to configure the unit for 100, 120, 220, or 240 VAC. The line filter reduces noise from the instrument and reduces the unit's susceptibility to line voltage noise. Bridge rectifiers are used to provide unregulated DC at 24V, 20V and 8V. Schottky diodes are used for all supplies to reduce rectifier losses. Resistors provide a bleed current on all of the unregulated supply filter capacitors. Because of the large capacitances in this circuit, the time for the voltages to bleed to zero is about a minute after the power is turned off. POWER SUPPLY REGULATORS The voltage regulators provide outputs at +5V, -5V, 15V, and 12V. The +5V regulators are designed to operate with a very low drop-out voltage. There are 2 +5V supplies, one to power the CPU board and front panel displays (+5V_P), and one to power the DSP Logic Board (+5V_I). U6 and U8 are the 12V regulators. U5 is the -5V regulator. U9 and U10 provide 20V sources which are not referenced to the digital ground (as are all of the supplies mentioned above). This allows the analog input board to establish a ground at the signal input without digital ground noise. U1 provides power-up and power-down reset. The 24 VDC brushless fan cools the heat sink and power supply rectifiers.
7-4
Circuit Description
DSP LOGIC BOARD

OVERVIEW The DSP LOGIC BOARD takes a digital input from the A/D Converter on the Analog Input Board and performs all of the computations related to the measurement before it is displayed on the screen. This includes generating the digital reference sine wave, demodulating the signal, low-pass filtering the results, and offset and expanding the outputs. The internal oscillator sine output and Aux D/A outputs are generated on this board as well. The reference phase lock loop controls the clock of this board whenever the reference mode is external. These functions are implemented within a system comprised of five functional blocks: the Digital Signal Processor (DSP), the DAC Outputs, the Timing Signal Generator, the Reference Clock Generator and the I/O Interface. Through the use of highly efficient algorithms, the system is capable of real-time lock-in operation to 100 kHz with 24 dB/oct filtering on both X and Y as well as providing a synthesized analog sine output. DSP PROCESSOR The SR830 utilizes a Motorola 24-bit DSP56001 digital signal processor (U501). The DSP is configured without external memory. The lock-in algorithms run entirely within the internal program and data memory of the DSP itself. The Host processor bus is connected to the main CPU Board via the I/O Interface on the DSP Logic Board. The 80C186 processor on the CPU Board acts as the "host" processor to the DSP. DSP firmware and commands are downloaded from the CPU Board to invoke different operating modes. The DSP also has two dedicated serial ports: one for receiving, and one for transmitting. REFERENCE CLOCK SOURCE The clock to the DSP is derived from the timing generator. U120, U121 and U122 are gates which select the clock source for the entire digital board. When the reference mode is internal, the 30.208 MHz crystal (U111) is used. The A/D inputs and D/A outputs run with a 256 kHz cycle and the DSP performs 59 instructions each cycle (each instruction takes two clocks). The crystal also sets accuracy. the internal reference frequency
When the reference mode is external, the VCO (voltage controlled oscillator, U110) is used as the system clock. The VCO nominally runs at 30 MHz as well. U105 is a phase comparator. The external reference input, discriminated by U103 (or TTL buffered through U104D) is one of the inputs to the phase comparator. The other input is the internal reference. The DSP always synthesizes a sine wave at the reference frequency. This is the Sine Output. This sine output is discriminated by U209 into a TTL square wave (TTL Sync Out) and is the other input to the phase comparator. The phase lock loop then controls the VCO which is the clock to the DSP. This in turn changes the sine output frequency to maintain frequency lock with the external reference. The DSP is constantly getting external frequency information from the host (based upon counter U622) which allows the DSP to synthesize nearly the correct reference frequency assuming a 30 MHz clock. This keeps the VCO within range at all frequencies. TIMING GENERATOR All timing signals for the DSP and Analog boards are derived from the system clock by PALs (U601604). These PALs generate the clocks for the DACs and A/D converter, the multiplexing signals for the Aux inputs and outputs, etc. SERIAL CHANNELS There are two serial data streams from the A/D converter on the Analog Input board which need to be received by the DSP. The digitized input signal is received directly via the DSP's serial input port. The Aux A/D input data is shifted into a pair of serial-to-parallel registers (U502 and U503) and is read via the DSP data bus. Each A/D input channel provides a new sample every 4 s. There are two dual-channel D/A converters on this board for a total of four D/A output channels. Each output channel provides a new output every 4 s. This means that 4 output values must be written by the DSP each 4 s cycle. The DSP writes to one channel of each D/A converter via its serial
7-5
Circuit Description
transmit port each cycle. The transmit port operates at twice the frequency of the receive port. The DSP writes to the other channel of each DAC via a pair of parallel-to-serial registers (U504 and U505). DAC OUTPUTS Three of the DAC output channels provide Sine Out, X and Y. The fourth channel is multiplexed into eight slow outputs. Two of these are the front panel CH1 and CH2 outputs when the outputs are proportional to a trace. Four of these are the Aux D/A outputs. The last two are used to provide internal offset trims to the reference and sine discriminators. The DSP generates sine waves using direct digital synthesis. At each 4 s cycle, the DSP calculates the next sine output value based upon the desired reference frequency. This value is output via a DAC and converted to an analog output. This output is a sampled sine wave. To convert this to a smooth, low distortion analog sine wave, the output is filtered to remove frequency components above 100 kHz (U201-203). The filter output is scaled by DAC U206 and output by driver U207. U209 discriminates the zero crossings to provide a TTL square wave at the reference frequency. This is the TTL SYNC out as well as the feedback to the phase lock loop in external reference mode. I/O INTERFACE TO CPU BOARD The I/O interface provides the communication pathway between the DSP Logic Board and the main CPU Board. U610 and U613 are buffers for the address and data bus connections. Both buffer chips are enabled only when the CPU Board is writing to the DSP Logic Board. This helps isolate the activity on the CPU Board from affecting circuitry on the DSP Logic Board. U608 and U609 are simple D-type latches used to hold configuration data for the DSP Logic Board. U606 is the main decoder PAL and generates all of the chip selects and strobes needed by the DSP Logic Board. POWER The bulk of the digital circuitry, the DSP and the timing PALs and the interface circuits are all powered by +5V from the power supply board. The 22V from the power supply is used to generate 15V for the op amps. 5.6V for analog switches and op amps is generated from the 15V supplies. The reference and sine discriminators use separate 5V supplies regulated from the 15V supplies as well.
7-6
Circuit Description
ANALOG INPUT BOARD

OVERVIEW The Analog Input Board provides the very important link between the user's input signal and the DSP processor. From the front panel BNC, the user's signal passes through a low distortion frontend amplifier, gain stages, notch filters, antialiasing filter, and finally an A/D Converter. Once converted to digital form, the input signal is ready to be processed by the Digital Signal Processor. INPUT AMPLIFIER ANTI-ALIASING FILTER The goal of any measurement instrument is to perform some given measurement while affecting the quantities to be measured as little as possible. As such, the input amplifier is often the most critical stage in the entire signal path. The design of the front end input amplifier in the SR830 was driven by an effort to provide optimum performance in the following areas: input voltage noise, input current noise, input capacitance, harmonic distortion, and common mode rejection (CMR). To provide such performance, a FET input differential amplifier with common-mode feedback architecture was chosen. The input signal is first passed through a series of relays to select input mode and input coupling. The input FETs U100A and U100B are extremely low-noise matched FETs. To improve distortion performance, the input FETs are cascoded to maintain a constant drain-source voltage across each FET. This prevents modulation of the drainsource voltage by the input voltage. U109 senses the source voltages and maintains the same voltage at the drains (via FETs U108A and B) with some DC offset determined by resistors N102 and N103. U105 provides common-mode feedback and maintains a constant drain current in each FET. The gain of the front end is fixed. U103 provides the output. The DC offset is adjusted by P101 and the CMR by P102. GAIN STAGES AND NOTCH FILTERS Collectively, the front end amplifier and following gain stages provide gain up to about 2000. The notch filters are simple single stage, inverting band pass filters summing with their inputs to remove 60 Hz or 120 Hz. Each filter has a depth Following the anti-aliasing filter is the signal monitor buffer (U386) and A/D driver stage (U301). A/D CONVERTER The SR830 uses a dual channel A/D converter (U407). Each channel samples simultaneously at To prevent aliasing, the input signal passes through a low-pass filter so that all frequency components greater than half the sampling frequency are attenuated by at least 96 dB. This is accomplished with an 8-zero 9-pole elliptical low pass filter. The pass band of this filter is DC to 102kHz. The stopband begins at 154 kHz. Stopband attenuation is nominally 100 dB. The architecture of the filter is based on a singly terminated passive LC ladder filter. L's are simulated with active gyrators formed by op-amp pairs (U311, U321, U331, U341). Passive LC ladder filters have the special characteristic of being very tolerant of variations in component values. Because no section of the ladder is completely isolated from the other, a change in value of any single component affects the entire ladder. The design of the LC ladder however, is such that the characteristics of the rest of the ladder will shift to account for the change in such a way as to minimize its effect on the ladder. Not only does this loosen the requirement for extremely high accuracy resistors and capacitors, but it also makes the filter extremely stable despite wide temperature variations. As such, the anti-aliasing filter used in the SR830 does not ever require calibration to meets its specifications. and frequency adjustment. (60 Hz - depth:P222 and freq:P221 120 Hz - depth:P202 and freq:P201). The 120 Hz notch filter has a configurable gain of either 1 or 3.17. The notch filters are followed by two gain stages, each configurable up to a gain of 10. Overloads are sensed at the input amplifier and the final amplifier outputs. Since there is no attenuation in the amplifier chain, this is sufficient.
7-7
Circuit Description
a rate of 256 kHz. One channel is dedicated to the input signal. The other channel reads one of the Aux A/D inputs. The Aux inputs are multiplexed so that each input is read every four cycles. The two digital output streams are buffered by U406 and sent to the DSP board. I/O INTERFACE The Analog Input Board communicates with the CPU Board via its I/O Interface. U504 and U506 are simple latches which hold configuration data for the analog board. They are written via the isolated data bus from the DSP board. This data bus is active only when the Analog board is addressed. This prevents noise from the CPU and DSP boards from entering the Analog Board. Timing signals for the A/D Converter are buffered by U406. POWER Several voltages are generated on the Analog Input Board locally. 15V is generated for most of the analog IC's. A dedicated 15V supply is also generated for the front-end amplifier. 5.6V is generated for the digital circuitry as well as some of the drivers. The A/D Converter has its own 5V supply.
7-8
Parts List
PARTS LIST
DSP Logic Board Parts List
Ref No. SRS Part No.
C 101 C 114 C 117 C 119 C 120 C 121 C 130 C 135 C 136 C 137 C 140 C 141 C 142 C 143 C 144 C 150 C 151 C 152 C 153 C 154 C 155 C 156 C 157 C 171 C 173 C 180 C 181 C 182 C 183 C 202 C 203 C 204 C 205 C 206 C 207 C 210 C 211 C 235 C 236 C 237 C 238 C 254 C 255 C 260 C 261 C 264 C 265 C 280 C 281 C 282 5-00060-512 5-00100-517 5-00100-517 5-00259-501 5-00092-523 5-00023-529 5-00023-529 5-00002-501 5-00002-501 5-00017-501 5-00053-512 5-00053-512 5-00051-512 5-00121-566 5-00056-512 5-00023-529 5-00023-529 5-00023-529 5-00023-529 5-00023-529 5-00023-529 5-00023-529 5-00023-529 5-00002-501 5-00002-501 5-00038-509 5-00038-509 5-00100-517 5-00100-517 5-00148-545 5-00148-545 5-00148-545 5-00148-545 5-00148-545 5-00148-545 5-00148-545 5-00003-501 5-00002-501 5-00002-501 5-00016-501 5-00002-501 5-00023-529 5-00023-529 5-00023-529 5-00023-529 5-00023-529 5-00023-529 5-00038-509 5-00038-509 5-00100-517
Value
1.0U 2.2U 2.2U .002U 1P .1U .1U 100P 100P 47P .033U .033U .015U .0047U .1U .1U .1U .1U .1U .1U .1U .1U .1U 100P 100P 10U 10U 2.2U 2.2U 1000P 1000P 1000P 1000P 1000P 1000P 1000P 10P 100P 100P 470P 100P .1U .1U .1U .1U .1U .1U 10U 10U 2.2U
Component Description
Cap, Stacked Metal Film 50V 5% -40/+85c Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Silver Mica, Miniature Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Ceramic Disc, 50V, 10%, SL Cap, Stacked Metal Film 50V 5% -40/+85c Cap, Stacked Metal Film 50V 5% -40/+85c Cap, Stacked Metal Film 50V 5% -40/+85c Cap, Polyester Film 50V 5% -40/+85c Rad Cap, Stacked Metal Film 50V 5% -40/+85c Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Electrolytic, 50V, 20%, Rad Capacitor, Electrolytic, 50V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Monolythic Ceramic, COG, 1% Capacitor, Monolythic Ceramic, COG, 1% Capacitor, Monolythic Ceramic, COG, 1% Capacitor, Monolythic Ceramic, COG, 1% Capacitor, Monolythic Ceramic, COG, 1% Capacitor, Monolythic Ceramic, COG, 1% Capacitor, Monolythic Ceramic, COG, 1% Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Ceramic Disc, 50V, 10%, SL Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Capacitor, Electrolytic, 50V, 20%, Rad Capacitor, Electrolytic, 50V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad
7-9
Parts List
C 283 C 290 C 301 C 302 C 303 C 305 C 307 C 308 C 309 C 310 C 350 C 351 C 352 C 353 C 381 C 382 C 383 C 384 C 385 C 386 C 387 C 388 C 389 C 390 C 401 C 402 C 403 C 404 C 406 C 407 C 408 C 409 C 410 C 420 C 421 C 422 C 423 C 424 C 425 C 426 C 427 C 428 C 429 C 430 C 431 C 432 C 433 C 434 C 435 C 450 C 453 C 456 C 459 C 470 C 471 C 601 C 602 5-00100-517 5-00023-529 5-00002-501 5-00002-501 5-00002-501 5-00002-501 5-00002-501 5-00002-501 5-00002-501 5-00002-501 5-00023-529 5-00023-529 5-00023-529 5-00023-529 5-00100-517 5-00100-517 5-00100-517 5-00100-517 5-00100-517 5-00100-517 5-00100-517 5-00100-517 5-00038-509 5-00038-509 5-00023-529 5-00023-529 5-00023-529 5-00023-529 5-00023-529 5-00023-529 5-00023-529 5-00023-529 5-00021-501 5-00023-529 5-00219-529 5-00023-529 5-00219-529 5-00023-529 5-00219-529 5-00023-529 5-00219-529 5-00023-529 5-00219-529 5-00023-529 5-00219-529 5-00023-529 5-00219-529 5-00023-529 5-00219-529 5-00098-517 5-00098-517 5-00098-517 5-00098-517 5-00100-517 5-00100-517 5-00027-503 5-00023-529 2.2U .1U 100P 100P 100P 100P 100P 100P 100P 100P .1U .1U .1U .1U 2.2U 2.2U 2.2U 2.2U 2.2U 2.2U 2.2U 2.2U 10U 10U .1U .1U .1U .1U .1U .1U .1U .1U 82P .1U .01U .1U .01U .1U .01U .1U .01U .1U .01U .1U .01U .1U .01U .1U .01U 10U 10U 10U 10U 2.2U 2.2U .01U .1U Capacitor, Tantalum, 35V, 20%, Rad Cap, Monolythic Ceramic, 50V, 20%, Z5U Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Ceramic Disc, 50V, 10%, SL Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Electrolytic, 50V, 20%, Rad Capacitor, Electrolytic, 50V, 20%, Rad Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Capacitor, Ceramic Disc, 50V, 10%, SL Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Ceramic Disc, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U
7-10
Parts List
C 603 C 604 C 610 C 611 C 630 C 631 C 650 C 651 C 652 C 653 C 654 C 655 C 656 C 657 C 658 C 659 C 660 C 661 C 662 C 663 C 664 C 665 C 666 C 667 C 668 C 669 C 670 C 671 CX623 D 103 D 104 D 105 D 180 D 181 D 280 D 281 JP301 JP501 JP502 K 101 K 201 L 101 L 601 N 101 N 102 N 201 N 202 N 301 N 302 N 303 N 304 N 305 N 306 N 420 N 421 N 501 N 502 5-00038-509 5-00239-562 5-00002-501 5-00002-501 5-00033-520 5-00033-520 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 3-00465-301 3-00004-301 3-00004-301 3-00004-301 3-00004-301 3-00004-301 3-00004-301 1-00035-130 0-00000-000 0-00000-000 3-00196-335 3-00444-335 6-00107-606 6-00006-602 4-00693-421 4-00690-421 4-00693-421 4-00690-421 4-00497-421 4-00692-421 4-00265-421 4-00497-421 4-00692-421 4-00265-421 4-00244-421 4-00244-421 4-00463-421 4-00334-425 10U 680P 100P 100P 47U 47U .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL MV209 1N4148 1N4148 1N4148 1N4148 1N4148 1N4148 20 PIN DIL UNDECIDED PART UNDECIDED PART HS-212S-5 HS-211-5 .8UH 33U 270X5 3.3KX4 270X5 3.3KX4 1.5KX4 5.6KX4 100X4 1.5KX4 5.6KX4 100X4 10KX4 10KX4 82X4 10KX5 Capacitor, Electrolytic, 50V, 20%, Rad Cap., NPO Monolitic Ceramic, 50v, 5% Ra Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Electrolytic, 16V, 20%, Rad Capacitor, Electrolytic, 16V, 20%, Rad Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Diode Diode Diode Diode Diode Diode Diode Connector, Male Hardware, Misc. Hardware, Misc. Relay Relay Inductor, Variable Inductor, Radial Res. Network, SIP, 1/4W,2% (Isolated) Res. Network, SIP, 1/4W,2% (Isolated) Res. Network, SIP, 1/4W,2% (Isolated) Res. Network, SIP, 1/4W,2% (Isolated) Res. Network, SIP, 1/4W,2% (Isolated) Res. Network, SIP, 1/4W,2% (Isolated) Res. Network, SIP, 1/4W,2% (Isolated) Res. Network, SIP, 1/4W,2% (Isolated) Res. Network, SIP, 1/4W,2% (Isolated) Res. Network, SIP, 1/4W,2% (Isolated) Res. Network, SIP, 1/4W,2% (Isolated) Res. Network, SIP, 1/4W,2% (Isolated) Res. Network, SIP, 1/4W,2% (Isolated) Resistor Network SIP 1/4W 2% (Common)
7-11
Parts List
N 503 N 601 N 602 N 603 N 604 PC1 Q 101 Q 102 Q 201 R 102 R 103 R 114 R 115 R 116 R 117 R 118 R 119 R 120 R 121 R 130 R 131 R 132 R 133 R 140 R 141 R 142 R 143 R 156 R 157 R 170 R 171 R 172 R 173 R 174 R 175 R 176 R 177 R 178 R 180 R 181 R 201 R 202 R 203 R 204 R 205 R 206 R 207 R 208 R 209 R 210 R 211 R 212 R 213 R 214 R 215 R 216 R 217 4-00333-421 4-00767-420 4-00334-425 4-00463-421 4-00463-421 7-00356-701 3-00021-325 3-00022-325 3-00021-325 4-00022-401 4-00130-407 4-00056-401 4-00142-407 4-00192-407 4-00192-407 4-00193-407 4-00522-407 4-00074-401 4-00034-401 4-00598-407 4-00383-407 4-00768-407 4-00204-407 4-00025-401 4-00598-407 4-00383-407 4-00768-407 4-00030-401 4-00030-401 4-00062-401 4-00142-407 4-00105-401 4-00292-401 4-00021-401 4-00398-407 4-00130-407 4-00193-407 4-00130-407 4-00781-402 4-00781-402 4-00177-407 4-00177-407 4-00771-407 4-00163-407 4-00409-408 4-00409-408 4-00467-407 4-00193-407 4-00158-407 4-00409-408 4-00409-408 4-00746-407 4-00317-407 4-00652-407 4-00409-408 4-00409-408 4-00523-407 10KX5 270X8 10KX5 82X4 82X4 L/I DIGITAL 2N3904 2N3906 2N3904 1.0M 1.00K 22 100K 49.9K 49.9K 499 243 33K 10K 127K 12.7K 1.27K 750 1.2M 127K 12.7K 1.27K 10 10 270 100K 910K 1.1K 1.0K 499K 1.00K 499 1.00K 56 56 3.48K 3.48K 66.5 2.80K 1.210K 1.210K 2.43K 499 2.00K 1.210K 1.210K 2.05K 422 1.58K 1.210K 1.210K 649 Res. Network, SIP, 1/4W,2% (Isolated) Resistor Network, DIP, 1/4W,2%,8 Ind Resistor Network SIP 1/4W 2% (Common) Res. Network, SIP, 1/4W,2% (Isolated) Res. Network, SIP, 1/4W,2% (Isolated) Printed Circuit Board Transistor, TO-92 Package Transistor, TO-92 Package Transistor, TO-92 Package Resistor, Carbon Film, 1/4W, 5% Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Carbon Film, 1/4W, 5% Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Carbon Film, 1/4W, 5% Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Carbon Comp, 1/2W, 5% Resistor, Carbon Comp, 1/2W, 5% Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 0.1%, 25ppm Resistor, Metal Film, 1/8W, 0.1%, 25ppm Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 0.1%, 25ppm Resistor, Metal Film, 1/8W, 0.1%, 25ppm Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 0.1%, 25ppm Resistor, Metal Film, 1/8W, 0.1%, 25ppm Resistor, Metal Film, 1/8W, 1%, 50PPM
7-12
Parts List
R 220 R 221 R 222 R 226 R 227 R 228 R 231 R 232 R 237 R 238 R 239 R 240 R 250 R 251 R 280 R 281 R 290 R 301 R 302 R 303 R 304 R 381 R 382 R 383 R 384 R 385 R 386 R 387 R 388 R 389 R 390 R 401 R 402 R 450 R 451 R 452 R 453 R 470 R 471 R 503 R 601 R 602 R 603 R 604 R 611 RX623 T 201 TP101 TP102 TP103 TP104 TP105 TP106 TP107 TP108 TP201 TP202 4-00139-407 4-00130-407 4-00188-407 4-00782-448 4-00193-407 4-00704-407 4-00519-407 4-00467-407 4-00787-407 4-00031-401 4-00062-401 4-00022-401 4-00772-402 4-00772-402 4-00781-402 4-00781-402 4-00071-401 4-00027-401 4-00273-401 4-00027-401 4-00273-401 4-00475-407 4-00475-407 4-00706-407 4-00706-407 4-00795-412 4-00795-412 4-00215-407 4-00215-407 4-00706-407 4-00706-407 4-00234-407 4-00174-407 4-00056-401 4-00030-401 4-00056-401 4-00030-401 4-00031-401 4-00031-401 4-00034-401 4-00034-401 4-00062-401 4-00021-401 4-00034-401 4-00062-401 4-00053-401 6-00137-601 1-00143-101 1-00143-101 1-00143-101 1-00143-101 1-00143-101 1-00143-101 1-00143-101 1-00143-101 1-00143-101 1-00143-101 10.0M 1.00K 4.99K 54.9 499 54.9 4.75K 2.43K 768 100 270 1.0M 33 33 56 56 33 1.5K 5.6K 1.5K 5.6K 2.61K 2.61K 237 237 24 24 909 909 237 237 10.0 280 22 10 22 10 100 100 10K 10K 270 1.0K 10K 270 200 15MH TEST JACK TEST JACK TEST JACK TEST JACK TEST JACK TEST JACK TEST JACK TEST JACK TEST JACK TEST JACK Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1W, 1%, Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Comp, 1/2W, 5% Resistor, Carbon Comp, 1/2W, 5% Resistor, Carbon Comp, 1/2W, 5% Resistor, Carbon Comp, 1/2W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Carbon Film 1/2W 5% Resistor, Carbon Film 1/2W 5% Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Inductor Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack
7-13
Parts List
TP203 TP204 TP301 TP302 TP303 TP304 TP401 TP402 TP403 TP404 TP501 TP502 U 101 U 102 U 103 U 104 U 105 U 106 U 107 U 110 U 111 U 120 U 121 U 122 U 180 U 181 U 201 U 202 U 203 U 205 U 206 U 207 U 208 U 209 U 210 U 280 U 281 U 301 U 302 U 303 U 380 U 381 U 382 U 383 U 401 U 402 U 403 U 404 U 501 U 502 U 503 U 504 U 505 U 601 U 602 U 603 U 604 1-00143-101 1-00143-101 1-00143-101 1-00143-101 1-00143-101 1-00143-101 1-00143-101 1-00143-101 1-00143-101 1-00143-101 1-00143-101 1-00143-101 3-00461-340 3-00461-340 3-00211-340 3-00262-340 3-00160-340 3-00402-340 3-00461-340 3-00437-340 6-00110-621 3-00238-340 3-00238-340 3-00182-340 3-00116-325 3-00122-325 3-00130-340 3-00130-340 3-00130-340 3-00130-340 3-00058-340 3-00383-340 3-00461-340 3-00211-340 3-00262-340 3-00116-325 3-00122-325 3-00087-340 3-00087-340 3-00088-340 3-00149-329 3-00141-329 3-00149-329 3-00141-329 3-00328-340 3-00328-340 3-00270-340 3-00385-340 3-00611-360 3-00265-340 3-00265-340 3-00488-340 3-00488-340 3-00495-343 3-00496-343 3-00497-343 3-00498-343 TEST JACK TEST JACK TEST JACK TEST JACK TEST JACK TEST JACK TEST JACK TEST JACK TEST JACK TEST JACK TEST JACK TEST JACK OPA2604 OPA2604 LT1016 74HC86 74HC4046 74HC4052 OPA2604 AD9696KN 30.208 MHZ 74F74 74F74 74HC02 78L05 79L05 5532A 5532A 5532A 5532A AD7524 LM6321 OPA2604 LT1016 74HC86 78L05 79L05 LF347 LF347 LF353 LM317T LM337T LM317T LM337T PCM1700P PCM1700P 74HC4051 74HC4053 DSP56002FC-40 74HC595 74HC595 74HC597 74HC597 SR850 U601 SR850 U602 SR850 U603 SR850 U604 Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Crystal Oscillator Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Transistor, TO-92 Package Transistor, TO-92 Package Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Transistor, TO-92 Package Transistor, TO-92 Package Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Voltage Reg., TO-220 (TAB) Package Voltage Reg., TO-220 (TAB) Package Voltage Reg., TO-220 (TAB) Package Voltage Reg., TO-220 (TAB) Package Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Surface Mount Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) GAL/PAL, I.C. GAL/PAL, I.C. GAL/PAL, I.C. GAL/PAL, I.C.
7-14
Parts List
U 606 U 608 U 609 U 610 U 611 U 612 U 613 U 614 U 621 U 622 U 623 U 630 Z0 Z0 Z0 Z0 Z0 3-00499-343 3-00411-340 3-00411-340 3-00387-340 3-00440-340 3-00440-340 3-00440-340 3-00038-340 3-00441-340 3-00491-340 3-00036-340 3-00049-340 0-00012-007 0-00043-011 0-00373-000 0-00388-000 0-00438-021 SR850 U606 74HC273 74HC273 74HC245 74HC573 74HC573 74HC573 74HC139 74HC113 UPD71054C 74HC00 74HC74 TO-220 4-40 KEP CARD EJECTOR RCA PHONO 4-40X5/16PP GAL/PAL, I.C. Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Heat Sinks Nut, Kep Hardware, Misc. Hardware, Misc. Screw, Panhead Phillips
Analog Input Board Parts List

C 102 C 103 C 104 C 106 C 111 C 150 C 151 C 152 C 153 C 180 C 181 C 182 C 183 C 201 C 202 C 221 C 222 C 225 C 261 C 281 C 282 C 303 C 311 C 312 C 321 C 322 C 331 C 332 C 341 C 342 C 351 C 361 C 362 C 363 5-00183-535 5-00183-535 5-00159-501 5-00100-517 5-00023-529 5-00098-517 5-00098-517 5-00023-529 5-00023-529 5-00038-509 5-00038-509 5-00100-517 5-00100-517 5-00060-512 5-00060-512 5-00060-512 5-00060-512 5-00007-501 5-00023-529 5-00023-529 5-00023-529 5-00002-501 5-00148-545 5-00148-545 5-00148-545 5-00148-545 5-00148-545 5-00148-545 5-00148-545 5-00148-545 5-00148-545 5-00219-529 0-00001-000 5-00022-501
Value
.1U - 2% .1U - 2% 6.8P 2.2U .1U 10U 10U .1U .1U 10U 10U 2.2U 2.2U 1.0U 1.0U 1.0U 1.0U 220P .1U .1U .1U 100P 1000P 1000P 1000P 1000P 1000P 1000P 1000P 1000P 1000P .01U WIRE .001U
Capacitor, Polypropylene Capacitor, Polypropylene Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Tantalum, 35V, 20%, Rad Cap, Monolythic Ceramic, 50V, 20%, Z5U Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Capacitor, Electrolytic, 50V, 20%, Rad Capacitor, Electrolytic, 50V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Cap, Stacked Metal Film 50V 5% -40/+85c Cap, Stacked Metal Film 50V 5% -40/+85c Cap, Stacked Metal Film 50V 5% -40/+85c Cap, Stacked Metal Film 50V 5% -40/+85c Capacitor, Ceramic Disc, 50V, 10%, SL Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Monolythic Ceramic, COG, 1% Capacitor, Monolythic Ceramic, COG, 1% Capacitor, Monolythic Ceramic, COG, 1% Capacitor, Monolythic Ceramic, COG, 1% Capacitor, Monolythic Ceramic, COG, 1% Capacitor, Monolythic Ceramic, COG, 1% Capacitor, Monolythic Ceramic, COG, 1% Capacitor, Monolythic Ceramic, COG, 1% Capacitor, Monolythic Ceramic, COG, 1% Cap, Monolythic Ceramic, 50V, 20%, Z5U Hardware, Misc. Capacitor, Ceramic Disc, 50V, 10%, SL
7-15
Parts List
C 371 C 372 C 381 C 382 C 386 C 390 C 391 C 392 C 393 C 394 C 395 C 396 C 397 C 398 C 410 C 411 C 414 C 430 C 431 C 456 C 460 C 461 C 462 C 463 C 480 C 481 C 482 C 483 C 511 C 512 C 513 C 514 C 515 C 516 C 517 C 520 C 521 C 523 C 524 C 530 C 531 C 540 C 560 C 561 C 562 D 101 D 180 D 181 D 480 D 481 J 101 J 102 JP201 JP221 JP401 K 101 K 102 5-00148-545 5-00148-545 5-00148-545 5-00148-545 5-00013-501 5-00148-545 5-00023-529 5-00023-529 5-00023-529 5-00023-529 5-00023-529 5-00023-529 5-00023-529 5-00023-529 5-00023-529 5-00098-517 5-00098-517 5-00100-517 5-00100-517 5-00023-529 5-00023-529 5-00023-529 5-00023-529 5-00023-529 5-00098-517 5-00098-517 5-00098-517 5-00098-517 5-00100-517 5-00100-517 5-00100-517 5-00100-517 5-00098-517 5-00023-529 5-00023-529 5-00100-517 5-00100-517 5-00100-517 5-00100-517 5-00100-517 5-00100-517 5-00100-517 5-00100-517 5-00100-517 5-00100-517 3-00489-301 3-00004-301 3-00004-301 3-00004-301 3-00004-301 0-00388-000 0-00388-000 1-00006-130 1-00006-130 1-00184-130 3-00196-335 3-00444-335 1000P 1000P 1000P 1000P 33P 1000P .1U .1U .1U .1U .1U .1U .1U .1U .1U 10U 10U 2.2U 2.2U .1U .1U .1U .1U .1U 10U 10U 10U 10U 2.2U 2.2U 2.2U 2.2U 10U .1U .1U 2.2U 2.2U 2.2U 2.2U 2.2U 2.2U 2.2U 2.2U 2.2U 2.2U 1N5232 1N4148 1N4148 1N4148 1N4148 RCA PHONO RCA PHONO 2 PIN DI 2 PIN DI 32 PIN DIL HS-212S-5 HS-211-5 Capacitor, Monolythic Ceramic, COG, 1% Capacitor, Monolythic Ceramic, COG, 1% Capacitor, Monolythic Ceramic, COG, 1% Capacitor, Monolythic Ceramic, COG, 1% Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Monolythic Ceramic, COG, 1% Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Tantalum, 35V, 20%, Rad Diode Diode Diode Diode Diode Hardware, Misc. Hardware, Misc. Connector, Male Connector, Male Connector, Male Relay Relay
7-16
Parts List
K 103 K 104 K 105 L 501 N 101 N 102 N 103 N 261 N 401 N 402 N 403 N 404 N 405 N 406 N 501 P 101 P 102 P 103 P 201 P 202 P 221 P 222 PC1 R 101 R 102 R 103 R 104 R 106 R 107 R 108 R 109 R 110 R 111 R 114 R 115 R 119 R 120 R 123 R 124 R 125 R 126 R 127 R 129 R 130 R 131 R 132 R 133 R 140 R 141 R 150 R 151 R 180 R 181 R 201 R 202 R 203 R 204 3-00444-335 3-00196-335 3-00444-335 6-00006-602 4-00560-421 4-00244-421 4-00497-421 4-00560-421 4-00756-421 4-00757-421 4-00756-421 4-00757-421 4-00694-421 4-00694-421 4-00758-425 4-00015-445 4-00354-445 4-00015-445 4-00759-445 4-00760-445 4-00730-445 4-00760-445 7-00355-701 4-00021-401 4-00131-407 4-00306-407 4-00034-401 4-00191-407 4-00191-407 4-00139-407 4-00139-407 4-00143-407 4-00689-408 4-00217-408 4-00735-408 4-00217-408 4-00735-408 4-00143-407 4-00689-408 4-00030-401 4-00142-407 4-00142-407 4-00130-407 4-00192-407 4-00034-401 4-00396-407 4-00059-401 4-00030-401 4-00059-401 4-00089-401 4-00089-401 4-00030-401 4-00030-401 4-00198-407 4-00761-407 4-00762-407 4-00763-407 HS-211-5 HS-212S-5 HS-211-5 33U 47KX3 10KX4 1.5KX4 47KX3 1.0MX4 220KX4 1.0MX4 220KX4 270X4 270X4 15KX5 100K 20 100K 50 500 100 500 L/I ANALOG 1.0K 1.00M 100M 10K 49.9 49.9 10.0M 10.0M 102K 2.150K 1.000K 357.0 1.000K 357.0 102K 2.150K 10 100K 100K 1.00K 49.9K 10K 374K 22K 10 22K 56 56 10 10 6.65K 287 158 14.0K Relay Relay Relay Inductor, Radial Res. Network, SIP, 1/4W,2% (Isolated) Res. Network, SIP, 1/4W,2% (Isolated) Res. Network, SIP, 1/4W,2% (Isolated) Res. Network, SIP, 1/4W,2% (Isolated) Res. Network, SIP, 1/4W,2% (Isolated) Res. Network, SIP, 1/4W,2% (Isolated) Res. Network, SIP, 1/4W,2% (Isolated) Res. Network, SIP, 1/4W,2% (Isolated) Res. Network, SIP, 1/4W,2% (Isolated) Res. Network, SIP, 1/4W,2% (Isolated) Resistor Network SIP 1/4W 2% (Common) Pot, Multi-Turn, Side Adjust Pot, Multi-Turn, Side Adjust Pot, Multi-Turn, Side Adjust Pot, Multi-Turn, Side Adjust Pot, Multi-Turn, Side Adjust Pot, Multi-Turn, Side Adjust Pot, Multi-Turn, Side Adjust Printed Circuit Board Resistor, Carbon Film, 1/4W, 5% Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Carbon Film, 1/4W, 5% Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 0.1%, 25ppm Resistor, Metal Film, 1/8W, 0.1%, 25ppm Resistor, Metal Film, 1/8W, 0.1%, 25ppm Resistor, Metal Film, 1/8W, 0.1%, 25ppm Resistor, Metal Film, 1/8W, 0.1%, 25ppm Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 0.1%, 25ppm Resistor, Carbon Film, 1/4W, 5% Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Carbon Film, 1/4W, 5% Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM
7-17
Parts List
R 205 R 207 R 208 R 221 R 222 R 223 R 224 R 225 R 226 R 227 R 228 R 241 R 242 R 244 R 245 R 246 R 247 R 249 R 252 R 261 R 262 R 299 R 301 R 302 R 303 R 304 R 305 R 306 R 307 R 308 R 309 R 311 R 312 R 313 R 314 R 315 R 321 R 322 R 323 R 324 R 325 R 331 R 332 R 333 R 334 R 335 R 341 R 342 R 343 R 344 R 345 R 351 R 361 R 363 R 364 R 365 R 371 4-00321-407 4-00380-407 4-00556-407 4-00595-407 4-00663-407 4-00322-407 4-00732-407 4-00321-407 4-00158-407 4-00158-407 4-00158-407 4-00380-407 4-00556-407 4-00380-407 4-00556-407 4-00380-407 4-00556-407 4-00380-407 4-00556-407 4-00138-407 4-00138-407 4-00059-401 4-00066-401 4-00130-407 4-00130-407 4-00158-407 4-00164-407 4-00158-407 4-00217-408 4-00217-408 4-00130-407 4-00348-407 4-00765-407 4-00475-407 4-00748-408 4-00748-408 4-00467-407 4-00698-407 4-00582-407 4-00748-408 4-00748-408 4-00159-407 4-00429-407 4-00136-407 4-00748-408 4-00748-408 4-00137-407 4-00583-407 4-00699-407 4-00748-408 4-00748-408 4-00200-407 4-00234-407 4-00188-407 4-00164-407 4-00139-407 4-00763-407 1.74K 6.34K 2.94K 13.3K 576 316 28.0K 1.74K 2.00K 2.00K 2.00K 6.34K 2.94K 6.34K 2.94K 6.34K 2.94K 6.34K 2.94K 10.0K 10.0K 22K 3.3M 1.00K 1.00K 2.00K 20.0K 2.00K 1.000K 1.000K 1.00K 2.21K 56.2 2.61K 2.000K 2.000K 2.43K 357 2.15K 2.000K 2.000K 2.10K 511 1.82K 2.000K 2.000K 1.91K 309 1.54K 2.000K 2.000K 619 10.0 4.99K 20.0K 10.0M 14.0K Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 0.1%, 25ppm Resistor, Metal Film, 1/8W, 0.1%, 25ppm Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 0.1%, 25ppm Resistor, Metal Film, 1/8W, 0.1%, 25ppm Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 0.1%, 25ppm Resistor, Metal Film, 1/8W, 0.1%, 25ppm Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 0.1%, 25ppm Resistor, Metal Film, 1/8W, 0.1%, 25ppm Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 0.1%, 25ppm Resistor, Metal Film, 1/8W, 0.1%, 25ppm Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM
7-18
Parts List
R 372 R 373 R 374 R 375 R 379 R 381 R 382 R 383 R 384 R 385 R 386 R 387 R 388 R 389 R 391 R 392 R 393 R 394 R 395 R 396 R 397 R 398 R 430 R 431 R 452 R 460 R 461 R 462 R 463 R 480 R 481 R 511 R 512 R 513 R 514 R 515 R 516 R 517 R 518 R 519 R 520 R 540 R 560 SO101 SO102 SO108 SO361 TP101 TP102 TP103 TP104 TP201 TP301 TP302 TP303 TP405 TP406 4-00700-407 4-00763-407 4-00158-407 4-00158-407 4-00303-407 4-00156-407 4-00202-407 4-00595-407 4-00158-407 4-00158-407 4-00185-407 4-00141-407 4-00021-401 4-00130-407 4-00030-401 4-00030-401 4-00030-401 4-00030-401 4-00130-407 4-00138-407 4-00138-407 4-00059-401 4-00021-401 4-00021-401 4-00141-407 4-00030-401 4-00030-401 4-00030-401 4-00030-401 4-00108-402 4-00108-402 4-00475-407 4-00706-407 4-00475-407 4-00706-407 4-00359-402 4-00359-402 4-00215-407 4-00706-407 4-00215-407 4-00706-407 4-00141-407 4-00056-401 1-00173-150 1-00173-150 1-00173-150 1-00173-150 1-00143-101 1-00143-101 1-00143-101 1-00143-101 1-00143-101 1-00143-101 1-00143-101 1-00143-101 1-00143-101 1-00143-101 1.62K 14.0K 2.00K 2.00K 7.87K 16.2K 698 13.3K 2.00K 2.00K 4.02K 100 1.0K 1.00K 10 10 10 10 1.00K 10.0K 10.0K 22K 1.0K 1.0K 100 10 10 10 10 150 150 2.61K 237 2.61K 237 51 51 909 237 909 237 100 22 8 PIN MACH 8 PIN MACH 8 PIN MACH 8 PIN MACH TEST JACK TEST JACK TEST JACK TEST JACK TEST JACK TEST JACK TEST JACK TEST JACK TEST JACK TEST JACK Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Carbon Film, 1/4W, 5% Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Comp, 1/2W, 5% Resistor, Carbon Comp, 1/2W, 5% Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Carbon Comp, 1/2W, 5% Resistor, Carbon Comp, 1/2W, 5% Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Carbon Film, 1/4W, 5% Socket, THRU-HOLE Socket, THRU-HOLE Socket, THRU-HOLE Socket, THRU-HOLE Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack
7-19
Parts List
TP407 TP408 TP501 TP502 TP503 TP504 TP505 TP506 TP507 U 101 U 102 U 103 U 104 U 105 U 106 U 108 U 109 U 180 U 181 U 201 U 202 U 203 U 204 U 241 U 242 U 243 U 244 U 261 U 301 U 302 U 303 U 304 U 305 U 311 U 321 U 331 U 341 U 361 U 362 U 371 U 381 U 386 U 391 U 401 U 402 U 403 U 406 U 407 U 480 U 481 U 504 U 506 U 508 U 509 U 510 U 511 U 530 1-00143-101 1-00143-101 1-00143-101 1-00143-101 1-00143-101 1-00143-101 1-00143-101 1-00143-101 1-00143-101 3-00494-340 3-00246-340 3-00423-340 3-00143-340 3-00461-340 3-00143-340 3-00817-340 3-00461-340 3-00118-325 3-00124-325 3-00461-340 3-00385-340 3-00423-340 3-00423-340 3-00385-340 3-00423-340 3-00385-340 3-00423-340 3-00143-340 3-00130-340 3-00385-340 3-00130-340 3-00130-340 3-00143-340 3-00130-340 3-00130-340 3-00130-340 3-00130-340 3-00089-340 3-00089-340 3-00130-340 3-00130-340 3-00423-340 3-00088-340 3-00087-340 3-00402-340 3-00423-340 3-00155-340 3-00392-340 3-00116-325 3-00122-325 3-00411-340 3-00411-340 3-00149-329 3-00141-329 3-00149-329 3-00141-329 3-00195-340 TEST JACK TEST JACK TEST JACK TEST JACK TEST JACK TEST JACK TEST JACK TEST JACK TEST JACK AD645JN NPD5564 5534 LM393 OPA2604 LM393 NPD5566 OPA2604 78L15 79L15 OPA2604 74HC4053 5534 5534 74HC4053 5534 74HC4053 5534 LM393 5532A 74HC4053 5532A 5532A LM393 5532A 5532A 5532A 5532A LF357 LF357 5532A 5532A 5534 LF353 LF347 74HC4052 5534 74HC04 PCM1750P 78L05 79L05 74HC273 74HC273 LM317T LM337T LM317T LM337T CA3082 Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Vertical Test Jack Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Transistor, TO-92 Package Transistor, TO-92 Package Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Transistor, TO-92 Package Transistor, TO-92 Package Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Voltage Reg., TO-220 (TAB) Package Voltage Reg., TO-220 (TAB) Package Voltage Reg., TO-220 (TAB) Package Voltage Reg., TO-220 (TAB) Package Integrated Circuit (Thru-hole Pkg)
7-20
Parts List
Z0 Z0 Z0 Z0 Z0 0-00043-011 0-00187-021 0-00243-003 0-00373-000 1-00087-131 4-40 KEP 4-40X1/4PP TO-220 CARD EJECTOR 2 PIN JUMPER Nut, Kep Screw, Panhead Phillips Insulators Hardware, Misc. Connector, Female
CPU and Power Supply Parts List

BT701 C1 C2 C3 C4 C5 C6 C7 C9 C 10 C 12 C 16 C 17 C 18 C 19 C 20 C 23 C 24 C 26 C 27 C 28 C 29 C 34 C 101 C 102 C 103 C 903 C 907 C 908 C 909 C 910 C 1001 C 1002 C 1003 C 1004 C 1006 C 1007 C 1008 C 1009 C 1010 C 1011 C 1012 C 1013 C 1015 C 1016 6-00001-612 5-00124-526 5-00124-526 5-00228-526 5-00228-526 5-00230-550 5-00229-521 5-00023-529 5-00038-509 5-00038-509 5-00038-509 5-00127-524 5-00127-524 5-00127-524 5-00192-542 5-00127-524 5-00192-542 5-00127-524 5-00192-542 5-00127-524 5-00192-542 5-00127-524 5-00127-524 5-00177-501 5-00215-501 5-00028-507 5-00022-501 5-00012-501 5-00012-501 5-00178-501 5-00178-501 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548
Value
BR-2/3A 2PIN PC 5600U 5600U 15000U 15000U 47000U 15000U .1U 10U 10U 10U 2.2U 2.2U 2.2U 22U MIN 2.2U 22U MIN 2.2U 22U MIN 2.2U 22U MIN 2.2U 2.2U 30P 20P 100P .001U 330P 330P 62P 62P .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL
Battery Capacitor, Electrolytic, 35V, 20%, Rad Capacitor, Electrolytic, 35V, 20%, Rad Capacitor, Electrolytic, 35V, 20%, Rad Capacitor, Electrolytic, 35V, 20%, Rad Capacitor, Electrolytic, 10V, 20%, Rad Capacitor, Electrolytic, 25V, 20%, Rad Cap, Monolythic Ceramic, 50V, 20%, Z5U Capacitor, Electrolytic, 50V, 20%, Rad Capacitor, Electrolytic, 50V, 20%, Rad Capacitor, Electrolytic, 50V, 20%, Rad Capacitor, Tantalum, 50V, 20%, Rad Capacitor, Tantalum, 50V, 20%, Rad Capacitor, Tantalum, 50V, 20%, Rad Cap, Mini Electrolytic, 50V, 20% Radial Capacitor, Tantalum, 50V, 20%, Rad Cap, Mini Electrolytic, 50V, 20% Radial Capacitor, Tantalum, 50V, 20%, Rad Cap, Mini Electrolytic, 50V, 20% Radial Capacitor, Tantalum, 50V, 20%, Rad Cap, Mini Electrolytic, 50V, 20% Radial Capacitor, Tantalum, 50V, 20%, Rad Capacitor, Tantalum, 50V, 20%, Rad Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Ceramic Disc,250V, 10%, Y5P Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Ceramic Disc, 50V, 10%, SL Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX
7-21
Parts List
C 1017 C 1018 C 1019 C 1021 C 1022 C 1023 C 1024 C 1026 C 1030 C 1031 C 1035 C 1036 C 1037 C 1040 C 1041 C 1042 C 1043 C 1044 D2 D3 D4 D5 D6 D7 D8 D9 D 15 D 16 D 18 D 19 D 20 D 30 D 31 D 32 D 33 D 34 D 35 D 36 D 37 D 38 D 401 D 701 DS1 JP4 JP302 JP303 JP305 JP602 JP603 JP604 JP902 JP903 JP1000 L1 LS701 N 101 N 102 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00100-517 5-00225-548 5-00100-517 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00225-548 5-00100-517 5-00225-548 5-00225-548 3-00391-301 3-00391-301 3-00391-301 3-00391-301 3-00391-301 3-00391-301 3-00391-301 3-00391-301 3-00391-301 3-00001-301 3-00001-301 3-00001-301 3-00001-301 3-00479-301 3-00479-301 3-00479-301 3-00479-301 3-00391-301 3-00391-301 3-00391-301 3-00391-301 3-00001-301 3-00004-301 3-00203-301 3-00011-303 1-00171-130 1-00008-130 1-00109-130 1-00109-130 1-00171-130 1-00109-130 1-00109-130 1-00160-162 1-00016-160 1-00170-130 0-00001-000 6-00096-600 4-00587-425 4-00334-425 .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL 2.2U .1U AXIAL 2.2U .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL .1U AXIAL 2.2U .1U AXIAL .1U AXIAL MBR360 MBR360 MBR360 MBR360 MBR360 MBR360 MBR360 MBR360 MBR360 1N4001 1N4001 1N4001 1N4001 MUR410 MUR410 MUR410 MUR410 MBR360 MBR360 MBR360 MBR360 1N4001 1N4148 1N5711 RED 34 PIN ELH 20 PIN DI 4 PIN DI 4 PIN DI 34 PIN ELH 4 PIN DI 4 PIN DI IEEE488/STAND. RS232 25 PIN D 26 PIN ELH WIRE MINI 10KX7 10KX5 Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Tantalum, 35V, 20%, Rad Capacitor, Ceramic, 50V,+80/-20% Z5U AX Capacitor, Ceramic, 50V,+80/-20% Z5U AX Diode Diode Diode Diode Diode Diode Diode Diode Diode Diode Diode Diode Diode Diode Diode Diode Diode Diode Diode Diode Diode Diode Diode Diode LED, T1 Package Connector, Male Connector, Male Connector, Male Connector, Male Connector, Male Connector, Male Connector, Male Connector, IEEE488, Standard, R/A, Femal Connector, D-Sub, Right Angle PC, Female Connector, Male Hardware, Misc. Misc. Components Resistor Network SIP 1/4W 2% (Common) Resistor Network SIP 1/4W 2% (Common)
7-22
Parts List
PC1 Q3 Q4 Q 401 Q 701 Q 702 Q 705 R3 R4 R5 R6 R7 R 30 R 32 R 33 R 34 R 35 R 36 R 37 R 38 R 39 R 40 R 401 R 402 R 601 R 701 R 702 R 703 R 704 R 712 R 713 R 901 R 911 R 912 R 913 SO101 SO303 SO304 SW1 T1 U1 U3 U4 U5 U6 U8 U9 U 10 U 101 U 201 U 202 U 203 U 204 U 205 U 206 U 207 U 208 7-00512-701 3-00021-325 3-00021-325 3-00026-325 3-00022-325 3-00021-325 3-00022-325 4-00034-401 4-00032-401 4-00034-401 4-00046-401 4-00065-401 4-00360-401 4-00360-401 4-00027-401 4-00027-401 4-00185-407 4-00185-407 4-00522-407 4-00517-407 4-00522-407 4-00517-407 4-00034-401 4-00079-401 4-00034-401 4-00088-401 4-00130-407 4-00034-401 4-00034-401 4-00130-407 4-00056-401 4-00034-401 4-00022-401 4-00062-401 4-00130-407 1-00108-150 1-00156-150 1-00156-150 2-00039-218 1-00152-116 3-00039-340 3-00549-329 3-00550-329 3-00119-329 3-00346-329 3-00330-329 3-00149-329 3-00141-329 3-00354-340 3-00340-340 3-00340-340 3-00340-340 3-00341-340 3-00341-340 3-00342-340 3-00343-340 3-00344-340 SR810/830 CPU 2N3904 2N3904 2N5210 2N3906 2N3904 2N3906 10K 100K 10K 2.0M 3.3K 430 430 1.5K 1.5K 4.02K 4.02K 243 3.57K 243 3.57K 10K 4.7K 10K 51K 1.00K 10K 10K 1.00K 22 10K 1.0M 270 1.00K PLCC 68 TH 32 PIN 600 MIL 32 PIN 600 MIL SR810/830 11 PIN, WHITE 74HC14 LT1085CT-5 LT1086CT-5 7905 7812 7912 LM317T LM337T 80C186-12 74ALS373 74ALS373 74ALS373 74ALS245 74ALS245 74ALS138 74ALS32 74ALS08 Printed Circuit Board Transistor, TO-92 Package Transistor, TO-92 Package Transistor, TO-92 Package Transistor, TO-92 Package Transistor, TO-92 Package Transistor, TO-92 Package Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Metal Film, 1/8W, 1%, 50PPM Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Carbon Film, 1/4W, 5% Resistor, Metal Film, 1/8W, 1%, 50PPM Socket, THRU-HOLE Socket, THRU-HOLE Socket, THRU-HOLE Switch, Panel Mount, Power, Rocker Header, Amp, MTA-156 Integrated Circuit (Thru-hole Pkg) Voltage Reg., TO-220 (TAB) Package Voltage Reg., TO-220 (TAB) Package Voltage Reg., TO-220 (TAB) Package Voltage Reg., TO-220 (TAB) Package Voltage Reg., TO-220 (TAB) Package Voltage Reg., TO-220 (TAB) Package Voltage Reg., TO-220 (TAB) Package Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg)
7-23
Parts List
U 401 U 402 U 501 U 502 U 503 U 601 U 602 U 608 U 610 U 611 U 612 U 614 U 615 U 701 U 705 U 901 U 902 U 903 U 904 U 905 U 906 X 101 X 902 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 3-00551-341 3-00551-341 3-00342-340 3-00342-340 3-00342-340 3-00467-340 3-00348-340 3-00401-340 3-00467-340 3-00467-340 3-00039-340 3-00539-340 3-00539-340 3-00051-340 3-00110-340 3-00350-340 3-00645-340 3-00078-340 3-00079-340 3-00247-340 3-00109-340 6-00068-620 6-00037-620 0-00158-000 0-00186-021 0-00187-021 0-00231-043 0-00246-043 0-00316-003 0-00477-021 1-00087-131 5-00262-548 7-00501-720 128KX8-70 128KX8-70 74ALS138 74ALS138 74ALS138 74HCT74 74HC20 74HCT244 74HCT74 74HCT74 74HC14 74HCT245 74HCT245 74HCU04 MC1489 74ALS04 NAT9914APD DS75160A DS75161A SCN2641 MC1488 24.000 MHZ 3.6864 MHZ 60MM 24V 6-32X1-3/8PP 4-40X1/4PP #4 SHOULDER #8 X 1/16 PLTFM-28 8-32X1/2 2 PIN JUMPER .01U AXIAL SR830-8 STATIC RAM, I.C. STATIC RAM, I.C. Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Crystal Crystal Hardware, Misc. Screw, Panhead Phillips Screw, Panhead Phillips Washer, nylon Washer, nylon Insulators Screw, Panhead Phillips Connector, Female Capacitor, Ceramic, 50V,+80/-20% Z5U AX Fabricated Part
Front Panel Display Board Parts List

B1 B2 B3 B4 B5 B6 B7 B8 C1 C2 C3 C4 C5 C6 C7 C8 C9 3-00546-340 3-00546-340 3-00546-340 3-00546-340 3-00546-340 3-00546-340 3-00546-340 3-00546-340 5-00023-529 5-00219-529 5-00219-529 5-00219-529 5-00219-529 5-00219-529 5-00219-529 5-00219-529 5-00219-529
Value
HDSP-4830 HDSP-4830 HDSP-4830 HDSP-4830 HDSP-4830 HDSP-4830 HDSP-4830 HDSP-4830 .1U .01U .01U .01U .01U .01U .01U .01U .01U
Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U
7-24
Parts List
C 10 C 11 C 12 C 13 C 14 C 15 C 16 C 17 C 18 C 2001 C 2003 C 2005 C 2007 C 2009 C 2010 C 2011 C 2012 C 2013 C 2014 C 2015 C 2020 C 2021 CX30 CX31 CX32 CX34 CX35 D1 D2 D3 D4 D5 D6 D7 D8 D9 D 10 D 11 D 12 D 13 D 14 D 15 D 16 D 17 D 18 D 19 D 20 D 21 D 22 D 23 D 24 D 25 D 26 D 27 D 28 D 29 D 30 5-00219-529 5-00219-529 5-00219-529 5-00219-529 5-00219-529 5-00219-529 5-00219-529 5-00041-509 5-00225-548 5-00219-529 5-00219-529 5-00219-529 5-00219-529 5-00219-529 5-00219-529 5-00219-529 5-00219-529 5-00219-529 5-00219-529 5-00219-529 5-00219-529 5-00219-529 5-00219-529 5-00219-529 5-00219-529 5-00219-529 5-00219-529 3-00884-306 3-00885-306 3-00885-306 3-00885-306 3-00885-306 3-00885-306 3-00547-310 3-00547-310 3-00547-310 3-00547-310 3-00547-310 3-00547-310 3-00547-310 3-00547-310 3-00547-310 3-00547-310 3-00547-310 3-00547-310 3-00884-306 3-00885-306 3-00885-306 3-00885-306 3-00885-306 3-00885-306 3-00547-310 3-00547-310 3-00547-310 3-00547-310 3-00547-310 3-00547-310 .01U .01U .01U .01U .01U .01U .01U 220U .1U AXIAL .01U .01U .01U .01U .01U .01U .01U .01U .01U .01U .01U .01U .01U .01U .01U .01U .01U .01U RED YELLOW YELLOW YELLOW YELLOW YELLOW RED COATED RED COATED RED COATED RED COATED RED COATED RED COATED RED COATED RED COATED RED COATED RED COATED RED COATED RED COATED RED YELLOW YELLOW YELLOW YELLOW YELLOW RED COATED RED COATED RED COATED RED COATED RED COATED RED COATED Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Capacitor, Electrolytic, 50V, 20%, Rad Capacitor, Ceramic, 50V,+80/-20% Z5U AX Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U Cap, Monolythic Ceramic, 50V, 20%, Z5U LED, Rectangular LED, Rectangular LED, Rectangular LED, Rectangular LED, Rectangular LED, Rectangular LED, Coated Rectangular LED, Coated Rectangular LED, Coated Rectangular LED, Coated Rectangular LED, Coated Rectangular LED, Coated Rectangular LED, Coated Rectangular LED, Coated Rectangular LED, Coated Rectangular LED, Coated Rectangular LED, Coated Rectangular LED, Coated Rectangular LED, Rectangular LED, Rectangular LED, Rectangular LED, Rectangular LED, Rectangular LED, Rectangular LED, Coated Rectangular LED, Coated Rectangular LED, Coated Rectangular LED, Coated Rectangular LED, Coated Rectangular LED, Coated Rectangular
7-25
Parts List
D 31 D 32 D 33 D 34 D 35 D 36 D 37 D 38 D 39 D 40 D 41 D 42 D 43 D 44 D 45 D 46 D 47 D 48 D 49 D 50 D 51 D 52 D 53 D 54 D 55 D 56 D 57 D 58 D 59 D 60 D 61 D 62 D 63 D 64 D 65 D 66 D 67 D 68 D 69 D 70 D 71 D 72 D 73 D 74 D 75 D 76 D 77 D 78 D 79 D 80 D 81 D 82 D 83 D 84 D 85 D 86 D 87 3-00547-310 3-00547-310 3-00547-310 3-00547-310 3-00547-310 3-00547-310 3-00885-306 3-00885-306 3-00885-306 3-00885-306 3-00885-306 3-00885-306 3-00885-306 3-00885-306 3-00547-310 3-00547-310 3-00547-310 3-00547-310 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00576-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00576-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00576-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 RED COATED RED COATED RED COATED RED COATED RED COATED RED COATED YELLOW YELLOW YELLOW YELLOW YELLOW YELLOW YELLOW YELLOW RED COATED RED COATED RED COATED RED COATED GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI RED MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI RED MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI RED MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI LED, Coated Rectangular LED, Coated Rectangular LED, Coated Rectangular LED, Coated Rectangular LED, Coated Rectangular LED, Coated Rectangular LED, Rectangular LED, Rectangular LED, Rectangular LED, Rectangular LED, Rectangular LED, Rectangular LED, Rectangular LED, Rectangular LED, Coated Rectangular LED, Coated Rectangular LED, Coated Rectangular LED, Coated Rectangular LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature
7-26
Parts List
D 88 D 89 D 90 D 91 D 92 D 93 D 94 D 95 D 96 D 97 D 98 D 99 D 100 D 101 D 102 D 103 D 104 D 105 D 106 D 107 D 108 D 109 D 110 D 111 D 112 D 113 D 114 D 115 D 116 D 117 D 118 D 119 D 120 D 121 D 122 D 123 D 124 D 125 D 126 D 127 D 128 D 129 D 130 D 131 D 132 J1 J2 J3 J4 J5 J6 J7 J8 J9 J 10 J 2001 J 2002 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00576-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00576-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00575-311 3-00004-301 3-00004-301 3-00004-301 3-00004-301 3-00004-301 3-00004-301 3-00004-301 3-00004-301 1-00202-131 1-00202-131 1-00203-131 1-00203-131 1-00203-131 1-00204-130 1-00204-130 1-00205-130 1-00205-130 1-00205-130 1-00010-130 1-00171-130 GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI RED MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI RED MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI GREEN MINI 1N4148 1N4148 1N4148 1N4148 1N4148 1N4148 1N4148 1N4148 36 PIN SI SOCK 36 PIN SI SOCK 12 PIN SI SOCK 12 PIN SI SOCK 12 PIN SI SOCK 36 PIN SI 36 PIN SI 12 PIN SI 12 PIN SI 12 PIN SI 20 PIN ELH 34 PIN ELH LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature LED, Subminiature Diode Diode Diode Diode Diode Diode Diode Diode Connector, Female Connector, Female Connector, Female Connector, Female Connector, Female Connector, Male Connector, Male Connector, Male Connector, Male Connector, Male Connector, Male Connector, Male
7-27
Parts List
J 2003 JP4 JP5 N1 N2 N3 N4 N5 N6 N7 N8 N9 N 10 N 11 N 12 N 13 PC1 PC2 PC3 PC4 PC5 Q1 Q2 R1 U1 U2 U3 U4 U5 U6 U7 U8 U9 U 10 U 11 U 12 U 13 U 14 U 15 U 16 U 17 U 18 U 19 U 20 U 21 U 22 U 23 U 24 U 25 U 26 U 27 U 28 Z0 Z0 Z0 Z0 Z0 1-00181-165 1-00171-130 1-00138-130 4-00468-420 4-00468-420 4-00468-420 4-00835-420 4-00468-420 4-00468-420 4-00468-420 4-00468-420 4-00805-420 4-00246-421 4-00421-420 4-00494-421 4-00263-425 7-00492-701 7-00493-701 7-00437-701 7-00513-701 7-00514-701 3-00264-340 3-00264-340 4-00142-407 3-00064-340 3-00401-340 3-00064-340 3-00064-340 3-00064-340 3-00199-340 3-00548-340 3-00548-340 3-00548-340 3-00548-340 3-00548-340 3-00548-340 3-00548-340 3-00289-340 3-00288-340 3-00288-340 3-00288-340 3-00288-340 3-00289-340 3-00288-340 3-00288-340 3-00288-340 3-00288-340 3-00289-340 3-00288-340 3-00288-340 3-00288-340 3-00288-340 0-00014-002 0-00025-005 0-00043-011 0-00079-031 0-00084-032 9 PIN STRAIGHT 34 PIN ELH 5 PIN SI 300X8 300X8 300X8 47X8 300X8 300X8 300X8 300X8 10X7 47X3 220X7 220X3 1.0KX7 SR830 DISPLAY SR830 KPD BD FFT/DSP LI SR810/830 AB IN SR830 RP INPUT MPQ3467 MPQ3467 100K CA3081 74HCT244 CA3081 CA3081 CA3081 74HC4538 74HCT574 74HCT574 74HCT574 74HCT574 74HCT574 74HCT574 74HCT574 HDSP-H107 HDSP-H101 HDSP-H101 HDSP-H101 HDSP-H101 HDSP-H107 HDSP-H101 HDSP-H101 HDSP-H101 HDSP-H101 HDSP-H107 HDSP-H101 HDSP-H101 HDSP-H101 HDSP-H101 6J4 3/8 4-40 KEP 4-40X3/16 M/F 36154 Connector, D-Sub, Female Connector, Male Connector, Male Resistor Network, DIP, 1/4W,2%,8 Ind Resistor Network, DIP, 1/4W,2%,8 Ind Resistor Network, DIP, 1/4W,2%,8 Ind Resistor Network, DIP, 1/4W,2%,8 Ind Resistor Network, DIP, 1/4W,2%,8 Ind Resistor Network, DIP, 1/4W,2%,8 Ind Resistor Network, DIP, 1/4W,2%,8 Ind Resistor Network, DIP, 1/4W,2%,8 Ind Resistor Network, DIP, 1/4W,2%,8 Ind Res. Network, SIP, 1/4W,2% (Isolated) Resistor Network, DIP, 1/4W,2%,8 Ind Res. Network, SIP, 1/4W,2% (Isolated) Resistor Network SIP 1/4W 2% (Common) Printed Circuit Board Printed Circuit Board Printed Circuit Board Printed Circuit Board Printed Circuit Board Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Resistor, Metal Film, 1/8W, 1%, 50PPM Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Integrated Circuit (Thru-hole Pkg) Power_Entry Hardware Lugs Nut, Kep Standoff Termination
7-28
Parts List
Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 0-00089-033 0-00097-040 0-00100-040 0-00104-043 0-00108-054 0-00122-053 0-00125-050 0-00126-053 0-00127-050 0-00130-050 0-00149-020 0-00187-021 0-00195-020 0-00209-021 0-00212-021 0-00241-021 0-00256-043 0-00257-000 0-00259-021 0-00310-010 0-00351-029 0-00372-000 0-00377-004 0-00378-004 0-00382-000 0-00389-000 0-00390-024 0-00391-010 0-00407-032 0-00418-000 0-00481-000 0-00482-043 0-00483-000 0-00484-000 0-00485-057 0-00486-000 0-00491-005 0-00492-026 0-00495-021 0-00500-000 0-00525-050 0-00590-066 0-00893-026 1-00073-120 1-00132-171 1-00153-113 1-00212-171 1-00213-171 1-00223-141 1-00224-141 1-00225-169 1-00226-169 2-00034-220 4-00681-436 5-00134-529 6-00004-611 6-00089-610 4 Tie #6 FLAT Washer, Flat 1/4X1/16 Washer, Flat #4 NYLON Washer, nylon 1 #26 Wire #26 UL1061 2-1/4 #24 Wire #24 UL1007 Strip 1/4x1/4 Tin 3 #18 Wire #18 UL1007 Stripped 3/8x3/8 No Tin 3-1/2 #24 Wire #24 UL1007 Strip 1/4x1/4 Tin 4 #18 Wire #18 UL1007 Stripped 3/8x3/8 No Tin 5-5/8 #18 Wire #18 UL1007 Stripped 3/8x3/8 No Tin 4-40X1/4PF Screw, Flathead Phillips 4-40X1/4PP Screw, Panhead Phillips 6-32X3/8PF Screw, Flathead Phillips 4-40X3/8PP Screw, Panhead Phillips 6-32X2PP Screw, Panhead Phillips 4-40X3/16PP Screw, Panhead Phillips #6 SHOULDER Washer, nylon HANDLE3 Hardware, Misc. 4-40X1/2PP Screw, Panhead Phillips HEX 3/8-32 Nut, Hex 4-40X1/4TRUSSPH Screw, Truss Phillips BE CU / FFT Hardware, Misc. SR760/830/780 Knobs CAP 760/830/780 Knobs CARD GUIDE 4.5 Hardware, Misc. PHONO PLUG Hardware, Misc. 1-72X1/4 Screw, Slotted 1-72X5/32X3/64 Nut, Hex SOLDR SLV RG174 Termination CLIP, CABLE Hardware, Misc. BUMPER/CORD WRP Hardware, Misc. 3/8X1/2X1/16THK Washer, nylon FAN GUARD III Hardware, Misc. CABLE Hardware, Misc. GROMMET Grommet CABLE Hardware, Misc. #10 SOLDER Lugs 6-32X1/2FP BLK Screw, Black, All Types 4-40X11/16PP Screw, Panhead Phillips 554808-1 Hardware, Misc. 8-1/4 #18 Wire #18 UL1007 Stripped 3/8x3/8 No Tin 0097-0555-02 Copper Foil Tape, Self Adhesive 8-32X3/8PF Screw, Black, All Types INSL Connector, BNC 34 COND Cable Assembly, Ribbon 11 PIN,18AWG/OR Connector, Amp, MTA-156 20 COND Cable Assembly, Ribbon 34 COND Cable Assembly, Ribbon BULKHEAD JACK SMB Connector STRAIGHT PLUG SMB Connector 26/40 IDC-40 CE Cable Assembly, Custom 34/60 IDC-60 CE Cable Assembly, Custom ENA1J-B20 SOFTPOT SG240 Thermistor, ICL (Inrush Current Limiter) 100P Cap, Monolythic Ceramic, 50V, 20%, Z5U 1A 3AG Fuse PLTFM II Transformer
7-29
Parts List
Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z1 6-00212-630 6-00214-630 7-00124-720 7-00406-720 7-00497-740 7-00499-735 7-00500-709 7-00502-721 7-00505-720 7-00506-720 7-00507-709 7-00510-720 7-00511-720 7-00515-720 7-00532-720 7-00582-720 9-00267-917 9-00552-924 1-00141-171 1X.25CYL Ferrite Beads .5X.25CYL Ferrite Beads TRANSCOVER2-MOD Fabricated Part SR770-12 Fabricated Part SR830-1 Keypad, Conductive Rubber SR830-4/-5 Injection Molded Plastic SR830 Lexan Overlay SR830-9 Machined Part SR830-12 Fabricated Part SR830-14 Fabricated Part SR810/830 RP Lexan Overlay SR830-18/SR810 Fabricated Part SR830-19 Fabricated Part SR830-20 Fabricated Part SR830/810 Fabricated Part SR830-23 Fabricated Part GENERIC Product Labels COPPERFOIL;1 Tape, All types 5 PIN SIL Cable Assembly, Ribbon
Miscellaneous Parts List

U 303 U 304 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 3-00345-342 3-00345-342 0-00179-000 0-00180-000 0-00185-021 0-00187-021 0-00204-000 0-00248-026 0-00315-021 7-00147-720 7-00408-720 7-00503-720 7-00504-720 7-00508-720 7-00509-720 7-00580-709
Value
64KX8-120 64KX8-120 RIGHT FOOT LEFT FOOT 6-32X3/8PP 4-40X1/4PP REAR FOOT 10-32X3/8TRUSSP 6-32X7/16 PP BAIL SR770-14 SR830-10 SR830-11 SR830-16 SR830-17 SR830-22
EPROM/PROM, I.C. EPROM/PROM, I.C. Hardware, Misc. Hardware, Misc. Screw, Panhead Phillips Screw, Panhead Phillips Hardware, Misc. Screw, Black, All Types Screw, Panhead Phillips Fabricated Part Fabricated Part Fabricated Part Fabricated Part Fabricated Part Fabricated Part Lexan Overlay
NOTICE: Schematics may not show current part numbers or values. Refer to parts list for current part numbers or values.
7-30
Parts List
7-31

DSP Lock-In Amplifier Model SR830: Stanford Research Systems

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DSP Lock-In Amplifier Model SR830: Stanford Research Systems

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DSP Lock-In Amplifier model SR830

Stanford Research Systems

5-21 5-22 5-22 5-23 5-23

4-5 4-7 4-12 4-15 4-18 4-21 4-23 4-24 4-26

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SAFETY AND PREPARATION FOR USE WARNING

SR830 DSP LOCK-IN AMPLIFIER SPECIFICATIONS

SR830 DSP Lock-In Amplifier

Offset Expand Reference

Trigger Input Monitor Output GENERAL Interfaces

Preamp Power Power Dimensions Weight Warranty

SR830 DSP Lock-In Amplifier

AUTO FUNCTIONS AGAN ARSV APHS AOFF i

SR830 DSP Lock-In Amplifier

pESR? {i} pSRE (?) {i} {,j}

SR830 DSP Lock-In Amplifier STATUS BYTE DEFINITIONS

STANDARD EVENT STATUS BYTE (5-22) bit 0 1 2 3 4 5 6 7

SR830 DSP Lock-In Amplifier

GETTING STARTED YOUR FIRST MEASUREMENTS

The Basic Lock-in

THE BASIC LOCK-IN

3. Press [Auto Phase]

5. Press the [+90] key.

The Basic Lock-in

Press [Auto Phase]

Use the knob to adjust the frequency to 10 kHz.

Use the knob to adjust the frequency back to 1 kHz.

Use the knob to adjust the amplitude to 0.01 V.

8. Press [Auto Gain]

Press [Time Constant Up] to change the time constant to 3 ms.

The Basic Lock-in

11. Press the [Slope/Oct] key until 6 dB/oct is selected.

Use the knob to adjust the frequency to 55.0 Hz.

The Basic Lock-in

Use the knob to change the frequency to 999.8 Hz.

4. Press [Channel 1 Display] to select R.

5. Press [Channel 2 Display] to select .

Press [Source] to turn the INTERNAL led off.

Press [Trig] to select POS EDGE.

Outputs, Offsets and Expands

OUTPUTS, OFFSETS and EXPANDS

Outputs, Offsets and Expands

Use the knob to adjust the X offset to 40.0%

Outputs, Offsets and Expands

6. Connect the DVM to the X output on the rear panel.

Press [Channel 1 Output] to select Display.

Press [Channel 1 Display] to select R.

Outputs, Offsets and Expands

Storing and Recalling Setups

STORING and RECALLING SETUPS

Use the knob to select setup number 3. Press [Save] again.

Storing and Recalling Setups

Aux Outputs and Inputs

AUX OUTPUTS and INPUTS

Show the level of Aux Out 1 on the Reference display.

Use the knob to adjust the level to -5.00 V.

4. Press [Channel 1 Display] to select AUX IN 1.

Channel 1 should now display -5 V (Aux In 1).