Chapter 6. FET
Chapter 6. FET
Chapter 6. FET
Van Su Luong
Contents
The JFET
JFET Characteristics and Parameters
JFET Biasing
The Ohmic Region
The MOSFET
MOSFET Characteristics and Parameters
MOSFET Biasing
The IGBT
Troubleshooting Device Application
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The FET
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The JFET
+ S
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The JFET
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The JFET
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The JFET
characteristic is
IDSS VGS = 0
VGS(off). VGS = – 4 V
VGS = VGS(of f) = –5 V
VDS
VP = +5 V
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The JFET
2
VGS
I D = I DSS 1 −
V
GS(off) IDSS
2
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The JFET
IDSS = 6.0 mA
(b) Show the point for the case
when ID = 3.0 mA.
3.0 mA
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The JFET
from –VGS
2 I DSS 0
gm0 = VGS(off)
VGS(off)
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The JFET
6.0 5.7
4.0 3.7
I D 5.7 mA − 3.7 mA
gm = = 2.0
VGS −0.7 V − (−1.3 V)
2.0 mA –VGS
= = 3.33 mS −4 −3 −2 −1 0
0.6 V −1.3 −0.7
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JFET Input Resistance
VGS
The input resistance of a JFET is given by: RIN =
I GSS
where IGSS is the current into the reverse biased gate.
JFETs have very high input resistance, but it drops when the temperature
increases.
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JFET Biasing
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JFET Biasing
8.0
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JFET Biasing
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JFET Biasing
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JFET Biasing
− VSS
− 15 V
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JFET Ohmic Region
represent conductance) of
5
VG = − 0.5 V
ID 4
successive VGS lines are different (mA)
VG = −1.0 V
0
0 1 2 3 4 5 6 7 8
VDS (V)
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JFET Ohmic Region
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The MOSFET
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The MOSFET
A D-MOSFET can RD
D-MOSFET RD
operate in either
mode, depending n n
on the gate
– + + –
– + + –
– + + + – +
voltage.
– +
p VDD + – p VDD
– –
– + + –
– + + –
– +
VGG n VGG n
+ –
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The MOSFET
MOSFET symbols are shown. Notice the broken line representing the
E-MOSFET that has an induced channel. The n channel has an
inward pointing arrow.
E-MOSFETs D-MOSFETs
D D D D
G G G G
S S S S
n channel p channel n channel p channel
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The MOSFET
0 VGS(th) +VGS
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The MOSFET
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MOSFET Biasing
E-MOSFETs can be biased using bias methods like the BJT methods
studied earlier. Voltage-divider bias and drain-feedback bias are
illustrated for n-channel devices.
+V DD +VDD
RD RD
R1 RG
R2
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MOSFET Biasing
The simplest way to bias a D-MOSFET is with zero bias. This works
because the device can operate in either depletion or
enhancement mode, so the gate can go above or below 0 V.
+VDD +VDD
RD RD
C
VG = 0 V IDSS ac
input
VGS = 0
RG RG
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FET Amplifiers and Switching
Circuits
The Common-Source Amplifier
amplifier. Vin RG RS C2
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The Common-Source Amplifier
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The Common-Source Amplifier
ID (mA)
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The Common-Source Amplifier
C1 Vout
2N5458
From the specification sheet, the 0.1 mF
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The Common-Source Amplifier
(continued)
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The Common-Source Amplifier
(continued)
2
I D RS
Alternatively, you can obtain ID using Equation 9-2: I D = I DSS 1 −
V
GS(off)
press F5
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The Common-Source Amplifier
2 I DSS 2 ( 6.0 mA )
gm0 = = = 3.0 mS RD
VGS(off) 4 V 2.7 kW
Vout
V
C1
g m = g m 0 1 − GS 2N5458
V
GS(off) 0.1 mF
−1.3 V
Vin
= 3.0 mS 1 − 100 mV RG RS C2
470 W 10 mF
−4.0 V
10 MW
2.02 mS
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The Common-Source Amplifier
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The D-MOSFET
ID
ent
em
nc
ha
+VDD
En
Q
RD C2
Vout
n Id
tio
C1 le
ep
D
RL –VGS 0 +VGS
Vin RG
Vgs
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The E-MOSFET
ID
Enhancement
+VDD
Q
RD IDQ
C3
R1 Vout
C1 Id
RL VGS
0 VGS(th)
Vin C2
R2 RS
Vgs
VGSQ
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The E-MOSFET
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The Common-Drain Amplifier
g m Rs
The voltage gain is given by the equation Av =
1 + g m Rs
The voltage gain is always < 1, but the power gain is not.
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The Cascode Amplifier
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The Cascode Amplifier
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The Class-D Amplifier
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The Class-D Amplifier
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The Class-D Amplifier
The signal is the yellow sine wave and is compared repeatedly to the
triangle (cyan). The result of the comparison is the output (magenta).
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The Class-D Amplifier
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The Analog Switch
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