Computer Architecture refers to the design and organization of the various components of a computer

system to ensure that they work together efficiently to execute instructions and perform tasks.

History of Computer Architecture:

Computer have gone through many changes over time. The first generation of computer started around
1940 and since then there have been five generations of computers until 2023. Computers evolved over
a long period of time, starting from the 16th century, and continuously improved themselves in terms of
speed, accuracy, size and price to become the modern day computer.
Overview of Computer Organization:

Computer organization refers to the way a compute’s hardware components are arranged and interact to
execute instructions. It encompasses the design and structure of the computer’s internal architecture
including CPU, Memory, input/output devices and reliable and scalable system that can execute a wide
range of tasks.

The key components include:

1. CPU:
It is regarded as the brain of the computer, the CPU is responsible for executing instructions
stored in memory. It comprises the arithmetic logical unit (ALU) for performing calculations, the
control unit for managing the execution of instructions and register for temporary data storage.
2. Memroy:
Memory is where data and program instructions are sotred for quick access by the CPU.
Computer system typically have two types of memory – volatile RAM (Random Access Memory)
for temporary data storage and non-volatile storage (like hard drives and SSDs) for long-term
data storage.
3. Input/Output Devices:
These includes peripherals like keyboards, mouse, displays and external storage devices. I/O
devices facilitate communication between the computer and the external world.
4. System Bus:
The system bus is a communication pathway that connects the CPU, memory and I/O devices,
allowing them to exchange data and instructions.
5. Storage:
In addition to RAM, computer’s have long-term storage devices like hard drives or SSDs, where
data and applications are stored even when the power is turned off.
6. Cache memory:
 Cache memory is a small, high-speed type of volatile computer memroy that provides high-
speed data access to a processor and stores frequently used computer programs, applications
and data.

Computer organization also considers factors such as data representation, instruction set architecture,
and addreesing modes. Different types of computer organizations, such as Von neumann architecture
and Harvard Architecture, offer varying approaches to organizing memory an processing units.

Memory Hierarcy and Cache

Memroy hierarchy is an enhancement to organize the memory such that it can minimize the access time.
The Memory Hierarchy was developed based on a program behavior known as locality of references.
The memory hierarchy design is divided into 2 main types:

1. External Memory or Secondary Memory:

Comprising of Magnetic Disk, Optical Disk and Magnetic tape i.e. peripheral storage devices
which are accessible by the processor via an I/O Module.

Secondary Storage:
Secondary storage, such as HDD(Hard disk drives and Solid state drives (SSD) is a type of non-
volatile memory unit that has a larger storage capacity than main memory. It is used to store
data and instructions that are not currently in use by the CPU. Secondary storage has the slowest
access time and is typically the least expensive type of memory in the memory hierarchy.

Magnetic Disk:
Magnetic disks are simply circular plates that are fabricated with either a metal or a plastic or a
magnetized material. The Magnetic disks work at a high speed inside the computer and these
are frequently used.

Magnetic Tape:

Magnetic tapes is a simply a magnetic recording device that is covered with a plastic film. It is
generally used for the backup of data. In the case of a magnetic tape, the access time for a computer is a
little slower and therefore, it requires some amount of time for accessing the strip.

2. Internal Memory or Primary Memory

Comprising of Main memory, Cache Memory & CPU registers. This is directly accessible by the
processor.
 1. Registers:
Registers are small, high-speed memory units located in the CPU. They are used to store the
most frequently used data and instructions. Registers have the fastest access time and the
smallest storage capacity, typically ranging from 16 to 64 bits.

Instruction Codes:
Instruction codes are bits that instruct the computer to execute a specific operation. An
instruction comprises groups called fields. These includes:
1. The Operation code(Opcode) field determines the process that needs to perform.
2. The Address Field contains the operands locations i.e. register or memory location.
3. The mode fields specifies how the operand locates.
Structure of Instruction code

Types of Instruction Code:

They are classified based on the number of operands, the type of
operation performed, and the addressing modes used. The following
are some common types of instruction codes:
1. One-operation instruction:
These instructions have one operand and perform an operation on
that operand.
e.g. “neg” instruction in the x86 assembly language
2. Two-operation operand instructions:
These instructions have two operands and perform an operation
involving both.
e.g. “add”

3. Three-operand instructions: These instructions have three

operands and performs an operation that involves all three
operands.
e.g. “fma” (fused multiply-add) instruction in some processor
multiplies two operands together, adds a third operand, and
stores the result in a fourth operand.
4. Data transfer instruction:
These instructions mode data between memory and registers or
between registers.
e.g. “mov”
5. Control transfer instruction
These instructions change the flow of program execution by
modifying the program counter.
e.g. “jmp” – jumps to a different location in the program
6. Arithmetic instruction
These instruction perform mathematical operations on operands.
e.g. “add”
7. Logical instruction
These instruction perform logical operations on operands.
e.g. “and”
8. Comparison instruction
These instructions compare two operands and set a flag based on
the result.
e.g. cmp
9. Floating-point instructions:
These instruction perform arithmetic and other operations on
floating-point numbers.
e.g. fadd

Stored Program Organization

 Common Bus System:
A basic computer has 8 registers, memory unit and a control unit.
The diagram of the common bus system is as shown below:

Connections:
The outputs of all the registers except the OUTR (output register) are connected to the common
bus. The output selected depends upon the binary value of variables S2, S1 and S0. The lines
from common bus are connected to the inputs of the registers and memory. A register receives
the information from the bus when its LD (load) input is activated while in case of memory the
Write input must be enabled to receive the information. The contents of memory are placed
onto the bus when its Read input is activated
Computer Registers
In Computer Architecture, the Registers are very fast computer memory
that is used to execute programs and operations efficiently. This is done
by giving access to commonly used values, i.e., the values that are at the
point of operation/execution at that time. So, for this purpose, there are
several different classes of CPU registers that work in coordination with
the computer memory to run operations efficiently.

There are several types of registers available in the CPU for different
purpose :
• Accumulator: This is the most frequently used register used to
store data taken from memory. It is indifferent numbers in different
microprocessors.

• Memory Address Registers (MAR): It holds the address of the

location to be accessed from memory. MAR and MDR (Memory
 Data Register) together facilitate the communication of the CPU
and the main memory.

• Memory Data Registers (MDR): It contains data to be written into

or to be read out from the addressed location.

• General Purpose Registers: These are numbered as R0, R1, R2….Rn-

1, and used to store temporary data during any ongoing operation.
Its content can be accessed by assembly programming. Modern
CPU architectures tend to use more GPR so that register-to-register
addressing can be used more, which is comparatively faster than
other addressing modes.

• Program Counter (PC): Program Counter (PC) is used to keep the

track of the execution of the program. It contains the memory
address of the next instruction to be fetched. PC points to the
address of the next instruction to be fetched from the main
memory when the previous instruction has been successfully
completed. Program Counter (PC) also functions to count the
number of instructions. The incrementation of PCs depends on the
type of architecture being used. If we are using a 32-bit
architecture, the PC gets incremented by 4 every time to fetch the
next instruction.

• Instruction Register (IR): The IR holds the instruction which is just

about to be executed. The instruction from the PC is fetched and
stored in IR. As soon as the instruction is placed in IR, the CPU starts
executing the instruction, and the PC points to the next instruction
 to be executed.

• Stack Pointer (SP): The stackPCs pointer points to the top of the
stack, which is a part of the memory used to store function calls and
other operations.
• Flag Register: A flag register, also known as a status register or
condition code register, is a special type of register in a computer’s
central processing unit (CPU) used to indicate the status of the CPU
or the outcome of various operations such as Zero Flag, Carry flag,
Sign Flag, Overflow Flag, Parity Flag, Auxiliary Carry Flag, and
Interrupt Enable Flag.
• Condition code register ( CCR ): Condition code registers contain
different flags that indicate the status of any operation. For
instance, let’s suppose an operation caused the creation of a
negative result or zero, then these flags are set high accordingly.
and the flags are
1. Carry C: Set to 1 if an add operation produces a carry or a subtract
operation produces a borrow; otherwise cleared to 0.
2. Overflow V: Useful only during operations on signed integers.
3. Zero Z: Set to 1 if the result is 0, otherwise cleared to 0.
4. Negate N: Meaningful only in signed number operations. Set to 1 if
a negative result is produced.
5. Extend X: Functions as a carry for multiple precision arithmetic
operations.
These are generally decided by ALU.
So, these are the different registers that are operating for a specific
purpose.
Size of CPU Register
The number and size of the register in the CPU depend on the processor
design and can have an important impact on its performance and
capabilities on the CPU. Now, let’s discuss the different sizes of the
register available in the CPU:
• 8-bit registers: These can store 8 bits of data, which is the same as
1 byte. They are used for simple arithmetic and data manipulation.
• 16-bit registers: These hold 16 bits of data, or 2 bytes. These
registers are found in older processors or certain systems that need
16-bit operations.
• 32-bit registers: These can store 32 bits of data or 4 bytes. They are
common in many processors and can handle larger data sizes and
more complex calculations than 8-bit or 16-bit registers.
• 64-bit registers: These hold 64 bits of data, or 8 bytes. Modern
processors often use these, providing more computational power
and better memory-addressing capabilities.
Unit 5 Design of Microprogram control Unit
5.1 Control Word, Microprogram, Control Memory:
Control Word: The control variables at any given time can be represented by a string of 1’s and
0’s called a control word. All Control words can be programmed to perform various operations on
the components of the system.
➔ The control function that specifies a microoperation is called as control variable.
When control variable is in one binary state, the corresponding microoperation is
executed. For the other binary state the state of registers does not change. The
active state of a control variable may be either 1 state or the 0 state, depending
on the application.
For bus-organized systems the control signals that specify microoperations are groups of bits that
select the paths in multiplexers, decoders and arithmetic logic units.

Microprogrammed control Unit:- A control unit whose binary control variables are stored in
memory is called a microprogram control unit. The control word in control memory contains
within it a microinstruction. The microinstruction specifies one or more micro-operation for the
system.
A sequence of microinstructions constitutes a microprogram. The control unit consists of control
memory used to store the microprogram.
The general configuration of a micro-programmed control unit organization is shown as block
diagram below:

Control Memory: The control memory is ROM so all control information is permanently stored.
The control memory address register (CAR) specifies the address of the microinstruction and the
control data register (CDR) holds the microinstruction read from memory.
The next address generator is sometimes called a microprogram sequencer. It is used to generate
the next micro instruction address. The location of the next microinstruction may be the one next
in sequence or it may be located somewhere else in the control memory.
So, it is necessary to use some bits of the present microinstruction to control the generation of
the address of the microinstruction.
Sometimes, the next address may also be a function of external input conditions. The control data
register holds the present microinstruction while next address is computed and read from
memory. The data register is times called a pipeline register. A computer with a
microprogrammed control unit will have two separate memories: a main memory and a control
memory. The microprogram consists of microinstructions that specify various internal control
signals for execution of register microoperations. These microinstructions generate the
microoperations to:
➢ Fetch the instruction from main memory
➢ Evaluate the effective address
➢ Execute the operation
➢ Return control to the fetch phase for the next instruction
Control Address Register:
In a microprocessor, the Control Address Register (CAR) is a component that helps manage and
coordinate various tasks within the processor. It holds the address or location of the next
instruction or data that the processor needs to access or manipulate.
Microprogram Sequencer

The address is used by a microprogram sequencer to decide which microinstruction

has to be performed next. Microprogram sequencing is the name of the total
procedure. The addresses needed to step through a control store’s microprogram
are created by a sequencer, also known as a microsequencer.
The control unit’s main job is to communicate with the computer’s memory,
input/output device, and ALU on how to respond to or carry out a set of
instructions. Processing is not done within the Control unit itself. It only directs and
manages the task. It serves as the computer’s supervisor, regulating all operations
including retrieving instructions from main memory and putting them to use.

Micro Instructions Sequencer

Micro Instructions Sequencer is a combination of all hardware for selecting the next micro-
instruction address. The micro-instruction in control memory contains a set of bits to initiate
micro-operations in computer registers and other bits to specify the method by which the address
is obtained.
Implementation of Micro Instructions Sequencer

• Control Address Register(CAR) : Control address register receives the address from four
different paths. For receiving the addresses from four different paths, Multiplexer is used.
• Multiplexer : Multiplexer is a combinational circuit which contains many data inputs and
single data output depending on control or select inputs.
• Branching : Branching is achieved by specifying the branch address in one of the fields of
the micro instruction. Conditional branching is obtained by using part of the micro-
instruction to select a specific status bit in order to determine its condition.
• Mapping Logic : An external address is transferred into control memory via a mapping
logic circuit.
• Incrementer : Incrementer increments the content of the control address register by one,
to select the next micro-instruction in sequence.
• Subroutine Register (SBR) : The return address for a subroutine is stored in a special
register called Subroutine Register whose value is then used when the micro-program
wishes to return from the subroutine.
 • Control Memory : Control memory is a type of memory which contains addressable
storage registers. Data is temporarily stored in control memory. Control memory can be
accessed quicker than main memory.

RISC vs CISC
Reduced Instruction Set Architecture (RISC)
The main idea behind this is to simplify hardware by using an instruction set composed of a few
basic steps for loading, evaluating, and storing operations just like a load command will load data,
a store command will store the data.
Characteristics of RISC
• Simpler instruction, hence simple instruction decoding.
• Instruction comes undersize of one word.
• Instruction takes a single clock cycle to get executed.
• More general-purpose registers.
• Simple Addressing Modes.
• Fewer Data types.
• A pipeline can be achieved.
Advantages of RISC
• Simpler instructions: RISC processors use a smaller set of simple instructions, which makes
them easier to decode and execute quickly. This results in faster processing times.
• Faster execution: Because RISC processors have a simpler instruction set, they can execute
instructions faster than CISC processors.
• Lower power consumption: RISC processors consume less power than CISC processors,
making them ideal for portable devices.
Disadvantages of RISC
• More instructions required: RISC processors require more instructions to perform
complex tasks than CISC processors.
• Increased memory usage: RISC processors require more memory to store the additional
instructions needed to perform complex tasks.
 • Higher cost: Developing and manufacturing RISC processors can be more expensive than
CISC processors.
Complex Instruction Set Architecture (CISC)
The main idea is that a single instruction will do all loading, evaluating, and storing operations
just like a multiplication command will do stuff like loading data, evaluating, and storing it, hence
it’s complex.
Characteristics of CISC
• Complex instruction, hence complex instruction decoding.
• Instructions are larger than one-word size.
• Instruction may take more than a single clock cycle to get executed.
• Less number of general-purpose registers as operations get performed in memory itself.
• Complex Addressing Modes.
• More Data types.
Advantages of CISC
• Reduced code size: CISC processors use complex instructions that can perform multiple
operations, reducing the amount of code needed to perform a task.
• More memory efficient: Because CISC instructions are more complex, they require fewer
instructions to perform complex tasks, which can result in more memory-efficient code.
• Widely used: CISC processors have been in use for a longer time than RISC processors, so
they have a larger user base and more available software.

Disadvantages of CISC
• Slower execution: CISC processors take longer to execute instructions because they have
more complex instructions and need more time to decode them.
• More complex design: CISC processors have more complex instruction sets, which makes
them more difficult to design and manufacture.
• Higher power consumption: CISC processors consume more power than RISC processors
because of their more complex instruction sets.
CPU Performance
Both approaches try to increase the CPU performance
• RISC: Reduce the cycles per instruction at the cost of the number of instructions per
program.

CPU Time
• CISC: The CISC approach attempts to minimize the number of instructions per program
but at the cost of an increase in the number of cycles per instruction.
Earlier when programming was done using assembly language, a need was felt to make
instruction do more tasks because programming in assembly was tedious and error-prone due to
which CISC architecture evolved but with the uprise of high-level language dependency on
assembly reduced RISC architecture prevailed.
Example:
Suppose we have to add two 8-bit numbers:
• CISC approach: There will be a single command or instruction for this like ADD which will
perform the task.
 • RISC approach: Here programmer will write the first load command to load data in
registers then it will use a suitable operator and then it will store the result in the desired
location.
So, add operation is divided into parts i.e. load, operate, store due to which RISC programs are
longer and require more memory to get stored but require fewer transistors due to less complex
command.

Basis for comparison RISC CISC

Emphasis on Software Hardware

Includes Single clock Multi-clock

Instruction-set size Small Large

Instruction formats fixed (32-bit) format Varying formats (16-64 bits each
instruction).

Addressing modes used Limited to 3-5 12-24

General purpose 32-192 8-24

registers used

Memory inferences Register to register Memory to memory

Cache design Split data cache and instruction cache. Unified cache for instructions and
data.

Clock rate 50-150 MHz 33-50 MHz

Cycles Per Instruction Single cycle for all instructions and an CPI between 2 and 15.
average CPI < 1.5.

CPU Control Hardwired without control memory. Microcoded using control

memory (ROM).
PIPELINE AND VECTOR PROCESSING: