PSMN2R6-80YSF

PSMN2R6-80YSF
NextPower 80 V, 2.4 mOhm, 231 A, N-channel MOSFET in

LFPAK56E package
29 April 2024 Product data sheet
1. General description
NextPower 80 V, standard level gate drive MOSFET. Qualified to 175 °C and recommended for
industrial and consumer applications.
2. Features and benefits

• Low Qrr for higher efficiency and lower spiking
• 231 A ID(max) – demonstrated continuous current rating
• Low QG × RDSon FOM for high efficiency switching applications
• Strong avalanche energy rating (Eas)
• Avalanche rated and 100% tested
• Ha-free and RoHS compliant LFPAK56E package
3. Applications
• Synchronous rectifier in AC-DC and DC-DC
• Primary side switch in DC-DC
• BLDC motor control
• USB-PD adapters
• Full-bridge and half-bridge applications
• Flyback and resonant topologies
4. Quick reference data

Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VDS drain-source voltage 25 °C ≤ Tj ≤ 175 °C - - 80 V
ID drain current VGS = 10 V; Tmb = 25 °C; Fig. 2 - - 231 A
Ptot total power dissipation Tmb = 25 °C; Fig. 1 - - 294 W
Tj junction temperature -55 - 175 °C
Static characteristics
RDSon drain-source on-state VGS = 10 V; ID = 25 A; Tj = 25 °C; - 1.9 2.4 mΩ
resistance Fig. 12
VGS = 10 V; ID = 25 A; Tj = 105 °C; - 3.1 4.3 mΩ
Fig. 13
Dynamic characteristics
QGD gate-drain charge ID = 25 A; VDS = 40 V; VGS = 10 V; 5.8 16.5 38 nC
QG(tot) total gate charge Fig. 14; Fig. 15 42.5 85 127 nC
Avalanche ruggedness
EDS(AL)S non-repetitive drain- ID = 58 A; Vsup ≤ 80 V; RGS = 50 Ω; [1] - - 383 mJ
source avalanche VGS = 10 V; Tj(init) = 25 °C; unclamped;
energy tp = 127 µs; Fig. 4
Nexperia PSMN2R6-80YSF
NextPower 80 V, 2.4 mOhm, 231 A, N-channel MOSFET in LFPAK56E package

Source-drain diode
Qr recovered charge IS = 25 A; dIS/dt = -100 A/µs; VGS = 0 V; - 33 - nC
VDS = 40 V; Fig. 18
[1] Protected by 100% test
5. Pinning information
Table 2. Pinning information
Pin Symbol Description Simplified outline Graphic symbol
1 S source
2 S source
3 S source D
4 G gate
mb D mounting base; connected G
to drain
mbb076 S
1 2 3 4
LFPAK56E; Power-
SO8 (SOT1023)
6. Ordering information
Table 3. Ordering information
Type number Package
Name Description Version
PSMN2R6-80YSF LFPAK56E; plastic, single-ended surface-mounted package SOT1023
Power-SO8 (LFPAK56E); 4 leads; 1.27 mm pitch
7. Marking
Table 4. Marking codes
Type number Marking code
PSMN2R6-80YSF 2F6S80Y
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).Tj = 25 °C unless otherwise stated.
Symbol Parameter Conditions Min Max Unit
VDS drain-source voltage 25 °C ≤ Tj ≤ 175 °C - 80 V
VDGR drain-gate voltage 25 °C ≤ Tj ≤ 175 °C; RGS = 20 kΩ - 80 V
VGS gate-source voltage -20 20 V
Ptot total power dissipation Tmb = 25 °C; Fig. 1 - 294 W
ID drain current VGS = 10 V; Tmb = 25 °C; Fig. 2 - 231 A
VGS = 10 V; Tmb = 100 °C; Fig. 2 - 163 A
IDM peak drain current pulsed; tp ≤ 10 µs; Tmb = 25 °C; Fig. 3 - 923 A
Tstg storage temperature -55 175 °C
PSMN2R6-80YSF All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2024. All rights reserved
Product data sheet 29 April 2024 2 / 12

Symbol Parameter Conditions Min Max Unit

Tj junction temperature -55 175 °C
Tsld(M) peak soldering - 260 °C
temperature
Source-drain diode
IS source current Tmb = 25 °C - 231 A
ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C - 923 A
Avalanche ruggedness
EDS(AL)S non-repetitive drain- ID = 58 A; Vsup ≤ 80 V; RGS = 50 Ω; [1] - 383 mJ
source avalanche energy VGS = 10 V; Tj(init) = 25 °C; unclamped;
tp = 127 µs; Fig. 4
IAS non-repetitive avalanche Vsup = 80 V; VGS = 10 V; Tj(init) = 25 °C; [1] - 58 A
current RGS = 50 Ω
[1] Protected by 100% test
03aa16 aaa-038784
120 250
ID
(A)
Pder
(%) 200
80
150
100
40
50
0 0
0 50 100 150 200 0 25 50 75 100 125 150 175 200
Tmb (°C) Tmb (°C)
VGS ≥ 10 V
Fig. 2. Continuous drain current as a function of
Fig. 1. Normalized total power dissipation as a mounting base temperature
function of mounting base temperature
aaa-038786
104
ID
(A)
103
Limit RDSon = VDS / ID
tp = 10 µs
102
DC 100 µs
10
1 1 ms
10 ms
100 ms
10-1
10-1 1 10 102
VDS (V)
Tmb = 25 °C; IDM is a single pulse

Fig. 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage

aaa-038783
102
IAL
(A)
(1)
10
(2)
1 (3)
10-1
10-3 10-2 10-1 1 10
tAL (ms)
(1) Tj (init) = 25 °C; (2) Tj (init) = 150 °C; (3) Repetitive Avalanche
Fig. 4. Avalanche rating; avalanche current as a function of avalanche time
9. Thermal characteristics
Table 6. Thermal characteristics
Rth(j-mb) thermal resistance from Fig. 5 - 0.45 0.51 K/W
junction to mounting
base
Rth(j-a) thermal resistance from Fig. 6 - 42 - K/W
junction to ambient Fig. 7 - 85 - K/W
aaa-033255
1
Zth(j-mb)
(K/W)
δ = 0.5
10-1 0.2
0.1
0.05
0.02 tp
10-2 single shot P δ=
T
tp t
T
10-3
10-6 10-5 10-4 10-3 10-2 10-1 1
tp (s)
Fig. 5. Transient thermal impedance from junction to mounting base as a function of pulse duration

aaa-027933 aaa-027935
Copper area 25.4 mm square; 70 µm thick on FR4 70 µm thick copper on FR4 board
board
Fig. 7. PCB layout with minimum footprint for thermal
Fig. 6. PCB layout for thermal resistance from junction resistance from junction to ambient
to ambient
10. Characteristics
Table 7. Characteristics
Tj = 25 °C unless otherwise stated.
Static characteristics
V(BR)DSS drain-source ID = 250 µA; VGS = 0 V; Tj = 25 °C 80 87 - V
breakdown voltage ID = 250 µA; VGS = 0 V; Tj = -55 °C 72 84 - V
VGS(th) gate-source threshold ID = 1 mA; VDS=VGS; Tj = 25 °C; Fig. 11 2 3 4 V
voltage ID = 1 mA; VDS=VGS; Tj = 175 °C - 1.9 - V
ID = 1 mA; VDS=VGS; Tj = -55 °C - 3.3 - V
ΔVGS(th)/ΔT gate-source threshold 25 °C ≤ Tj ≤ 150 °C - -7 - mV/K
voltage variation with
temperature
IDSS drain leakage current VDS = 80 V; VGS = 0 V; Tj = 25 °C - 0.003 1 µA
VDS = 80 V; VGS = 0 V; Tj = 125 °C - 3 100 µA
IGSS gate leakage current VGS = 20 V; VDS = 0 V; Tj = 25 °C - 2 100 nA
VGS = -20 V; VDS = 0 V; Tj = 25 °C - 2 100 nA
RDSon drain-source on-state VGS = 10 V; ID = 25 A; Tj = 25 °C; - 1.9 2.4 mΩ
resistance Fig. 12
VGS = 10 V; ID = 25 A; Tj = 105 °C; - 3.1 4.3 mΩ
Fig. 13
VGS = 10 V; ID = 25 A; Tj = 175 °C; - 4.4 5.5 mΩ
Fig. 13
RG gate resistance f = 1 MHz; Tj = 25 °C 0.4 0.8 1.6 Ω
Dynamic characteristics
QG(tot) total gate charge ID = 25 A; VDS = 40 V; VGS = 10 V; 42.5 85 127 nC
Fig. 14; Fig. 15
ID = 0 A; VDS = 0 V; VGS = 10 V - 74 - nC


QGS gate-source charge ID = 25 A; VDS = 40 V; VGS = 10 V; 8.8 22 35 nC
QGS(th) pre-threshold gate- Fig. 14; Fig. 15 - 16 - nC
source charge
QGS(th-pl) post-threshold gate- - 6 - nC
source charge
QGD gate-drain charge 5.8 16.5 38 nC
VGS(pl) gate-source plateau ID = 25 A; VDS = 40 V; Fig. 14; Fig. 15 - 4 - V
voltage
Ciss input capacitance VDS = 40 V; VGS = 0 V; f = 1 MHz; 3510 5850 8191 pF
Coss output capacitance Fig. 16 554 1385 2493 pF
Crss reverse transfer 4 44 102 pF
capacitance
td(on) turn-on delay time VDS = 40 V; RL = 1.6 Ω; VGS = 10 V; - 19 - ns
tr rise time RG(ext) = 5 Ω - 18 - ns
td(off) turn-off delay time - 53 - ns
tf fall time - 29 - ns
Source-drain diode
VSD source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C; Fig. 17 - 0.79 1 V
trr reverse recovery time IS = 25 A; dIS/dt = -100 A/µs; VGS = 0 V; - 38 - ns
Qr recovered charge VDS = 40 V; Fig. 18 - 33 - nC
aaa-038787 aaa-038788
400 10
ID 10 V 6V RDSon
(A) (mΩ)
8
300
VGS = 5.5 V
200
5V
4
100 4.5 V
2
4V
0 0
0 1 2 3 4 0 4 8 12 16 20
VDS (V) VGS (V)
Tj = 25 °C Tj = 25 °C; ID = 25 A
Fig. 8. Output characteristics; drain current as a Fig. 9. Drain-source on-state resistance as a function
function of drain-source voltage; typical values of gate-source voltage; typical values

aaa-039045 aaa-037197
400 10-1
ID ID
(A) (A)
10-2
300
Min Typ Max

10-3
200
175°C
10-4
Tj = 25°C
100
10-5
0 10-6
0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6
VGS (V) VGS (V)
VDS = 8 V Tj = 25 °C; VDS = 5 V

Fig. 10. Transfer characteristics; drain current as a Fig. 11. Sub-threshold drain current as a function of
function of gate-source voltage; typical values gate-source voltage
aaa-038795 aaa-029656
10 2.5
RDSon 4.5 V 5V 5.5 V 6V a
(mΩ)
8 2
6 1.5
4 1
2 0.5
VGS = 10 V
0 0
0 50 100 150 200 250 300 350 400 -60 -30 0 30 60 90 120 150 180
ID (A) Tj (°C)
Tj = 25 °C
Fig. 12. Drain-source on-state resistance as a function
of drain current; typical values Fig. 13. Normalized drain-source on-state resistance
factor as a function of junction temperature

aaa-038796
10
VGS
VDS
(V)
8
ID
VDS = 14 V
6
VGS(pl)
40 V
4
VGS(th)
VGS
2
Q GS2
QGS1
0
0 20 40 60 80 100 Q GS QGD
QG (nC)
QG(tot)
Tj = 25 °C; ID = 25 A 003aaa508
Fig. 14. Gate-source voltage as a function of gate Fig. 15. Gate charge waveform definitions
charge; typical values
aaa-038797 aaa-039079
104 400
C IS
(pF) Ciss (A)
300
103
Coss
200
102
100
Tj = 175°C 25°C
Crss
10 0
10-1 1 10 102 0 0.2 0.4 0.6 0.8 1 1.2
VDS (V) VSD (V)
VGS = 0 V; f = 1 MHz VGS = 0 V

Fig. 16. Input, output and reverse transfer capacitances Fig. 17. Source-drain (diode forward) current as a
as a function of drain-source voltage; typical function of source-drain (diode forward)
values voltage; typical values
003aal160
ID
(A)
trr
ta tb
0
0.25 IRM
IRM
t (s)
Fig. 18. Reverse recovery timing definition

11. Package outline

Plastic single-ended surface-mounted package (LFPAK56E); 4 leads SOT1023
E A A E1
b2
b1 c1
(3x)
mounting
base D1
D
H
1 2 3 4 X
e b w A c
A1 C
Lp y C
detail X
0 2.5 5 mm
Dimensions scale
Unit A A1 b b1 b2 c c1 D(1) D1(1) E(1) E1(1) e H L Lp w y θ
max 1.10 0.15 0.50 4.41 0.25 0.30 4.70 4.45 5.30 3.7 6.2 1.3 0.85 8°
mm nom 0.85 1.27 0.25 0.1
min 0.95 0.00 0.35 3.62 0.19 0.24 4.45 4.95 3.5 5.9 0.8 0.40 0°
Note
1. Plastic or metal protrusions of 0.15 mm per side are not included. sot1023_po
Outline References European

Issue date
version IEC JEDEC JEITA projection
13-03-05
SOT1023
17-07-31
Fig. 19. Package outline LFPAK56E; Power-SO8 (SOT1023)

12. Soldering
4.7
4.2
0.9 0.6
(3×) (4×)
0.25 0.25
(2×) (2×)
3.45 3.5
0.6 2.55
(3×) 2
0.25
(2×)
SR opening =
1.1
Cu + 0.075
2.15
3.3
SP opening =
Cu - 0.050
0.7
1.27
(4×)
3.81
solder paste
solder lands
125 µm stencil
solder resist occupied area sot1023_fr
Fig. 20. Reflow soldering footprint for LFPAK56E; Power-SO8 (SOT1023)

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Quick reference data — The Quick reference data is an extract of the
Data sheet status product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
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data sheet the objective specification for without further testing or modification.
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and products using Nexperia products, and Nexperia accepts no liability for
Preliminary [short] Qualification This document contains data from
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Draft — The document is a draft version only. The content is still under the Absolute Maximum Ratings System of IEC 60134) will cause permanent
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Contents
1. General description...................................................... 1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Quick reference data....................................................1
5. Pinning information......................................................2
6. Ordering information....................................................2
7. Marking.......................................................................... 2
8. Limiting values............................................................. 2
9. Thermal characteristics............................................... 4
10. Characteristics............................................................ 5
11. Package outline.......................................................... 9
12. Soldering................................................................... 10
13. Legal information......................................................11
© Nexperia B.V. 2024. All rights reserved

For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 29 April 2024

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NextPower 80 V, 2.4 mOhm, 231 A, N-channel MOSFET in

2. Features and benefits

4. Quick reference data

Symbol Parameter Conditions Min Typ Max Unit

[1] Protected by 100% test

Product data sheet 29 April 2024 2 / 12

Symbol Parameter Conditions Min Max Unit

[1] Protected by 100% test

Tmb = 25 °C; IDM is a single pulse

Product data sheet 29 April 2024 3 / 12

Product data sheet 29 April 2024 4 / 12

Product data sheet 29 April 2024 5 / 12

Symbol Parameter Conditions Min Typ Max Unit

Product data sheet 29 April 2024 6 / 12

Min Typ Max

VDS = 8 V Tj = 25 °C; VDS = 5 V

Product data sheet 29 April 2024 7 / 12

VGS = 0 V; f = 1 MHz VGS = 0 V

Fig. 18. Reverse recovery timing definition

Product data sheet 29 April 2024 8 / 12

11. Package outline

Unit A A1 b b1 b2 c c1 D(1) D1(1) E(1) E1(1) e H L Lp w y θ

Outline References European

Fig. 19. Package outline LFPAK56E; Power-SO8 (SOT1023)

Product data sheet 29 April 2024 9 / 12

solder resist occupied area sot1023_fr

Fig. 20. Reflow soldering footprint for LFPAK56E; Power-SO8 (SOT1023)

Product data sheet 29 April 2024 10 / 12

Product data sheet 29 April 2024 11 / 12

© Nexperia B.V. 2024. All rights reserved

Product data sheet 29 April 2024 12 / 12

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