Palestine Technical College

Engineering Professions Department

EEE14356 - Digital Logic Fundamentals

Experiment 3

Simplification of Boolean Functions

Student No Name Surname Group Lecturer Grade

2022-2023
EEE14356 Digital Logic Fundamentals Lab

Objectives:
1. To demonstrate the relationship between a Boolean function and its corresponding logic
diagram.
2. Simplify the Boolean function using Karnaugh map (K-map).
3. How to demonstrate and verify the complement of the Boolean function.
4. Apply the simplification procedures to reduce the number of gates and number of ICs.
Note: Verify the IC's numbers and validity before using it in any circuit.

Equipment and materials:

o Digital trainer M21-5000
o Integrated circuits (ICs)
o 7400 Quadruple 2-input NAND gates
o 7402 Quadruple 2-input NOR gates
o 7408 Quadruple 2-input AND gates
o 7410 Triple 3-input NAND gates
o 7411 Triple 3-input AND gates
o 7427 Triple 3-input NOR gates
o 7432 Quadruple 2-input OR gates
o 4075 Triple 3-input OR gates

Introduction:
A K-map provides a systematic method for simplifying Boolean expressions to their minimum
form. If applied correctly, it will yield the minimum expression, which is the simplest sum-of-
products (SOP) or product-of-sums (POS) expression. A K-map is similar to a truth table because it
presents all possible values of the input variables and the resulting output for each value. Instead of
being organized into columns and rows like a truth table, the K-map is an array of cells in which
each cell represents a binary value of the input variables. It can be used for expressions with 2, 3, 4,
and 5-variables. To illustrate the principle of K-map, this lab discusses only 3 and 4-variable
situations.
A product term is defined as a term consisting of product literals (Boolean multiplication). When
two or more product terms are summed up by Boolean addition, the result is a SOP expression.
This is an AND-OR network because the input AND gates drive an output OR gate. Some examples are:
=
F1 ( A, B, C ) AB + ABC
F2 ( A, B, C ) =A ' B + A ' BC '+ AC
F3 ( A, B, C , D) = ABC + CD + B ' CD '
A sum term is defined as a term consisting of sum literals (Boolean addition). When two or more
sum terms are multiplied by Boolean multiplication, the result is a POS expression. This is an OR-
AND network because the input OR gates drive an output AND gate. Some examples are:
F1 ( A, B, C ) = ( A '+ B)( A + B '+ C )
F2 ( A, B, C ) = ( A + B)( A + B '+ C )( A '+ C )
F3 ( A, B, C , D) = ( A '+ B '+ C ')(C + D ')( B '+ C + D)
7408 7432
1 9
A 3 7432 A 8 7408
B B 4
2 9 10 6 Y
8 Y
4 10 12 5
C C
D 6 D 11
5 13
Y8 = Y3 + Y6 = AB + CD Y6 =Y8 + Y11 =( A + B)(C + D)

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EEE14356 Digital Logic Fundamentals Lab

Part A – Logic Diagram

Given the following logic diagram in figure 3.1.
1. Assign pin numbers using datasheet to all inputs and output of the gates.
2. Wire the circuit and connect the inputs x, y, & z to switches SW3, SW2, & SW1, respectively.
3. Observe the output states with the LED indicator.
4. Implement the circuit and record the output states of each input in table 3.1.
x Table 3.1
Inputs Output
x y z F
0 0 0
y F 0 0 1
0 1 0
0 1 1
z 1 0 0
1 0 1
1 1 0
Figure 3.1 1 1 1
5. Obtain the Boolean function of the above logic circuit: ----------------------------------------------
6. How many numbers of ICs are required to implement the above logic diagram? ----------------
7. Simplify the above Boolean function using K-map and implement the simplified function?
K-map Truth Table 3.2
Inputs Output
x y z F
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
Simplified logic diagram using NAND gates: 1 1 1
-------------------------------------------------------------------------
-------------------------------------------------------------------------
Simplified logic diagram using NAND gates: Show all input switches, pin numbers, & output.

Figure 3.2

8. How many numbers of ICs are required to implement the simplified Boolean function? --------
9. Summarize your results and discuss any issues you encountered during circuit building or
testing.
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EEE14356 Digital Logic Fundamentals Lab

Part B – Boolean expression

Given the following Boolean expression:
F ( A, B, C , D) = A ' B ' CD '+ A ' BCD '+ ABCD '+ AB ' CD '+ AB ' C ' D '+ AB ' C ' D + AB ' CD
1. Simplify the given Boolean expression using K-map and draw the simplified logic diagram.
2. Implement the simplified logic diagram. Show all input switches, pin numbers, and output led.
3. Implement the simplified logic diagram and record the output states of each input in table 3.3.

K-map Truth Table 3.3

Inputs Output
A B C D F
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
Simplified Boolean expression: 1 1 0 1
1 1 1 0
1 1 1 1
Simplified logic diagram

Figure 3.3

4. How many numbers of ICs are required to implement the simplified Boolean function?
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5. Summarize your results and discuss any issues you encountered during circuit building or
testing.
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EEE14356 Digital Logic Fundamentals Lab

Part C – Sum-of-products (SOP)

Given the following Boolean function:
F ( A, B, C , D) = ∑ ( 0, 1, 4, 5, 8, 9, 10, 12, 13)
1. Simplify the Boolean function using K-maps to SOP form.
2. Obtain the simplified logic diagram and check its operation.
K-map Simplified logic diagram

Simplified Boolean expression:

Figure 3.4 a
3. How many numbers of ICs are required to implement the above logic diagram?
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4. Simplify the Boolean logic function to a minimum number of NAND gates and redraw the new
logic diagram. (Show input switches, output led and all pin numbers).
5. Implement the Boolean function in part 4 and record the output states in table 3.4.

Function simplifications: Table 3.4

Inputs Output
------------------------------------------------------------------
A B C D F
------------------------------------------------------------------ 0 0 0 0
------------------------------------------------------------------ 0 0 0 1
----------------------------------------------------------------- 0 0 1 0
0 0 1 1
Simplified logic diagram using NAND gates
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
Figure 3.4 b

6. Summarize your results and discuss any issues you encountered during circuit building or
testing.
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EEE14356 Digital Logic Fundamentals Lab

Part D – Product-of-sums (POS)

Given the following Boolean function:
F ( A, B, C , D) = ∑ ( 3, 5, 7, 8, 10, 11, 13, 15 )
1. Simplify the Boolean function using K-maps to POS form.
2. Obtain the simplified logic diagram and check its operation.
K-map Simplified logic diagram

Simplified Boolean expression:

Figure 3.5 a
3. How many numbers of ICs are required to implement the above logic diagram?
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4. Simplify the Boolean logic function to a minimum number of NOR gates and redraw the new
logic diagram. (Show input switches, output led and all pin numbers).
5. Implement the Boolean function in part 4 and record the output states in table 3.5.

Function simplifications: Table 3.5

Inputs Output
------------------------------------------------------------------
A B C D F
------------------------------------------------------------------ 0 0 0 0
------------------------------------------------------------------ 0 0 0 1
----------------------------------------------------------------- 0 0 1 0
0 0 1 1
Simplified logic diagram using NOR gates
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
Figure 3.5 b

6. Summarize your results and discuss any issues you encountered during circuit building or
testing.
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EEE14356 Digital Logic Fundamentals Lab

Part E – Complement
Given the following Boolean expression:
BD + B ' C + AB ' D
F ( A, B, C , D) = A ' D +   
1. Plot the Boolean function in a K-map:
K-map:

2. Simplify the Boolean function for F to SOP from using the combinations of the 1's.
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3. Simplify the Boolean function for F' to POS from using the combinations of the 0's.
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4. Implement both F and F' using NAND gates and connect the two circuits to the same input
switches, but with separate output LED indicator (figure 3.6). Record the output states of each
circuit in table 3.6.
Logic diagram Table 3.6
Inputs Output
A B C D F F’
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
Figure 3.6
1 1 1 1
5. Summarize your results and discuss any issues you encountered during circuit building or
testing.
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EEE14356 Digital Logic Fundamentals Lab

Questions:
1. Simplify the Boolean expression F = w ' xy '+ wxy '+ xy ' z to a minimum number of literals using
Boolean identities and theorems.
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2. Given the following Boolean expressions:
F1 ( A, B, C ) =AB ( A '+ BC ) ', F1 ( A, B, C ) =ABC '
Prove that F1 = F2. Use Boolean identities and the DeMorgan’s theorem.
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3. Given the following two Boolean functions:
F1 ( A, B, C , D) = ∑ ( 0, 1, 4, 5, 8, 9, 10, 12, 13)
F2 ( A, B, C , D) = ∑ ( 3, 5, 7, 8, 10, 11, 13, 15 )
a. Simplify the two Boolean functions by means of K-maps and draw the simplified logic
diagrams.
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b. Draw the two functions F1 and F2 together by using minimum number of NAND gates.
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EEE14356 Digital Logic Fundamentals Lab

Pin Configuration:

7400 NAND gate 7402 NOR gate

7408 AND gate 7410 three-input NAND gate

7411 three-input AND gate 7427 three-input NOR gate

7432 OR gate 4075 three-input OR gate

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