Course: Communication Theory-2

Course Code:(19EC6PCCT2)

Unit 2:Digital Modulation/Demodulation

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 Binary Digital Modulation Techniques
 In digital communications, hypotheses are the possible messages and observations are the output of a
channel

 Based on the observed values of the channel output, we are interested in the best decision making rule
in the sense of minimizing the probability of error.

 Modulation is defined as the process by which some characteristics(amplitude, frequency, phase) of a

carrier is varied in accordance with a modulating wave.
 In digital communications, the modulating wave consists of binary data or an M-ary encoded version of it
and the carrier is sinusoidal wave.

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 Binary Digital Modulation Techniques
 Different Shift keying methods that are used in digital modulation/digital bandpass modulation
techniques are
Amplitude Shift Keying [ASK]
Finite number of amplitude levels is used for modulation

Frequency Shift Keying [FSK]

Finite number of amplitude levels is used for modulation

Phase Shift Keying [PSK]

Finite number of amplitude levels is used for modulation
#Keying refers to switching (digital data has discrete levels rather than continuous)

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 Mathematical Expression
Consider the digital baseband signal(modulating signal) is represented by unipolar NRZ(L)line code i.e.,
Vm(t)=1 for binary symbol ‘1’ and Vm(t)=0 for binary symbol ‘0’ for the entire bit duration ‘Tb’ in the form of On-off
signal.

Let the carrier signal is represented by Sin(2πfct) where fc is its frequency in Hz.

As per the definition of ASK, we can write the ASK modulated signal as
VASK(t) =Vm(t) Sin(2πfct)

Modulated binary ASK signal can be expressed as :

VASK(t) =Sin(2πfct) for binary ‘1’
=0 for binary ‘0’

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 ASK Signal Waveform

Binary Data Sequence 1010101

NRZ Level Encoder Product Modulator Bandpass Filter

Carrier Signal Sin(2πfct)

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 ASK Coherent Demodulation

Balanced Binary Data Sequence 1010101

Modulator and Decision Device
Received Binary ASK Signal Integrator

Carrier Signal Sin(2πfct)

The process of modulation is almost identical to modulation i.e., multiplication of the incoming modulated
signal by identical carrier signal as used at the modulator followed by an integrator (LPF) and a decision
device to determine the transmitted data.

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 ASK Demodulation

 The carrier should be synchronous in frequency and phase to the carrier at the transmitter, such
demodulators are called synchronous or coherent detectors(demodulators).

 Phase Synchronization ensures that the carrier signal generated locally in a coherent ASK demodulator
locked in phase with respect to the one that is used in ASK modulator.

 Timing Synchronization enables proper timing of the decision making operation in the ASK demodulator
with respect to the switching instants that is switching between 1 and 0 as in the original binary data.

 The coherent detector requires more elaborate equipment. It has superior performance especially when
the SNR is low.

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 ASK Demodulation

 The integrator operates on the output of the balanced modulator for successive bit intervals Tb and
essentially perform a low pass filtering action.

 Its output is applied to a decision making device which compares it with a preset threshold level.

 It makes a decision in favour of the symbol ‘1’ when the threshold level is exceeded, otherwise 0.

 In Coherent ASK detector, the local carrier signal is in perfect synchronization with the corresponding
carrier signal as used in ASK modulator on transmitter side.

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 ASK Non Coherent Detector

Binary Data Sequence 1010101

Envelop Detector
Bandpass Filter Decision Device
(Rectifier+LPF)
Received Binary ASK Signal

Preset Threshold
 Here the Knowledge of carrier signal’s phase is not required.
 Non coherent binary ASK detector does not require a phase coherent local Oscillator.
 It involves rectification and low pass filtering as part of the envelop detector.
 The output is followed by switching operation at bit period Tb
 The signal is passed through a decision making device with preset threshold which determines whether the received symbol is 1 or 0.
 The design of non coherent binary ASK detector is simple but the error performance is poor as compared to that offered by
coherent binary ASK detector.
 For higher SNR the non coherent detector performs almost as well as the coherent detector.
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 Frequency Shift Keying
 Frequency-Shift Keying (FSK) is a frequency modulation scheme in which digital information is
transmitted through discrete frequency changes of a carrier signal(fc).

 The technology is used for communication systems such as telemetry, weather balloon radiosondes
, caller ID, garage door openers, and low frequency radio transmission in the VLF and ELF bands.

 The simplest FSK is Binary FSK (BFSK).

 BFSK uses a pair of discrete frequencies to transmit binary (0s and 1s) information.

 With this scheme, the 1 is called the mark frequency and the 0 is called the space frequency.

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 Frequency Shift Keying

 FSK signal is a superposition of two ASK signals with different carrier frequencies but same amplitudes

 Binary FSK can be expressed as VFSK(t) = Sin(2πfc0t) for binary 0

= Sin(2πfc1t) for binary 1

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 Frequency Shift Keying
 When the input binary data changes from a binary logic 1 to logic 0 and vice versa, the BFSK output
signal frequency shifts from (fc1 to fc0) and vice versa(fc1 > fc0)
 It can be seen that when the input data changes from logic 1 to logic 0 or vice versa, there is abrupt
phase discontinuity in the analog binary FSK signal.
 Continuous phase frequency shift keying is a binary FSK except that two frequencies fc1 and fc0 are
separate from the center frequency fc by an exact multiple of one half the bit rate fb .
 This ensures a smooth phase transition in the BFSK signal when it changes from fc1 to fc0 or vice versa.
 The Minimum bandwidth for binary FSK signal is given as BBFSK= 𝑓𝑐1 + 𝑓𝑏 − 𝑓𝑐0 − 𝑓𝑏
BBFSK== (𝑓𝑐1 −𝑓𝑐0 ) + 2𝑓𝑏

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 FSK Modulator
Balanced
Modulator M0

Binary Data Sequence Polar NRZ Line Adder

fc0 BFSK Signal
coder
10110101

Bit Balanced
Invertor Modulator M1

fc1
 The input binary data is passed through a polar NRZ line coder.
 Its output is applied to two independent balanced modulator M0 and M1, the other input to balanced modulator M0 and M1 are carrier oscillator signal
at fco and fc1 respectively.
 It may be noted here that the frequencies fco and fc1 are typically offset frequencies from the carrier frequency fc by equal but opposite valves.
 The output of balanced modulator are added together in a linear adder circuit.
 The resultant binary FSK signal will either have a frequency signal fco or fc1 .

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 Coherent Binary FSK Detection
Correlator 1
𝑇𝑏
Balanced
Modulator M0 𝑑𝑡
0 +
Decision
fc0 Subtractor Device Detected
BFSK Signal - Output 10110101
𝑇𝑏 Preset Threshold level
Balanced 𝑑𝑡
Modulator M1 0

Correlator 2
fc1

 The received BFSK signal is applied to two correlators 1 and 2 each of which comprises of a balanced modulator followed by an integrator (LPF)
 The output of the two correlator are then subtracted which is then applied to a decision device (comparator) .
 The decision device compares the input signal with a preset threshold level usually zero volts.
 If its input signal level is greater than 0 the detected output is binary symbol 1, If its input signal level is lesser than 0 the detected output is binary symbol 0.
 Since the two transmitted frequencies are not generally continuous it is not practical to reproduce a local reference that is coherent with both of them.
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 Non Coherent Binary FSK Detection
Sampling
Envelop
BPF(fc0) Switch 1
Detector (at t=Tb)
BFSK Signal Detected Output
Comparator

Sampling
Envelop
BPF(fc1) Switch 2
Detector (at t=Tb)

 The received BFSK is applied to two BPF tuned at fco and fc1, respectively.
 The filtered signals are then applied to its corresponding envelope detection.
 The outputs of the two envelope detectors are sampled at t=Tb where Tb is the pulse width, and compared separately.
 The comparator responds to the larger of the two signal inputs and detected output is produced.
 If binary 0 is transmitted by a pulse of frequency fc0 then this pulse will appear at the output of the filter tuned at fco.
 At that instance practically no signal appears at the output of the filter tuned at f c1.
 Hence the sample of the envelop detector output following the filter tuned at f c0 greater than the sample of the envelop detector output following the
filter tuned at fc1..Therefore the output of the comparator will be the binary symbol 0.
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 FSK Detection Using PLL

FSK Signal Input DC

Phase Comparator Amplifier
Detected Output

Voltage Controlled DC Error Voltage

Oscillator

 The incoming FSK signal is applied to the PLL circuit, the natural frequency of the PLL is made equal to the center frequency of the FSK modulator
 As the input signal shifts between two frequencies fco and fc1, the phase comparator gets locked to the input frequency.
 A corresponding dc signal is produced which is used as the dc error voltage to correct the output of Voltage controlled Oscillator
 Thus the VCO tracks the input frequency between two frequencies fco and fc1
 In fact the changes in the dc error voltage follow the changes in the input FSK signal frequency and are symmetrical around 0v
 Because there are only two frequencies fco and fc1 corresponding to binary symbol 0 and 1, the output is also a two level binary representation of
the incoming PSK signal.

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 Application

 Binary FSK has comparatively poorer error performance than PSK or QAM and consequently seldom used
for high performance digital radio systems.

 It is generally used in low performance, low cost , asynchronous low speed data modems (up to 1200bps)
over analog voice band telephone lines.

 It also finds application in pager systems, HF radio tele type transmission systems and local area networks
using coaxial cable

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 Phase Shift Keying
 Phase shift Keying is a form of digital modulation technique in which the phase angle of the analog sinusoidal carrier
signal fc is varied to represent the input digital data . However the amplitude and frequency of the modulated signal
remains constant.

 In binary phase shift keying, the phase of the sinusoidal carrier signal is changed by 00 or 1800 corresponding to
two different voltage levels of binary modulating signals(1 and 0).

 It is sometimes also called Biphase modulation or phase reversal keying. The amplitude of the transmitted BPSK
signal remains fixed.

 For a sinusoidal carrier signal Sin(2πfct) , the binary PSK signal can be expressed as
VBPSK(t) = Sin(2πfct) for binary 1
= Sin(2πfct+ π) for binary 0

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 Phase Shift Keying

When the binary data changes from 1 to 0 or vice versa the binary PSK output signal phase shifts from 00 to 1800 or vice versa, hence the two pulses
are π radians apart. The information resides in the phase or the sign of the pulse in binary PSK signal.

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 Phase Shift Keying Modulator
BPSK Signal
Binary Data Sequence d(t) d(t)Sin(2πfct)
1100100
Polar NRZ Coder Balanced Modulator

Carrier Signal Sin(2πfct)

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 Phase Shift Keying Modulator
 The binary data sequence of 0’s and 1’s is converted into a polar NRZ signal.

 Its output is then applied to a balanced modulator whose other input is from a local carrier oscillator.

 The output of the balanced modulator will be in phase with the carrier signal phase for binary data 1 and
1800 out of phase with the carrier signal phase for binary data 0.

 Thus the balanced modulator acts as a phase reversing switch.

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 Coherent Binary Phase Shift Keying Detection
 In Binary PSK a binary symbol 1 is transmitted by a sinusoidal signal Sin(2πfct) and a binary symbol 0 by
a sinusoidal signal Sin(2πfct+ π) for a polar NRZ signal. The information therefore resides in the carrier
phase.

 The binary PSK signal cannot be demodulated by non coherent detection technique which uses an
envelop detector because the envelop always remains constant for both binary symbols 0 and 1.

 Hence BPSK signals can be detected by coherent techniques only.

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 Coherent Binary PSK Detector
Correlator
BPSK Signal
d(t)Sin2πfct Synchronous 𝑘𝑇𝑏 Detected Output d(t)
Demodulator 𝑑𝑡 Decision Device
(Multiplier) (𝑘−1)𝑇𝑏

Sampling Instants
Recovered Carrier Bit Synchronizer
Sin(2πfct)

Frequency
Divider(/2)

Square Law
Device
BPF

Carrier Recovery Circuit

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 Coherent Binary PSK Detector
 The incoming BPSK signal is applied to correlates which consists of synchronous demodulator and an
integrator(LPF).
 The other input signal to the synchronous demodulator is the recovered carrier signal.
 It may be noted that the carrier signal can be recovered from the received signal by applying into a
square law device followed by a band pass filter tuned at 2fc and then to a half frequency divider
comprising of a D-type flip flop and a narrow band filter tuned at fc.
 The recovered carrier signal has the identical frequency as that used in the binary PSK modulator.
 The output of a synchronous demodulator is applied to an integrator as well as a bit synchronizer.
 Bit synchronizer is a device which is able to recognize precisely the instants which correspond to the
end of the time interval allotted to one bit and beginning of the next bit.

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 Coherent Binary PSK Detector

 The output of the bit synchronizer closes the switch of the integrator at that instant for a very brief
period to discharge the integrator capacitor, keeping it open during the remaining period of the bit
interval closing the switch again very briefly at the end of the next bit time and so on. This operation is
called integrate and dump filter operation because the output signal of interest here is the integrator
output at the end of a bit interval but immediately before the closing of the switch.

 The output of the bit synchronizer is also made available to the decision device which samples the output
signal just prior to dumping the capacitor. Thus the operation of the bit synchronizer allows us to detect
each bit independently of every other bit. The brief closing of both switches after each bit has been
determined also ensures that the detector deals exclusively with the present bit. Therefore we see that
our system reproduces at the demodulator output the transmitted bit stream d(t).

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 Application
 Binary PSK has been used in earlier telephone modems @2400bps and 4800bps.
 It is commonly applied in digital satellite communication.

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 Differential Binary Phase Shift Keying

 Differential Binary PSK or simply differential PSK (DPSK), is an alternate form of binary PSK where the
binary data information is contained in the difference between the phase of two successive signalling
elements rather than the absolute phase.
 A slightly different technique from BPSK, known as differential BPSK(DBPSK) or simply DPSK does not
require coherent detection at the receiver.
 However it is sub-optimum in its error performance in the sense that the transmission rate for this
system is fixed but errors tend to occur in pairs.
 A binary 1 is represented by sending a signal bit of opposite phase (by 1800) to the preceding one.
 A binary 0 is represented by sending a signal bit of the same phase as the previous one.
 In DBPSK, a symbol consists of two input bits. Therefore symbol duration Ts= 2 Tb where Tb is the bit
duration.
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 Bandwidth of DPSK
 The Bandwidth of DBPSK signal is 2/Ts= 2/2Tb= 1/Tb= fb

This implies that the minimum bandwidth in DBPSK is equal to the maximum baseband signal frequency that
is fb. Hence the bandwidth of DBPSK signal is one half that of BPSK signal.

 The DBPSK receiver makes use of the signal received in the preceding time slot itself as the reference
phase for detecting the present signal.

 This is done by correlating the signal received during the present time slot with that received in the
previous time slot. This implies that the receiver must have one bit storage facility.

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 DPSK Sub-optimal Method

 If the two signals are correlated then the received decides that the data bit received in the present time
slot is a binary 1.

 If the two signals are uncorrelated then the receiver decides that the data bit received in the present
time slot is a binary 0.

 Instead of using the actual carrier signal for phase reference, DBPSK technique utilizes the noisy
received signal of the preceding time slot as the reference signal for detection purpose so it is a
suboptimal method.

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 DBPSK Modulator
Binary Data Sequence
An Encoder Bipolar DPSK Signal S(t)
Balanced
or Logic NRZ Line
Modulator
Circuit Encoder

Delay
Carrier
Tb
Oscillator

 The input binary data sequence is applied to the input of an encoder or logic circuit such as an EX-OR logic gate (Complement of an Ex-OR gate ).
 The other input to encoder is one bit delayed version of previous bit.
 The output of encoder is then applied to bipolar NRZ line encoder followed by balanced modulator.
 The other input to balanced modulator is from a sinusoidal carrier signal oscillator. The output is DBPSK signal in which the phase shift depends on
the current bit and the previous bit.

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 DBPSK Waveform

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 Non Coherent DBPSK Detection
 DBPSK detector may be viewed as a non coherent version of binary PSK detector.

An Encoder Detected Output d(t)

Balanced
𝑇𝑏
Decision
BPF(f1) or Logic 𝑑𝑡
Modulator Device
Circuit 0

Delay Preset Threshold level

Tb

 The received signal is applied to a bandpass filter before applying to an encoder or logic circuit.
 The configuration of encoder is inverted as compared to that of in DBPSK detector.
 The input data is delayed by one bit interval.
 Both these signals are then applied to a correlator which comprises of a balanced modulator and an integrator.
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 Non Coherent DBPSK Detection
 The difference in original data and its delayed version is propositional to the difference between the
carrier phase of the received DBPSK signal and its delayed version, measured in the same bit interval.

 This phase difference is used to determine the sign of the correlator output for each bit interval.

 When the phase difference is 00 the integrator output is positive and when the phase difference is 1800 ,
the integrator output is negative.

 The output of the integrator is then compared with zero volt preset threshold level by the decision
device if input to the decision device is greater than ‘0’ volt then the detected output is ‘1’ and if input to
the decision device is less than ‘0’ volt then the detected output is ‘0’.
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 Comparison of BPSK & DBPSK
Parameter BPSK DBPSK

Variable characteristics of Analog Carrier Signal Phase Phase

Maximum Transmission bandwidth in terms of bit rate fb 2fb fb

Probability of Error low Higher than BPSK

Noise Immunity Good Better than BPSK

Bit Detection at Receiver Based on single bit interval Based on two successive
bit intervals
Synchronous Carrier at demodulator Required Not Required

System Complexity Moderate High

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 Problem
Consider a binary data sequence 11001100 which is required to be transmitted using DBPSK. Show the step
by step procedure of generating and detecting DBPSK signal. Assume arbitrary start up reference bit as 1.

Parameter Reference Bit 1 Bit 2 Bit 3 Bit4 Bit 5 Bit 6 Bit 7 Bit 8
Data Sequence b(t) - 1 1 0 0 1 1 0 0
Encoded Sequence 1 1 1 0 1 1 1 0 1
d(t)
Transmitted Phase of 0 0 0 π 0 0 0 π 0
d(t)
Detected Sequence - 1 1 0 0 1 1 0 0
b’(t)

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 Quadrature Phase Shift keying

 Quadrature phase shift keying (QPSK) is another modulation technique, it transmits two bits per symbol.

 A QPSK symbol doesn’t represent 0 or 1—it represents 00, 01, 10, or 11. This two-bits-per-symbol
performance is possible because the carrier variations are not limited to two states.

 In QPSK, the carrier varies in terms of phase, not frequency, and there are four possible phase shifts.

 We have 360° of phase to work with and four phase states, and thus the separation should be 360°/4 =
90°. So our four QPSK phase shifts are 45°, 135°, 225°, and 315°.

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 Quadrature Phase Shift keying Waveform

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 Mathematical Representation

 SQPSK = Sin(2πfct-3 π /4) for 00 (-135 or -3 π /4 radians)

 SQPSK = Sin(2πfct- π /4) for 01 (-45 or - π /4 radians )

 SQPSK = Sin(2πfct+3 π /4) for 10 (+135 or +3 π /4 radians)

 SQPSK = Sin(2πfct+ π /4) for 11 (+45 or + π /4 radians)

 QPSK is a M-ary Constant amplitude quadrature PSK digital modulation scheme in which number of bits is two(n=2) and the
number of signal elements are four, i.e., M=4 (known as Quaternary meaning ‘4’, 4-ary PSK)

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 Constellation Diagram of QPSK Signal

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 PSD of QPSK Signal

 The rate of change of output is equal to one half the input bit rate f b/2.
 As a result each bit in QPSK can be transmitted using half the bandwidth that is required to transmit BPSK signal, i.e., QPSK will
require minimum Nyquist transmission bandwidth equal to input bit rate fb only

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 Quadrature Phase Shift keying
 In multi-level or M-ary digital modulation techniques one of the M possible signal elements are
transmitted during each bit interval of Tb seconds.
 Offset QPSK and π/4 QPSK.
 Quadrature Phase shift keying or Quadriphase Shift Keying is one of the bandwidth efficient bandpass
digital modulation technique that makes use of quadrature multiplexing.
 The QPSK system can be considered equivalent to two BPSK systems operating in parallel and having
carrier signals which are of the same frequency but in phase quadrature.
 Like BPSK in QPSK the information is carried in the phase of the transmitted signal.
 In QPSK we combine two successive bits in a bit stream to form a symbol.
 With two bits there are four possible conditions:11, 10, 01, 00.

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 Additive White Gaussian Noise(AWGN)

X-Transmitted Signal Y-Received Signal

+

n- Noise Signal

 White Noise has uniform power across whole frequency band

 Its Power Spectral Density is flat
 The analogy is taken from the concept that white color is composed of all frequency components in visible spectrum
 As these are random variable, therefore we have to define their statistical parameters like probability density function (pdf)
 The Probability Density Function of noise is Gaussian in nature (With Zero Mean)
 Values near zero mean have higher probability of occurrence while samples far from zero or mean have lesser chances to appear.

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 BER (Bit Error Rate) & SNR.

a-Tx Bit S(t) r(t) Receiver r Decision 𝑎 - Rx Bit

Modulation AWGN
Filter Device

n(t)

 Bit Error Rate =Probability that (𝑎is not equal to a )

 Estimation of BER:
 Transmit N bits(Say N=100000000…)
 Find the number of errors ne (ne must be atleast 100)
 Probability of Error=BER= ne/N

 SNR=Signal Power/Noise Power

 SNR(dB)=10log10(Signal Power/Noise Power)
 Ex: SNR=1 SNR(dB)=0dB
SNR=2 SNR(dB)≈3dB
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 SNR in Continuous/Discrete Time Domain

Symbol to
a S r=s+n Decision 𝑠
bit
𝑎
Modulation +
Device demapper
n
 Continuous time AWGN Channel:
Signal Power=P; Noise PSD=No/2 ; Bandwidth=2W; Noise Power=No/2*2W=NoW
SNR=P/NoW; Time Per Symbol= T= 1/2W
 Discrete time AWGN Channel:
Energy Per Symbol= Es=Power*Time=P/2W; Noise Energy=𝜎 2 = Variance of Noise=No/2 ;
SNR in Discrete time= Es/𝜎 2 =P/ NoW =SNR in Continuous Time Domain

 SNR for BPSK = Signal Enery/Noise Energy = 1/𝜎 2

 Signal Energy= (Mean of the Square of Symbols=((-1)2+(1)2)/2)=1 ; Noise Energy= 𝜎 2
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 BER Vs SNR for BPSK in AWGN

Error: if n<-1 and s=+1 BER = Prob{s=+1}Prob{n<-1 } + Prob{s=-1}Prob{n>+1 }

1 0
Using PDF (n=x) with variance 𝜎 2

Error: if n>1 and s=-1 BER =Q(1/𝜎)=Q(Sqrt(SNR))

Q function: Q(x)=0.5erfc(X/sqrt(2))

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 Derive BPSK BER (Bit Error Rate) for optimum receiver in AWGN channel.

 The ideal constellation diagram of a BPSK transmission contains two constellation points located equidistant from the origin.

 Each constellation point is located at a distance from the origin, where Es is the BPSK symbol energy.

 Since the number of bits in a BPSK symbol is always one, the notations – symbol energy (Es) and bit energy (Eb) can be used
interchangeably (Es=Eb).

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 Derive BPSK BER (Bit Error Rate) for optimum receiver in AWGN channel.
 Assume that the BPSK symbols are transmitted through an AWGN channel characterized by variance = N0/2 Watts.

 When 0 is transmitted, the received symbol is represented by a Gaussian random variable ‘ r‘ with mean = S0 = and
variance =N0/2.

 When 1 is transmitted, the received symbol is represented by a Gaussian random variable ‘– r ‘ with mean = S1 = and
variance =N0/2. Hence the conditional density function of the BPSK symbol is given by,

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 Derive BPSK BER (Bit Error Rate) for optimum receiver in AWGN channel.

 An optimum receiver for BPSK can be implemented using a correlation receiver or a matched filter
receiver.
 Both these forms of implementations contain a decision making block that decides upon the bit/symbol
that was transmitted based on the observed bits/symbols at its input.

 When the BPSK symbols are transmitted over an AWGN channel, the symbols appears smeared/distorted
in the constellation depending on the SNR condition of the channel.

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 Derive BPSK BER (Bit Error Rate) for optimum receiver in AWGN channel.

 Role of correlation/Matched Filter

Since the assumed channel is of Gaussian nature, the continuous density function of the projected bits will follow a Gaussian distribution.

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Derive BPSK BER (Bit Error Rate) for optimum receiver in AWGN channel.

 After the signal points are projected on the basis function axis, a decision maker/comparator acts on
those projected bits and decides on the fate of those bits based on the threshold set.
 For a BPSK receiver, if the a-prior probabilities of transmitted 0’s and 1’s are equal (P=0.5), then the
decision boundary or threshold will pass through the origin.
 If the apriori probabilities are not equal, then the optimum threshold boundary will shift away from the
origin.

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Derive BPSK BER (Bit Error Rate) for optimum receiver in AWGN channel.
 Considering a binary symmetric channel, where the apriori probabilities of 0’s and 1’s are equal, the decision
threshold can be conveniently set to T=0.
 The comparator, decides whether the projected symbols are falling in region A or region B.

 If the symbols fall in region A, then it will decide that 1 was transmitted. It they fall in region B, the decision will be
in favor of ‘0’.

 For deriving the performance of the receiver, the decision process made by the comparator is applied to the
underlying distribution model.
 The symbols projected on the axis will follow a Gaussian distribution.
The threshold for decision is set to T=0. A received bit is in error, if the transmitted bit is ‘0’ & the decision output is
‘1’ and if the transmitted bit is ‘1’ & the decision output is ‘0’. This is expressed in terms of probability of error as,

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 Derive BPSK BER (Bit Error Rate) for optimum receiver in AWGN channel.

 By applying Bayes Theorem , the above equation is expressed in terms of conditional probabilities as given
below,

 Since a-prior probabilities are equal P(0T)= P(1T) =0.5, the equation can be re-written as

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Derive BPSK BER (Bit Error Rate) for optimum receiver in AWGN channel.

 The integrals represent the area of shaded curves as shown in Figure

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Derive BPSK BER (Bit Error Rate) for optimum receiver in AWGN channel.

Similarly,

From (4), (6), (7) and (8),

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Derive BPSK BER (Bit Error Rate) for optimum receiver in AWGN channel.

 For BPSK, since Es=Eb, the probability of symbol error (Ps) and the probability of bit error (Pb) are same.
Therefore, expressing the Ps and Pb in terms of Q function and also in terms of complementary error
function :

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