CHP 5 Pic Micro Controller Instruction Set
CHP 5 Pic Micro Controller Instruction Set
CHP 5 Pic Micro Controller Instruction Set
PIC Microcontroller
PIC stands for Peripheral or programmable Interface Controller given by Microchip Technology to identify its single-chip microcontrollers. These devices have been very successful in 8bit microcontrollers. The main reason is that Microchip Technology has continuously upgraded the device architecture and added needed peripherals to the microcontroller to suit customers' requirements.
ARCHITECTURES
Microchip PIC microcontrollers are available in various types. When PIC microcontroller MCU was first available from General Instruments in early 1980's, the microcontroller consisted of a simple processor executing 12-bit wide instructions with basic I/O functions. These devices are known as low-end architectures. They have limited program memory and are meant for applications requiring simple interface functions and small program & data memories. Some of the low-end device numbers are 12C5XX 16C5X 16C505
Mid range PIC architectures are built by upgrading low-end architectures with more number of peripherals, more number of registers and more data/program memory. Some of the mid-range devices are 16C6X 16C7X 16F87X Program memory type is indicated by an alphabet. C = EPROM F = Flash RC = Mask ROM
Speed: Harvard Architecture, RISC architecture, 1 instruction cycle = 4 clock cycles. Instruction set simplicity: The instruction set consists of just 35 instructions (as opposed to 111 instructions for 8051). Power-on-reset and brown-out reset. Brown-out-reset means when the power supply goes below a specified voltage (say 4V), it causes PIC to reset; hence malfunction is avoided. A watch dog timer (user programmable) resets the processor if the software/program ever malfunctions and deviates from its normal operation. PIC microcontroller has four optional clock sources.
Low power crystal Mid range crystal High range crystal RC oscillator (low cost).
Outline
Instruction Set
PIC16Cxx @ PIC16Fxx: 14bit word (opcode) Byte-oriented, bit-oriented & literal and control
Instruction Set
cont
Instruction Descriptions
ADDLW K
Add the literal value K to register WREG and put the result back in the WREG register (W) + k (W) K is an 8-bit value: 0-255 (decimal), 00-FF (hex) L: literal (actual value) Affect STATUS bits: C, DC, Z
ADDLW K
Instruction:
Before W = 10H
cont
ADDLW 15H
After W = 25H
ADDWF f, d
Add together contents of WREG and a file register location (SFR @ GPR). Put the result in the register WREG if d = 0 otherwise it is stored back in register f. (W) + (f) (d) 0 f 127, d [0, 1] Affect STATUS bits: C, DC, Z
ADDWF f, d
Instruction: MOVLW ADDWF 17H 5H, 0
cont
Before W = 0H 5H = 0H
After W = 17H 5H = 0H
MOVF
f, d
Move the content of f register upon the status of d (f) (d) Affect bit Z of STATUS register
Instruction: MOVF
Before W = 09AH FSR = 0H
FSR, 0
After
MOVLW k
Load k literal into WREG register k (W) Dont cares will be assembled as 0s Not affect bit of STATUS register
Instruction: MOVLW
Before W = 09AH After W = 5AH
5AH
MOVWF f
Move data from WREG register to f register (W) (f) Not affect bit of STATUS register
Instruction: MOVWF
Before PORTB = 00H W = 09AH
PORTB
After
Review
1. Write instructions to move value 34H into the WREG register. 2. Write instructions to add the values 16H and CDH. Place the result in the WREG register. 3. True or false. No value can be moved directly into the WREG register. 4. What is the largest hex value that can be moved into an 8-bit register? What is the decimal equivalent of that hex value?
Review
5. What is the result of the following code and where is it kept?
MOVLW ADDLW (a) (c) (e) (g) MOVLW MOVLW MOVLW MOVLW 15H 13H 500 (b) MOVLW 50 00 (d) MOVLW 255H 25H (f) MOVLW F5H mybyte, 50H
Review
7. Which of the following is (are) illegal?
(a) (c) (e) (g) ADDLW ADDLW ADDLW ADDLW 300H $500 12H 25H (b) ADDLW 50H (d) ADDLW 255H (f) ADDLW 0F5
8. True or false. We have many WREG registers in the PIC16. 9. The literal value in MOVLW is _____ bits wide.
Review
10. The instruction MOVLW 44H is a ____-byte instruction. 11. True or false. All the instructions in the PIC16 are 2-cycle instructions. 12. Give the value in WREG for the following:
MYCOUNT MOVLW EQU 15 MYCOUNT
Review
13. Give the value in fileReg 0x20 for the following:
MYCOUNT MYREG MOVLW MOVWF EQU 0x95 EQU 0x20 MYCOUNT MYREG
Review
15. Find the C, Z and DC flag bits for the following code:
MOVLW ADDLW 9FH 61H
ANDLW k
Logical
AND k literal with the content of WREG register & the result is placed in the WREG register (W) AND k (W) Affect Z bit of STATUS register
Instruction:
Before W = A3H
ANDLW
After
5FH
W = 03H
ANDWF f, d
AND the WREG register with f register (W) + (f) (d) Affect Z bit of STATUS register
Instruction:
ANDWF
After
FSR, 1
BCF
f, b
Instruction:
BCF STATUS, 5
After
Before
BSF
f, b
Instruction:
BSF INTCON, 7
After
INTCON = 08BH
Before
INTCON = 0BH
BTFSS
f, b
Execute the next instruction if bit b in file register f is 0, otherwise discard executing next instruction 2-cycle instruction Not affect on STATUS register
I GOTO J
LOOP
Before
PC = address H
BTFSC
f, b
Execute the next instruction if bit b in file register f is 1, otherwise discard executing next instruction 2-cycle instruction Not affect on STATUS register
I GOTO J
LOOP
Before PC = address H
Review
Assume RA3 is an input, represents condition of a door alarm. If it goes LOW, it means that the door is opened. Create a program to monitor the bit continuously. Whenever it goes LOW, send a HIGH pulse to port RB5 and turn on buzzer
BSF BSF BCF BCF BTFSC GOTO BSF GOTO BCF GOTO 03H, 5 85H, 3 86H, 5 03H, 5 05H, 3 OFF 6H, 5 HERE 6H, 5 HERE
Vcc
HERE
PIC
RA3
OFF
RB5
CALL
Call subroutine (PC) + 1 TOS (top of stack) k PC<10:0> (PCLATCH<4:3>) PC<12:11> 2-cycle instruction Not affect on STATUS register
Before PC = add. SO
After
PC = add. THEN; TOS = add. SO+1
CLRF
CLRW
Instruction: CLRW
Before W = 5AH After W = 00H Z=1
COMP f, d
Instruction: COMP
Before ONE = 13H W = 02H
ONE, 0
After
DECF
f, d
CNT, 1
After CNT = 00H Z=1
Instruction: DECF
Before CNT = 01H Z=0
DECFSZ
f, d
Decrease f register and skip the next instruction if the result is 0; otherwise execute the next instruction (f) 1 (d), skip if result = 0 2-cycle instruction
Instruction: HERE
After
CNT = CNT - 1 PC = add. CONT if CNT = 0; PC = add. HERE + 1 if CNT 0
GOTO
Instruction: HERE
THERE
Before PC = add. HERE
GOTO THERE
After PC = add. THERE
Review
Toggle all the bits of the Port B by sending to it the values 55H and AAH continuously. Put a time delay in between each issuing of data to Port B.
MYREG EQU 0x08 ORG 0 BACK MOVLW 0x55 MOVWF PORTB CALL DELAY MOVLW 0xAA MOVWF PORTB CALL DELAY GOTO BACK ;this is the delay subroutine ORG 300H DELAY MOVLW 0xFF MOVWF MYREG AGAIN NOP NOP DECFSZ MYREG, F GOTO AGAIN RETURN END
INCF f, d
Instruction: INCF SATU, 1 Before SATU = 0FFH After SATU = 00H Z=1
INCFSZ
f, d
Increase the content of f register and skip the next instruction if the result is 0; otherwise execute the next instruction (f) + 1 (d), skip if result = 0 2-cycle instruction
Instruction: HERE
CONT
After
CNT = CNT + 1 PC = add. CONT if CNT = 0; else add. HERE + 1
Review
The difference between INCF f, W & INCF f, F
MOVLW MOVWF INCF INCF INCF INCF INCF INCF INCF INCF O Ox20 0x20, W 0x20, W 0x20, W 0x20, F 0x20, F 0x20 0x20 0x20, W
;WREG = 0 ;0x20 = (0), WREG = 1 ;0x20 = (0), WREG = 1 ;0x20 = (0), WREG = 1 ;0x20 = (1), WREG = 1 ;0x20 = (2), WREG = 1 ;0x20 = (3), WREG = 1 ;0x20 = (4), WREG = 1 ;0x20 = (4), WREG = 5
IORLW
Inclusive OR literal k with the content of WREG register (W) OR k (W) Affect bit Z of STATUS register
Instruction: IORLW
Before W = 09AH Z=?
35H
After
W = 0BFH Z=0
IORWF
f, d
Inclusive OR the content of WREG register with f register (W) OR (f) (d) Affect bit Z of STATUS register
Instruction: IORWF
Before RESULT = 13H W = 91H
RESULT, 0
After
Review
Find the contents of register WREG after execution of the following code:
MOVLW IORLW XORLW 0 0x99 0xFF
NOP
No operation
Instruction: NOP
RETFIE
Return from interrupt TOS PC 1 GIE (Global Interrupt Enable) Not affect bit of STATUS register
Instruction: RETFIE
Before After PC = TOS GIE = 1
RETLW
Return with loading literal k onto WREG register, k (W) TOS PC Not affect on STATUS register
Instruction: RETLW
Before W = 09AH
088H
After
W = 088H
RETURN
Return from subroutine POP the TOS and load into the PC 2-cycle instruction
Instruction: RETURN
Before After PC = TOS
RLF f, d
Instruction: RLF
Before
REG, 1
After
RRF f, d
Instruction: RRF
Before
REG, 1
After
Review
Find the contents of file register MYREG after execution of the following code:
MYREG EQU BCF MOVLW MOVWF RRF RRF RRF 0x20 STATUS, C 0x26 MYREG MYREG, F MYREG, F MYREG, F
;C=0 ;WREG=0010 0110
Review
Find the contents of file register MYREG after execution of the following code:
MREG EQU BSF MOVLW MOVWF RLF RLF RLF RLF 0x20 STATUS, C 0x15 MYREG MYREG, F MYREG, F MYREG, F MYREG, F
;C=1 ;WREG=0001 0101
SLEEP
Instruction: SLEEP
SUBLW
Subtract WREG register (2s complement) from literal k and put the result onto WREG register k (W) (W) Affect C, DC & Z bits of STATUS register
Instruction: SUBLW
Before W = 01H C=? Z=?
02H
After W = 01H C=1 Z=0
SUBWF f, d
Subtract WREG register (2s complement) from f register (f) (W) (d) Affect C, DC & Z bits of STATUS register
Instruction: SUBWF
Before W = 01H F = 05H C=? Z=?
02H, 0
After W = 04H F = 05H C=1 Z=0
Review
Show the steps involved in the following.
MOVLW SUBLW K = 3F - WREG = 23 1C 0x23 0x3F 0011 1111 + 1101 1101 (2s complement) 1 0001 1100
C = 1, Z = 0 (result is +ve)
SWAPF f, d
Exchange the upper & lower nibbles of f register (f<3:0) (d<7:4>), (f<7:4) (d<3:0>) Not affect STATUS register
Instruction: SWAPF
Before ON = 0F4H W = 09AH
ON, 1
After
ON = 04FH W = 09AH
Review
Find the contents of the MYREG register in the following code.
MYREG EQU MOVLW MOVWF SWAPF 0x20 0x72 MYREG MYREG, F
;WREG = 72H ;MYREG = 72H ;MYREG = 27H
XORLW k
Exclusive OR (XOR) the content of WREG register with k literal (W) XOR k (W) Store the result in WREG register Affect bit Z of STATUS register
Instruction: XORLW
Before W = 0B5H
0AFH
After
W = 01AH
XORWF f, d
Exclusive OR (XOR) the content of WREG register with f register (W) XOR (f) (d) Affect bit Z of STATUS register
Instruction: XORWF
Before REG = 0AFH W = 0B5H
REG, 1
After
Review
Show the results of the following:
MOVLW XORLW 0x54 0x78
54H = 0 1 0 1 0 1 0 0
78H = 0 1 1 1 1 0 0 0 2CH = 0 0 1 0 1 1 0 0 54H XOR 78H = 2CH, Z = 0
Assembler Directives
Also known as pseudo-instructions Give directions to assembler EQU, ORG, END
EQU directive:
COUNT
Assembler Directives
Using EQU for fixed data assignment:
;in hexadecimal DATA1 EQU DATA2 EQU DATA3 EQU DATA4 EQU DATA5 EQU ;in binary DATA6 DATA7
;in decimal DATA8 EQU DATA9 EQU ;in ASCII DATA10 DATA11 DATA12
D28 d28
A2 a2 2
EQU EQU
B00110101 b00110101
Assembler Directives
Using EQU for SFR address assignment:
COUNTER PORTB MOVLW MOVWF INCF INCF INCF EQU 0x00 EQU 0x06 COUNTER PORTB PORTB, F PORTB, F PORTB, F
Assembler Directives
Using EQU for RAM address assignment:
MYREG MOVLW MOVWF MOVLW ADDWF ADDWF ADDWF EQU 0x12 0 MYREG 22H MYREG, F MYREG, F MYREG, F
Assembler Directives
SET directive:
cont
Define a constant value or a fixed address Identical with EQU directive, the only difference is the value assigned by the SET directive may be reassigned later
END directive:
Assembler Directives
LIST directive:
cont
Unique to PIC assembler Indicate specific PIC chip for which the program should be assembled
LIST P = 16F84A
#include directive:
Tells the PIC assembler to use the libraries associated with the specific chip to compile the program
Assembler Directives
_config directive:
cont
Tells the assembler the configuration bits for the target device Incorrect use may cause the chip unusable
CONFIG CONFIG OSC=HS WDT=OFF
radix directive: