Encoder and Decoder To Class
Encoder and Decoder To Class
Decoders
A combinational circuit that converts
binary information from n coded inputs
to a maximum 2n coded outputs
n-to- 2n decoder
n-to-m decoder, m ≤ 2n
Examples: BCD-to-7-segment decoder,
where n=4 and m=10
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Decoders (cont.)
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1-2 Decoder
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2-to-4 Decoder
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2-to-4 Active Low Decoder
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3-to-8 Decoder
address
data
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3-to-8 Decoder (cont.)
Three inputs, A0, A1, A2, are decoded into
eight outputs, D0 through D7
Each output Di represents one of the
minterms of the 3 input variables.
Di = 1 when the binary number A2A1A0 = i
Shorthand: Di = mi
The output variables are mutually exclusive;
exactly one output has the value 1 at any time,
and the other seven are 0.
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Decoder Expansion
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Decoder with enable
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Implementing Boolean functions
using decoders
Any combinational circuit can be constructed
using decoders and OR gates! Why?
Here is an example:
Implement a full adder circuit with a decoder
and two OR gates.
Recall full adder equations, and let X, Y, and Z
be the inputs:
S(X,Y,Z) = X+Y+Z = m(1,2,4,7)
C (X,Y,Z) = m(3, 5, 6, 7).
Since there are 3 inputs and a total of 8
minterms, we need a 3-to-8 decoder.
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Implementing a Binary Adder
Using a Decoder
S(X,Y,Z) = SUM m(1,2,4,7)
C(X,Y,Z) = SUM m(3,5,6,7)
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Encoders
An encoder is a digital circuit that
performs the inverse operation of a
decoder. An encoder has 2n input lines
and n output lines.
The output lines generate the binary
equivalent to the input line whose value
is 1.
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Encoders (cont.)
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Encoder Example
Example: 8-to-3 binary encoder (octal-to-binary)
A0 = D1 + D3 + D5 + D7
A1 = D2 + D3 + D6 + D7
A2 = D4 + D5 + D6 + D7
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Encoder Example (cont.)
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Encoder Design Issues
There are two ambiguities associated with
the design of a simple encoder:
1. Only one input can be active at any given time. If
two inputs are active simultaneously, the output
produces an undefined combination (for example,
if D3 and D6 are 1 simultaneously, the output of
the encoder will be 111.
2. An output with all 0's can be generated when all
the inputs are 0's,or when D0 is equal to 1.
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Priority Encoders
Solves the ambiguities mentioned above.
Multiple asserted inputs are allowed;
one has priority over all others.
Separate indication of no asserted
inputs.
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Example: 4-to-2 Priority Encoder
Truth Table
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4-to-2 Priority Encoder (cont.)
The operation of the priority encoder is
such that:
If two or more inputs are equal to 1 at
the same time, the input in the highest-
numbered position will take precedence.
A valid output indicator, designated by
V, is set to 1 only when one or more
inputs are equal to 1. V = D3 + D2 + D1 +
D0 by inspection.
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Example: 4-to-2 Priority Encoder
K-Maps
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Example: 4-to-2 Priority Encoder
Logic Diagram
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8-to-3 Priority Encoder
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Uses of priority encoders (cont.)
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Summary of Encoder and
Decoder
MUX Gate
Rudimentary functions
Binary Decoders
Expansion
Circuit implementation
Binary Encoders
Priority Encoders
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