8255A Programmable: Peripheral Interface (PPI)

8255A Programmable
Peripheral Interface (PPI)

8255A Programmable Peripheral Interface (PPI)
 Intel 8255A is a general purpose parallel I/O interface.
The peripheral devices are slower than the microprocessor. PPI makes
an inter-relation between microprocessor and peripheral devices.
 It provides three I/O port (Port A, Port B and Port C)

Handshaking
The making of inter relation between slower peripheral device and
microprocessor is called handshaking.
Handshaking Signal
Before making the inter-relation between peripheral device and
microprocessor the PPI send some signals to microprocessor and peripheral
device to perform the process, these signals are called handshaking signal.
8255-based devices that perform handshaking support following
handshaking signals:
Read Operation
STB goes low indicates that data are loads into port latch.
IBF Becomes high (at high to low transition of STB) indicates that input latch
contains data
INTR Becomes high (at low to high transition of STB) uP goes interrupt
subroutine to read data. RD becomes low.
IBF becomes low when read complete, RD becomes high and IBF goes low.
IBF low means input latch has no data (Read complete)

Simple Strobe I/O:
The sending device, such as a keyboard, outputs parallel data on the data
lines, and then outputs an 𝑆𝑇𝐵 signal to let the receiving device know that
valid data is present.
Single handshake Data transfer:

•The sending device outputs some parallel data and sends an 𝑆𝑇𝐵 signal
to the receiving device. (i.e. sending device says receiving device, “I
have some data for you” )
•As a response of 𝑆𝑇𝐵 signal receiver device reads data and send an
acknowledge signal to indicate that the data has been read. (i.e. by
acknowledge signal receiving device says to sending device, “your
sending data is received and I am ready to get new data”)
Description of 8255A Internal Block Diagram
Data Bus Buffer
•This three-state bi-directional 8-bit buffer is used to interface the 8255 to the system data
bus.
•Data is transmitted or received by the buffer upon execution of input or output instructions
by the CPU.
•Control words and status information are also transferred through the data bus buffer.
Read/Write Control Logic
The function of this block is to manage all of the internal and external transfers of both Data
and Control or Status words.
(CS) Chip Select. A "low" on this input pin enables the communication between the 8255
and the CPU.
(RD) Read. A "low" on this input pin enables 8255 to send the data or status information to
the CPU on the data bus. In essence, it allows the CPU to "read from" the 8255.
(WR) Write. A "low" on this input pin enables the CPU to write data or control words into
the 8255.
(A0 and A1) These input signals, control the selection of one of the three ports or the
control word register.
(RESET) Reset. A "high" on this input initializes the control

register to 9Bh and all ports (A, B, C) are set to the input mode.
Description of 8255A Internal Block Diagram (Continued)
Group A and Group B Controls
Each of the Control blocks (Group A and Group B) accepts "commands" from the
CPU as "control word" and configure the ports (Port A, Port B and Port C)
accordingly.
Port A and upper 4 bits of Port C are controlled by Group A Port B and lower part of Port
C are controlled by Group B
Ports A, B, and C
The 8255 has three 8 bit I/O ports and each one can be connected to the physical lines
of an external device. All can be configured to a wide variety of functional
characteristics by the system software .These ports are labeled as PA0-PA7 (PortA),
PB0-PB7 (PortB) and PC0-PC7 (PortC).
GND (Ground) and Vcc
Summary of 8255A Pins

Port Pins: 24 ( Port A = 8,Port B =8,Port C =8)
Control Pins: 6 (RD, WR, CS, RESET, A1, A0)
Data Lines: 8
Power Supply: 2 (VCC, GND)
Total 40 pins
Programming 8255A
Modes of Operation
8255 can be configured in two modes
•BSR (Bit Set Reset) Mode
•I/O (Input-Output) Mode: Mode 0, Mode 1 and Mode 2 Modes are configured by
Control Word
Control Word
A Control Word is an 8-bit data that stored in control register. Control Words are
two types: (a) BSR Control Word (b) Mode definition Control Word
BSR Mode (Configured by Bit Set-Reset Control Word)
•If bit 7 of control word is a logic 0 then 8255 will be configured as BSR (Bit Set
Rest) mode.
•In this mode we can set or reset the pins of port C
N.B: Don’t Cares are

Generally set as zero.
Problems: (a) Write a control word to reset PC5. (Ans:

0AH) (b) Write a Control Word to Set PC2. (Ans: 05H)
I/O Mode (Configured by Mode definition CR)
•If bit 7 of the control word is a logical 1 then the 8255 will be configured as I/O mode.
•I/O mode consists of Mode0, Mode1 and Mode2.
Mode 0
•Port A works as simple input or output without handshaking.
•Port B works as simple input or output without handshaking.
•Port C can be used together as an additional 8 bit port or they can be used
individually as two 4-bit ports.
•When used as outputs, the Port C lines can be individually set or reset by sending
a special control word to the control register address.
I/O Mode (Cont.)
Mode 1
•Used for handshake input/output operation.
•Port B is initialized in mode 1 for either input or output, Pins PC0, PC1 and
PC2 function as handshake lines.
•Port A can also be configured as input or output in mode 1. But handshake
signal pins are not same for input and output mode as like Port B.
•If port A is initialized in mode 1 as handshake input port, then pins PC3, PC4
and PC5 function as handshake signals. (PC6 and PC7 are available for using as
input lines or output lines)
•If port A is initialized as handshake output port, then PC3, PC6 and PC7 function as
handshake signals. (PC4 and PC5 are available for using as input or output lines)
I/O Mode (Cont.)
Mode 2
•Only port A can be initialized in mode 2.
•In mode 2, port A can be used for “bi-directional handshake” data transfer i.e.
data can be input or output on the same eight lines.
•Pins PC3, PC4, PC5, PC6, PC7 used as handshake lines for port A.
•Port B is operating in either mode 0 or mode 1.
•If port B is in mode 0, then PC0, PC1 and PC2 used for I/O.
•If port B is in mode 1, then PC0, PC1 and PC2 used as handshake lines.
A
A
I/O Mode (Cont.)
Configuring I/O Mode
I/O Mode is configured by Mode Definition Control Word
Problems
Problem1: Write a control word to configure port A as input port in mode 0 and port B
in mode 1 as output port.
Solution:
D7 D6 D5 D4 D3 D2 D1 D0
1 0 0 1 0 1 0 0
The control word is 94H.
N.B. D0 and D3 are low if port C is used as output or if unused.
Problem 2: A control word is given CW=CDH. Explain the conditions of ports of 8255A.
Solution:
D7 D6 D5 D4 D3 D2 D1 D0
1 1 0 0 1 1 0 1
D7=1; I/O Mode.

D6=1 and D5=0; Port A is in Mode 2.
D4=0; Port A is output port
D3=1; Port C (Upper) is input port.
D2=1; Port B is in Mode 1.
D1=0; Port B is output Port.
D0=0; Port C (Lower) is input port.
Q3: Configure Port A in Mode 2, Port B as o/p in mode 1.
Problems
Problem 3: Configure Port A in Mode 2, Port B as o/p in mode 1.
Solution: D7 D6 D5 D4 D3 D2 D1 D0
1 1 X X X 1 0 X
Control word is C4H / C5H….. etc
Problem 4: Write an 8086 assembly language procedure to read an ASCII character
from a keyboard via PORT A of an 8255 PPI when PORT C bit PC4 is strobed low.
Assume a base address of 20H.
Problem 5: Write an 8086 assembly language procedure to send an ASCII
character, stored in register AH, to a printer via PORT B of an 8255 PPI when
PORTC bit PCO is strobed low and after an active low acknowledge signal is
detected on PORT C bit PC5 from the printer. Assume a base address of 60H.
Solution:
PORTB EQU 61H
PORTC EQU 62H
CONTROL EQU 63H
PRINT PROC NEAR
MOV AL, 88H ; 1000 1000
OUT CONTROL, AL;
PRINT1:
IN AL, PORTC ; Is Acknowledge PC5 Low?
TEST AL, 20H ; 0010 0000
JNZ PRINT1
MOV AL, FEH ; 1111 1110
OUT PORTC, AL ; strobe output PC0
MOV AL, AH ; Send character
OUT PORTB, AL;
RET
PRINT ENDP
Problem 6: An 8086-8255 based microcomputer is required to drive an LED
connected to bit 2 of Port B based on two switch inputs connected to bit 6 and
7 of port A. If both switches are either high or low, LED will turn on ;
otherwise, it will remain OFF. Assume base address of 60H . Write an 8086
assembly language program to accomplish this.
Solution:
PORTA EQU 60H
PORTB EQU 61H
CONTR EQU 63H
MOV AL, 10010000B; Configure Port A as input and Port B as output.
OUT CNTRL, AL;
MAIN : IN AL, PORTA;
AND AL, 11000000B;
JPE LEADON; (JPE= Jump if parity even, p=1)
MOV AL, 00H;
OUT PORTB, AL;
JMP MAIN;
LEDON : MOV AL, 00000100B;
OUT PORTB, AL;
JMP MAIN;
Problem 7: Figure shows an 8255A interfaced with 8086 microprocessor.
Perform the following-
(a) Identify the Port Address.
(b) Identify the Mode 0 control word to configure Port A and Port C U as output
ports and Port B and Port CL as input ports.
(c) Write a program to read the DIP switches and display the reading from Port B
at Port A, and from Port CL at Port CU.
PPIA EQU 00F8H
PPIB EQU 00F9H
PPIC EQU 00FAH
PPICR EQU 00FBH
MOV AL, 83H
OUT PPICR , AL
IN AL, PPIB
OUT PPIA, AL
IN AL, PPIC
AND AL, 0FH
MOV CL, 04H MOV CL, 04H
ROL AL, CL SHL AL, CL
OUT PPIC, AL OUT PPIC, AL
HLT HLT
Problem 8:
Write a BSR control word subroutine to set bit PC7 and PC3 and reset them after
10ms. Use the previous schematic (Figure of problem 7). Also write the delay
procedure considering the processor clock at 5 MHz .
Solution:
BSR Control Word:
Address of control register: 8003H (See previous problem)

Duration of 1 clock pulse= (1/5MHz) = 200 ns
So, for 10ms we have to count = (10ms/200ns) = 50,000
Subroutine:
CALL DELAY DELAY PROC NEAR
PPICR EQU 8003H
MOV AL, 06H MOV CX, 50,000
BSR: MOV AL, 0FH
OUT PPICR, AL HERE: LOOP HERE
OUT PPICR, AL
MOV AL, 0EH RET
MOV AL, 07H
OUT PPICR, AL DELAY ENDP
OUT PPICR, AL
RET
Assignment: A 8086-8255A based system is given in fig. The Port A of 8255A
is connected with a 7-segment display. Write an assembly language program to
display the numbers 1,3,5,7,9 repeatedly

8255A Programmable: Peripheral Interface (PPI)

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8255A Programmable

Peripheral Interface (PPI)

 Intel 8255A is a general purpose parallel I/O interface.

 It provides three I/O port (Port A, Port B and Port C)

IBF low means input latch has no data (Read complete)

Single handshake Data transfer:

(RESET) Reset. A "high" on this input initializes the control

Summary of 8255A Pins

N.B: Don’t Cares are

Problems: (a) Write a control word to reset PC5. (Ans:

D7=1; I/O Mode.

Address of control register: 8003H (See previous problem)

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