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    Microprocessor and Microcontroller Assignment: Physical Address Generation 8086

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    Manish Negi
    This document discusses physical address generation in microprocessors. It explains that physical addresses are used to access memory locations after translation from virtual addresses by a memory management unit (MMU). Segmentation is the process of logically dividing main memory into segments, each with a base address, to improve execution speed. Segment registers like CS, DS, and ES point to code, data, and extra segments. To generate a 20-bit physical address from a 16-bit logical address, the microprocessor appends zeros to the segment register value to form the base address and then adds the offset.

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    Microprocessor and Microcontroller Assignment: Physical Address Generation 8086

    Uploaded by

    Manish Negi
    225 views9 pages
    This document discusses physical address generation in microprocessors. It explains that physical addresses are used to access memory locations after translation from virtual addresses by a memory management unit (MMU). Segmentation is the process of logically dividing main memory into segments, each with a base address, to improve execution speed. Segment registers like CS, DS, and ES point to code, data, and extra segments. To generate a 20-bit physical address from a 16-bit logical address, the microprocessor appends zeros to the segment register value to form the base address and then adds the offset.

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    This document discusses physical address generation in microprocessors. It explains that physical addresses are used to access memory locations after translation from virtual addresses by a memory management unit (MMU). Segmentation is the process of logically dividing main memory into segments, each with a base address, to improve execution speed. Segment registers like CS, DS, and ES point to code, data, and extra segments. To generate a 20-bit physical address from a 16-bit logical address, the microprocessor appends zeros to the segment register value to form the base address and then adds the offset.

    Copyright:

    © All Rights Reserved
    Download as PPTX, PDF, TXT or read online from Scribd
    Download as pptx, pdf, or txt
    225 views9 pages

    Microprocessor and Microcontroller Assignment: Physical Address Generation 8086

    Uploaded by

    Manish Negi
    This document discusses physical address generation in microprocessors. It explains that physical addresses are used to access memory locations after translation from virtual addresses by a memory management unit (MMU). Segmentation is the process of logically dividing main memory into segments, each with a base address, to improve execution speed. Segment registers like CS, DS, and ES point to code, data, and extra segments. To generate a 20-bit physical address from a 16-bit logical address, the microprocessor appends zeros to the segment register value to form the base address and then adds the offset.

    Copyright:

    © All Rights Reserved
    Download as PPTX, PDF, TXT or read online from Scribd
    Download as pptx, pdf, or txt
    of 9

    Microprocessor and Microcontroller

    ASSIGNMENT

    Physical address
    generation
    8086
    Physical address

    Physical address is used mostly to differentiate from a


    virtual address. In particular, in computers utilizing a
    memory management unit (MMU) to translate
    memory addresses, the virtual and physical addresses
    refer to an address before and after translation
    performed by the MMU.
    Segmentation
    It is the process in which the main memory of the computer is logically
    divided into different segments and each segment has its own base
    address. It is basically used to enhance the speed of execution of the
    computer system, so that the processor is able to fetch and execute the
    data from the memory easily and fast.

    Need for segmentation


    Code segment register (CS): is used for addressing memory location in the code
    segment of the memory, where the executable program is stored.

    Data segment register (DS): points to the data segment of the memory where the
    data is stored.

    Extra Segment Register (ES): also refers to a segment in the memory which is


    another data segment in the memory.
    Physical address generation
    The logical address also goes by the name of effective address or offset address (also
    known as offset), is contained in the 16-bit IP, BP, SP, BX, SI or DI.
    The 16-bit content of one of the four-segment registers (CS, DS, ES, SS) is known as
    the base segment address. Offset and base segment addresses are combined to form a
    20-bit physical address (also called real address) that is used to access the memory. This
    20-bit physical address is put on the address bus (AD19 – AD0) by the BIU.

    The process of combination is as follows: The content of the segment register is internally
    appended with 0 H (0000 H) on its rightmost end to form a 20-bit memory address—this
    20-bit address points to the start of the segment. The offset is then added to the above to
    get the physical address.
    Example
    The value of Data Segment Register
    (DS) is 2222 H.
     To convert this 16-bit address into 20-bit,
    the BIU appends
      0H to the LSBs of the
    address.
     After appending, the starting address of
    the Data Segment becomes 22220H.
    The value of Data Segment Register
    (DS) is 2222 H.
     To convert this 16-bit address into 20-bit,
    the BIU appends 0H to the LSBs of the
    address.
     After appending, the starting address of
    the Data Segment becomes 22220H.
    Contd.

    To calculate the effective address of the

    memory, BIU uses the following formula:

     Effective Address = Starting Address of

    Segment + Offset

     To find the starting address of the segment,

    BIU appends the contents of Segment

    Register with 0H.

     Then, it adds offset to it.
    Conversion of 16 bit logical to 20bit
    physical
    With a little hardware help - what is a called a ‘memory management unit’
    (MMU) or a mapping unit. This is a common problem on processor such a PDP-
    11 or the original 8080 which only had 16-bits of address space. A mapping unit
    is added in your case you said you had 20-bits of physical address space, which
    means you have 16 ‘chunks’ of 16-bit address if the largest ‘chunks’ are chosen.

    The trick is the upper bits of the address are supplied by the mapping hardware.
    When you create an address with a memory fetch, the upper N bits stripped off
    and directed into the mapper (MMU) and replaced with bits stored there. So
    instead of 16 bits you have 20 bits in your case

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