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Computer Organization and Architecture: CLSC & Risc

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Computer Organization and Architecture

ClSC & RISC


CISC is an acronym for Complex
Instruction Set Computer
CISC

• Chips that are easy to program and which make efficient use of
memory.
• Since the earliest machines were programmed in assembly
language and memory was slow and expensive, the CISC
philosophy made sense
• Most common microprocessor designs such as the Intel 80x86
and Motorola 68K series followed the CISC philosophy.
CISC
• But recent changes in software and hardware technology have forced a
re-examination of CISC and many modern CISC processors are
hybrids, implementing many RISC principles.
• CISC was developed to make compiler development simpler.
• It shifts most of the burden of generating machine instructions to
the processor.
• For example, instead of having to make a compiler write long machine
instructions to calculate a square-root, a CISC processor would have
a built-in ability to do this.
CISC Characteristics
• Complex instruction-decoding logic
driven by the need for a single instruction to support multiple
addressing modes.
• A small number of general purpose registers.
• This is the direct result of having instructions which can operate
directly on memory and the limited amount of chip space
• Not dedicated to instruction decoding, execution, and microcode
storage.
CISC Characteristics
• Several special purpose registers.
• Many designs set aside special registers for the stack pointer, interrupt handling,
and so on.
• This can simplify the hardware design somewhat, at the expense of making the
instruction set more complex.
• A 'Condition code" register which is set as a side-effect of most instructions.
• This register reflects whether the result of the last operation is less than, equal to,
or greater than zero and records if certain error conditions occur.
What is RISC?
RISC?
RISC, or Reduced Instruction Set Computer.
• It is a type of microprocessor architecture
• It utilizes a small, highly-optimized set of instructions, rather than a more
specialized set of instructions often found in other types of architectures.
History
The first RISC projects came from IBM, Stanford, and UC-Berkeley in the late
70s and early 80s.
• The IBM 801, Stanford MIPS, and Berkeley RISC 1 and 2 were all designed with
a similar philosophy which has become known as RISC.
Certain design and Characteristics fearures of
RISC
• one cycle execution time:
• RISC processors have a CPI (clock per instruction) of one cycle.
• This is due to the optimization of each instruction on the CPU and a
technique called PIPELINING

• pipelining:
• A techique that allows for simultaneous execution of parts, or stages, of
instructions to more efficiently process instructions

• large number of registers:


• the RISC design philosophy generally incorporates a larger number of
registers to prevent in large amounts of interactions with memory
Difference
The main characteristics of CISC microprocessors are:
• Extensive instructions.
• Complex and efficient machine instructions.
• Extensive addressing capabilities for memory operations.
• Relatively few registers.
In comparison, RISC processors are more or less the opposite of the above:
• Reduced instruction set.
• Less complex, simple instructions.
• Hardwired control unit and machine instructions.
• Few addressing schemes for memory operands with only two basic instructions, LOAD and
• STORE
• Many symmetric registers which are organised into a register file.
CISC Verses RISC
CISC RISC

Emphasis on hardware Emphasis on software


Includes multi-clock Single-clock,
complex instructions reduced instruction only
Memory-to-memory: Register to register:
"LOAD" and "STORE" "LOAD" and "STORE"
incorporated in instructions are independent instructions
Small code sizes, Low cycles per second,
high cycles per second large code sizes
Transistors used for storing Spends more transistors
complex instructions on memory registers
Contd.,
Summary

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