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ORCIDAvesta Sasan
Mohammad A. Makhzan
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- affiliation: George Mason University, Fairfax, VA, USA
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2020 – today
- 2024
[j21]Kevin Immanuel Gubbi
, Banafsheh Saber Latibari, Muhtasim Alam Chowdhury, Afrooz Jalilzadeh, Erfan Yazdandoost Hamedani, Setareh Rafatirad, Avesta Sasan, Houman Homayoun, Soheil Salehi:
Optimized and Automated Secure IC Design Flow: A Defense-in-Depth Approach. IEEE Trans. Circuits Syst. I Regul. Pap. 71(5): 2031-2044 (2024)- [c93]Najmeh Nazari, Chongzhou Fang, Hosein Mohammadi Makrani, Behnam Omidi, Mahdi Eslamimehr, Setareh Rafatirad, Avesta Sasan, Hossein Sayadi, Khaled N. Khasawneh, Houman Homayoun:
Architectural Whispers: Robust Machine Learning Models Fingerprinting via Frequency Throttling Side-Channels. DAC 2024: 179:1-179:6 - [c92]Najmeh Nazari, Behnam Omidi, Chongzhou Fang, Hosein Mohammadi Makrani, Setareh Rafatirad, Avesta Sasan, Houman Homayoun, Khaled N. Khasawneh:
SpecScope: Automating Discovery of Exploitable Spectre Gadgets on Black-Box Microarchitectures. DATE 2024: 1-6 - [c91]Banafsheh Saber Latibari, Soheil Salehi, Houman Homayoun, Avesta Sasan:
IRET: Incremental Resolution Enhancing Transformer. ACM Great Lakes Symposium on VLSI 2024: 620-625 - [c90]Ali Karkehabadi, Houman Homayoun, Avesta Sasan:
FFCL: Forward-Forward Net with Cortical Loops, Training and Inference on Edge Without Backpropogation. ACM Great Lakes Symposium on VLSI 2024: 626-632 - [c89]Najmeh Nazari, Kevin Immanuel Gubbi, Banafsheh Saber Latibari, Muhtasim Alam Chowdhury, Chongzhou Fang, Avesta Sasan, Setareh Rafatirad, Houman Homayoun, Soheil Salehi:
Securing On-Chip Learning: Navigating Vulnerabilities and Potential Safeguards in Spiking Neural Network Architectures. ISCAS 2024: 1-5 - [i29]Sreenitha Kasarapu, Sanket Shukla, Rakibul Hassan, Avesta Sasan, Houman Homayoun, Sai Manoj Pudukotai Dinakarrao:
Generative AI-Based Effective Malware Detection for Embedded Computing Systems. CoRR abs/2404.02344 (2024) - [i28]Mohammad A. Makhzan, Hadi Mardani Kamali:
Evolutionary Large Language Models for Hardware Security: A Comparative Survey. CoRR abs/2404.16651 (2024) - [i27]Banafsheh Saber Latibari, Sujan Ghimire, Muhtasim Alam Chowdhury, Najmeh Nazari, Kevin Immanuel Gubbi, Houman Homayoun, Avesta Sasan, Soheil Salehi:
Automated Hardware Logic Obfuscation Framework Using GPT. CoRR abs/2405.12197 (2024) - [i26]Ali Karkehabadi, Houman Homayoun, Avesta Sasan:
FFCL: Forward-Forward Net with Cortical Loops, Training and Inference on Edge Without Backpropagation. CoRR abs/2405.12443 (2024) - 2023
- [j20]Sayed Aresh Beheshti-Shirazi, Najmeh Nazari, Kevin Immanuel Gubbi, Banafsheh Saber Latibari, Setareh Rafatirad, Houman Homayoun, Avesta Sasan, Sai Manoj P. D.:
Advanced Reinforcement Learning Solution for Clock Skew Engineering: Modified Q-Table Update Technique for Peak Current and IR Drop Minimization. IEEE Access 11: 87869-87886 (2023) - [j19]Kevin Immanuel Gubbi, Banafsheh Saber Latibari, Anirudh Srikanth, Tyler Sheaves, Sayed Arash Beheshti-Shirazi, Sai Manoj PD, Setareh Rafatirad, Avesta Sasan, Houman Homayoun, Soheil Salehi:
Hardware Trojan Detection Using Machine Learning: A Tutorial. ACM Trans. Embed. Comput. Syst. 22(3): 46:1-46:26 (2023) - [c88]Chongzhou Fang, Ning Miao, Han Wang, Jiacheng Zhou, Tyler Sheaves, John Marty Emmert, Avesta Sasan, Houman Homayoun:
Gotcha! I Know What You Are Doing on the FPGA Cloud: Fingerprinting Co-Located Cloud FPGA Accelerators via Measuring Communication Links. CCS 2023: 2024-2037 - [c87]Kevin Immanuel Gubbi, Inderpreet Kaur, Abdallah Hashem, Sai Manoj P. D., Houman Homayoun, Avesta Sasan, Soheil Salehi:
Securing AI Hardware: Challenges in Detecting and Mitigating Hardware Trojans in ML Accelerators. MWSCAS 2023: 821-825 - [i25]Chongzhou Fang, Ning Miao, Han Wang, Jiacheng Zhou, Tyler Sheaves, John Marty Emmert, Avesta Sasan, Houman Homayoun:
Gotcha! I Know What You are Doing on the FPGA Cloud: Fingerprinting Co-Located Cloud FPGA Accelerators via Measuring Communication Links. CoRR abs/2305.07209 (2023) - [i24]Ali Karkehabadi, Houman Homayoun, Avesta Sasan:
SMOOT: Saliency Guided Mask Optimized Online Training. CoRR abs/2310.00772 (2023) - [i23]Yu-Zheng Lin, Muntasir Mamun, Muhtasim Alam Chowdhury, Shuyu Cai, Mingyu Zhu, Banafsheh Saber Latibari, Kevin Immanuel Gubbi, Najmeh Nazari Bavarsad, Arjun Caputo, Avesta Sasan, Houman Homayoun, Setareh Rafatirad, Pratik Satam, Soheil Salehi:
HW-V2W-Map: Hardware Vulnerability to Weakness Mapping Framework for Root Cause Analysis with GPT-assisted Mitigation Suggestion. CoRR abs/2312.13530 (2023) - 2022
- [j18]Gaurav Kolhe, Tyler David Sheaves, Sai Manoj P. D., Hamid Mahmoodi, Setareh Rafatirad, Avesta Sasan, Houman Homayoun:
Breaking the Design and Security Trade-off of Look-up-table-based Obfuscation. ACM Trans. Design Autom. Electr. Syst. 27(6): 56:1-56:29 (2022) - [c86]Gaurav Kolhe, Tyler David Sheaves, Kevin Immanuel Gubbi, Soheil Salehi, Setareh Rafatirad, Sai Manoj P. D., Avesta Sasan, Houman Homayoun:
LOCK&ROLL: deep-learning power side-channel attack mitigation using emerging reconfigurable devices and logic locking. DAC 2022: 85-90 - [c85]Gaurav Kolhe, Tyler Sheaves, Kevin Immanuel Gubbi, Tejas Kadale, Setareh Rafatirad, Sai Manoj P. D., Avesta Sasan, Hamid Mahmoodi, Houman Homayoun:
Silicon validation of LUT-based logic-locked IP cores. DAC 2022: 1189-1194 - [c84]Tanmoy Chowdhury, Ashkan Vakil, Banafsheh Saber Latibari, Sayed Aresh Beheshti-Shirazi, Ali Mirzaeian, Xiaojie Guo, Sai Manoj P. D., Houman Homayoun, Ioannis Savidis, Liang Zhao, Avesta Sasan:
RAPTA: A Hierarchical Representation Learning Solution For Real-Time Prediction of Path-Based Static Timing Analysis. ACM Great Lakes Symposium on VLSI 2022: 493-500 - [c83]Sreenitha Kasarapu, Sanket Shukla, Rakibul Hassan, Avesta Sasan, Houman Homayoun, Sai Manoj P. D.:
CAD-FSL: Code-Aware Data Generation based Few-Shot Learning for Efficient Malware Detection. ACM Great Lakes Symposium on VLSI 2022: 507-512 - [c82]Kevin Immanuel Gubbi, Sayed Aresh Beheshti-Shirazi, Tyler David Sheaves, Soheil Salehi, Sai Manoj P. D., Setareh Rafatirad, Avesta Sasan, Houman Homayoun:
Survey of Machine Learning for Electronic Design Automation. ACM Great Lakes Symposium on VLSI 2022: 513-518 - [c81]Vaibhav Venugopal Rao, Avesta Sasan, Ioannis Savidis:
Analysis of the Security Vulnerabilities of 2.5-D and 3-D Integrated Circuits. ISQED 2022: 1-7 - [c80]Ali Mirzaeian, Zhi Tian, Sai Manoj P. D., Banafsheh S. Latibari, Ioannis Savidis, Houman Homayoun, Avesta Sasan:
Adaptive-Gravity: A Defense Against Adversarial Samples. ISQED 2022: 96-101 - [c79]Chongzhou Fang, Han Wang, Najmeh Nazari, Behnam Omidi, Avesta Sasan, Khaled N. Khasawneh, Setareh Rafatirad, Houman Homayoun:
Repttack: Exploiting Cloud Schedulers to Guide Co-Location Attacks. NDSS 2022 - [c78]Soheil Salehi, Tyler David Sheaves, Kevin Immanuel Gubbi, Sayed Arash Beheshti, Sai Manoj P. D., Setareh Rafatirad, Avesta Sasan, Tinoosh Mohsenin, Houman Homayoun:
Neuromorphic-Enabled Security for IoT. NEWCAS 2022: 153-157 - [e2]Ioannis Savidis, Avesta Sasan, Himanshu Thapliyal, Ronald F. DeMara:
GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6 - 8, 2022. ACM 2022, ISBN 978-1-4503-9322-5 [contents] - [i22]Ali Mirzaeian, Zhi Tian, Sai Manoj P. D., Banafsheh S. Latibari, Ioannis Savidis, Houman Homayoun, Avesta Sasan:
Adaptive-Gravity: A Defense Against Adversarial Samples. CoRR abs/2204.03694 (2022) - 2021
- [j17]Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan:
From Cryptography to Logic Locking: A Survey on the Architecture Evolution of Secure Scan Chains. IEEE Access 9: 73133-73151 (2021) - [j16]Ashkan Vakil, Ali Mirzaeian, Houman Homayoun, Naghmeh Karimi, Avesta Sasan:
AVATAR: NN-Assisted Variation Aware Timing Analysis and Reporting for Hardware Trojan Detection. IEEE Access 9: 92881-92900 (2021) - [j15]Han Wang, Hossein Sayadi, Sai Manoj Pudukotai Dinakarrao, Avesta Sasan, Setareh Rafatirad, Houman Homayoun:
Enabling Micro AI for Securing Edge Devices at Hardware Level. IEEE J. Emerg. Sel. Topics Circuits Syst. 11(4): 803-815 (2021) - [j14]Qingzhe Li, Liang Zhao, Yi-Ching Lee, Avesta Sasan, Jessica Lin:
CPM: A general feature dependency pattern mining framework for contrast multivariate time series. Pattern Recognit. 112: 107711 (2021) - [j13]Hosein Mohammadi Makrani, Hossein Sayadi, Najmeh Nazari, Sai Manoj Pudukotai Dinakarrao, Avesta Sasan, Tinoosh Mohsenin, Setareh Rafatirad, Houman Homayoun:
Adaptive Performance Modeling of Data-intensive Workloads for Resource Provisioning in Virtualized Environment. ACM Trans. Model. Perform. Evaluation Comput. Syst. 5(4): 18:1-18:24 (2021) - [j12]Kimia Zamiri Azar, Hadi Mardani Kamali, Shervin Roshanisefat, Houman Homayoun, Christos P. Sotiriou, Avesta Sasan:
Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits. IEEE Trans. Very Large Scale Integr. Syst. 29(4): 643-656 (2021) - [c77]Han Wang, Soheil Salehi, Hossein Sayadi, Avesta Sasan, Tinoosh Mohsenin, Sai Manoj P. D., Setareh Rafatirad, Houman Homayoun:
Evaluation of Machine Learning-based Detection against Side-Channel Attacks on Autonomous Vehicle. AICAS 2021: 1-4 - [c76]Ashkan Vakil, Farzad Niknia, Ali Mirzaeian, Avesta Sasan, Naghmeh Karimi:
Learning Assisted Side Channel Delay Test for Detection of Recycled ICs. ASP-DAC 2021: 455-462 - [c75]Gaurav Kolhe, Soheil Salehi, Tyler David Sheaves, Houman Homayoun, Setareh Rafatirad, Sai Manoj P. D., Avesta Sasan:
Securing Hardware via Dynamic Obfuscation Utilizing Reconfigurable Interconnect and Logic Blocks. DAC 2021: 229-234 - [c74]Sayed Aresh Beheshti-Shirazi, Ashkan Vakil, Sai Manoj P. D., Ioannis Savidis, Houman Homayoun, Avesta Sasan:
A Reinforced Learning Solution for Clock Skew Engineering to Reduce Peak Current and IR Drop. ACM Great Lakes Symposium on VLSI 2021: 181-187 - [c73]Neha Nagarkar, Khaled N. Khasawneh, Setareh Rafatirad, Avesta Sasan, Houman Homayoun, Sai Manoj Pudukotai Dinakarrao:
Energy-Efficient and Adversarially Robust Machine Learning with Selective Dynamic Band Filtering. ACM Great Lakes Symposium on VLSI 2021: 195-200 - [c72]Saran Phatharodom, Avesta Sasan, Ioannis Savidis:
SAT-attack Resilience Measure for Access Restricted Circuits. ACM Great Lakes Symposium on VLSI 2021: 213-220 - [c71]Shervin Roshanisefat, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan:
RANE: An Open-Source Formal De-obfuscation Attack for Reverse Engineering of Logic Encrypted Circuits. ACM Great Lakes Symposium on VLSI 2021: 221-228 - [c70]Han Wang, Hossein Sayadi, Avesta Sasan, Sai Manoj P. D., Setareh Rafatirad, Houman Homayoun:
Machine Learning-Assisted Website Fingerprinting Attacks with Side-Channel Information: A Comprehensive Analysis and Characterization. ISQED 2021: 79-84 - [c69]Ali Mirzaeian, Jana Kosecka, Houman Homayoun, Tinoosh Mohsenin, Avesta Sasan:
Diverse Knowledge Distillation (DKD): A Solution for Improving The Robustness of Ensemble Models Against Adversarial Attacks. ISQED 2021: 319-324 - [c68]Ali Mirzaeian, Sai Manoj P. D., Ashkan Vakil, Houman Homayoun, Avesta Sasan:
Conditional Classification: A Solution for Computational Energy Reduction. ISQED 2021: 325-330 - [c67]Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan:
ChaoLock: Yet Another SAT-hard Logic Locking using Chaos Computing. ISQED 2021: 387-394 - [c66]Hosein Mohammadi Makrani, Hossein Sayadi, Najmeh Nazari, Khaled N. Khasawneh, Avesta Sasan, Setareh Rafatirad, Houman Homayoun:
Cloak & Co-locate: Adversarial Railroading of Resource Sharing-based Attacks on the Cloud. SEED 2021: 1-13 - [e1]Yiran Chen, Victor V. Zhirnov, Avesta Sasan, Ioannis Savidis:
GLSVLSI '21: Great Lakes Symposium on VLSI 2021, Virtual Event, USA, June 22-25, 2021. ACM 2021, ISBN 978-1-4503-8393-6 [contents] - [i21]Chongzhou Fang, Han Wang, Najmeh Nazari, Behnam Omidi, Avesta Sasan, Khaled N. Khasawneh, Setareh Rafatirad, Houman Homayoun:
Repttack: Exploiting Cloud Schedulers to Guide Co-Location Attacks. CoRR abs/2110.00846 (2021) - 2020
- [j11]Sai Manoj Pudukotai Dinakarrao, Xiaojie Guo, Hossein Sayadi, Cameron Nowzari, Avesta Sasan, Setareh Rafatirad, Liang Zhao, Houman Homayoun:
Cognitive and Scalable Technique for Securing IoT Networks Against Malware Epidemics. IEEE Access 8: 138508-138528 (2020) - [j10]Katayoun Neshatpour, Houman Homayoun, Avesta Sasan:
ICNN: The Iterative Convolutional Neural Network. ACM Trans. Embed. Comput. Syst. 18(6): 119:1-119:27 (2020) - [j9]Shervin Roshanisefat, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan:
SAT-Hard Cyclic Logic Obfuscation for Protecting the IP in the Manufacturing Supply Chain. IEEE Trans. Very Large Scale Integr. Syst. 28(4): 954-967 (2020) - [c65]Ali Mirzaeian, Houman Homayoun, Avesta Sasan:
NESTA: Hamming Weight Compression-Based Neural Proc. EngineAli Mirzaeian. ASP-DAC 2020: 530-537 - [c64]Han Wang, Hossein Sayadi, Tinoosh Mohsenin, Liang Zhao, Avesta Sasan, Setareh Rafatirad, Houman Homayoun:
Mitigating Cache-Based Side-Channel Attacks through Randomization: A Comprehensive System and Architecture Level Analysis. DATE 2020: 1414-1419 - [c63]Aidin Shiri, Arnab Neelim Mazumder, Bharat Prakash, Nitheesh Kumar Manjunath, Houman Homayoun, Avesta Sasan, Nicholas R. Waytowich, Tinoosh Mohsenin:
Energy-Efficient Hardware for Language Guided Reinforcement Learning. ACM Great Lakes Symposium on VLSI 2020: 131-136 - [c62]Hossein Sayadi, Yifeng Gao, Hosein Mohammadi Makrani, Tinoosh Mohsenin, Avesta Sasan, Setareh Rafatirad, Jessica Lin, Houman Homayoun:
StealthMiner: Specialized Time Series Machine Learning for Run-Time Stealthy Malware Detection based on Microarchitectural Features. ACM Great Lakes Symposium on VLSI 2020: 175-180 - [c61]Han Wang, Hossein Sayadi, Avesta Sasan, Setareh Rafatirad, Tinoosh Mohsenin, Houman Homayoun:
Comprehensive Evaluation of Machine Learning Countermeasures for Detecting Microarchitectural Side-Channel Attacks. ACM Great Lakes Symposium on VLSI 2020: 181-186 - [c60]Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan:
On Designing Secure and Robust Scan Chain for Protecting Obfuscated Logic. ACM Great Lakes Symposium on VLSI 2020: 217-222 - [c59]Han Wang, Hossein Sayadi, Avesta Sasan, Setareh Rafatirad, Houman Homayoun:
Hybrid-Shield: Accurate and Efficient Cross-Layer Countermeasure for Run-Time Detection and Mitigation of Cache-Based Side-Channel Attacks. ICCAD 2020: 36:1-36:9 - [c58]Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan:
InterLock: An Intercorrelated Logic and Routing Locking. ICCAD 2020: 78:1-78:9 - [c57]Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan:
NNgSAT: Neural Network guided SAT Attack on Logic Locked Complex Structures. ICCAD 2020: 79:1-79:9 - [c56]Han Wang, Hossein Sayadi, Gaurav Kolhe, Avesta Sasan, Setareh Rafatirad, Houman Homayoun:
Phased-Guard: Multi-Phase Machine Learning Framework for Detection and Identification of Zero-Day Microarchitectural Side-Channel Attacks. ICCD 2020: 648-655 - [c55]Han Wang, Hossein Sayadi, Avesta Sasan, Setareh Rafatirad, Houman Homayoun:
HybriDG: Hybrid Dynamic Time Warping and Gaussian Distribution Model for Detecting Emerging Zero-Day Microarchitectural Side-Channel Attacks. ICMLA 2020: 604-611 - [c54]Han Wang, Hossein Sayadi, Setareh Rafatirad, Avesta Sasan, Houman Homayoun:
SCARF: Detecting Side-Channel Attacks at Real-time using Low-level Hardware Features. IOLTS 2020: 1-6 - [c53]Farnaz Behnia, Ali Mirzaeian, Mohammad Sabokrou, Sai Manoj P. D., Tinoosh Mohsenin, Khaled N. Khasawneh, Liang Zhao, Houman Homayoun, Avesta Sasan:
Code-Bridged Classifier (CBC): A Low or Negative Overhead Defense for Making a CNN Classifier Robust Against Adversarial Attacks. ISQED 2020: 27-32 - [c52]Ashkan Vakil, Farnaz Behnia, Ali Mirzaeian, Houman Homayoun, Naghmeh Karimi, Avesta Sasan:
LASCA: Learning Assisted Side Channel Delay Analysis for Hardware Trojan Detection. ISQED 2020: 40-45 - [c51]Hirenkumar Paneliya, Morteza Hosseini, Avesta Sasan, Houman Homayoun, Tinoosh Mohsenin:
CSCMAC - Cyclic Sparsely Connected Neural Network Manycore Accelerator. ISQED 2020: 311-316 - [c50]Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan:
SCRAMBLE: The State, Connectivity and Routing Augmentation Model for Building Logic Encryption. ISVLSI 2020: 153-159 - [c49]Shervin Roshanisefat, Hadi Mardani Kamali, Kimia Zamiri Azar, Sai Manoj Pudukotai Dinakarrao, Naghmeh Karimi, Houman Homayoun, Avesta Sasan:
DFSSD: Deep Faults and Shallow State Duality, A Provably Strong Obfuscation Solution for Circuits with Restricted Access to Scan Chain. VTS 2020: 1-6 - [i20]Farnaz Behnia, Ali Mirzaeian, Mohammad Sabokrou, Sai Manoj P. D., Tinoosh Mohsenin, Khaled N. Khasawneh, Liang Zhao, Houman Homayoun, Avesta Sasan:
Code-Bridged Classifier (CBC): A Low or Negative Overhead Defense for Making a CNN Classifier Robust Against Adversarial Attacks. CoRR abs/2001.06099 (2020) - [i19]Ashkan Vakil, Farnaz Behnia, Ali Mirzaeian, Houman Homayoun, Naghmeh Karimi, Avesta Sasan:
LASCA: Learning Assisted Side Channel Delay Analysis for Hardware Trojan Detection. CoRR abs/2001.06476 (2020) - [i18]Shervin Roshanisefat, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan:
SAT-hard Cyclic Logic Obfuscation for Protecting the IP in the Manufacturing Supply Chain. CoRR abs/2001.08999 (2020) - [i17]Shervin Roshanisefat, Hadi Mardani Kamali, Kimia Zamiri Azar, Sai Manoj Pudukotai Dinakarrao, Naghmeh Karimi, Houman Homayoun, Avesta Sasan:
DFSSD: Deep Faults and Shallow State Duality, A Provably Strong Obfuscation Solution for Circuits with Restricted Access to Scan Chain. CoRR abs/2002.07857 (2020) - [i16]Hadi Mardani Kamali, Kimia Zamiri Azar, Shervin Roshanisefat, Ashkan Vakil, Avesta Sasan:
ExTru: A Lightweight, Fast, and Secure Expirable Trust for the Internet of Things. CoRR abs/2004.06235 (2020) - [i15]Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan:
On Designing Secure and Robust Scan Chain for Protecting Obfuscated Logic. CoRR abs/2005.04262 (2020) - [i14]Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan:
SCRAMBLE: The State, Connectivity and Routing Augmentation Model for Building Logic Encryption. CoRR abs/2005.11789 (2020) - [i13]Ali Mirzaeian, Mohammad Sabokrou, Mohammad Khalooei, Jana Kosecka, Houman Homayoun, Tinoosh Mohsenin, Avesta Sasan:
Learning Diverse Latent Representations for Improving the Resilience to Adversarial Attacks. CoRR abs/2006.15127 (2020) - [i12]Ali Mirzaeian, Masoud PourReza, Mohammad Sabokrou, Ashkan Vakil, Tinoosh Mohsenin, Houman Homayoun, Avesta Sasan:
Cluster-Based Partitioning of Convolutional Neural Networks, A Solution for Computational Energy and Complexity Reduction. CoRR abs/2006.15799 (2020) - [i11]Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan:
InterLock: An Intercorrelated Logic and Routing Locking. CoRR abs/2009.02206 (2020) - [i10]Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan:
NNgSAT: Neural Network guided SAT Attack on Logic Locked Complex Structures. CoRR abs/2009.02208 (2020) - [i9]Ashkan Vakil, Farzad Niknia, Ali Mirzaeian, Avesta Sasan, Naghmeh Karimi:
Learning Assisted Side Channel Delay Test for Detection of Recycled ICs. CoRR abs/2010.12704 (2020)
2010 – 2019
- 2019
- [j8]Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan:
SMT Attack: Next Generation Attack on Obfuscated Circuits with Capabilities and Performance Beyond the SAT Attacks. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2019(1): 97-122 (2019) - [c48]Ashkan Vakil, Houman Homayoun, Avesta Sasan:
IR-ATA: IR annotated timing analysis, a flow for closing the loop between PDN design, IR analysis & timing closure. ASP-DAC 2019: 152-159 - [c47]Hosein Mohammadi Makrani, Hossein Sayadi, Tinoosh Mohsenin, Setareh Rafatirad, Avesta Sasan, Houman Homayoun:
XPPE: cross-platform performance estimation of hardware accelerators using machine learning. ASP-DAC 2019: 727-732 - [c46]Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan:
Full-Lock: Hard Distributions of SAT instances for Obfuscating Circuits using Fully Configurable Logic and Routing Blocks. DAC 2019: 89 - [c45]Sai Manoj Pudukotai Dinakarrao, Sairaj Amberkar, Sahil Bhat, Abhijitt Dhavlle, Hossein Sayadi, Avesta Sasan, Houman Homayoun, Setareh Rafatirad:
Adversarial Attack on Microarchitectural Events based Malware Detectors. DAC 2019: 164 - [c44]Hossein Sayadi, Hosein Mohammadi Makrani, Sai Manoj Pudukotai Dinakarrao, Tinoosh Mohsenin, Avesta Sasan, Setareh Rafatirad, Houman Homayoun:
2SMaRT: A Two-Stage Machine Learning-Based Approach for Run-Time Specialized Hardware-Assisted Malware Detection. DATE 2019: 728-733 - [c43]Mahmoud Namazi, Hosein Mohammadi Makrani, Zhi Tian, Setareh Rafatirad, Mohamad Hosein Akbari, Avesta Sasan, Houman Homayoun:
Mitigating the Performance and Quality of Parallelized Compressive Sensing Reconstruction Using Image Stitching. ACM Great Lakes Symposium on VLSI 2019: 219-224 - [c42]Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan:
Threats on Logic Locking: A Decade Later. ACM Great Lakes Symposium on VLSI 2019: 471-476 - [c41]Gaurav Kolhe, Sai Manoj P. D., Setareh Rafatirad, Hamid Mahmoodi, Avesta Sasan, Houman Homayoun:
On Custom LUT-based Obfuscation. ACM Great Lakes Symposium on VLSI 2019: 477-482 - [c40]Gaurav Kolhe, Hadi Mardani Kamali, Miklesh Naicker, Tyler David Sheaves, Hamid Mahmoodi, Sai Manoj P. D., Houman Homayoun, Setareh Rafatirad, Avesta Sasan:
Security and Complexity Analysis of LUT-based Obfuscation: From Blueprint to Reality. ICCAD 2019: 1-8 - [c39]Maria Malik, Hassan Ghasemzadeh, Tinoosh Mohsenin, Rosario Cammarota, Liang Zhao, Avesta Sasan, Houman Homayoun, Setareh Rafatirad:
ECoST: Energy-Efficient Co-Locating and Self-Tuning MapReduce Applications. ICPP 2019: 7:1-7:11 - [c38]Katayoun Neshatpour, Farnaz Behnia, Houman Homayoun, Avesta Sasan:
Exploiting Energy-Accuracy Trade-off through Contextual Awareness in Multi-Stage Convolutional Neural Networks. ISQED 2019: 265-270 - [c37]Kimia Zamiri Azar, Farnoud Farahmand, Hadi Mardani Kamali, Shervin Roshanisefat, Houman Homayoun, William Diehl, Kris Gaj, Avesta Sasan:
COMA: Communication and Obfuscation Management Architecture. RAID 2019: 181-195 - [c36]Ali Mirzaeian, Houman Homayoun, Avesta Sasan:
TCD-NPE: A Re-configurable and Efficient Neural Processing Engine, Powered by Novel Temporal-Carry-deferring MACs. ReConFig 2019: 1-8 - [i8]Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan:
Threats on Logic Locking: A Decade Later. CoRR abs/1905.05896 (2019) - [i7]Hosein Mohammadi Makrani, Farnoud Farahmand, Hossein Sayadi, Sara Bondi, Sai Manoj Pudukotai Dinakarrao, Liang Zhao, Avesta Sasan, Houman Homayoun, Setareh Rafatirad:
Pyramid: Machine Learning Framework to Estimate the Optimal Timing and Resource Usage of a High-Level Synthesis Design. CoRR abs/1907.12952 (2019) - [i6]Kimia Zamiri Azar, Farnoud Farahmand, Hadi Mardani Kamali, Shervin Roshanisefat, Houman Homayoun, William Diehl, Kris Gaj, Avesta Sasan:
COMA: Communication and Obfuscation Management Architecture. CoRR abs/1909.00493 (2019) - [i5]Ali Mirzaeian, Houman Homayoun, Avesta Sasan:
NESTA: Hamming Weight Compression-Based Neural Proc. Engine. CoRR abs/1910.00700 (2019) - [i4]Ali Mirzaeian, Houman Homayoun, Avesta Sasan:
TCD-NPE: A Re-configurable and Efficient Neural Processing Engine, Powered by Novel Temporal-Carry-deferring MACs. CoRR abs/1910.06458 (2019) - 2018
- [j7]Katayoun Neshatpour, Maria Malik, Avesta Sasan, Setareh Rafatirad, Tinoosh Mohsenin, Hassan Ghasemzadeh, Houman Homayoun:
Energy-efficient acceleration of MapReduce applications using FPGAs. J. Parallel Distributed Comput. 119: 1-17 (2018) - [j6]Katayoun Neshatpour, Maria Malik, Avesta Sasan, Setareh Rafatirad, Houman Homayoun:
Hardware Accelerated Mappers for Hadoop MapReduce Streaming. IEEE Trans. Multi Scale Comput. Syst. 4(4): 734-748 (2018) - [c35]Ferdinand Brasser, Lucas Davi, Abhijitt Dhavlle, Tommaso Frassetto, Sai Manoj Pudukotai Dinakarrao, Setareh Rafatirad, Ahmad-Reza Sadeghi, Avesta Sasan, Hossein Sayadi, Shaza Zeitouni, Houman Homayoun:
Advances and throwbacks in hardware-assisted security: special session. CASES 2018: 15:1-15:10 - [c34]Hossein Sayadi, Nisarg Patel, Sai Manoj P. D., Avesta Sasan, Setareh Rafatirad, Houman Homayoun:
Ensemble learning for effective run-time hardware-based malware detection: a comprehensive analysis and classification. DAC 2018: 1:1-1:6 - [c33]Katayoun Neshatpour, Farnaz Behnia, Houman Homayoun, Avesta Sasan:
ICNN: An iterative implementation of convolutional neural networks to enable energy and computational complexity aware dynamic approximation. DATE 2018: 551-556 - [c32]Katayoun Neshatpour, Hosein Mohammadi Makrani, Avesta Sasan, Hassan Ghasemzadeh, Setareh Rafatirad, Houman Homayoun:
Design Space Exploration for Hardware Acceleration of Machine Learning Applications in MapReduce. FCCM 2018: 221 - [c31]Shervin Roshanisefat, Hadi Mardani Kamali, Avesta Sasan:
SRCLock: SAT-Resistant Cyclic Logic Locking for Protecting the Hardware. ACM Great Lakes Symposium on VLSI 2018: 153-158 - [c30]Hadi Mardani Kamali, Avesta Sasan:
MUCH-SWIFT: A High-Throughput Multi-Core HW/SW Co-design K-means Clustering Architecture. ACM Great Lakes Symposium on VLSI 2018: 459-462 - [c29]Avesta Sasan, Qi Zhu, Yanzhi Wang, Jae-sun Seo, Tinoosh Mohsenin:
Low Power and Trusted Machine Learning. ACM Great Lakes Symposium on VLSI 2018: 515 - [c28]Shervin Roshanisefat, Harshith K. Thirumala, Kris Gaj, Houman Homayoun, Avesta Sasan:
Benchmarking the Capabilities and Limitations of SAT Solvers in Defeating Obfuscation Schemes. IOLTS 2018: 275-280 - [c27]Hadi Mardani Kamali, Kimia Zamiri Azar, Kris Gaj, Houman Homayoun, Avesta Sasan:
LUT-Lock: A Novel LUT-Based Logic Obfuscation for FPGA-Bitstream and ASIC-Hardware Protection. ISVLSI 2018: 405-410 - [c26]Katayoun Neshatpour, Hosein Mohammadi Makrani, Avesta Sasan, Hassan Ghasemzadeh, Setareh Rafatirad, Houman Homayoun:
Architectural considerations for FPGA acceleration of machine learning applications in MapReduce. SAMOS 2018: 89-96 - [i3]Shervin Roshanisefat, Hadi Mardani Kamali, Avesta Sasan:
SRCLock: SAT-Resistant Cyclic Logic Locking for Protecting the Hardware. CoRR abs/1804.09162 (2018) - [i2]Hadi Mardani Kamali, Kimia Zamiri Azar, Kris Gaj, Houman Homayoun, Avesta Sasan:
LUT-Lock: A Novel LUT-based Logic Obfuscation for FPGA-Bitstream and ASIC-Hardware Protection. CoRR abs/1804.11275 (2018) - [i1]Shervin Roshanisefat, Harshith K. Thirumala, Kris Gaj, Houman Homayoun, Avesta Sasan:
Benchmarking the Capabilities and Limitations of SAT Solvers in Defeating Obfuscation Schemes. CoRR abs/1805.00054 (2018) - 2017
- [c25]Nisarg Patel, Avesta Sasan, Houman Homayoun:
Analyzing Hardware Based Malware Detectors. DAC 2017: 25:1-25:6 - [c24]Maria Malik, Katayoun Neshatpour, Tinoosh Mohsenin, Avesta Sasan, Houman Homayoun:
Big vs little core for energy-efficient Hadoop computing. DATE 2017: 1480-1485 - [c23]Hossein Sayadi, Nisarg Patel, Avesta Sasan, Houman Homayoun:
Machine Learning-Based Approaches for Energy-Efficiency Prediction and Scheduling in Composite Cores Architectures. ICCD 2017: 129-136 - [c22]Bhoopal Gunna, Lakshmi Bhamidipati, Houman Homayoun, Avesta Sasan:
Spatial and temporal scheduling of clock arrival times for IR hot-spot mitigation, reformulation of peak current reduction. ISLPED 2017: 1-6 - [c21]Lakshmi Bhamidipati, Bhoopal Gunna, Houman Homayoun, Avesta Sasan:
A Power Delivery Network and Cell Placement Aware IR-Drop Mitigation Technique: Harvesting Unused Timing Slacks to Schedule Useful Skews. ISVLSI 2017: 272-277 - 2016
- [c20]Katayoun Neshatpour, Avesta Sasan, Houman Homayoun:
Big data analytics on heterogeneous accelerator architectures. CODES+ISSS 2016: 16:1-16:3 - [c19]Katayoun Neshatpour, Arezou Koohi, Farnoud Farahmand, Rajiv V. Joshi, Setareh Rafatirad, Avesta Sasan, Houman Homayoun:
Big biomedical image processing hardware acceleration: A case study for K-means and image filtering. ISCAS 2016: 1134-1137 - [c18]Maria Malik, Avesta Sasan, Rajiv V. Joshi, Setareh Rafatirah, Houman Homayoun:
Characterizing Hadoop applications on microservers for performance and energy efficiency optimizations. ISPASS 2016: 153-154 - [p2]Avesta Sasan, Fadi J. Kurdahi, Ahmed M. Eltawil:
Resizable Data Composer (RDC) Cache: A Near-Threshold Cache Tolerating Process Variation via Architectural Fault Tolerance. Near Threshold Computing 2016: 57-73 - [p1]Avesta Sasan, Fadi J. Kurdahi, Ahmed M. Eltawil:
Erratum to: Chapter 4 Resizable Data Composer (RDC) Cache: A Near-Threshold Cache Tolerating Process Variation via Architectural Fault Tolerance. Near Threshold Computing 2016 - 2015
- [c17]Maria Malik, Setareh Rafatirah, Avesta Sasan, Houman Homayoun:
System and architecture level characterization of big data applications on big and little core server architectures. IEEE BigData 2015: 85-94 - [c16]Katayoun Neshatpour, Maria Malik, Mohammad Ali Ghodrat, Avesta Sasan, Houman Homayoun:
Energy-efficient acceleration of big data analytics applications using FPGAs. IEEE BigData 2015: 115-123 - 2012
- [j5]Avesta Sasan, Kiarash Amiri, Houman Homayoun, Ahmed M. Eltawil, Fadi J. Kurdahi:
Variation Trained Drowsy Cache (VTD-Cache): A History Trained Variation Aware Drowsy Cache for Fine Grain Voltage Scaling. IEEE Trans. Very Large Scale Integr. Syst. 20(4): 630-642 (2012) - [c15]Avesta Sasan, Houman Homayoun, Kiarash Amiri, Ahmed M. Eltawil, Fadi J. Kurdahi:
History & Variation Trained Cache (HVT-Cache): A process variation aware and fine grain voltage scalable cache with active access history monitoring. ISQED 2012: 498-505 - 2011
- [j4]Avesta Sasan, Houman Homayoun, Ahmed M. Eltawil, Fadi J. Kurdahi:
Inquisitive Defect Cache: A Means of Combating Manufacturing Induced Process Variation. IEEE Trans. Very Large Scale Integr. Syst. 19(9): 1597-1609 (2011) - [j3]Houman Homayoun, Avesta Sasan, Jean-Luc Gaudiot, Alexander V. Veidenbaum:
Reducing Power in All Major CAM and SRAM-Based Processor Units via Centralized, Dynamic Resource Size Management. IEEE Trans. Very Large Scale Integr. Syst. 19(11): 2081-2094 (2011) - [j2]Houman Homayoun, Avesta Sasan, Alexander V. Veidenbaum, Hsin-Cheng Yao, Shahin Golshan, Payam Heydari:
MZZ-HVS: Multiple Sleep Modes Zig-Zag Horizontal and Vertical Sleep Transistor Sharing to Reduce Leakage Power in On-Chip SRAM Peripheral Circuits. IEEE Trans. Very Large Scale Integr. Syst. 19(12): 2303-2316 (2011) - 2010
- [c14]Houman Homayoun, Avesta Sasan, Aseem Gupta, Alexander V. Veidenbaum, Fadi J. Kurdahi, Nikil D. Dutt:
Multiple sleep modes leakage control in peripheral circuits of a all major SRAM-based processor units. Conf. Computing Frontiers 2010: 297-308 - [c13]Houman Homayoun, Aseem Gupta, Alexander V. Veidenbaum, Avesta Sasan, Fadi J. Kurdahi, Nikil D. Dutt:
RELOCATE: Register File Local Access Pattern Redistribution Mechanism for Power and Thermal Management in Out-of-Order Embedded Processor. HiPEAC 2010: 216-231
2000 – 2009
- 2009
- [j1]Mohammad A. Makhzan, Amin Khajeh, Ahmed M. Eltawil, Fadi J. Kurdahi:
A Low Power JPEG2000 Encoder With Iterative and Fault Tolerant Error Concealment. IEEE Trans. Very Large Scale Integr. Syst. 17(6): 827-837 (2009) - [c12]Avesta Sasan, Houman Homayoun, Ahmed M. Eltawil, Fadi J. Kurdahi:
A fault tolerant cache architecture for sub 500mV operation: resizable data composer cache (RDC-cache). CASES 2009: 251-260 - [c11]Avesta Sasan, Houman Homayoun, Ahmed M. Eltawil, Fadi J. Kurdahi:
Process Variation Aware SRAM/Cache for aggressive voltage-frequency scaling. DATE 2009: 911-916 - [c10]Mani Zarei, Amir Masoud Rahmani, Avesta Sasan, Mohammad Teshnehlab:
Fuzzy Based Trust Estimation for Congestion Control in Wireless Sensor Networks. INCoS 2009: 233-236 - 2008
- [c9]Houman Homayoun, Mohammad A. Makhzan, Alexander V. Veidenbaum:
Multiple sleep mode leakage control for cache peripheral circuits in embedded processors. CASES 2008: 197-206 - [c8]Houman Homayoun, Sudeep Pasricha, Mohammad A. Makhzan, Alexander V. Veidenbaum:
Dynamic register file resizing and frequency scaling to improve embedded processor performance and energy-delay efficiency. DAC 2008: 68-71 - [c7]Houman Homayoun, Mohammad A. Makhzan, Alexander V. Veidenbaum:
ZZ-HVS: Zig-zag horizontal and vertical sleep transistor sharing to reduce leakage power in on-chip SRAM peripheral circuits. ICCD 2008: 699-706 - [c6]Houman Homayoun, Sudeep Pasricha, Mohammad A. Makhzan, Alexander V. Veidenbaum:
Improving performance and reducing energy-delay with adaptive resource resizing for out-of-order embedded processors. LCTES 2008: 71-78 - [c5]Mohammad A. Makhzan, Ahmed M. Eltawil, Fadi J. Kurdahi:
Architectural and algorithm level fault tolerant techniques for low power high yield multimedia devices. ICSAMOS 2008: 124-131 - [c4]Houman Homayoun, Mohammad A. Makhzan, Jean-Luc Gaudiot, Alexander V. Veidenbaum:
A centralized cache miss driven technique to improve processor power dissipation. ICSAMOS 2008: 195-202 - 2007
- [c3]Fadi J. Kurdahi, Ahmed M. Eltawil, Amin Khajeh Djahromi, Mohammad A. Makhzan, Stanley Cheng:
Error-Aware Design. DSD 2007: 8-15 - [c2]Mohammad A. Makhzan, Amin Khajeh, Ahmed M. Eltawil, Fadi J. Kurdahi:
Limits on voltage scaling for caches utilizing fault tolerant techniques. ICCD 2007: 488-495 - 2006
- [c1]Mohammad A. Makhzan, Kwei-Jay Lin:
Solutions to a Complete Web Service Discovery and Composition. CEC/EEE 2006: 73
Coauthor Index
[j21] [c93] [c92] [c91] [c90] [c89] [i29] [i27] [i26] [j20] [j19] [c88] [c87] [i25] [i24] [i23] [j18] [c86] [c85] [c84] [c83] [c82] [c80] [c79] [c78] [i22] [j17] [j16] [j15] [j13] [j12] [c77] [c75] [c74] [c73] [c71] [c70] [c69] [c68] [c67] [c66] [i21] [j11] [j10] [j9] [c65] [c64] [c63] [c62] [c61] [c60] [c59] [c58] [c57] [c56] [c55] [c54] [c53] [c52] [c51] [c50] [c49] [i20] [i19] [i18] [i17] [i15] [i14] [i13] [i12] [i11] [i10] [j8] [c48] [c47] [c46] [c45] [c44] [c43] [c42] [c41] [c40] [c39] [c38] [c37] [c36] [i8] [i7] [i6] [i5] [i4] [j7] [j6] [c35] [c34] [c33] [c32] [c28] [c27] [c26] [i2] [i1] [c25] [c24] [c23] [c22] [c21] [c20] [c19] [c18] [c17] [c16] [j5] [c15] [j4] [j3] [j2] [c14] [c13] [c12] [c11] [c9] [c8] [c7] [c6] [c4]
Banafsheh S. Latibari
aka: Banafsheh Saber Latibari
aka: Banafsheh Saber Latibari
Najmeh Nazari
aka: Najmeh Nazari Bavarsad
aka: Najmeh Nazari Bavarsad
Setareh Rafatirad
aka: Setareh Rafatirah
aka: Setareh Rafatirah
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