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Jordi Cortadella
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- affiliation: Polytechnic University of Catalonia, Barcelona, Spain
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2020 – today
- 2024
- [j65]Lorenzo Lagostina
, Filippo Minnella
, Jordi Cortadella
, Mario R. Casu
, Mihai T. Lazarescu
, Luciano Lavagno
:
Mix & Latch: Comparison With State-of-the-Art Retiming on a RISC-V Benchmark. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(7): 2229-2233 (2024) - 2023
- [j64]Filippo Minnella
, Jordi Cortadella
, Mario R. Casu
, Mihai T. Lazarescu
, Luciano Lavagno
:
Mix & Latch: An Optimization Flow for High-Performance Designs With Single-Clock Mixed-Polarity Latches and Flip-Flops. IEEE Access 11: 35830-35840 (2023) - [j63]Viktor Teren
, Jordi Cortadella, Tiziano Villa:
Generation of synchronizing state machines from a transition system: A region-based approach. Int. J. Appl. Math. Comput. Sci. 33(1) (2023) - [c133]Viktor Teren, Jordi Cortadella, Tiziano Villa:
Seto: A Framework for the Decomposition of Petri Nets and Transition Systems. DSD 2023: 669-677 - [c132]Jiahui Xu
, Emmet Murphy
, Jordi Cortadella
, Lana Josipovic
:
Eliminating Excessive Dynamism of Dataflow Circuits Using Model Checking. FPGA 2023: 27-37 - 2022
- [j62]Junnan Shan
, Mihai T. Lazarescu
, Jordi Cortadella
, Luciano Lavagno
, Mario R. Casu
:
Fast Energy-Optimal Multikernel DNN-Like Application Allocation on Multi-FPGA Platforms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(4): 1186-1190 (2022) - [j61]Lana Josipovic
, Shabnam Sheikhha, Andrea Guerrieri
, Paolo Ienne, Jordi Cortadella:
Buffer Placement and Sizing for High-Performance Dataflow Circuits. ACM Trans. Reconfigurable Technol. Syst. 15(1): 4:1-4:32 (2022) - [c131]Viktor Teren
, Jordi Cortadella, Tiziano Villa:
Decomposition of transition systems into sets of synchronizing Free-choice Petri Nets. DSD 2022: 165-173 - 2021
- [j60]Junnan Shan
, Mihai T. Lazarescu
, Jordi Cortadella
, Luciano Lavagno
, Mario R. Casu
:
CNN-on-AWS: Efficient Allocation of Multikernel Applications on Multi-FPGA Platforms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(2): 301-314 (2021) - [j59]Alex Vidal-Obiols
, Jordi Cortadella
, Jordi Petit
, Marc Galceran Oms, Ferran Martorell:
Multilevel Dataflow-Driven Macro Placement Guided by RTL Structure and Analytical Methods. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(12): 2542-2555 (2021) - [c130]Viktor Teren
, Jordi Cortadella, Tiziano Villa:
Decomposition of transition systems into sets of synchronizing state machines. DSD 2021: 77-81 - [i1]Viktor Teren, Jordi Cortadella, Tiziano Villa:
Decomposition of transition systems into sets of synchronizing state machines. CoRR abs/2106.13852 (2021) - 2020
- [j58]Juan Segarra
, Jordi Cortadella
, Ruben Gran Tejero
, Víctor Viñals Yúfera
:
Automatic Safe Data Reuse Detection for the WCET Analysis of Systems With Data Caches. IEEE Access 8: 192379-192392 (2020) - [j57]Lucas Machado
, Jordi Cortadella
:
Support-Reducing Decomposition for FPGA Mapping. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(1): 213-224 (2020) - [j56]Junnan Shan
, Mihai T. Lazarescu
, Jordi Cortadella
, Luciano Lavagno
, Mario R. Casu
:
Power-Optimal Mapping of CNN Applications to Cloud-Based Multi-FPGA Platforms. IEEE Trans. Circuits Syst. 67-II(12): 3073-3077 (2020) - [c129]Anna Bernasconi, Valentina Ciriani, Jordi Cortadella, Tiziano Villa:
Computing the full quotient in bi-decomposition by approximation. DATE 2020: 580-585 - [c128]Lana Josipovic
, Shabnam Sheikhha, Andrea Guerrieri
, Paolo Ienne, Jordi Cortadella:
Buffer Placement and Sizing for High-Performance Dataflow Circuits. FPGA 2020: 186-196 - [c127]Maicon Schneider Cardoso, Andrei A. O. Bubolz, Jordi Cortadella, Leomar Rosa, Felipe S. Marques:
Transistor Placement for Automatic Cell Synthesis through Boolean Satisfiability. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [j55]Jordi Petit, Salvador Roura, Josep Carmona, Jordi Cortadella
, Jordi Duch, Omer Giménez, Anaga Mani, Jan Mas, Enric Rodríguez-Carbonell, Enric Rubio, Enric de San Pedro, Divya Venkataramani:
Corrections to "Jutge.org: Characteristics and Experiences". IEEE Trans. Learn. Technol. 12(2): 290 (2019) - [c126]Alberto Moreno
, Danil Sokolov, Jordi Cortadella:
Synthesis from Waveform Transition Graphs. ASYNC 2019: 60-67 - [c125]Junnan Shan, Mario R. Casu
, Jordi Cortadella, Luciano Lavagno, Mihai T. Lazarescu
:
Exact and Heuristic Allocation of Multi-kernel Applications to Multi-FPGA Platforms. DAC 2019: 3 - [c124]Alex Vidal-Obiols, Jordi Cortadella, Jordi Petit, Marc Galceran Oms, Ferran Martorell:
RTL-Aware Dataflow-Driven Macro Placement. DATE 2019: 186-191 - [p1]Jordi Cortadella:
From Nets to Circuits and from Circuits to Nets. Carl Adam Petri: Ideas, Personality, Impact 2019: 227-232 - 2018
- [j54]Alberto Moreno
, Jordi Cortadella
:
State-Based Encoding of Large Asynchronous Controllers. IEEE Access 6: 61503-61518 (2018) - [j53]Jordi Petit
, Salvador Roura, Josep Carmona, Jordi Cortadella, Jordi Duch, Omer Giménez, Anaga Mani, Jan Mas, Enric Rodríguez-Carbonell
, Enric Rubio, Enric de San Pedro, Divya Venkataramani:
Jutge.org: Characteristics and Experiences. IEEE Trans. Learn. Technol. 11(3): 321-333 (2018) - [c123]Alberto Moreno
, Jordi Cortadella:
State Encoding of Asynchronous Controllers Using Pseudo-Boolean Optimization. ASYNC 2018: 9-16 - 2017
- [c122]Andrey Mokhov, Jordi Cortadella, Alessandro de Gennaro:
Process Windows. ACSD 2017: 86-95 - [c121]Jordi Cortadella, Jordi Petit:
A hierarchical mathematical model for automatic pipelining and allocation using elastic systems. ACSSC 2017: 115-120 - [c120]Jordi Cortadella, Alberto Moreno
, Danil Sokolov, Alex Yakovlev, David Lloyd:
Waveform Transition Graphs: A Designer-Friendly Formalism for Asynchronous Behaviours. ASYNC 2017: 73-74 - [c119]Alberto Moreno
, Jordi Cortadella:
Synthesis of All-Digital Delay Lines. ASYNC 2017: 75-82 - [c118]Alex Vidal-Obiols, Jordi Cortadella, Jordi Petit:
Under-the-Cell Routing to Improve Manufacturability. ACM Great Lakes Symposium on VLSI 2017: 125-130 - [c117]Lucas Machado, Jordi Cortadella
:
Boolean Decomposition for AIG Optimization. ACM Great Lakes Symposium on VLSI 2017: 143-148 - [c116]Lucas Machado, Antoni Roca Perez, Jordi Cortadella:
Voltage Noise Analysis with Ring Oscillator Clocks. ISVLSI 2017: 1-6 - 2016
- [j52]Palkesh Jain
, Jordi Cortadella
, Sachin S. Sapatnekar
:
A Fast and Retargetable Framework for Logic-IP-Internal Electromigration Assessment Comprehending Advanced Waveform Effects. IEEE Trans. Very Large Scale Integr. Syst. 24(6): 2345-2358 (2016) - [c115]Jordi Cortadella
, Marc Lupon, Alberto Moreno
, Antoni Roca, Sachin S. Sapatnekar
:
Ring Oscillator Clocks and Margins. ASYNC 2016: 19-26 - [c114]Javier de San Pedro, Thomas Bourgeat, Jordi Cortadella
:
Specification Mining for Asynchronous Controllers. ASYNC 2016: 107-114 - [c113]Javier de San Pedro, Jordi Cortadella
:
Discovering Duplicate Tasks in Transition Systems for the Simplification of Process Models. BPM 2016: 108-124 - [c112]Javier de San Pedro, Jordi Cortadella
:
Mining structured petri nets for the visualization of process behavior. SAC 2016: 839-846 - 2015
- [j51]Jordi Cortadella
, Marc Galceran Oms, Michael Kishinevsky, Sachin S. Sapatnekar
:
RTL Synthesis: From Logic Synthesis to Automatic Pipelining. Proc. IEEE 103(11): 2061-2075 (2015) - [j50]Marco Cannizzaro, Salomon Beer, Jordi Cortadella
, Ran Ginosar, Luciano Lavagno:
SafeRazor: Metastability-Robust Adaptive Clocking in Resilient Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(9): 2238-2247 (2015) - [c111]Palkesh Jain, Sachin S. Sapatnekar
, Jordi Cortadella
:
A retargetable and accurate methodology for logic-IP-internal electromigration assessment. ASP-DAC 2015: 346-351 - [c110]Javier de San Pedro
, Josep Carmona
, Jordi Cortadella
:
Log-Based Simplification of Process Models. BPM 2015: 457-474 - [c109]Jordi Cortadella
, Luciano Lavagno, Pedro Lopez, Marc Lupon, Alberto Moreno
, Antoni Roca, Sachin S. Sapatnekar
:
Reactive clocks with variability-tracking jitter. ICCD 2015: 511-518 - [c108]Palkesh Jain, Sachin S. Sapatnekar
, Jordi Cortadella
:
Stochastic and topologically aware electromigration analysis for clock skew. IRPS 2015: 3 - 2014
- [j49]Jordi Cortadella
, Jordi Petit, Sergio Gómez, Francesc Moll
:
A Boolean Rule-Based Approach for Manufacturability-Aware Cell Routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(3): 409-422 (2014) - [j48]Josep Carmona
, Jordi Cortadella
:
Process Discovery Algorithms Using Numerical Abstract Domains. IEEE Trans. Knowl. Data Eng. 26(12): 3064-3076 (2014) - [c107]Salomon Beer, Marco Cannizzaro, Jordi Cortadella
, Ran Ginosar, Luciano Lavagno:
Metastability in Better-Than-Worst-Case Designs. ASYNC 2014: 101-102 - [c106]Giorgos Dimitrakopoulos, I. Seitanidis, Anastasios Psarras, K. Tsiouris, Pavlos M. Mattheakis, Jordi Cortadella:
Hardware primitives for the synthesis of multithreaded elastic systems. DATE 2014: 1-4 - [c105]Javier de San Pedro
, Jordi Cortadella
, Antoni Roca:
A hierarchical approach for generating regular floorplans. ICCAD 2014: 655-662 - 2013
- [j47]Ferdinand Peper, Jia Lee, Josep Carmona
, Jordi Cortadella
, Kenichi Morita
:
Brownian Circuits: Fundamentals. ACM J. Emerg. Technol. Comput. Syst. 9(1): 3:1-3:24 (2013) - [j46]Nikita Nikitin, Javier de San Pedro
, Jordi Cortadella
:
Architectural Exploration of Large-Scale Hierarchical Chip Multiprocessors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(10): 1569-1582 (2013) - [j45]Jordi Cortadella
:
Area-Optimal Transistor Folding for 1-D Gridded Cell Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(11): 1708-1721 (2013) - [c104]Jordi Cortadella
, Javier de San Pedro
, Nikita Nikitin, Jordi Petit:
Physical-aware system-level design for tiled hierarchical chip multiprocessors. ISPD 2013: 3-10 - [c103]Javier de San Pedro
, Nikita Nikitin, Jordi Cortadella
, Jordi Petit:
Physical planning for the architectural exploration of large-scale chip multiprocessors. NOCS 2013: 1-2 - 2012
- [c102]Nikita Nikitin, Jordi Cortadella
:
Static Task Mapping for Tiled Chip Multiprocessors with Multiple Voltage Islands. ARCS 2012: 50-62 - [c101]Nikita Nikitin, Javier de San Pedro
, Josep Carmona
, Jordi Cortadella
:
Analytical Performance Modeling of Hierarchical Interconnect Fabrics. NOCS 2012: 107-114 - [c100]Javier de San Pedro
, Josep Carmona
, Jordi Cortadella
, Jordi Petit:
Integrating formal verification in an online judge for e-Learning logic circuit design. SIGCSE 2012: 451-456 - 2011
- [j44]Josep Carmona
, Jorge Júlvez, Jordi Cortadella
, Michael Kishinevsky:
A Scheduling Strategy for Synchronous Elastic Designs. Fundam. Informaticae 108(1-2): 1-21 (2011) - [j43]Marc Galceran Oms, Alexander Gotmanov, Jordi Cortadella
, Michael Kishinevsky:
Microarchitectural Transformations Using Elasticity. ACM J. Emerg. Technol. Comput. Syst. 7(4): 18:1-18:24 (2011) - 2010
- [j42]Jorge Júlvez, Jordi Cortadella
, Michael Kishinevsky:
On the Performance Evaluation of Multi-Guarded Marked Graphs with Single-Server Semantics. Discret. Event Dyn. Syst. 20(3): 377-407 (2010) - [j41]Josep Carmona
, Jordi Cortadella
, Michael Kishinevsky:
New Region-Based Algorithms for Deriving Bounded Petri Nets. IEEE Trans. Computers 59(3): 371-384 (2010) - [c99]Marc Galceran Oms, Jordi Cortadella, Dmitry Bufistov, Michael Kishinevsky:
Automatic microarchitectural pipelining. DATE 2010: 961-964 - [c98]Marc Galceran Oms, Jordi Cortadella
, Michael Kishinevsky:
Symbolic performance analysis of elastic systems. ICCAD 2010: 778-785 - [c97]Jordi Cortadella
, Marc Galceran Oms, Michael Kishinevsky:
Elastic systems. MEMOCODE 2010: 149-158 - [c96]Nikita Nikitin, Satrajit Chatterjee, Jordi Cortadella
, Michael Kishinevsky, Ümit Y. Ogras
:
Physical-Aware Link Allocation and Route Assignment for Chip Multiprocessing. NOCS 2010: 125-134 - [c95]Josep Carmona
, Jordi Cortadella
:
Process Mining Meets Abstract Interpretation. ECML/PKDD (1) 2010: 184-199
2000 – 2009
- 2009
- [j40]David Bañeres
, Jordi Cortadella
, Michael Kishinevsky:
A Recursive Paradigm to Solve Boolean Relations. IEEE Trans. Computers 58(4): 512-527 (2009) - [j39]Josep Carmona
, Jordi Cortadella
, Michael Kishinevsky, Alexander Taubin:
Elastic Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(10): 1437-1455 (2009) - [j38]Jordi Cortadella
, Alexander Taubin:
Guest Editorial: Special Section on Asynchronous Circuits and Systems. IEEE Trans. Very Large Scale Integr. Syst. 17(7): 853-854 (2009) - [c94]Josep Carmona
, Jorge Júlvez, Jordi Cortadella
, Michael Kishinevsky:
Scheduling Synchronous Elastic Designs. ACSD 2009: 52-59 - [c93]Josep Carmona
, Jordi Cortadella
, Michael Kishinevsky:
Genet: A Tool for the Synthesis and Mining of Petri Nets. ACSD 2009: 181-185 - [c92]Josep Carmona
, Jordi Cortadella
, Michael Kishinevsky:
Divide-and-Conquer Strategies for Process Mining. BPM 2009: 327-343 - [c91]Emre Tuncer, Jordi Cortadella, Luciano Lavagno:
Enabling adaptability through elastic clocks. DAC 2009: 8-10 - [c90]Dmitry Bufistov, Jordi Cortadella
, Marc Galceran Oms, Jorge Júlvez, Michael Kishinevsky:
Retiming and recycling for elastic systems with early evaluation. DAC 2009: 288-291 - [c89]Marc Galceran Oms, Jordi Cortadella
, Michael Kishinevsky:
Speculation in elastic systems. DAC 2009: 292-295 - [c88]David Bañeres
, Jordi Cortadella, Michael Kishinevsky:
Variable-latency design by function speculation. DATE 2009: 1704-1709 - [c87]David Bañeres
, Jordi Cortadella
, Michael Kishinevsky:
Timing-driven N-way decomposition. ACM Great Lakes Symposium on VLSI 2009: 363-368 - [c86]Jonas Casanova, Jordi Cortadella
:
Multi-level clustering for clock skew optimization. ICCAD 2009: 547-554 - [c85]Nikita Nikitin, Jordi Cortadella
:
A performance analytical model for Network-on-Chip with constant service time routers. ICCAD 2009: 571-578 - 2008
- [j37]Josep Carmona
, Jordi Cortadella
, Yousuke Takada, Ferdinand Peper:
Formal methods for the analysis and synthesis of nanometer-scale cellular arrays. ACM J. Emerg. Technol. Comput. Syst. 4(2): 8:1-8:27 (2008) - [j36]Josep Carmona
, Jordi Cortadella
:
Encoding Large Asynchronous Controllers With ILP Techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(1): 20-33 (2008) - [j35]Jordi Cortadella
, Michael Kishinevsky, Dmitry Bufistov, Josep Carmona, Jorge Júlvez:
Elasticity and Petri Nets. Trans. Petri Nets Other Model. Concurr. 1: 221-249 (2008) - [c84]Michael Kishinevsky, Jordi Cortadella
:
Time elastic digital systems and Petri Nets. ACSD 2008: 1-2 - [c83]Josep Carmona
, Jordi Cortadella
, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev
:
A Symbolic Algorithm for the Synthesis of Bounded Petri Nets. Petri Nets 2008: 92-111 - [c82]Josep Carmona, Jordi Cortadella
, Michael Kishinevsky:
A Region-Based Algorithm for Discovering Petri Nets from Event Logs. BPM 2008: 358-373 - [c81]Timothy Kam, Michael Kishinevsky, Jordi Cortadella
, Marc Galceran Oms:
Correct-by-construction microarchitectural pipelining. ICCAD 2008: 434-441 - [c80]Dmitry Bufistov, Jorge Júlvez, Jordi Cortadella
:
Performance optimization of elastic systems using buffer resizing and buffer insertion. ICCAD 2008: 442-448 - [c79]Kyller Costa Gorgônio
, Jordi Cortadella
:
Hardware Synthesis for Asynchronous Communications Mechanisms. SCCC 2008: 135-143 - 2007
- [j34]Alexander Taubin, Jordi Cortadella
, Luciano Lavagno, Alex Kondratyev, Ad M. G. Peeters:
Design Automation of Real-Life Asynchronous Devices and Systems. Found. Trends Electron. Des. Autom. 2(1): 1-133 (2007) - [j33]Robert Clarisó, Jordi Cortadella:
Verification of Concurrent Systems with Parametric Delays Using Octahedra. Fundam. Informaticae 78(1): 1-33 (2007) - [j32]Kyller Costa Gorgônio, Jordi Cortadella, Fei Xia, Alexandre Yakovlev:
Automating Synthesis of Asynchronous Communication Mechanisms. Fundam. Informaticae 78(1): 75-100 (2007) - [j31]Robert Clarisó
, Jordi Cortadella
:
The octahedron abstract domain. Sci. Comput. Program. 64(1): 115-139 (2007) - [c78]Kyller Costa Gorgônio
, Jordi Cortadella
, Fei Xia:
A Compositional Method for the Synthesis of Asynchronous Communication Mechanisms. ICATPN 2007: 144-163 - [c77]Jordi Cortadella
, Michael Kishinevsky:
Synchronous Elastic Circuits with Early Evaluation and Token Counterflow. DAC 2007: 416-419 - [c76]David Bañeres, Jordi Cortadella, Michael Kishinevsky:
Layout-aware gate duplication and buffer insertion. DATE 2007: 1367-1372 - [c75]Dmitry Bufistov, Jordi Cortadella
, Michael Kishinevsky, Sachin S. Sapatnekar
:
A general model for performance optimization of sequential systems. ICCAD 2007: 362-369 - 2006
- [j30]Josep Carmona
, José Manuel Colom
, Jordi Cortadella
, Fernando García-Vallés:
Synthesis of asynchronous controllers using integer linear programming. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(9): 1637-1651 (2006) - [j29]Jordi Cortadella
, Alex Kondratyev, Luciano Lavagno, Christos P. Sotiriou:
Desynchronization: Synthesis of Asynchronous Circuits From Synchronous Specifications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(10): 1904-1921 (2006) - [c74]Michael Kishinevsky, Jordi Cortadella
, Bill Grundmann, Sava Krstic, John O'Leary:
Synchronous Elastic Circuits. CSR 2006: 3-5 - [c73]Jordi Cortadella
, Michael Kishinevsky, Bill Grundmann:
Synthesis of synchronous elastic architectures. DAC 2006: 657-662 - [c72]Josep Carmona
, Jordi Cortadella
:
State encoding of large asynchronous controllers. DAC 2006: 939-944 - [c71]Sava Krstic, Jordi Cortadella
, Michael Kishinevsky, John O'Leary:
Synchronous Elastic Networks. FMCAD 2006: 19-30 - [c70]David Bañeres, Jordi Cortadella
, Michael Kishinevsky:
Dominator-based partitioning for delay optimization. ACM Great Lakes Symposium on VLSI 2006: 67-72 - [c69]Jorge Júlvez, Jordi Cortadella
, Michael Kishinevsky:
Performance analysis of concurrent systems with early evaluation. ICCAD 2006: 448-455 - [c68]Josep Carmona
, Jordi Cortadella
, Yousuke Takada, Ferdinand Peper:
From molecular interactions to gates: a systematic approach. ICCAD 2006: 891-898 - 2005
- [j28]Jordi Cortadella
, Alex Kondratyev, Luciano Lavagno, Claudio Passerone, Yosinori Watanabe:
Quasi-static scheduling of independent tasks for reactive systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(10): 1492-1514 (2005) - [c67]Robert Clarisó
, Jordi Cortadella
:
Verification of Concurrent Systems with Parametric Delays Using Octahedra. ACSD 2005: 122-131 - [c66]Jordi Cortadella
, Kyller Costa Gorgônio
, Fei Xia, Alexandre Yakovlev
:
Automating Synthesis of Asynchronous Communication Mechanisms. ACSD 2005: 166-175 - [c65]Robert Clarisó, Enric Rodríguez-Carbonell
, Jordi Cortadella
:
Derivation of Non-structural Invariants of Petri Nets Using Abstract Interpretation. ICATPN 2005: 188-207 - 2004
- [j27]Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Alexander Taubin, Yosinori Watanabe:
Quasi-static Scheduling for Concurrent Architectures. Fundam. Informaticae 62(2): 171-196 (2004) - [c64]Robert Clarisó, Jordi Cortadella:
Verification of timed circuits with symbolic delays. ASP-DAC 2004: 628-633 - [c63]Ivan Blunno, Jordi Cortadella
, Alex Kondratyev, Luciano Lavagno, Kelvin Lwin, Christos P. Sotiriou:
Handshake Protocols for De-Synchronization. ASYNC 2004: 149-158 - [c62]David Bañeres
, Jordi Cortadella
, Michael Kishinevsky:
A recursive paradigm to solve Boolean relations. DAC 2004: 416-421 - [c61]Jordi Cortadella
, Alex Kondratyev, Luciano Lavagno, Kelvin Lwin, Christos P. Sotiriou:
From Synchronous to Asynchronous: An Automatic Approach. DATE 2004: 1368-1369 - [c60]Jordi Cortadella
, Alex Kondratyev, Luciano Lavagno, Christos P. Sotiriou:
Coping with The Variability of Combinational Logic Delays. ICCD 2004: 505-508 - [c59]Robert Clarisó, Jordi Cortadella
:
The Octahedron Abstract Domain. SAS 2004: 312-327 - [c58]Peter A. Beerel, Jordi Cortadella
, Alex Kondratyev:
Bridging the Gap between Asynchronous Design and Designers. VLSI Design 2004: 18-20 - [c57]Nilesh Modi, Jordi Cortadella
:
Boolean Decomposition Using Two-literal Divisors. VLSI Design 2004: 765-768 - [e2]Jordi Cortadella
, Wolfgang Reisig:
Applications and Theory of Petri Nets 2004, 25th International Conference, ICATPN 2004, Bologna, Italy, June 21-25, 2004, Proceedings. Lecture Notes in Computer Science 3099, Springer 2004, ISBN 3-540-22236-7 [contents] - 2003
- [j26]Jordi Cortadella
:
Timing-driven logic bi-decomposition. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(6): 675-685 (2003) - [c56]Josep Carmona, Jordi Cortadella
, Victor Khomenko, Alexandre Yakovlev:
Synthesis of Asynchronous Hardware from Petri Nets. Lectures on Concurrency and Petri Nets 2003: 345-401 - [c55]Jordi Cortadella
, Alex Kondratyev, Luciano Lavagno, Yosinori Watanabe:
Quasi-Static Scheduling for Concurrent Architectures. ACSD 2003: 29-40 - [c54]Josep Carmona, Jordi Cortadella:
ILP Models for the Synthesis of Asynchronous Control Circuits. ICCAD 2003: 818-826 - 2002
- [j25]Josep Carmona, Jordi Cortadella, Enric Pastor:
A structural encoding technique for the synthesis of asynchronous circuits. Fundam. Informaticae 50(2): 135-154 (2002) - [j24]Hiroshi Saito, Alex Kondratyev, Jordi Cortadella, Luciano Lavagno, Alex Yakovlev, Takashi Nanya:
Design of Asynchronous Controllers with Delay Insensitive Interface. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(12): 2577-2585 (2002) - [j23]Jordi Cortadella
, Michael Kishinevsky, Steven M. Burns, Alex Kondratyev, Luciano Lavagno, Ken S. Stevens, Alexander Taubin, Alexandre Yakovlev
:
Lazy transition systems and asynchronous circuit synthesis withrelative timing assumptions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(2): 109-130 (2002) - [c53]Josep Carmona, Jordi Cortadella
, Enric Pastor:
Synthesis of Reactive Systems: Application to Asynchronous Circuit Design. Concurrency and Hardware Design 2002: 108-151 - [c52]Jordi Cortadella
, Alex Kondratyev, Luciano Lavagno, Claudio Passerone, Yosinori Watanabe:
Quasi-Static Scheduling of Independent Tasksfor Reactive Systems. ICATPN 2002: 80-100 - [c51]Marco A. Peña, Jordi Cortadella
, Alexander B. Smirnov, Enric Pastor
:
A Case Study for the Verification of Complex Timed Circuits: IPCMOS. DATE 2002: 44-51 - [c50]Josep Carmona, Jordi Cortadella
:
Input/Output Compatibility of Reactive Systems. FMCAD 2002: 360-377 - [c49]Jordi Cortadella:
Bi-Decomposition and Tree-Height Reduction for Timing Optimization. IWLS 2002: 233-238 - [c48]Jordi Cortadella, Alexandre Yakovlev, Jim D. Garside:
Logic Design of Asynchronous Circuits (Tutorial Abstract). ASP-DAC/VLSI Design 2002: 26- - [e1]Jordi Cortadella
, Alexandre Yakovlev, Grzegorz Rozenberg:
Concurrency and Hardware Design, Advances in Petri Nets. Lecture Notes in Computer Science 2549, Springer 2002, ISBN 3-540-00199-9 [contents] - 2001
- [j22]Enric Pastor
, Jordi Cortadella
, Oriol Roig:
Symbolic Analysis of Bounded Petri Nets. IEEE Trans. Computers 50(5): 432-448 (2001) - [c47]Josep Carmona
, Jordi Cortadella
, Enric Pastor
:
A structural encoding technique for the synthesis of asynchronous circuits. ACSD 2001: 157-166 - [c46]Gianluca Cornetta
, Jordi Cortadella
:
A Multi-Radix Approach to Asynchronous Division. ASYNC 2001: 25- - [c45]Gianluca Cornetta
, Jordi Cortadella:
Asynchronous multipliers with variable-delay counters. ICECS 2001: 701-705 - 2000
- [c44]Jordi Cortadella, Gabriel Valiente:
A Relational View of Subgraph Isomorphism. RelMiCS 2000: 45-54 - [c43]Jordi Cortadella
, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev:
Hardware and Petri Nets: Application to Asynchronous Circuit Design. ICATPN 2000: 1-15 - [c42]Marco A. Peña, Jordi Cortadella
, Enric Pastor
, Alex Kondratyev:
Formal Verification of Safety Properties in Timed Circuits. ASYNC 2000: 2-11 - [c41]Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Marc Massot, Sandra Moral, Claudio Passerone, Yosinori Watanabe, Alberto L. Sangiovanni-Vincentelli:
Task generation and compile-time scheduling for mixed data-control embedded software. DAC 2000: 489-494
1990 – 1999
- 1999
- [j21]Fermín Sánchez
, Jordi Cortadella
, Rosa M. Badia:
Optimal exploration of the unrolling degree for software pipelining. J. Syst. Archit. 45(6-7): 505-517 (1999) - [j20]Alex Kondratyev, Jordi Cortadella
, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev:
Logic decomposition of speed-independent circuits. Proc. IEEE 87(2): 347-362 (1999) - [j19]Jordi Cortadella
, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Enric Pastor
, Alexandre Yakovlev
:
Decomposition and technology mapping of speed-independent circuits using Boolean relations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(9): 1221-1236 (1999) - [c40]Enric Pastor
, Jordi Cortadella
, Marco A. Peña:
Structural Methods to Improve the Symbolic Analysis of Petri Nets. ICATPN 1999: 26-45 - [c39]Alexander Taubin, Alex Kondratyev, Jordi Cortadella
, Luciano Lavagno:
Behavioral Transformations to Increase Noise Immunity in Asynchronous Specifications. ASYNC 1999: 36- - [c38]Alex Kondratyev, Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev:
Automatic Synthesis and Optimization of Partially Specified Asynchronous Systems. DAC 1999: 110-115 - [c37]Ken S. Stevens, Shai Rotem, Steven M. Burns, Jordi Cortadella
, Ran Ginosar, Michael Kishinevsky, Marly Roncken:
CAD Directions for High Performance Asynchronous Circuits. DAC 1999: 116-121 - [c36]Gianluca Cornetta
, Jordi Cortadella
:
A Radix-16 SRT Division Unit with Speculation of the Quotient Digits. Great Lakes Symposium on VLSI 1999: 74-77 - [c35]Hiroshi Saito, Alex Kondratyev, Jordi Cortadella, Luciano Lavagno, Alexandre Yakovlev:
What is the cost of delay insensitivity? ICCAD 1999: 316-323 - [c34]Jordi Cortadella, Michael Kishinevsky, Steven M. Burns, Ken S. Stevens:
Synthesis of asynchronous control circuits with automatically generated relative timing assumptions. ICCAD 1999: 324-331 - 1998
- [j18]Enric Musoll, Jordi Cortadella:
Register-Transfer Level Transformations for Low-Power Data-Paths. Integr. Comput. Aided Eng. 5(4): 315-332 (1998) - [j17]Alex Kondratyev, Michael Kishinevsky, Alexander Taubin, Jordi Cortadella
, Luciano Lavagno:
The Use of Petri Nets for the Design and Verification of Asynchronous Circuits and Systems. J. Circuits Syst. Comput. 8(1): 67-118 (1998) - [j16]Fermín Sánchez, Jordi Cortadella:
Reducing Register Pressure in Software Pipelining. J. Inf. Sci. Eng. 14(1): 265-279 (1998) - [j15]Jordi Cortadella
, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev
:
Deriving Petri Nets for Finite Transition Systems. IEEE Trans. Computers 47(8): 859-882 (1998) - [j14]Enric Pastor
, Jordi Cortadella
, Alex Kondratyev, Oriol Roig:
Structural methods for the synthesis of speed-independent circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(11): 1108-1129 (1998) - [j13]Enric Musoll, Tomás Lang, Jordi Cortadella
:
Working-zone encoding for reducing the energy in microprocessor address buses. IEEE Trans. Very Large Scale Integr. Syst. 6(4): 568-572 (1998) - [c33]Jordi Cortadella:
Combining Structural and Symbolic Methods for the Verification of Concurrent Systems. ACSD 1998: 2-7 - [c32]Alex Kondratyev, Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexander Taubin, Alexandre Yakovlev:
Identifying State Coding Conflicts in Asynchronous System Specifications Using Petri Net Unfoldings. ACSD 1998: 152-163 - [c31]Michael Kishinevsky, Jordi Cortadella, Alex Kondratyev:
Asynchronous Interface Specification, Analysis and Synthesis. DAC 1998: 2-7 - [c30]Enric Pastor
, Jordi Cortadella
:
Efficient Encoding Schemes for Symbolic Analysis of Petri Nets. DATE 1998: 790-795 - [c29]Jordi Cortadella
, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexander Taubin, Alexandre Yakovlev:
Lazy transition systems: application to timing optimization of asynchronous circuits. ICCAD 1998: 324-331 - [c28]Tomás Lang, Enric Musoll, Jordi Cortadella:
Extension of the working-zone-encoding method to reduce the energy on the microprocessor data bus. ICCD 1998: 414-419 - 1997
- [j12]Jordi Cortadella
, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev
:
A region-based theory for state assignment in speed-independent circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(8): 793-812 (1997) - [c27]Michael Kishinevsky, Jordi Cortadella
, Alex Kondratyev, Luciano Lavagno, Alexander Taubin, Alexandre Yakovlev
:
Coupling Asynchrony and Interrupts: Place Chart Nets. ICATPN 1997: 328-347 - [c26]Alex Kondratyev, Michael Kishinevsky, Jordi Cortadella, Luciano Lavagno, Alexandre Yakovlev:
Technology Mapping for Speed-Independent Circuits: Decomposition and Resynthesis. ASYNC 1997: 240-253 - [c25]Alexei L. Semenov, Alexandre Yakovlev, Enric Pastor, Marco A. Peña, Jordi Cortadella, Luciano Lavagno:
Partial order based approach to synthesis of speed-independent circuits. ASYNC 1997: 254- - [c24]Alexei L. Semenov, Alexandre Yakovlev, Enric Pastor, Marco A. Peña, Jordi Cortadella:
Synthesis of Speed-Independent Circuits from STG-Unfolding Segment. DAC 1997: 16-21 - [c23]Oriol Roig, Jordi Cortadella
, Marco A. Peña, Enric Pastor:
Automatic Generation of Synchronous Test Patterns for Asynchronous Circuits. DAC 1997: 620-625 - [c22]Jordi Cortadella
, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev:
Technology mapping of speed-independent circuits based on combinational decomposition and resynthesis. ED&TC 1997: 98-105 - [c21]Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Enric Pastor, Alexandre Yakovlev:
Decomposition and technology mapping of speed-independent circuits using Boolean relations. ICCAD 1997: 220-227 - [c20]Enric Musoll, Tomás Lang, Jordi Cortadella
:
Exploiting the locality of memory references to reduce the address bus energy. ISLPED 1997: 202-207 - 1996
- [c19]Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alex Yakovlev:
Complete state encoding based on the theory of regions. ASYNC 1996: 36-47 - [c18]Marco A. Peña, Jordi Cortadella:
Combining process algebras and Petri nets for the specification and synthesis of asynchronous circuits. ASYNC 1996: 222-232 - [c17]Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev:
Methodology and Tools for State Encoding in Asynchronous Circuit Synthesis. DAC 1996: 63-66 - [c16]Enric Musoll, Jordi Cortadella:
Optimizing CMOS Circuits for Low Power Using Transistor Reordering. ED&TC 1996: 219-223 - [c15]Enric Pastor, Oriol Roig, Jordi Cortadella, Alex Kondratyev:
Structural Methods for the Synthesis of Speed-Independent Circuits. ED&TC 1996: 340-349 - [c14]Fermín Sánchez, Jordi Cortadella
:
RESIS: A New Methodology for Register Optimization in Software Pipelining. Euro-Par, Vol. II 1996: 824-832 - 1995
- [c13]Oriol Roig, Jordi Cortadella
, Enric Pastor:
Verification of Asynchronous Circuits by BDD-based Model Checking of Petri Nets. Application and Theory of Petri Nets 1995: 374-391 - [c12]Oriol Roig, Jordi Cortadella
, Enric Pastor:
Hierarchical gate-level verification of speed-independent circuits. ASYNC 1995: 128-137 - [c11]Alex Kondratyev, Jordi Cortadella
, Michael Kishinevsky, Enric Pastor, Oriol Roig, Alexandre Yakovlev:
Checking signal transition graph implementability by symbolic BDD traversal. ED&TC 1995: 325-332 - [c10]Enric Pastor, Jordi Cortadella
, Oriol Roig:
A new look at the conditions for the synthesis of speed-independent circuits. Great Lakes Symposium on VLSI 1995: 230- - [c9]Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev:
Synthesizing Petri nets from state-based models. ICCAD 1995: 164-171 - [c8]Enric Musoll, Jordi Cortadella
:
High-level synthesis techniques for reducing the activity of functional units. ISLPD 1995: 99-104 - [c7]Enric Musoll, Jordi Cortadella
:
Scheduling and resource binding for low power. ISSS 1995: 104-109 - 1994
- [j11]Jordi Cortadella
, Tomás Lang:
High-Radix Division and Square-Root with Speculation. IEEE Trans. Computers 43(8): 919-931 (1994) - [c6]Enric Pastor, Oriol Roig, Jordi Cortadella
, Rosa M. Badia:
Petri Net Analysis Using Boolean Manipulation. Application and Theory of Petri Nets 1994: 416-435 - [c5]Jordi Cortadella, Luciano Lavagno, Peter Vanbekbergen, Alex Yakovlev:
Designing asynchronous circuits from behavioural specifications with internal conflicts. ASYNC 1994: 106-115 - [c4]Jordi Cortadella, José A. B. Fortes, Edward A. Lee:
Design and Prototyping of Digital Signal Processing (DSP) Systems: Introduction. HICSS (1) 1994: 56-57 - 1993
- [j10]Jordi Cortadella
:
Session B2: Processor Architecture II. Microprocess. Microprogramming 38(1-5): 131 (1993) - [j9]Fermín Sánchez
, Jordi Cortadella
:
Resource-constrained pipelining based on loop transformations. Microprocess. Microprogramming 38(1-5): 429-436 (1993) - [j8]Rosa M. Badia
, Jordi Cortadella
:
Glass: a graph-theoretical approach for global binding. Microprocess. Microprogramming 38(1-5): 775-782 (1993) - [j7]Mateo Valero, Jordi Cortadella
, Antonio González:
Chairmen's introduction. Microprocess. Microprogramming 38(1-5) (1993) - [c3]Jordi Cortadella
, Tomás Lang:
Division with speculation of quotient digits. IEEE Symposium on Computer Arithmetic 1993: 87-94 - [c2]Enric Pastor, Jordi Cortadella
:
Polynomial algorithms for the synthesis for hazard-free circuits from signal transition graphs. ICCAD 1993: 250-254 - [c1]Enric Pastor, Jordi Cortadella
:
An Efficient Unique State Coding Algorithm for Signal Transition Graphs. ICCD 1993: 174-177 - 1992
- [j6]Jordi Cortadella
, José M. Llabería
:
Evaluation of A + B = K Conditions Without Carry Propagation. IEEE Trans. Computers 41(11): 1484-1488 (1992) - 1991
- [j5]Jordi Cortadella
, Rosa M. Badia
, Eduard Ayguadé
:
Scheduling in a continuous area-time design space. Microprocessing and Microprogramming 32(1-5): 199-206 (1991)
1980 – 1989
- 1989
- [j4]Teodor Jové
, Jordi Cortadella
:
Reduced instruction buffer for RISC architectures. Microprocessing and Microprogramming 27(1-5): 87-93 (1989) - 1988
- [j3]Antonio González
, José María Llabería
, Jordi Cortadella
:
A mechanism for reducing the cost of branches in RISC architectures. Microprocess. Microprogramming 24(1-5): 565-572 (1988) - [j2]Jordi Cortadella
, Teodor Jové
:
Designing a branch target buffer for executing branches with zero time cost in a RISC processor. Microprocess. Microprogramming 24(1-5): 573-580 (1988) - [j1]Jordi Cortadella
, Teodor Jové:
Dynamic RAM for on-chip instruction caches. SIGARCH Comput. Archit. News 16(4): 45-50 (1988)
Coauthor Index
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