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2020 – today
- 2024
[c23]Merlin Angel Kelly
, Lingqian Yang, Alexander Thomas, Pete Donnelly, Youngjun Cho:
WheelSkills: Prototyping Manual Wheelchair Training through Immersive Visual Feedback. CHI Extended Abstracts 2024: 373:1-373:8- [c22]Alexander Thomas, Jianan Chen, Anna Hella-Szabo, Merlin Angel Kelly, Tom Carlson:
High stimuli virtual reality training for a brain controlled robotic wheelchair. ICRA 2024: 11305-11311 - [i3]Alexander Thomas, Shubham Mishra, Kaiyuan Chen, John Kubiatowicz:
Lightweight, Secure and Stateful Serverless Computing with PSL. CoRR abs/2410.20004 (2024) - 2022
- [c21]Dayeol Lee, Kevin Cheang, Alexander Thomas, Catherine Lu, Pranav Gaddamadugu, Anjo Vahldiek-Oberwagner, Mona Vij, Dawn Song, Sanjit A. Seshia, Krste Asanovic:
Cerberus: A Formal Approach to Secure and Efficient Enclave Memory Sharing. CCS 2022: 1871-1885 - [i2]Dayeol Lee, Kevin Cheang, Alexander Thomas, Catherine Lu, Pranav Gaddamadugu, Anjo Vahldiek-Oberwagner, Mona Vij, Dawn Song, Sanjit A. Seshia, Krste Asanovic:
Cerberus: A Formal Approach to Secure and Efficient Enclave Memory Sharing. CoRR abs/2209.15253 (2022) - [i1]Kaiyuan Chen, Alexander Thomas, Hanming Lu, William Mullen, Jeffrey Ichnowski, Rahul Arya, Nivedha Krishnakumar, Ryan Teoh, Willis Wang, Anthony D. Joseph, John Kubiatowicz:
SCL: A Secure Concurrency Layer For Paranoid Stateful Lambdas. CoRR abs/2210.11703 (2022)
2010 – 2019
- 2016
- [c20]Andrew S. Grimshaw, Md Anindya Prodhan, Alexander Thomas, Craig A. Stewart, Richard Knepper:
Campus Compute Co-operative (CCC): A service oriented cloud federation. eScience 2016: 1-10 - 2015
- [b1]Alexander Thomas:
Dynamisch und partiell rekonfigurierbare Hardwarearchitektur mit adaptivem hardwaregestützten Routing zur Laufzeit. Karlsruhe Institute of Technology, 2015 - 2012
- [j5]Alexander Thomas, Michael Rückauer, Jürgen Becker:
HoneyComb: An Application-Driven Online Adaptive Reconfigurable Hardware Architecture. Int. J. Reconfigurable Comput. 2012: 832531:1-832531:17 (2012) - 2011
- [c19]Alexander Thomas, Michael Rückauer, Jürgen Becker:
HoneyComb: an application-driven online adaptive reconfigurable hardware architecture. SBCCI 2011: 173-178 - [c18]Alexander Thomas, Michael Rückauer, Jürgen Becker:
HoneyComb: A multi-grained dynamically reconfigurable runtime adaptive hardware architecture. SoCC 2011: 335-340 - 2010
- [p1]Alexander Thomas, Jürgen Becker:
Development and Synthesis of Adaptive Multi-grained Reconfigurable Hardware Architecture for Dynamic Function Patterns. Dynamically Reconfigurable Systems 2010: 3-24
2000 – 2009
- 2009
- [j4]Alexander Thomas, Vittorio Ferrari, Bastian Leibe, Tinne Tuytelaars, Luc Van Gool:
Shape-from-recognition: Recognition enables meta-data transfer. Comput. Vis. Image Underst. 113(12): 1222-1234 (2009) - [j3]Alexander Thomas, Vittorio Ferrari, Bastian Leibe, Tinne Tuytelaars, Luc Van Gool:
Using Multi-view Recognition and Meta-data Annotation to Guide a Robot's Attention. Int. J. Robotics Res. 28(8): 976-998 (2009) - 2008
- [c17]Sven Eisenhardt, Thomas Schweizer, Julio A. de Oliveira Filho, Tobias Oppold, Wolfgang Rosenstiel, Alexander Thomas, Jürgen Becker, Frank Hannig, Dmitrij Kissler, Hritam Dutta, Jürgen Teich, Heiko Hinkelmann, Peter Zipf, Manfred Glesner:
Coarse-grained reconfiguration. FPL 2008: 349 - [c16]Alexander Thomas, Vittorio Ferrari, Bastian Leibe, Tinne Tuytelaars, Luc Van Gool:
Using Recognition to Guide a Robot's Attention. Robotics: Science and Systems 2008 - 2007
- [j2]Alexander Thomas, Jürgen Becker:
New Adaptive Multi-grained Hardware Architecture for Processing of Dynamic Function Patterns (Neue adaptive multi-granulare Hardwarearchitektur). it Inf. Technol. 49(3): 165- (2007) - [c15]Alexander Thomas, Vittorio Ferrari, Bastian Leibe, Tinne Tuytelaars, Luc Van Gool:
Depth-From-Recognition: Inferring Meta-data by Cognitive Feedback. ICCV 2007: 1-8 - 2006
- [c14]Alexander Thomas, Vittorio Ferrari, Bastian Leibe, Tinne Tuytelaars, Bernt Schiele, Luc Van Gool:
Towards Multi-View Object Class Detection. CVPR (2) 2006: 1589-1596 - 2005
- [j1]Jürgen Becker, Alexander Thomas:
Scalable Processor Instruction Set Extension. IEEE Des. Test Comput. 22(2): 136-148 (2005) - [c13]Alexander Thomas:
Design of a Dynamic Reconfigurable Multi-Grained Hardware Architecture with Adaptive Runtime Routing. FPL 2005: 745-746 - [c12]Alexander Thomas, Jürgen Becker:
Multi-Grained Reconfigurable Datapath Structures for Online-Adaptive Reconfigurable Hardware Architectures. ISVLSI 2005: 118-123 - [c11]Jürgen Becker, Michael Hübner, Katarina Paulsson, Alexander Thomas:
Dynamic Reconfiguration On-Demand: Real-time Adaptivity in Next Generation Microelectronics. ReCoSoC 2005: 35-42 - [c10]Alexander Thomas, Jürgen Becker:
Online-adaptive Reconfigurable Hardware Architecture and Runtime Environment. SoCC 2005: 239-242 - 2004
- [c9]Alexander Thomas, Jürgen Becker:
Aufbau- und Strukturkonzepte einer adaptive multigranularen rekonfigurierbaren Hardwarearchitektur. ARCS Workshops 2004: 165-174 - [c8]Alexander Thomas, Jürgen Becker:
Dynamic Adaptive Runtime Routing Techniques in Multigrain Reconfigurable Hardware Architectures. FPL 2004: 115-124 - [c7]Alexander Thomas, Jürgen Becker, Ulrich Heinkel, Klaus Winkelmann, Jörg Bormann:
Formale Verifikation eines Sonet/SDH Framers. MBMV 2004: 280-288 - [c6]Alexander Thomas, Thomas Zander, Jürgen Becker:
Adaptive DMA-based I/O interfaces for data stream handling in multi-grained reconfigurable hardware architectures. SBCCI 2004: 141-146 - 2003
- [c5]Jürgen Becker, Alexander Thomas, Martin Vorbach, Volker Baumgarten:
An Industrial/Academic Configurable System-on-Chip Project (CSoC): Coarse-Grain XXP-/Leon-Based Architecture Integration. DATE 2003: 11120-11121 - [c4]Jens E. Becker, Carsten Bieser, Alexander Thomas, Klaus D. Müller-Glaser, Jürgen Becker:
Hardware/Software Co-Training by FPGA/ASIC Synthesis and programming of a RISC Microprocessor-Core. MSE 2003: 134-135 - [c3]Jürgen Becker, Alexander Thomas, Maik Scheer:
Efficient Processor Instruction Set Extension by Asynchronous Reconfigurable Datapath Integration. SBCCI 2003: 237-242 - [c2]Jürgen Becker, Alexander Thomas, Maik Scheer:
Asynchronous Integration of Coarse-Grained Reconfigurable XPP-Arrays Into Pipelined Risc Processor Datapath. VLSI-SoC (Selected Papers) 2003: 263-279 - [c1]Jürgen Becker, Alexander Thomas, Maik Scheer:
Datapath and Compiler Integration of Coarse-grain Reconfigurable XPP-Arrays into Pipelined RISC Processors. VLSI-SOC 2003: 288-
Coauthor Index
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last updated on 2024-11-30 00:14 CET by the dblp team
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