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2020 – today
- 2024
[j100]Ting-Ju Yeh, Wen-Chiao Tsai
, Chi-Wei Chen, An-Yeu Wu:
Enhanced-GNN With Angular CSI for Beamforming Design in IRS-Assisted mmWave Communication Systems. IEEE Commun. Lett. 28(4): 827-831 (2024)- [j99]Win-Ken Beh, Yu-Chia Yang, An-Yeu Wu:
Quality-Aware Signal Processing Mechanism of PPG Signal for Long-Term Heart Rate Monitoring. Sensors 24(12): 3901 (2024) - [j98]Cheng-Yang Chang, Chi-Tse Huang, Yu-Chuan Chuang, Kuang-Chao Chou, An-Yeu Wu:
BFP-CIM: Runtime Energy-Accuracy Scalable Computing-in-Memory-Based DNN Accelerator Using Dynamic Block-Floating-Point Arithmetic. IEEE Trans. Circuits Syst. I Regul. Pap. 71(5): 2079-2092 (2024) - [c164]Jiing-Ping Wang, Ming-Guang Lin, An-Yeu Andy Wu:
LATTE: Low-Precision Approximate Attention with Head-wise Trainable Threshold for Efficient Transformer. AICAS 2024: 208-212 - [c163]Tsung-Lin Tsai, Yi-Cheng Lo, An-Yeu Andy Wu:
An Efficient Anomalous Sound Detection by Robust Processing and Reformation of Objective. AICAS 2024: 268-272 - [c162]Ming-Guang Lin, Jiing-Ping Wang, Cheng-Yang Chang, An-Yeu Andy Wu:
Approximate Adder Tree Design with Sparsity-Aware Encoding and In-Memory Swapping for SRAM-based Digital Compute-In-Memory Macros. AICAS 2024: 362-366 - [c161]Cheng-Yang Chang, Chi-Tse Huang, Yu-Chuan Chuang, Kuang-Chao Chou, An-Yeu Andy Wu:
BFP-CIM: Data-Free Quantization with Dynamic Block-Floating-Point Arithmetic for Energy-Efficient Computing-In-Memory-based Accelerator. ASPDAC 2024: 545-550 - [c160]Chi-Tse Huang, Cheng-Yang Chang, Hsiang-Yun Cheng, An-Yeu Wu:
BORE: Energy-Efficient Banded Vector Similarity Search with Optimized Range Encoding for Memory-Augmented Neural Network. DATE 2024: 1-6 - [c159]Yu-Chuan Chuang, Ming-Guang Lin, Chi-Tse Huang, Chieh-Fang Teng, Cheng-Yang Chang, Yi-Ta Chen, An-Yeu Andy Wu:
A 40nm 24.6TOPS/W Scalable EfficientDet Processor for Object Detection. ISCAS 2024: 1-5 - [c158]Yuan-June Luo, Yu-Shan Tai, Ming-Guang Lin, An-Yeu Andy Wu:
Similarity-Aware Fast Low-Rank Decomposition Framework for Vision Transformers. ISCAS 2024: 1-5 - [c157]Yun-Chia Yu, Mao-Chi Weng, Ming-Guang Lin, An-Yeu Andy Wu:
Retraining-free Constraint-aware Token Pruning for Vision Transformer on Edge Devices. ISCAS 2024: 1-5 - [i16]Yu-Shan Tai, An-Yeu Wu:
MPTQ-ViT: Mixed-PrecisionPost-TrainingQuantizationforVisionTransformer. CoRR abs/2401.14895 (2024) - [i15]Jiing-Ping Wang, Ming-Guang Lin, An-Yeu Wu:
LATTE: Low-Precision Approximate Attention with Head-wise Trainable Threshold for Efficient Transformer. CoRR abs/2404.07519 (2024) - [i14]Hao-Wei Chiang, Chi-Tse Huang, Hsiang-Yun Cheng, Po-Hao Tseng, Ming-Hsiu Lee, An-Yeu Wu:
Efficient and Reliable Vector Similarity Search Using Asymmetric Encoding with NAND-Flash for Many-Class Few-Shot Learning. CoRR abs/2409.07832 (2024) - 2023
- [j97]Cheng-Yang Chang, Kuang-Chao Chou, Yu-Chuan Chuang, An-Yeu Wu:
E-UPQ: Energy-Aware Unified Pruning-Quantization Framework for CIM Architecture. IEEE J. Emerg. Sel. Topics Circuits Syst. 13(1): 21-32 (2023) - [j96]Cheng-Yang Chang, Yu-Chuan Chuang, Chi-Tse Huang, An-Yeu Wu:
Recent Progress and Development of Hyperdimensional Computing (HDC) for Edge Intelligence. IEEE J. Emerg. Sel. Topics Circuits Syst. 13(1): 119-136 (2023) - [j95]Yu-Chuan Chuang, Cheng-Yang Chang, An-Yeu Wu:
Dynamic-HDC: A Two-Stage Dynamic Inference Framework for Brain-Inspired Hyperdimensional Computing. IEEE J. Emerg. Sel. Topics Circuits Syst. 13(4): 1125-1136 (2023) - [j94]Win-Ken Beh, Yu-Chia Yang, Yi-Cheng Lo, Yun-Chieh Lee, An-Yeu Andy Wu:
Machine-aided PPG Signal Quality Assessment (SQA) for Multi-mode Physiological Signal Monitoring. ACM Trans. Comput. Heal. 4(2): 14:1-14:20 (2023) - [j93]Yu-Shan Tai, Cheng-Yang Chang, Chieh-Fang Teng, Yi-Ta Chen, An-Yeu Wu:
Joint Optimization of Dimension Reduction and Mixed-Precision Quantization for Activation Compression of Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 4025-4037 (2023) - [j92]Yi-Ta Chen, Yu-Chuan Chuang, Li-Sheng Chang, An-Yeu Wu:
S-QRD-ELM: Scalable QR-Decomposition-Based Extreme Learning Machine Engine Supporting Online Class-Incremental Learning for ECG-Based User Identification. IEEE Trans. Circuits Syst. I Regul. Pap. 70(6): 2342-2355 (2023) - [j91]Yi-Cheng Lo, Win-Ken Beh, Chiao-Chun Huang, An-Yeu Wu:
Noise-Level Aware Compressed Analysis Framework for Robust Electrocardiography Signal Monitoring. IEEE J. Biomed. Health Informatics 27(5): 2243-2254 (2023) - [j90]Win-Ken Beh, Yi-Hsuan Wu, An-Yeu Wu:
Robust PPG-Based Mental Workload Assessment System Using Wearable Devices. IEEE J. Biomed. Health Informatics 27(5): 2323-2333 (2023) - [c156]Chi-Tse Huang, An-Yeu Andy Wu:
Mitigating Non-ideality Issues of Analog Computing-In-Memory in DNN-based designs. ASICON 2023: 1-4 - [c155]Chi-Tse Huang, Cheng-Yang Chang, Yu-Chuan Chuang, An-Yeu Andy Wu:
BWA-NIMC: Budget-based Workload Allocation for Hybrid Near/In-Memory-Computing. DAC 2023: 1-6 - [c154]Yu-Shan Tai, Ming-Guang Lin, An-Yeu Andy Wu:
TSPTQ-ViT: Two-Scaled Post-Training Quantization for Vision Transformer. ICASSP 2023: 1-5 - [c153]Wen-Chiao Tsai, Chi-Wei Chen, An-Yeu Andy Wu:
Compressive Channel Estimation for IRS-Aided Millimeter-Wave Systems via Two-Stage Lamp Network. ICASSP 2023: 1-5 - [c152]Yu-Chen Chen, Cheng-Yang Chang, An-Yeu Wu:
H-RIS: Hybrid Computing-in-Memory Architecture Exploring Repetitive Input Sharing. ISCAS 2023: 1-5 - [c151]Cheng-Lin Hsieh, Yi-Cheng Lo, An-Yeu Andy Wu:
Trainable Policy For The On-Demand Offloading On Edge-Cloud Collaborative System. MLSP 2023: 1-6 - [c150]Yi-Cheng Lo, Cheng-Lin Hsieh, An-Yeu Andy Wu:
Constraints-Aware Trainable Pruning With System Optimization For The On-Demand Offloading Edge-Cloud Collaborative System. MLSP 2023: 1-6 - [c149]Guan-Wei Wu, Cheng-Yang Chang, An-Yeu Andy Wu:
DE-C3: Dynamic Energy-Aware Compression for Computing-In-Memory-Based Convolutional Neural Network Acceleration. SOCC 2023: 1-6 - [c148]Yu-Cheng Wu, Chi-Tse Huang, An-Yeu Andy Wu:
DEA-NIMC: Dynamic Energy-Aware Policy for Near/In-Memory Computing Hybrid Architecture. SOCC 2023: 1-6 - [c147]Chi-Wei Chen, Wen-Chiao Tsai, An-Yeu Andy Wu:
Hybrid Active-Passive IRS-Assisted Framework in Uplink NOMA Communication. SPAWC 2023: 286-290 - 2022
- [j89]Ming-Guang Lin, Chi-Tse Huang, Yu-Chuan Chuang, Yi-Ta Chen, Ying-Tuan Hsu, Yu-Kai Chen, Jyun-Jhe Chou, Tsung-Te Liu, Chi-Sheng Shih, An-Yeu Wu:
D-NAT: Data-Driven Non-Ideality Aware Training Framework for Fabricated Computing-In-Memory Macros. IEEE J. Emerg. Sel. Topics Circuits Syst. 12(2): 381-392 (2022) - [j88]Wen-Chiao Tsai, Chi-Wei Chen, Chieh-Fang Teng, An-Yeu Wu:
Low-Complexity Compressive Channel Estimation for IRS-Aided mmWave Systems With Hypernetwork-Assisted LAMP Network. IEEE Commun. Lett. 26(8): 1883-1887 (2022) - [j87]Chi-Wei Chen, Wen-Chiao Tsai, An-Yeu Wu:
Low-Complexity Two-Step Optimization in Active-IRS-Assisted Uplink NOMA Communication. IEEE Commun. Lett. 26(12): 2989-2993 (2022) - [j86]Yi-Ta Chen, Hsing-Hao Lee, Ching-Yen Shih, Zih-Ling Chen, Win-Ken Beh, Su-Ling Yeh, An-Yeu Wu:
An Effective Entropy-Assisted Mind-Wandering Detection System Using EEG Signals of MM-SART Database. IEEE J. Biomed. Health Informatics 26(8): 3649-3660 (2022) - [j85]Chi-Wei Chen, Wen-Chiao Tsai, Sin-Sheng Wong, Chieh-Fang Teng, An-Yeu Wu:
WMMSE-Based Alternating Optimization for Low-Complexity Multi-IRS MIMO Communication. IEEE Trans. Veh. Technol. 71(10): 11234-11239 (2022) - [c146]Cheng-Yang Chang, Yu-Chuan Chuang, Kuang-Chao Chou, An-Yeu Wu:
T-EAP: Trainable Energy-Aware Pruning for NVM-based Computing-in-Memory Architecture. AICAS 2022: 78-81 - [c145]Yu-Shan Tai, Chieh-Fang Teng, Cheng-Yang Chang, An-Yeu Andy Wu:
Compression-Aware Projection with Greedy Dimension Reduction for Convolutional Neural Network Activations. ICASSP 2022: 56-60 - [c144]Yi-Cheng Lo, Chiao-Chun Huang, Yueh-Feng Tsai, I-Chan Lo, An-Yeu Andy Wu, Homer H. Chen:
Face Recognition for Fisheye Images. ICIP 2022: 146-150 - [c143]Chi-Tse Huang, Yu-Chuan Chuang, Ming-Guang Lin, An-Yeu Andy Wu:
Automated Quantization Range Mapping for DAC/ADC Non-linearity in Computing-In-Memory. ISCAS 2022: 2998-3002 - [c142]Cheng-Yen Hsieh, Yu-Chuan Chuang, An-Yeu Wu:
C3-SL: Circular Convolution-Based Batch-Wise Compression for Communication-Efficient Split Learning. MLSP 2022: 1-6 - [c141]Yu-Shan Tai, Cheng-Yang Chang, Chieh-Fang Teng, An-Yeu Andy Wu:
Learnable Mixed-precision and Dimension Reduction Co-design for Low-storage Activation. SiPS 2022: 1-6 - [i13]Yu-Shan Tai, Cheng-Yang Chang, Chieh-Fang Teng, An-Yeu Andy Wu:
Learnable Mixed-precision and Dimension Reduction Co-design for Low-storage Activation. CoRR abs/2207.07931 (2022) - [i12]Cheng-Yen Hsieh, Yu-Chuan Chuang, An-Yeu Wu:
C3-SL: Circular Convolution-Based Batch-Wise Compression for Communication-Efficient Split Learning. CoRR abs/2207.12397 (2022) - 2021
- [j84]Sin-Sheng Wong, Chieh-Fang Teng, An-Yeu Wu:
Two-Step Codebook-Assisted Alternating Minimization (CA-AltMin) for Low-Complexity Hybrid Beamforming Design. IEEE Commun. Lett. 25(6): 1989-1993 (2021) - [j83]Kuan-Chun Chen, Ching-Yao Chou, An-Yeu Wu:
A Tri-Mode Compressed Analytics Engine for Low-Power AF Detection With On-Demand EKG Reconstruction. IEEE J. Solid State Circuits 56(5): 1608-1617 (2021) - [j82]Yu-Chuan Chuang, Yi-Ta Chen, Huai-Ting Li, An-Yeu Andy Wu:
An Arbitrarily Reconfigurable Extreme Learning Machine Inference Engine for Robust ECG Anomaly Detection. IEEE Open J. Circuits Syst. 2: 196-209 (2021) - [j81]Pei-Yun Tsai, Chiu-Hua Huang, Jia-Wei Guo, Yu-Chuan Li, An-Yeu Andy Wu, Hung-Ju Lin, Tzung-Dau Wang:
Coherence between Decomposed Components of Wrist and Finger PPG Signals by Imputing Missing Features and Resolving Ambiguous Features. Sensors 21(13): 4315 (2021) - [j80]Hsing-Hao Lee, Zih-Ling Chen, Su-Ling Yeh, Janet Hui-wen Hsiao, An-Yeu Andy Wu:
When Eyes Wander Around: Mind-Wandering as Revealed by Eye Movement Analysis with Hidden Markov Models. Sensors 21(22): 7569 (2021) - [j79]Cheng-Yang Chang, Yu-Chuan Chuang, En-Jui Chang, An-Yeu Andy Wu:
MulTa-HDC: A Multi-Task Learning Framework For Hyperdimensional Computing. IEEE Trans. Computers 70(8): 1269-1284 (2021) - [j78]Chieh-Fang Teng, An-Yeu Wu:
A 7.8-13.6 pJ/b Ultra-Low Latency and Reconfigurable Neural Network-Assisted Polar Decoder With Multi-Code Length Support. IEEE Trans. Circuits Syst. I Regul. Pap. 68(5): 1956-1965 (2021) - [j77]Chieh-Fang Teng, An-Yeu Andy Wu:
Convolutional Neural Network-Aided Tree-Based Bit-Flipping Framework for Polar Decoder Using Imitation Learning. IEEE Trans. Signal Process. 69: 300-313 (2021) - [c140]Cheng-Yen Hsieh, Yu-Chuan Chuang, An-Yeu Andy Wu:
FL-HDC: Hyperdimensional Computing Design for the Application of Federated Learning. AICAS 2021: 1-5 - [c139]Chieh-Fang Teng, Andrew Kuan-Shiuan Ho, Chen-Hsi Derek Wu, Sin-Sheng Wong, An-Yeu Andy Wu:
Convolutional Neural Network-Aided Bit-Flipping for Belief Propagation Decoding of Polar Codes. ICASSP 2021: 7898-7902 - [c138]Yu-Shan Tai, Yi-Ta Chen, An-Yeu Andy Wu:
Scalable NPairLoss-Based Deep-ECG for ECG Verification. AIAI 2021: 57-68 - [c137]Chi-Tse Huang, Cheng-Yang Chang, Yu-Chuan Chuang, An-Yeu Andy Wu:
PQ-HDC: Projection-Based Quantization Scheme for Flexible and Efficient Hyperdimensional Computing. AIAI 2021: 425-435 - [c136]Yu-Ren Hsiao, Yu-Chuan Chuang, Cheng-Yang Chang, An-Yeu Andy Wu:
Hyperdimensional Computing with Learnable Projection for User Adaptation Framework. AIAI 2021: 436-447 - [c135]Cheng-Lin Lee, Yi-Ta Chen, An-Yeu Wu:
A Scalable Extreme Learning Machine (S-ELM) for Class-Incremental ECG-Based User Identification. ISCAS 2021: 1-5 - [c134]Sheng Chang, Yi-Ta Chen, An-Yeu Andy Wu:
Efficient Mind-wandering Detection System with GSR Signals on MM-SART Database. SiPS 2021: 199-204 - [d1]Win-Ken Beh, Yi-Hsuan Wu, An-Yeu Andy Wu:
MAUS: A Dataset for Mental Workload Assessment on N-back task Using Wearable Sensor. IEEE DataPort, 2021
- [i11]Yu-Shan Tai, Chieh-Fang Teng, Cheng-Yang Chang, An-Yeu Wu:
Compression-aware Projection with Greedy Dimension Reduction for Convolutional Neural Network Activations. CoRR abs/2110.08828 (2021) - 2020
- [j76]Ching-Yao Chou, Yo-Woei Pua, Ting-Wei Sun, An-Yeu Andy Wu:
Compressed-Domain ECG-Based Biometric User Identification Using Compressive Analysis. Sensors 20(11): 3279 (2020) - [j75]Ching-Yao Chou, Kai-Chieh Hsu, Bo-Hong Cho, Kuan-Chun Chen, An-Yeu Andy Wu:
Low-Complexity On-Demand Reconstruction for Compressively Sensed Problematic Signals. IEEE Trans. Signal Process. 68: 4094-4107 (2020) - [j74]Chieh-Fang Teng, Ching-Yao Chou, Chun-Hsiang Chen, An-Yeu Wu:
Accumulated Polar Feature-Based Deep Learning for Efficient and Lightweight Automatic Modulation Classification With Channel Compensation Mechanism. IEEE Trans. Veh. Technol. 69(12): 15472-15485 (2020) - [c133]Yi-Ta Chen, Yu-Chuan Chuang, An-Yeu Andy Wu:
Online Extreme Learning Machine Design for the Application of Federated Learning. AICAS 2020: 188-192 - [c132]Yu-Cheng Lin, Yun-Chieh Lee, Wen-Chiao Tsai, Win-Ken Beh, An-Yeu Andy Wu:
Explainable Deep Neural Network for Identifying Cardiac Abnormalities Using Class Activation Map. CinC 2020: 1-4 - [c131]Chun-Hsiang Chen, Chieh-Fang Teng, An-Yeu Andy Wu:
Low-Complexity LSTM-Assisted Bit-Flipping Algorithm For Successive Cancellation List Polar Decoder. ICASSP 2020: 1708-1712 - [c130]Yo-Woei Pua, Ching-Yao Chou, An-Yeu Andy Wu:
Low-Complexity Compressed Alignment-Aided Compressive Analysis for Real-Time Electrocardiography Telemonitoring. ICASSP 2020: 1788-1792 - [c129]Cheng-Yang Chang, Yu-Chuan Chuang, An-Yeu Andy Wu:
Task-Projected Hyperdimensional Computing for Multi-task Learning. AIAI (1) 2020: 241-251 - [c128]Chiu-Hua Huang, Jia-Wei Guo, Yu-Chia Yang, Pei-Yun Tsai, An-Yeu Andy Wu, Hung-Ju Lin, Tzung-Dau Wang:
Weighted Pulse Decomposition Analysis of Fingertip Photoplethysmogram Signals for Blood Pressure Assessment. ISCAS 2020: 1-5 - [c127]Han-Mo Ou, Chieh-Fang Teng, Wen-Chiao Tsai, An-Yeu Andy Wu:
A Neural Network-Aided Viterbi Receiver for Joint Equalization and Decoding. MLSP 2020: 1-6 - [c126]Cheng-Yang Chang, Yu-Chuan Chuang, An-Yeu Andy Wu:
IP-HDC: Information-Preserved Hyperdimensional Computing for Multi-Task Learning. SiPS 2020: 1-6 - [c125]Yu-Chuan Chuang, Cheng-Yang Chang, An-Yeu Andy Wu:
Dynamic Hyperdimensional Computing for Improving Accuracy-Energy Efficiency Trade-Offs. SiPS 2020: 1-5 - [c124]Wen-Chiao Tsai, Chieh-Fang Teng, Han-Mo Ou, An-Yeu Andy Wu:
Neural Network-Aided BCJR Algorithm for Joint Symbol Detection and Channel Decoding. SiPS 2020: 1-6 - [c123]Yu-Chia Yang, Win-Ken Beh, Yi-Cheng Lo, An-Yeu Andy Wu, Shih-Jen Lu:
ECG-Aided PPG Signal Quality Assessment (SQA) System for Heart Rate Estimation. SiPS 2020: 1-6 - [c122]Chieh-Fang Teng, Chun-Hsiang Chen, An-Yeu Andy Wu:
An Ultra-Low Latency 7.8-13.6 pJ/b Reconfigurable Neural Network-Assisted Polar Decoder with Multi-Code Length Support. VLSI Circuits 2020: 1-2 - [i10]Chieh-Fang Teng, Ching-Yao Chou, Chun-Hsiang Chen, An-Yeu Wu:
Accumulated Polar Feature based Deep Learning with Channel Compensation Mechanism for Efficient Automatic Modulation Classification under Time varying Channels. CoRR abs/2001.01395 (2020) - [i9]Wen-Chiao Tsai, Chieh-Fang Teng, Han-Mo Ou, An-Yeu Wu:
Neural Network-Aided BCJR Algorithm for Joint Symbol Detection and Channel Decoding. CoRR abs/2006.01125 (2020)
2010 – 2019
- 2019
- [j73]Ting-Sheng Chen, Hung-Chi Kuo, An-Yeu Wu:
A 232-1996-kS/s Robust Compressive Sensing Reconstruction Engine for Real-Time Physiological Signals Monitoring. IEEE J. Solid State Circuits 54(1): 307-317 (2019) - [j72]Ching-Chun Liao, Ting-Sheng Chen, An-Yeu Wu:
Real-Time Multi-User Detection Engine Design for IoT Applications via Modified Sparsity Adaptive Matching Pursuit. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(8): 2987-3000 (2019) - [j71]Huai-Ting Li, Ching-Yao Chou, Yi-Ta Chen, Sheng-Hui Wang, An-Yeu Wu:
Robust and Lightweight Ensemble Extreme Learning Machine Engine Based on Eigenspace Domain for Compressed Learning. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(12): 4699-4712 (2019) - [j70]Ding-Yuan Lee, Ching-Che Wang, An-Yeu Wu:
Bundle-Updatable SRAM-Based TCAM Design for OpenFlow-Compliant Packet Processor. IEEE Trans. Very Large Scale Integr. Syst. 27(6): 1450-1454 (2019) - [j69]Ting-Sheng Chen, Kai-Ni Hou, Win-Ken Beh, An-Yeu Wu:
Low-Complexity Compressed-Sensing-Based Watermark Cryptosystem and Circuits Implementation for Wireless Sensor Networks. IEEE Trans. Very Large Scale Integr. Syst. 27(11): 2485-2497 (2019) - [j68]Hung-Yi Cheng, Ching-Chun Liao, An-Yeu Andy Wu:
Joint Multi-Beam Training and Codebook Design for Indoor High-Throughput Transmissions Under Limited Training Steps. IEEE Trans. Veh. Technol. 68(6): 5585-5597 (2019) - [c121]En-Jui Chang, Abbas Rahimi, Luca Benini, An-Yeu Andy Wu:
Hyperdimensional Computing-based Multimodality Emotion Recognition with Physiological Signals. AICAS 2019: 137-141 - [c120]Ting-Wei Sun, An-Yeu Andy Wu:
Sparse Autoencoder with Attention Mechanism for Speech Emotion Recognition. AICAS 2019: 146-149 - [c119]Po-Kang Liu, Win-Ken Beh, Ching-Yen Shih, Yi-Ta Chen, An-Yeu Andy Wu:
Entropy and Complexity Assisted EEG-based Mental Workload Assessment System. BioCAS 2019: 1-4 - [c118]Chieh-Fang Teng, Han-Mo Ou, An-Yeu Andy Wu:
Neural Network-based Equalizer by Utilizing Coding Gain in Advance. GlobalSIP 2019: 1-5 - [c117]Chieh-Fang Teng, Chen-Hsi Derek Wu, Andrew Kuan-Shiuan Ho, An-Yeu Andy Wu:
Low-complexity Recurrent Neural Network-based Polar Decoder with Weight Quantization Mechanism. ICASSP 2019: 1413-1417 - [c116]Hung-Yi Cheng, Ching-Chun Liao, An-Yeu Andy Wu:
Scattering Multi-connectivity Estimation for Indoor mmWave Small Cells under Limited Training Steps. ICASSP 2019: 4654-4658 - [c115]Ching-Yao Chou, An-Yeu Andy Wu:
Low-Complexity Compressive Analysis in Sub-Eigenspace for ECG Telemonitoring System. ICASSP 2019: 7575-7579 - [c114]Yi-Ta Chen, Yu-Chuan Chuang, An-Yeu Andy Wu:
AdaBoost-assisted Extreme Learning Machine for Efficient Online Sequential Classification. SiPS 2019: 131-136 - [c113]Cheng-Ping Hsieh, Yi-Ta Chen, Win-Ken Beh, An-Yeu Andy Wu:
Feature Selection Framework for XGBoost Based on Electrodermal Activity in Stress Detection. SiPS 2019: 330-335 - [c112]Kuan-Chun Chen, Ching-Yao Chou, An-Yeu Andy Wu:
Co-Design of Sparse Coding and Dictionary Learning for Real-Time Physiological Signals Monitoring. SiPS 2019: 347-351 - [i8]Chieh-Fang Teng, Han-Mo Ou, An-Yeu Wu:
Neural Network-based Equalizer by Utilizing Coding Gain in Advance. CoRR abs/1907.04980 (2019) - [i7]Yi-Ta Chen, Yu-Chuan Chuang, An-Yeu Wu:
AdaBoost-assisted Extreme Learning Machine for Efficient Online Sequential Classification. CoRR abs/1909.07115 (2019) - [i6]Chieh-Fang Teng, Andrew Kuan-Shiuan Ho, Chen-Hsi Derek Wu, Sin-Sheng Wong, An-Yeu Wu:
Convolutional Neural Network-aided Bit-flipping for Belief Propagation Decoding of Polar Codes. CoRR abs/1911.01704 (2019) - [i5]Chieh-Fang Teng, An-Yeu Wu:
Unsupervised Learning for Neural Network-based Polar Decoder via Syndrome Loss. CoRR abs/1911.01710 (2019) - [i4]Chun-Hsiang Chen, Chieh-Fang Teng, An-Yeu Wu:
Low-Complexity LSTM-Assisted Bit-Flipping Algorithm for Successive Cancellation List Polar Decoder. CoRR abs/1912.05158 (2019) - 2018
- [j67]Ching-Yao Chou, En-Jui Chang, Huai-Ting Li, An-Yeu Wu:
Low-Complexity Privacy-Preserving Compressive Analysis Using Subspace-Based Dictionary for ECG Telemonitoring System. IEEE Trans. Biomed. Circuits Syst. 12(4): 801-811 (2018) - [j66]Sheng-Chun Kao, Ding-Yuan Lee, Ting-Sheng Chen, An-Yeu Wu:
Dynamically Updatable Ternary Segmented Aging Bloom Filter for OpenFlow-Compliant Low-Power Packet Processing. IEEE/ACM Trans. Netw. 26(2): 1004-1017 (2018) - [j65]Cheng-Rung Tsai, Yu-Hsin Liu, An-Yeu Wu:
Efficient Compressive Channel Estimation for Millimeter-Wave Large-Scale Antenna Systems. IEEE Trans. Signal Process. 66(9): 2414-2428 (2018) - [j64]Cheng-Rung Tsai, An-Yeu Wu:
Structured Random Compressed Channel Sensing for Millimeter-Wave Large-Scale Antenna Systems. IEEE Trans. Signal Process. 66(19): 5096-5110 (2018) - [j63]Yu-Min Lin, Jie-Fang Zhang, Jing Geng, An-Yeu Andy Wu:
Structural Scrambling of Circulant Matrices for Cost-effective Compressive Sensing. J. Signal Process. Syst. 90(5): 695-707 (2018) - [c111]Kai-Chieh Hsu, Bo-Hong Cho, Ching-Yao Chou, An-Yeu Andy Wu:
Low-Complexity Compressed Analysis in Eigenspace with Limited Labeled Data for Real-Time Electrocardiography Telemonitoring. GlobalSIP 2018: 459-463 - [c110]Chieh-Fang Teng, Ching-Chun Liao, Chun-Hsiang Chen, An-Yeu Andy Wu:
Polar Feature Based Deep Architectures for Automatic Modulation Classification Considering Channel Fading. GlobalSIP 2018: 554-558 - [c109]Kai-Ni Hou, Ting-Sheng Chen, Hung-Chi Kuo, Tzu-Hsuan Chen, An-Yeu Wu:
Low-Complexity Secure Watermark Encryption for Compressed Sensing-Based Privacy Preserving. ICASSP 2018: 6408-6412 - [c108]Sheng-Hui Wang, Huai-Ting Li, En-Jui Chang, An-Yeu Andy Wu:
Entropy-Assisted Emotion Recognition of Valence and Arousal Using XGBoost Classifier. AIAI 2018: 249-260 - [c107]Sheng-Hui Wang, Huai-Ting Li, An-Yeu Andy Wu:
Error-Resilient Reconfigurable Boosting Extreme Learning Machine for ECG Telemonitoring Systems. ISCAS 2018: 1-5 - [c106]Ting-Sheng Chen, Hung-Chi Kuo, An-Yeu Wu:
A 232-to-1996KS/s robust compressive-sensing reconstruction engine for real-time physiological signals monitoring. ISSCC 2018: 226-228 - [i3]Kuan Tung, Po-Kang Liu, Yu-Chuan Chuang, Sheng-Hui Wang, An-Yeu Wu:
Entropy-Assisted Multi-Modal Emotion Recognition Framework Based on Physiological Signals. CoRR abs/1809.08410 (2018) - [i2]Chieh-Fang Teng, Ching-Chun Liao, Chun-Hsiang Chen, An-Yeu Wu:
Polar Feature Based Deep Architectures for Automatic Modulation Classification Considering Channel Fading. CoRR abs/1810.02027 (2018) - [i1]Chieh-Fang Teng, Chen-Hsi Derek Wu, Andrew Kuan-Shiuan Ho, An-Yeu Wu:
Low-complexity Recurrent Neural Network-based Polar Decoder with Weight Quantization Mechanism. CoRR abs/1810.12154 (2018) - 2017
- [j62]Yu-Yin Chen, En-Jui Chang, Hsien-Kai Hsin, Kun-Chih Jimmy Chen, An-Yeu Andy Wu:
Path-Diversity-Aware Fault-Tolerant Routing Algorithm for Network-on-Chip Systems. IEEE Trans. Parallel Distributed Syst. 28(3): 838-849 (2017) - [j61]Yu-Min Lin, Yi Chen, Nai-Shan Huang, An-Yeu Wu:
Low-Complexity Stochastic Gradient Pursuit Algorithm and Architecture for Robust Compressive Sensing Reconstruction. IEEE Trans. Signal Process. 65(3): 638-650 (2017) - [j60]Chiang-Hen Chen, Cheng-Rung Tsai, Yu-Hsin Liu, Wei-Lun Hung, An-Yeu Wu:
Compressive Sensing (CS) Assisted Low-Complexity Beamspace Hybrid Precoding for Millimeter-Wave MIMO Systems. IEEE Trans. Signal Process. 65(6): 1412-1424 (2017) - [j59]Huai-Ting Li, Ching-Yao Chou, Yuan-Ting Hsieh, Wei-Ching Chu, An-Yeu Wu:
Variation-Aware Reliable Many-Core System Design by Exploiting Inherent Core Redundancy. IEEE Trans. Very Large Scale Integr. Syst. 25(10): 2803-2816 (2017) - [c105]En-Jui Chang, An-Yeu Wu:
Overview of high-efficiency ant colony optimization (ACO)-based adaptive routings for traffic balancing in network-on-chip systems. ASICON 2017: 80-83 - [c104]Hung-Chi Kuo, Yu-Min Lin, An-Yeu Wu:
Compressive sensing based ECG monitoring with effective AF detection. ICASSP 2017: 1008-1012 - [c103]An-Yeu Andy Wu, Kun-Chih Jimmy Chen, Chih-Hao Chao:
Thermal/Traffic Mutual-Coupling Co-simulation Platform for 3D Network-on-Chip (NoC) Designs. NoCArc@MICRO 2017: 6:1-6:2 - [c102]Chieh-Fang Teng, Ching-Chun Liao, Hung-Yi Cheng, An-Yeu Andy Wu:
Reliable compressive sensing (CS)-based multi-user detection with power-based Zadoff-Chu sequence design. SiPS 2017: 1-5 - [c101]Meng-Ya Tsai, Ching-Yao Chou, An-Yeu Andy Wu:
Robust compressed analysis using subspace-based dictionary for ECG telemonitoring systems. SiPS 2017: 1-5 - [c100]Chia-Heng Wu, Ting-Sheng Chen, Ding-Yuan Lee, Tsung-Te Liu, An-Yeu Wu:
Low-latency Voltage-Racing Winner-Take-All (VR-WTA) circuit for acceleration of learning engine. VLSI-DAT 2017: 1-4 - 2016
- [j58]Hung-Yi Cheng, An-Yeu Andy Wu:
Unified low-complexity decision feedback equalizer with adjustable double radius constraint. Digit. Signal Process. 51: 82-91 (2016) - [j57]Ting-Sheng Chen, Ding-Yuan Lee, Tsung-Te Liu, An-Yeu Wu:
Dynamic Reconfigurable Ternary Content Addressable Memory for OpenFlow-Compliant Low-Power Packet Processing. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(10): 1661-1672 (2016) - [c99]Shih-Ming Shan, Sung-Chun Tang, Pei-Wen Huang, Yu-Min Lin, Wei-Han Huang, Dar-Ming Lai, An-Yeu Andy Wu:
Reliable PPG-based algorithm in atrial fibrillation detection. BioCAS 2016: 340-343 - [c98]Cheng-Rung Tsai, Chiang-Hen Chen, Yu-Hsin Liu, An-Yeu Andy Wu:
Joint spatially sparse channel estimation for millimeter-wave cellular systems. GlobalSIP 2016: 605-609 - [c97]Hung-Yi Cheng, Ching-Chun Liao, An-Yeu Andy Wu:
Progressive channel estimation for ultra-low latency millimeter-wave communications. GlobalSIP 2016: 610-614 - 2015
- [j56]En-Jui Chang, Hsien-Kai Hsin, Chih-Hao Chao, Shu-Yen Lin, An-Yeu Andy Wu:
Regional ACO-Based Cascaded Adaptive Routing for Traffic Balancing in Mesh-Based Network-on-Chip Systems. IEEE Trans. Computers 64(3): 868-875 (2015) - [j55]Hsien-Kai Hsin, En-Jui Chang, Kuan-Yu Su, An-Yeu Andy Wu:
Ant Colony Optimization-Based Adaptive Network-on-Chip Routing Framework Using Network Information Region. IEEE Trans. Computers 64(8): 2119-2131 (2015) - [j54]Yu-Min Lin, Huai-Ting Li, Ming-Han Chung, An-Yeu Wu:
Byte-Reconfigurable LDPC Codec Design With Application to High-Performance ECC of NAND Flash Memory Systems. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(7): 1794-1804 (2015) - [j53]Kun-Chih Chen, En-Jui Chang, Huai-Ting Li, An-Yeu Andy Wu:
RC-Based Temperature Prediction Scheme for Proactive Dynamic Thermal Management in Throttle-Based 3D NoCs. IEEE Trans. Parallel Distributed Syst. 26(1): 206-218 (2015) - [c96]Yu-Min Lin, Yi Chen, Hung-Chi Kuo, An-Yeu Andy Wu:
Compressive sensing based ECG telemonitoring with personalized dictionary basis. BioCAS 2015: 1-4 - [c95]Pei-Wen Huang, Sung-Chun Tang, Yu-Min Lin, You-Cheng Liu, Wei-Jung Jou, Hsiao-I Jen, Dar-Ming Lai, An-Yeu Wu:
Predicting stroke outcomes based on multi-modal analysis of physiological signals. DSP 2015: 454-457 - [c94]Cheng-Rung Tsai, Ming-Chun Hsiao, Wen-Chung Shen, An-Yeu Andy Wu, Chen-Mou Cheng:
A 1.96mm2 low-latency multi-mode crypto-coprocessor for PKC-based IoT security protocols. ISCAS 2015: 834-837 - [c93]Wei-Ching Chu, Huai-Ting Li, Ching-Yao Chou, An-Yeu Andy Wu:
Variation-aware core-level redundancy scheme for reliable DSP computation in multi-core systems. SiPS 2015: 1-5 - [c92]Wei-Lun Hung, Chiang-Hen Chen, Ching-Chun Liao, Cheng-Rung Tsai, An-Yeu Andy Wu:
Low-complexity hybrid precoding algorithm based on orthogonal beamforming codebook. SiPS 2015: 1-5 - [c91]Jiachen Liu, Hung-Yi Cheng, Ching-Chun Liao, An-Yeu Andy Wu:
Scalable compressive sensing-based multi-user detection scheme for Internet-of-Things applications. SiPS 2015: 1-6 - [c90]Yi-Mu Tu, Michael C. Chang, Yu-Min Lin, An-Yeu Andy Wu:
Dynamic group allocation reconstruction for group sparse signals. SiPS 2015: 1-5 - [c89]Jie-Fang Zhang, Jing Geng, Yu-Min Lin, An-Yeu Andy Wu:
Low memory-cost scramble methods for constructing deterministic CS matrix. SiPS 2015: 1-6 - [c88]Huai-Ting Li, Ding-Yuan Lee, Kun-Chih Chen, An-Yeu Andy Wu:
An algorithmic error-resilient scheme for robust LDPC decoding. VLSI-DAT 2015: 1-4 - 2014
- [j52]Wen-Chung Shen, Yu-Hao Chen, An-Yeu Andy Wu:
Low-complexity sinusoidal-assisted EMD (SAEMD) algorithms for solving mode-mixing problems in HHT. Digit. Signal Process. 24: 170-186 (2014) - [j51]En-Jui Chang, Hsien-Kai Hsin, Shu-Yen Lin, An-Yeu Wu:
Path-Congestion-Aware Adaptive Routing With a Contention Prediction Scheme for Network-on-Chip Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(1): 113-126 (2014) - [j50]Hsien-Kai Hsin, En-Jui Chang, Chia-An Lin, An-Yeu Andy Wu:
Ant Colony Optimization-Based Fault-Aware Routing in Mesh-Based Network-on-Chip Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(11): 1693-1705 (2014) - [j49]Hsien-Kai Hsin, En-Jui Chang, An-Yeu Wu:
Spatial-Temporal Enhancement of ACO-Based Selection Schemes for Adaptive Routing in Network-on-Chip Systems. IEEE Trans. Parallel Distributed Syst. 25(6): 1626-1637 (2014) - [j48]Yu-Hao Chen, Yu-Min Lin, Kuan-Yu Ho, An-Yeu Wu, Pai-Chi Li:
Low-Complexity Motion-Compensated Beamforming Algorithm and Architecture for Synthetic Transmit Aperture in Ultrasound Imaging. IEEE Trans. Signal Process. 62(4): 840-851 (2014) - [c87]Shih-Chieh Lin, En-Jui Chang, Yu-Yin Chen, Hsien-Kai Hsin, An-Yeu Andy Wu:
High performance adaptive routing for Network-on-Chip systems with express highway mechanism. APCCAS 2014: 1-4 - [c86]Nai-Shan Huang, Yu-Min Lin, Yi Chen, An-Yeu Andy Wu:
Adaptive filter-based reconstruction engine design for compressive sensing. APCCAS 2014: 499-502 - [c85]Wei-Jung Jou, Pei-Wen Huang, Yu-Min Lin, Sung-Chun Tang, Dar-Ming Lai, An-Yeu Wu:
A stroke severity monitoring system based on quantitative modified multiscale entropy. BioCAS 2014: 41-44 - [c84]Hung-Yi Cheng, Chun-Yuan Chu, Yen-Liang Chen, An-Yeu Andy Wu:
Robust decision feedback equalizer scheme by using sphere-decoding detector. ICASSP 2014: 5041-5044 - [c83]Yu-Min Lin, Yu-Hao Chen, Ming-Han Chung, An-Yeu Wu:
High-throughput QC-LDPC decoder with cost-effective early termination scheme for non-volatile memory systems. ISCAS 2014: 2732-2735 - [c82]Yun-An Chang, Wei-Chih Hong, Ming-Chun Hsiao, Bo-Yin Yang, An-Yeu Wu, Chen-Mou Cheng:
Hydra: An Energy-Efficient Programmable Cryptographic Coprocessor Supporting Elliptic-Curve Pairings over Fields of Large Characteristics. IWSEC 2014: 174-186 - [c81]Pei-Wen Huang, Wei-Jung Jou, Yu-Min Lin, Hsiao-I Jen, Sung-Chun Tang, Dar-Ming Lai, An-Yeu Andy Wu:
Trend-extracted MSE based on adaptive aligned EEMD with early termination scheme: Analysis of the acute stroke patients' physiological signals. SiPS 2014: 162-167 - [c80]Kun-Chih Chen, Huai-Ting Li, An-Yeu Andy Wu:
LMS-based adaptive temperature prediction scheme for proactive thermal-aware three-dimensional Network-on-Chip systems. VLSI-DAT 2014: 1-4 - [c79]Yuan-Sheng Lee, Hsien-Kai Hsin, Kun-Chih Chen, En-Jui Chang, An-Yeu Andy Wu:
Thermal-aware Dynamic Buffer Allocation for Proactive routing algorithm on 3D Network-on-Chip systems. VLSI-DAT 2014: 1-4 - 2013
- [j47]Hsien-Kai Hsin, En-Jui Chang, An-Yeu Wu:
Implementation of ACO-Based Selection with Backward-Ant Mechanism for Adaptive Routing in Network-on-Chip Systems. IEEE Embed. Syst. Lett. 5(3): 46-49 (2013) - [j46]Yen-Kuang Chen, An-Yeu Wu, Magdy A. Bayoumi, Farinaz Koushanfar:
Editorial: Low-Power, Intelligent, and Secure Solutions for Realization of Internet of Things. IEEE J. Emerg. Sel. Topics Circuits Syst. 3(1): 1-4 (2013) - [j45]Jie-Ren Shih, Yongbo Hu, Ming-Chun Hsiao, Ming-Shing Chen, Wen-Chung Shen, Bo-Yin Yang, An-Yeu Wu, Chen-Mou Cheng:
Securing M2M With Post-Quantum Public-Key Cryptography. IEEE J. Emerg. Sel. Topics Circuits Syst. 3(1): 106-116 (2013) - [j44]Wen-Chung Shen, Hsiao-I Jen, An-Yeu Wu:
New Ping-Pong Scheduling for Low-Latency EMD Engine Design in Hilbert-Huang Transform. IEEE Trans. Circuits Syst. II Express Briefs 60-II(8): 532-536 (2013) - [j43]Chih-Hao Chao, Kun-Chih Chen, Tsu-Chu Yin, Shu-Yen Lin, An-Yeu Wu:
Transport-layer-assisted routing for runtime thermal management of 3D NoC systems. ACM Trans. Embed. Comput. Syst. 13(1): 11:1-11:22 (2013) - [j42]Kun-Chih Chen, Shu-Yen Lin, Hui-Shun Hung, An-Yeu Andy Wu:
Topology-Aware Adaptive Routing for Nonstationary Irregular Mesh in Throttled 3D NoC Systems. IEEE Trans. Parallel Distributed Syst. 24(10): 2109-2120 (2013) - [j41]Yi-Hsuan Lin, Yu-Hao Chen, Chun-Yuan Chu, Cheng-Zhou Zhan, An-Yeu Wu:
Dual-Mode Low-Complexity Codebook Searching Algorithm and VLSI Architecture for LTE/LTE-Advanced Systems. IEEE Trans. Signal Process. 61(14): 3545-3562 (2013) - [j40]Yen-Liang Chen, Cheng-Zhou Zhan, Ting-Jyun Jheng, An-Yeu Wu:
Reconfigurable Adaptive Singular Value Decomposition Engine Design for High-Throughput MIMO-OFDM Systems. IEEE Trans. Very Large Scale Integr. Syst. 21(4): 747-760 (2013) - [j39]Chih-Hao Chao, Kun-Chih Chen, An-Yeu Wu:
Routing-Based Traffic Migration and Buffer Allocation Schemes for 3-D Network-on-Chip Systems With Thermal Limit. IEEE Trans. Very Large Scale Integr. Syst. 21(11): 2118-2131 (2013) - [j38]Cheng-Hung Lin, Chun-Yu Chen, En-Jui Chang, An-Yeu Wu:
Reconfigurable Parallel Turbo Decoder Design for Multiple High-Mobility 4G Systems. J. Signal Process. Syst. 73(2): 109-122 (2013) - [c78]Zih-Ling Liu, Yu-Hao Chen, Cheng-Zhou Zhan, An-Yeu Andy Wu:
Motion artifact elimination algorithm with eigen-based clutter filter for color Doppler processing. ICASSP 2013: 1066-1069 - [c77]Ming-Han Chung, Yu-Min Lin, Cheng-Zhou Zhan, An-Yeu Wu:
Cost-effective scalable QC-LDPC decoder designs for non-volatile memory systems. ICASSP 2013: 2625-2628 - [c76]Kun-Chih Chen, Che-Chuan Kuo, Hui-Shun Hung, An-Yeu Andy Wu:
Traffic- and Thermal-aware Adaptive Beltway Routing for three dimensional Network-on-Chip systems. ISCAS 2013: 1660-1663 - [c75]Kuan-Yu Ho, Yu-Hao Chen, Cheng-Zhou Zhan, An-Yeu Andy Wu:
VLSI implementation of real-time motion compensated beamforming in synthetic transmit aperture imaging. ISCAS 2013: 1893-1896 - [c74]Che-Chuan Kuo, Kun-Chih Chen, En-Jui Chang, An-Yeu Wu:
Proactive Thermal-Budget-Based Beltway Routing algorithm for thermal-aware 3D NoC systems. ISSoC 2013: 1-4 - [c73]I-Hsuan Lee, Yu-Hao Chen, Nai-Shan Huang, An-Yeu Andy Wu:
Accelerating motion-compensated adaptive color Doppler engine on CUDA-based GPU platform. SiPS 2013: 1-6 - [c72]Chia-An Lin, Hsien-Kai Hsin, En-Jui Chang, An-Yeu Andy Wu:
ACO-based fault-aware routing algorithm for Network-on-Chip systems. SiPS 2013: 342-347 - [c71]Kun-Chih Chen, Shu-Yen Lin, An-Yeu Wu:
Design of thermal management unit with vertical throttling scheme for proactive thermal-aware 3D NoC systems. VLSI-DAT 2013: 1-4 - [c70]Po-An Tsai, Yu-Hsin Kuo, En-Jui Chang, Hsien-Kai Hsin, An-Yeu Wu:
Hybrid path-diversity-aware adaptive routing with latency prediction model in Network-on-Chip systems. VLSI-DAT 2013: 1-4 - 2012
- [j37]Sao-Jie Chen, An-Yeu Andy Wu, Jiang Xu:
Networks-on-Chip: Architectures, Design Methodologies, and Case Studies. J. Electr. Comput. Eng. 2012: 634930:1 (2012) - [j36]Cheng-Zhou Zhan, Yen-Liang Chen, An-Yeu Wu:
Iterative Superlinear-Convergence SVD Beamforming Algorithm and VLSI Architecture for MIMO-OFDM Systems. IEEE Trans. Signal Process. 60(6): 3264-3277 (2012) - [j35]Min-An Chao, Xin-Yu Shih, An-Yeu Wu:
Matrix Merging Scheme and Efficient Decoding Techniques for Reconfigurable QC-LDPC Decoders. J. Signal Process. Syst. 68(2): 183-202 (2012) - [j34]Chun-Yuan Chu, An-Yeu Wu:
Power-Efficient State Exchange Scheme for Low-Latency SMU Design of Viterbi Decoder. J. Signal Process. Syst. 68(2): 233-245 (2012) - [c69]Yu-Hsin Kuo, Po-An Tsai, Hao-Ping Ho, En-Jui Chang, Hsien-Kai Hsin, An-Yeu Andy Wu:
Path-Diversity-Aware Adaptive Routing in Network-on-Chip Systems. MCSoC 2012: 175-182 - [c68]Kun-Chih Chen, Shu-Yen Lin, Hui-Shun Hung, An-Yeu Wu:
Traffic-Balanced Topology-Aware Multiple Routing Adjustment for Throttled 3D NOC Systems. SiPS 2012: 120-124 - [c67]Yi-Hsuan Lin, Cheng-Zhou Zhan, Chun-Yuan Chu, An-Yeu Andy Wu:
A Low-Complexity Grouping FFT-Based Codebook Searching Algorithm in LTE System. SiPS 2012: 161-166 - [c66]Kuan-Yu Su, Hsien-Kai Hsin, En-Jui Chang, An-Yeu Andy Wu:
ACO-Based Deadlock-Aware Fully-Adaptive Routing in Network-on-Chip Systems. SiPS 2012: 209-214 - [c65]Yu-Hao Chen, Kuan-Yu Ho, Cheng-Zhou Zhan, An-Yeu Andy Wu:
Coherent Image Herding of Inhomogeneous Motion Compensation for Synthetic Transmit Aperture in Ultrasound Image. SiPS 2012: 254-257 - [c64]Kun-Chih Chen, Chih-Hao Chao, Shu-Yen Lin, Hui-Shun Hung, An-Yeu Wu:
Transport-layer assisted vertical traffic balanced routing for thermal-aware three-dimensional Network-on-Chip systems. VLSI-DAT 2012: 1-4 - [c63]An-Yeu Wu, Li-C. Wang:
Foreword. VLSI-DAT 2012: 1-2 - 2011
- [j33]Kun-Chih Chen, Shu-Yen Lin, Wen-Chung Shen, An-Yeu Wu:
A scalable built-in self-recovery (BISR) VLSI architecture and design methodology for 2D-mesh based on-chip networks. Des. Autom. Embed. Syst. 15(2): 111-132 (2011) - [j32]Chun-Yuan Chu, Chih-Hao Chao, Min-An Chao, An-Yeu Wu:
Multi-prediction particle filter for efficient parallelized implementation. EURASIP J. Adv. Signal Process. 2011: 53 (2011) - [j31]Cheng-Hung Lin, Chun-Yu Chen, An-Yeu Wu:
Area-Efficient Scalable MAP Processor Design for High-Throughput Multistandard Convolutional Turbo Decoding. IEEE Trans. Very Large Scale Integr. Syst. 19(2): 305-318 (2011) - [j30]David Chih-Wei Chang, Tay-Jyi Lin, Chung-Ju Wu, Jenq Kuen Lee, Yuan-Hua Chu, An-Yeu Wu:
Parallel Architecture Core (PAC) - the First Multicore Application Processor SoC in Taiwan Part I: Hardware Architecture & Software Development Tools. J. Signal Process. Syst. 62(3): 373-382 (2011) - [j29]Jia-Ming Chen, Chun-Nan Liu, Jen-Kuei Yang, Shau-Yin Tseng, Wei-Kuan Shih, An-Yeu Wu:
Parallel Architecture Core (PAC) - the First Multicore Application Processor SoC in Taiwan Part II: Application Programming. J. Signal Process. Syst. 62(3): 383-402 (2011) - [c62]Cheng-Zhou Zhan, Zih-Ling Liu, An-Yeu Wu:
Adaptive thresholding incorporating temporal and spatial information with eigen-based clutter filter for color Doppler processing in ultrasonic systems. SiPS 2011: 361-366 - [c61]Hsien-Kai Hsin, En-Jui Chang, Chih-Hao Chao, Shu-Yen Lin, An-Yeu Wu:
Multi-Pheromone ACO-based routing in Network-on-Chip system inspired by economic phenomenon. SoCC 2011: 273-277 - [c60]Chih-Hao Chao, Tsu-Chu Yin, Shu-Yen Lin, An-Yeu Wu:
Transport Layer Assisted Routing for Non-Stationary Irregular mesh of thermal-aware 3D Network-on-Chip systems. SoCC 2011: 284-289 - 2010
- [j28]Chia-Tsun Wu, Wen-Chung Shen, Wei Wang, An-Yeu Wu:
A Two-Cycle Lock-In Time ADPLL Design Based on a Frequency Estimation Algorithm. IEEE Trans. Circuits Syst. II Express Briefs 57-II(6): 430-434 (2010) - [j27]Yen-Liang Chen, An-Yeu Wu:
Generalized pipelined tomlinson-harashima precoder design methodology with build-in arbitrary speed-up factors. IEEE Trans. Signal Process. 58(4): 2375-2382 (2010) - [c59]Yen-Liang Chen, Ting-Jyun Jheng, Cheng-Zhou Zhan, An-Yeu Wu:
A 2.17 mm2 125 mW reconfigurable SVD chip for IEEE 802.11n system. ESSCIRC 2010: 534-537 - [c58]Hsien-Kai Hsin, En-Jui Chang, Chih-Hao Chao, An-Yeu Wu:
Regional ACO-based routing for load-balancing in NoC systems. NaBIC 2010: 370-376 - [c57]Chih-Hao Chao, Kai-Yuan Jheng, Hao-Yu Wang, Jia-Cheng Wu, An-Yeu Wu:
Traffic- and Thermal-Aware Run-Time Thermal Management Scheme for 3D NoC Systems. NOCS 2010: 223-230
2000 – 2009
- 2009
- [j26]Kai-Yuan Jheng, Yuan-Jyue Chen, An-Yeu Wu:
Multilevel LINC System Designs for Power Efficiency Enhancement of Transmitters. IEEE J. Sel. Top. Signal Process. 3(3): 523-532 (2009) - [j25]Cheng-Hung Lin, Chun-Yu Chen, Tsung-Han Tsai, An-Yeu Wu:
Low-Power Memory-Reduced Traceback MAP Decoding for Double-Binary Convolutional Turbo Decoder. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(5): 1005-1016 (2009) - [j24]I-Chyn Wey, You-Gang Chen, Changhong Yu, An-Yeu Wu, Jie Chen:
Design and Implementation of Cost-Effective Probabilistic-Based Noise-Tolerant VLSI Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(11): 2411-2424 (2009) - [c56]Xin-Yu Shih, Cheng-Zhou Zhan, Cheng-Hung Lin, An-Yeu Wu:
A 52-mW 8.29mm2 19-mode LDPC decoder chip for mobile WiMAX applications. ASP-DAC 2009: 121-122 - [c55]Shu-Yen Lin, Chan-Cheng Hsu, An-Yeu Wu:
A Scalable Built-in Self-test/Self-diagnosis Architecture for 2D-Mesh based Chip Multiprocessor Systems. ISCAS 2009: 2317-2320 - [c54]Min-An Chao, Jen-Yang Wen, Xin-Yu Shih, An-Yeu Wu:
A Triple-mode LDPC Decoder Design for IEEE 802.11n SYSTEM. ISCAS 2009: 2445-2448 - [c53]Yu-Hsin Chen, Yi-Ju Chen, Xin-Yu Shih, An-Yeu Wu:
A Channel-Adaptive Early Termination strategy for LDPC decoders. SiPS 2009: 226-231 - 2008
- [j23]Xin-Yu Shih, Cheng-Zhou Zhan, Cheng-Hung Lin, An-Yeu Wu:
An 8.29 mm2 52 mW Multi-Mode LDPC Decoder Design for Mobile WiMAX System in 0.13 µm CMOS Process. IEEE J. Solid State Circuits 43(3): 672-683 (2008) - [j22]Shu-Yen Lin, Chun-Hsiang Huang, Chih-Hao Chao, Keng-Hsien Huang, An-Yeu Wu:
Traffic-Balanced Routing Algorithm for Irregular Mesh-Based On-Chip Networks. IEEE Trans. Computers 57(9): 1156-1168 (2008) - [j21]Fan-Min Li, Cheng-Hung Lin, An-Yeu Wu:
Unified Convolutional/Turbo Decoder Design Using Tile-Based Timing Analysis of VA/MAP Kernel. IEEE Trans. Very Large Scale Integr. Syst. 16(10): 1358-1371 (2008) - [j20]I-Chyn Wey, You-Gang Chen, An-Yeu Wu:
Design and Analysis of Isolated Noise-Tolerant (INT) Technique in Dynamic CMOS Circuits. IEEE Trans. Very Large Scale Integr. Syst. 16(12): 1708-1712 (2008) - [j19]Yen-Liang Chen, Ming-Feng Hsu, Jyh-Ting Lai, An-Yeu Wu:
Cost-Effective Joint Echo-NEXT Canceller Designs for 10GBase-T Ethernet Systems Based on a Shortened Impulse Response Filter (SIRF) Scheme. J. Signal Process. Syst. 52(1): 59-73 (2008) - [c52]Cheng-Zhou Zhan, Xin-Yu Shih, An-Yeu Wu:
High-performance scheduling algorithm for partially parallel LDPC decoder. ICASSP 2008: 3177-3180 - [c51]Huifei Rao, Jie Chen, Vicky H. Zhao, Woon Tiong Ang, I-Chyn Wey, An-Yeu Wu:
An efficient methodology to evaluate nanoscale circuit fault-tolerance performance based on belief propagation. ISCAS 2008: 608-611 - [c50]Cheng-Hung Lin, Chun-Yu Chen, An-Yeu Wu:
Low-power traceback MAP decoding for double-binary convolutional turbo decoder. ISCAS 2008: 736-739 - [c49]Yen-Liang Chen, Cheng-Zhou Zhan, An-Yeu Wu:
Cost-effective echo and NEXT canceller designs for 10GBASE-T ethernet system. ISCAS 2008: 3150-3153 - [c48]Chih-Hao Chao, Chun-Yuan Chu, An-Yeu Wu:
Location-Constrained Particle Filter human positioning and tracking system. SiPS 2008: 73-76 - [c47]Chun-Yu Chen, Cheng-Hung Lin, An-Yeu Wu:
High-throughput dual-mode single/double binary map processor design for wireless wan. SiPS 2008: 83-87 - [c46]Ting-Jung Lin, Shu-Yen Lin, An-Yeu Wu:
Traffic-balanced IP mapping algorithm for 2D-mesh On-Chip-Networks. SiPS 2008: 200-203 - 2007
- [j18]Fan-Min Li, An-Yeu Wu:
On the New Stopping Criteria of Iterative Turbo Decoding by Using Decoding Threshold. IEEE Trans. Signal Process. 55(11): 5506-5516 (2007) - [j17]Jyh-Ting Lai, An-Yeu Wu, Chien-Hsiung Lee:
Joint AGC-Equalization Algorithm and VLSI Architecture for Wirelined Transceiver Designs. IEEE Trans. Very Large Scale Integr. Syst. 15(2): 236-240 (2007) - [j16]Jyh-Ting Lai, An-Yeu Wu, Wen-Chiang Chen:
A Systematic Design Approach to the Band-Tracking Packet Detector in OFDM-Based Ultrawideband Systems. IEEE Trans. Veh. Technol. 56(6): 3791-3806 (2007) - [c45]Jhao-Ji Ye, You-Gang Chen, I-Chyn Wey, An-Yeu Wu:
Low-Latency Quasi-Synchronous Transmission Technique for Multiple-Clock-Domain IP Modules. ISCAS 2007: 869-872 - [c44]Chih-Hao Chao, Yen-Lin Kuo, An-Yeu Wu, Weber Chien:
A Power-Aware Reconfigurable Rendering Engine Design with 453MPixels/s, 16.4MTriangles/s Performance. ISCAS 2007: 1113-1116 - [c43]Huifei Rao, Jie Chen, Changhong Yu, Woon Tiong Ang, I-Chyn Wey, An-Yeu Wu, Hong Zhao:
Ensemble Dependent Matrix Methodology for Probabilistic-Based Fault-tolerant Nanoscale Circuit Design. ISCAS 2007: 1803-1806 - [c42]Wein-Tsung Shen, Chih-Hao Chao, Yu-Kuang Lien, An-Yeu Wu:
A New Binomial Mapping and Optimization Algorithm for Reduced-Complexity Mesh-Based On-Chip Network. NOCS 2007: 317-322 - [c41]Kai-Yuan Jheng, Yuan-Jyue Chen, An-Yeu Wu:
Multilevel Linc System Design for Power Efficiency Enhancement. SiPS 2007: 31-34 - [c40]Tzu-Hao Yu, Shih-Yu Sun, Chih-Liang Ding, Pai-Chi Li, An-Yeu Wu:
Reconfigurable Color Doppler DSP Engine for High-Frequency Ultrasonic Imaging Systems. SiPS 2007: 187-192 - [c39]Chun-Yuan Chu, Jyh-Ting Lai, An-Yeu Wu:
Robust Packet Detector based Automatic Gain Control Algorithm for OFDM-based Ultra-WideBand systems. SiPS 2007: 403-406 - [c38]Chi-Li Yu, Tzu-Hao Yu, An-Yeu Wu:
On the Fixed-Point Properties of Mixed-Scaling-Rotation Cordic Algorithm. SiPS 2007: 430-435 - [c37]Sung-Tze Wu, Chih-Hao Chao, I-Chyn Wey, An-Yeu Wu:
Dynamic Channel Flow Control of Networks-on-Chip Systems for High Buffer Efficiency. SiPS 2007: 493-498 - 2006
- [j15]Chih-Hsiu Lin, An-Yeu Wu, Fan-Min Li:
High-Performance VLSI Architecture of Decision Feedback Equalizer for Gigabit Systems. IEEE Trans. Circuits Syst. II Express Briefs 53-II(9): 911-915 (2006) - [j14]Huai-Yi Hsu, An-Yeu Wu, Jih-Chiang Yeo:
Area-Efficient VLSI Design of Reed-Solomon Decoder for 10GBase-LX4 Optical Communication Systems. IEEE Trans. Circuits Syst. II Express Briefs 53-II(11): 1245-1249 (2006) - [j13]Huai-Yi Hsu, Jih-Chiang Yeo, An-Yeu Wu:
Multi-Symbol-Sliced Dynamically Reconfigurable Reed-Solomon Decoder Design Based on Unified Finite-Field Processing Element. IEEE Trans. Very Large Scale Integr. Syst. 14(5): 489-500 (2006) - [c36]Kai-Yuan Jheng, Yi-Chiuan Wang, An-Yeu Wu, Hen-Wai Tsao:
DSP engine design for LINC wireless transmitter systems. ISCAS 2006 - [c35]Wei Wang, I-Chyn Wey, Chia-Tsun Wu, An-Yeu Wu:
A portable all-digital pulsewidth control loop for SOC applications. ISCAS 2006 - [c34]Chia-Tsun Wu, Wei Wang, I-Chyn Wey, An-Yeu Wu:
A frequency estimation algorithm for ADPLL designs with two-cycle lock-in time. ISCAS 2006 - [c33]Yu-Hung Lee, Tzu-Hao Yu, Kuo-Ken Huang, An-Yeu Wu:
Rapid IP Design of Variable-length Cached-FFT Processor for OFDM-based Communication Systems. SiPS 2006: 62-65 - [c32]Fan-Min Li, Cheng-Hung Lin, An-Yeu Wu:
A New Early Termination Scheme of Iterative Turbo Decoding Using Decoding Threshold. SiPS 2006: 89-94 - [c31]Jyh-Ting Lai, Chun-Yuan Chu, An-Yeu Wu, Wen-Chiang Chen:
A Robust Band-Tracking Packet Detector (BT-PD) in OFDM-Based Ultra-Wideband Systems. SiPS 2006: 165-170 - [c30]Jyh-Ting Lai, Chun-Yuan Chu, An-Yeu Wu, Wen-Chiang Chen:
A Low Cost Packet Detector in OFDM-Based Ultra-Wideband Systems. SiPS 2006: 171-176 - [c29]Ming-Feng Hsu, Yen-Liang Chen, Kai-Yuan Jheng, An-Yeu Wu:
A Shortened Impulse Response Filter (SIRF) Scheme for Cost-Effective Echo Canceller Design of 10GBase-T Ethernet System. SiPS 2006: 309-312 - [c28]Tzu-Hao Yu, Chi-Li Yu, Kai-Yuan Jheng, An-Yeu Wu:
On-Line MSR-CORDIC VLSI Architecture with Applications to Cost-Efficient Rotation-Based Adaptive Filtering Systems. SiPS 2006: 422-427 - 2005
- [j12]Chih-Hsiu Lin, An-Yeu Wu:
Mixed-scaling-rotation CORDIC (MSR-CORDIC) algorithm and architecture for high-performance vector rotational DSP applications. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(11): 2385-2396 (2005) - [j11]Chih-Hsiu Lin, An-Yeu Wu:
Soft-threshold-based multilayer decision feedback equalizer (STM-DFE) algorithm and VLSI architecture. IEEE Trans. Signal Process. 53(8-2): 3325-3336 (2005) - [c27]Chih-Hsiu Lin, An-Yeu Wu:
Low cost decision feedback equalizer (DFE) design for Giga-bit systems. ICASSP (3) 2005: 1001-1004 - [c26]Tsung-Han Tsai, Cheng-Hung Lin, An-Yeu Wu:
A memory-reduced log-MAP kernel for turbo decoder. ISCAS (2) 2005: 1032-1035 - [c25]I-Chyn Wey, Lung-Hao Chang, You-Gang Chen, Shih-Hung Chang, An-Yeu Wu:
A 2Gb/s high-speed scalable shift-register based on-chip serial communication design for SoC applications. ISCAS (2) 2005: 1074-1077 - [c24]Chia-Tsun Wu, Wei Wang, I-Chyn Wey, An-Yeu Wu:
A scalable DCO design for portable ADPLL designs. ISCAS (6) 2005: 5449-5452 - [c23]Hung Yang Ko, Yi-Chiuan Wang, An-Yeu Wu:
Digital signal processing engine design for polar transmitter in wireless communication systems. ISCAS (6) 2005: 6026-6029 - 2004
- [j10]Meng-Da Yang, An-Yeu Wu, Jyh-Ting Lai:
Fast convergent pipelined adaptive DFE architecture using post-cursor processing filter technique. IEEE Trans. Circuits Syst. II Express Briefs 51-II(2): 57-60 (2004) - [j9]Meng-Da Yang, An-Yeu Wu, Jyh-Ting Lai:
High-performance VLSI architecture of adaptive decision feedback equalizer based on predictive parallel branch slicer (PPBS) scheme. IEEE Trans. Very Large Scale Integr. Syst. 12(2): 218-226 (2004) - [c22]Kai-Yuan Jheng, Shyh-Jye Jou, An-Yeu Wu:
A design flow for multiplierless linear-phase FIR filters: from system specification to Verilog code. ISCAS (5) 2004: 293-296 - [c21]Hsiu-Ping Lin, Nancy Fang-Yih Chen, Jyh-Ting Lai, An-Yeu Wu:
1000BASE-T Gigabit Ethernet baseband DSP IC design. ISCAS (4) 2004: 401-404 - [c20]Ching-Hua Wen, Huai-Yi Hsu, Hung Yang Ko, An-Yeu Wu:
Least squares approximation-based ROM-free direct digital frequency synthesizer. ISCAS (2) 2004: 701-704 - [c19]Kai Huang, Fan-Min Li, Pei-Ling Shen, An-Yeu Wu:
VLSI design of dual-mode Viterbi/turbo decoder for 3GPP. ISCAS (2) 2004: 773-776 - 2003
- [j8]An-Yeu Wu, Ut-Va Koc, Keshab K. Parhi, Sergios Theodoridis:
Editorial. EURASIP J. Adv. Signal Process. 2003(13): 1265-1267 (2003) - [j7]Jen-Chih Kuo, Ching-Hua Wen, Chih-Hsiu Lin, An-Yeu Wu:
VLSI Design of a Variable-Length FFT/IFFT Processor for OFDM-Based Communication Systems. EURASIP J. Adv. Signal Process. 2003(13): 1306-1316 (2003) - [j6]Cheng-Shing Wu, An-Yeu Wu, Chih-Hsiu Lin:
A high-performance/low-latency vector rotational CORDIC architecture based on extended elementary angle set and trellis-based searching schemes. IEEE Trans. Circuits Syst. II Express Briefs 50(9): 589-601 (2003) - [j5]Huai-Yi Hsu, Sheng-Feng Wang, An-Yeu Wu:
A Novel Low-Cost Multi-Mode Reed Solomon Decoder Design Based on Peterson-Gorenstein-Zierler Algorithm. J. VLSI Signal Process. 34(3): 251-259 (2003) - [c18]Zhi-Xiu Lin, An-Yeu Wu:
Mixed-scaling-rotation CORDIC (MSR-CORDIC) algorithm and architecture for scaling-free high-performance rotational operations. ICASSP (2) 2003: 653-656 - [c17]An-Yeu Wu, I-Hsien Lee, Cheng-Shing Wu:
Angle quantization approach for lattice IIR filter implementation and its trellis de-allocation algorithm. ICASSP (2) 2003: 673-676 - [c16]Jen-Chih Kuo, Ching-Hua Wen, An-Yeu Wu:
Implementation of a programmable 64~2048-point FFT/IFFT processor for OFDM-based communication systems. ISCAS (2) 2003: 121-124 - 2002
- [j4]Tsun-Shan Chan, Jen-Chih Kuo, An-Yeu Wu:
A Reduced-Complexity Fast Algorithm for Software Implementation of the IFFT/FFT in DMT Systems. EURASIP J. Adv. Signal Process. 2002(9): 961-974 (2002) - [c15]Meng-Da Yang, An-Yeu Wu:
A new pipelined adaptive DFE architecture with improved convergence rate. ISCAS (4) 2002: 213-216 - [c14]Cheng-Shing Wu, An-Yeu Wu:
A novel cost-effective multi-path adaptive interpolated FIR (IFIR)-based echo canceller. ISCAS (5) 2002: 453-456 - 2001
- [c13]I-Hsien Lee, Cheng-Shing Wu, An-Yeu Wu:
Cost-efficient multiplier-less FIR filter structure based on modified DECOR transformation. ICASSP 2001: 1065-1068 - [c12]Cheng-Shing Wu, An-Yeu Wu:
A novel trellis-based searching scheme for EEAS-based CORDIC algorithm. ICASSP 2001: 1229-1232 - [c11]An-Yeu Wu, Cheng-Shing Wu:
A unified design framework for vector rotational CORDIC family based on angle quantization process. ICASSP 2001: 1233-1236 - [c10]Chih-Chi Wang, An-Yeu Wu, Bor-Ming Wang:
A cost-effective TEQ algorithm for ADSL systems. ICC 2001: 398-402 - [c9]Chi-Li Yu, An-Yeu Wu:
An improved time-recursive lattice structure for low-latency IFFT architecture in DMT transmitter. ISCAS (4) 2001: 250-253 - 2000
- [c8]Jye-Jong Leu, An-Yeu Wu:
Design methodology for Booth-encoded Montgomery module design for RSA cryptosystem. ISCAS 2000: 357-360 - [c7]Cheng-Shing Wu, An-Yeu Wu:
Modified vector rotational CORDIC (MVR-CORDIC) algorithm and its application to FFT. ISCAS 2000: 529-532
1990 – 1999
- 1999
- [c6]Cheng-Shing Wu, An-Yeu Wu:
A novel multirate adaptive FIR filtering algorithm and structure. ICASSP 1999: 1849-1852 - 1998
- [j3]K. J. Ray Liu, An-Yeu Wu, Arun Raghupathy, Jie Chen:
Algorithm-based low-power and high-performance multimedia signal processing. Proc. IEEE 86(6): 1155-1202 (1998) - [j2]An-Yeu Wu, K. J. Ray Liu, Arun Raghupathy:
System architecture of an adaptive reconfigurable DSP computing engine. IEEE Trans. Circuits Syst. Video Technol. 8(1): 54-73 (1998) - [j1]An-Yeu Wu, K. J. Ray Liu:
Algorithm-based low-power transform coding architectures: the multirate approach. IEEE Trans. Very Large Scale Integr. Syst. 6(4): 707-718 (1998) - [c5]An-Yeu Wu, Tsun-Shan Chan:
Cost-efficient parallel lattice VLSI architecture for the IFFT/FFT in DMT transceiver technology. ICASSP 1998: 3517-3520 - 1995
- [c4]An-Yeu Wu, K. J. Ray Liu:
Algorithm-based low-power transform coding architectures. ICASSP 1995: 3267-3270 - [c3]An-Yeu Wu, K. J. Ray Liu, Arun Raghupathy, Shang-Chieh Liu:
Parallel programmable video co-processor design. ICIP 1995: 61-64 - 1994
- [c2]An-Yeu Wu, K. J. Ray Liu:
A Low-Power and Low-Complexity DCT/IDCT VLSI Architecture Based On Backward Chebyshev Recursion. ISCAS 1994: 155-158 - 1993
- [c1]K. J. Ray Liu, An-Yeu Wu:
A Multi-layer 2-D Adaptive Filtering Architecture Based on McClellan Transformation. ISCAS 1993: 1999-2002
Coauthor Index
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