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ORCIDDonald Yeung
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- affiliation: University of Maryland, College Park, USA
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2020 – today
- 2024
[c30]Devesh Singh
, Donald Yeung:
MORSE: Memory Overwrite Time Guided Soft Writes to Improve ReRAM Energy and Endurance. PACT 2024: 26-39- 2023
- [c29]Martin Peckerar, Po-Chun Huang, Rachid Ahmad Jamil, Bruce Jacob, Donald Yeung, Leo Peckerar:
Critical Issues in Advanced ReRAM Development. MEMSYS 2023: 24:1-24:4 - 2021
- [j22]Candace Walden, Devesh Singh, Meenatchi Jagasivamani, Shang Li, Luyi Kang, Mehdi Asnaashari, Sylvain Dubois, Bruce L. Jacob, Donald Yeung:
Monolithically Integrating Non-Volatile Main Memory over the Last-Level Cache. ACM Trans. Archit. Code Optim. 18(4): 48:1-48:26 (2021) - 2020
- [j21]Daniel Gerzhoy, Xiaowu Sun, Michael Zuzak, Donald Yeung:
Nested MIMD-SIMD Parallelization for Heterogeneous Microprocessors. ACM Trans. Archit. Code Optim. 16(4): 48:1-48:27 (2020) - [c28]Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Mehdi Asnaashari, Sylvain Dubois, Bruce L. Jacob, Donald Yeung:
Tileable Monolithic ReRAM Memory Design. COOL CHIPS 2020: 1-3
2010 – 2019
- 2019
- [j20]Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Shang Li, Mehdi Asnaashari, Sylvain Dubois, Bruce L. Jacob, Donald Yeung:
Analyzing the Monolithic Integration of a ReRAM-Based Main Memory Into a CPU's Die. IEEE Micro 39(6): 64-72 (2019) - [c27]Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Shang Li, Mehdi Asnaashari, Sylvain Dubois, Donald Yeung, Bruce L. Jacob:
Design for ReRAM-based main-memory architectures. MEMSYS 2019: 342-350 - 2018
- [c26]Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Shang Li, Mehdi Asnaashari, Sylvain Dubois, Bruce L. Jacob, Donald Yeung:
Memory-systems challenges in realizing monolithic computers. MEMSYS 2018: 98-104 - 2017
- [j19]Abdel-Hameed A. Badawy, Donald Yeung:
Guiding Locality Optimizations for Graph Computations via Reuse Distance Analysis. IEEE Comput. Archit. Lett. 16(2): 119-122 (2017) - [j18]I. Stephen Choi, Donald Yeung:
Multi-cache resizing via greedy coordinate descent. J. Supercomput. 73(6): 2402-2429 (2017) - [j17]Minshu Zhao, Donald Yeung:
Using Multicore Reuse Distance to Study Coherence Directories. ACM Trans. Comput. Syst. 35(2): 4:1-4:49 (2017) - [c25]Abdel-Hameed A. Badawy, Donald Yeung:
Optimizing locality in graph computations using reuse distance profiles. IPCCC 2017: 1-8 - 2016
- [j16]Michael Badamo, Jeff Casarona, Minshu Zhao, Donald Yeung:
Identifying Power-Efficient Multicore Cache Hierarchies via Reuse Distance Analysis. ACM Trans. Comput. Syst. 34(1): 3:1-3:30 (2016) - [j15]Caleb Serafy, Avram Bar-Cohen, Ankur Srivastava, Donald Yeung:
Unlocking the True Potential of 3-D CPUs With Microfluidic Cooling. IEEE Trans. Very Large Scale Integr. Syst. 24(4): 1515-1523 (2016) - [c24]Stephen P. Crago, Donald Yeung:
Reducing data movement with approximate computing techniques. ICRC 2016: 1-4 - 2015
- [c23]Minshu Zhao, Donald Yeung:
Studying the impact of multicore processor scaling on directory techniques via reuse distance analysis. HPCA 2015: 590-602 - 2014
- [c22]Caleb Serafy, Ankur Srivastava, Donald Yeung:
Unlocking the true potential of 3D CPUs with micro-fluidic cooling. ISLPED 2014: 323-326 - 2013
- [j14]Meng-Ju Wu, Donald Yeung:
Efficient Reuse Distance Analysis of Multicore Scaling for Loop-Based Parallel Programs. ACM Trans. Comput. Syst. 31(1): 1 (2013) - [c21]Caleb Serafy, Bing Shi, Ankur Srivastava, Donald Yeung:
High performance 3D stacked DRAM processor architectures with micro-fluidic cooling. 3DIC 2013: 1-8 - [c20]Meng-Ju Wu, Minshu Zhao, Donald Yeung:
Studying multicore processor scaling via reuse distance analysis. ISCA 2013: 499-510 - 2012
- [c19]Meng-Ju Wu, Donald Yeung:
Identifying optimal multicore cache hierarchies for loop-based parallel programs via reuse distance analysis. MSPC 2012: 2-11 - 2011
- [j13]Inseok Choi, Minshu Zhao, Xu Yang, Donald Yeung:
Experience with Improving Distributed Shared Cache Performance on Tilera's Tile Processor. IEEE Comput. Archit. Lett. 10(2): 45-48 (2011) - [c18]Meng-Ju Wu, Donald Yeung:
Coherent Profiles: Enabling Efficient Reuse Distance Analysis of Multicore Scaling for Loop-based Parallel Programs. PACT 2011: 264-275 - [c17]Eric Lau, Jason E. Miller, Inseok Choi, Donald Yeung, Saman P. Amarasinghe, Anant Agarwal:
Multicore Performance Optimization Using Partner Cores. HotPar 2011
2000 – 2009
- 2009
- [j12]Wanli Liu, Donald Yeung:
Enhancing LTP-Driven Cache Management Using Reuse Distance Information. J. Instr. Level Parallelism 11 (2009) - [j11]Seungryul Choi, Donald Yeung:
Hill-climbing SMT processor resource distribution. ACM Trans. Comput. Syst. 27(1): 1:1-1:47 (2009) - [c16]Wanli Liu, Donald Yeung:
Using Aggressor Thread Information to Improve Shared Cache Management for CMPs. PACT 2009: 372-383 - 2008
- [j10]Xuanhua Li, Donald Yeung:
Exploiting Application-Level Correctness for Low-Cost Fault Tolerance. J. Instr. Level Parallelism 10 (2008) - 2007
- [j9]Sumitkumar N. Pamnani, Deepak N. Agarwal, Gang Qu, Donald Yeung:
Low Power System Design by Combining Software Prefetching and Dynamic voltage Scaling. J. Circuits Syst. Comput. 16(5): 745-767 (2007) - [c15]Xuanhua Li, Donald Yeung:
Application-Level Correctness and its Impact on Fault Tolerance. HPCA 2007: 181-192 - 2006
- [c14]Seungryul Choi, Donald Yeung:
Learning-Based SMT Processor Resource Distribution via Hill-Climbing. ISCA 2006: 239-251 - 2005
- [c13]Kursad Albayraktaroglu, Aamer Jaleel, Xue Wu, Manoj Franklin, Bruce L. Jacob, Chau-Wen Tseng, Donald Yeung:
BioBench: A Benchmark Suite of Bioinformatics Applications. ISPASS 2005: 2-9 - 2004
- [j8]Abdel-Hameed A. Badawy, Aneesh Aggarwal, Donald Yeung, Chau-Wen Tseng:
The Efficacy of Software Prefetching and Locality Optimizations on Future Memory Systems. J. Instr. Level Parallelism 6 (2004) - [j7]Seungryul Choi, Nicholas Kohout, Sumit Pamnani, Dongkeun Kim, Donald Yeung:
A general framework for prefetch scheduling in linked data structures and its application to multi-chain prefetching. ACM Trans. Comput. Syst. 22(2): 214-280 (2004) - [j6]Dongkeun Kim, Donald Yeung:
A study of source-level compiler algorithms for automatic construction of pre-execution code. ACM Trans. Comput. Syst. 22(3): 326-379 (2004) - [c12]Dongkeun Kim, Shih-Wei Liao, Perry H. Wang, Juan del Cuvillo, Xinmin Tian, Xiang Zou, Hong Wang, Donald Yeung, Milind Girkar, John Paul Shen:
Physical Experimentation with Prefetching Helper Threads on Intel's Hyper-Threaded Processors. CGO 2004: 27-38 - [c11]Deepak N. Agarwal, Sumitkumar N. Pamnani, Gang Qu, Donald Yeung:
Transferring performance gain from software prefetching to energy reduction. ISCAS (2) 2004: 241-244 - 2003
- [j5]Gautham Thambidorai, Donald Yeung, Seungryul Choi:
Optimizing SMT Processors for High Single-Thread Performance. J. Instr. Level Parallelism 5 (2003) - 2002
- [c10]Gautham K. Dorai, Donald Yeung:
Transparent Threads: Resource Sharing in SMT Processors for High Single-Thread Performance. IEEE PACT 2002: 30-41 - [c9]Dongkeun Kim, Donald Yeung:
Design and evaluation of compiler algorithms for pre-execution. ASPLOS 2002: 159-170 - 2001
- [j4]Csaba Andras Moritz, Donald Yeung, Anant Agarwal:
SimpleFit: A Framework for Analyzing Design Trade-Offs in Raw Architectures. IEEE Trans. Parallel Distributed Syst. 12(7): 730-742 (2001) - [c8]Nicholas Kohout, Seungryul Choi, Dongkeun Kim, Donald Yeung:
Multi-Chain Prefetching: Effective Exploitation of Inter-Chain Memory Parallelism for Pointer-Chasing Codes. IEEE PACT 2001: 268-279 - [c7]Abdel-Hameed A. Badawy, Aneesh Aggarwal, Donald Yeung, Chau-Wen Tseng:
Evaluating the impact of memory system performance on software prefetching and locality optimizations. ICS 2001: 486-500 - 2000
- [j3]Donald Yeung, John Kubiatowicz, Anant Agarwal:
Multigrain shared memory. ACM Trans. Comput. Syst. 18(2): 154-196 (2000)
1990 – 1999
- 1999
- [j2]Anant Agarwal, Ricardo Bianchini, David Chaiken, Frederic T. Chong, Kirk L. Johnson, David A. Kranz, John D. Kubiatowicz, Beng-Hong Lim, Kenneth Mackenzie, Donald Yeung:
The MIT Alewife Machine. Proc. IEEE 87(3): 430-444 (1999) - [c6]Donald Yeung:
The scalability of multigrain systems. International Conference on Supercomputing 1999: 268-277 - 1998
- [b1]Donald Yeung:
Multigrain shared memory. Massachusetts Institute of Technology, Cambridge, MA, USA, 1998 - [c5]Csaba Andras Moritz, Donald Yeung, Anant Agarwal:
Exploring Optimal Cost-Performance Designs for Raw Microprocessors. FCCM 1998: 12-27 - 1996
- [c4]Donald Yeung, John Kubiatowicz, Anant Agarwal:
MGS: A Multigrain Shared Memory System. ISCA 1996: 44-55 - 1995
- [c3]Anant Agarwal, Ricardo Bianchini, David Chaiken, Kirk L. Johnson, David A. Kranz, John Kubiatowicz, Beng-Hong Lim, Kenneth Mackenzie, Donald Yeung:
The MIT Alewife Machine: Architecture and Performance. ISCA 1995: 2-13 - 1994
- [p1]David A. Kranz, Beng-Hong Lim, Anant Agarwal, Donald Yeung:
Low-Cost Support for Fine-Grain Synchronization in Multiprocessors. Multithreaded Computer Architecture 1994: 139-166 - 1993
- [j1]Anant Agarwal, John Kubiatowicz, David A. Kranz, Beng-Hong Lim, Donald Yeung, Godfrey D'Souza, Mike Parkin:
Sparcle: an evolutionary processor design for large-scale multiprocessors. IEEE Micro 13(3): 48-61 (1993) - [c2]Donald Yeung, Anant Agarwal:
Experience with Fine-Grain Synchronization in MIMD Machines for Preconditioned Conjugate Gradient. PPoPP 1993: 187-197 - 1992
- [c1]Anant Agarwal, Jonathan Babb, David Chaiken, Godfrey D'Souza, Kirk L. Johnson, David A. Kranz, John Kubiatowicz, Beng-Hong Lim, Gino Maa, Kenneth Mackenzie, Daniel Nussbaum, Mike Parkin, Donald Yeung:
Sparcle: A Multithreaded VLSI Processor for Parallel Computing. Parallel Symbolic Computing 1992: 359-361
Coauthor Index
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