article

Reversible Gates and Testability of One Dimensional Arrays of Molecular QCA

Authors:

F. LombardiAuthors Info & Claims

Journal of Electronic Testing: Theory and Applications, Volume 24, Issue 1-3

Pages 297 - 311

https://doi.org/10.1007/s10836-007-5042-2

Published: 01 June 2008 Publication History

Abstract

An extensive literature exists on the mathematical characterization of reversible logic. However, the possible technological basis of this computing paradigm still remains unsolved. In this paper, quantum-dot cellular automata (QCA) is investigated for testable implementations of reversible logic. Two new reversible gates (referred to as QCA1 and QCA2) are proposed. These gates are compared (in terms of delay, area and logic synthesis) with other reversible gates (such as Toffoli and Fredkin) for QCA implementation. Due to the expected high error rates in nano-scale manufacturing, testing of nano devices, including QCA, has received considerable attention. The focus of this paper is on the testability of a one-dimensional array made of QCA reversible gates, because the bijective nature of reversible gates significantly facilitates testing of arrays. The investigation of testability relies on a fault model for molecular QCA that is based on a single missing/additional cell assumption. It is shown that C-testability of a 1D reversible QCA gate array can be guaranteed for single fault. Theory and circuit examples show that error masking can occur when multiple faults are considered.

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Cited By

Jain VSharma DGaur HSingh AWen X(2023)Comprehensive and Comparative Analysis of QCA-based Circuit Designs for Next-generation ComputationACM Computing Surveys10.1145/362293256:5(1-36)Online publication date: 25-Nov-2023
https://dl.acm.org/doi/10.1145/3622932
Pain PDas KSadhu AKanjilal MDe D(2022)Power analysis attack resistable hardware cryptographical circuit design using reversible logic gate in quantum cellular automataMicrosystem Technologies10.1007/s00542-019-04581-228:3(779-791)Online publication date: 1-Mar-2022
https://dl.acm.org/doi/10.1007/s00542-019-04581-2
Dadjouyan ASayedsalehi SFaghih Mirzaee RJafarali Jassbi S(2020)Design and evaluation of clocked nanomagnetic logic conservative Fredkin gateJournal of Computational Electronics10.1007/s10825-019-01421-419:1(396-406)Online publication date: 1-Mar-2020
https://dl.acm.org/doi/10.1007/s10825-019-01421-4
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Index Terms

Reversible Gates and Testability of One Dimensional Arrays of Molecular QCA
1. Hardware

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Published In

cover image Journal of Electronic Testing: Theory and Applications

Journal of Electronic Testing: Theory and Applications Volume 24, Issue 1-3

June 2008

305 pages

ISSN:0923-8174

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Copyright © Copyright © 2008 Springer Science+Business Media, LLC.

Publisher

Kluwer Academic Publishers

United States

Publication History

Published: 01 June 2008

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Cited By

Jain VSharma DGaur HSingh AWen X(2023)Comprehensive and Comparative Analysis of QCA-based Circuit Designs for Next-generation ComputationACM Computing Surveys10.1145/362293256:5(1-36)Online publication date: 25-Nov-2023
https://dl.acm.org/doi/10.1145/3622932
Pain PDas KSadhu AKanjilal MDe D(2022)Power analysis attack resistable hardware cryptographical circuit design using reversible logic gate in quantum cellular automataMicrosystem Technologies10.1007/s00542-019-04581-228:3(779-791)Online publication date: 1-Mar-2022
https://dl.acm.org/doi/10.1007/s00542-019-04581-2
Dadjouyan ASayedsalehi SFaghih Mirzaee RJafarali Jassbi S(2020)Design and evaluation of clocked nanomagnetic logic conservative Fredkin gateJournal of Computational Electronics10.1007/s10825-019-01421-419:1(396-406)Online publication date: 1-Mar-2020
https://dl.acm.org/doi/10.1007/s10825-019-01421-4
Hashemi SRahimi Azghadi MNavi K(2019)Design and analysis of efficient QCA reversible addersThe Journal of Supercomputing10.1007/s11227-018-2683-075:4(2106-2125)Online publication date: 1-Apr-2019
https://dl.acm.org/doi/10.1007/s11227-018-2683-0
Nagamani AAnuktha SNanditha NAgrawal V(2018)A Genetic Algorithm-Based Heuristic Method for Test Set Generation in Reversible CircuitsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2017.269588137:2(324-336)Online publication date: 1-Feb-2018
https://dl.acm.org/doi/10.1109/TCAD.2017.2695881
Rahmati MHoushmand MHoushmand Kaffashian M(2017)Novel designs of a carry/borrow look-ahead adder/subtractor using reversible gatesJournal of Computational Electronics10.1007/s10825-017-1031-616:3(856-866)Online publication date: 1-Sep-2017
https://dl.acm.org/doi/10.1007/s10825-017-1031-6
Kianpour MSabbaghi-Nadooshan R(2017)Novel 8-bit reversible full adder/subtractor using a QCA reversible gateJournal of Computational Electronics10.1007/s10825-017-0963-116:2(459-472)Online publication date: 1-Jun-2017
https://dl.acm.org/doi/10.1007/s10825-017-0963-1
Nagamani AAshwin SAbhishek BAgrawal V(2016)An Exact approach for Complete Test Set Generation of Toffoli-Fredkin-Peres based Reversible CircuitsJournal of Electronic Testing: Theory and Applications10.1007/s10836-016-5574-432:2(175-196)Online publication date: 1-Apr-2016
https://dl.acm.org/doi/10.1007/s10836-016-5574-4
Thapliyal HRanganathan N(2013)Design of efficient reversible logic-based binary and BCD adder circuitsACM Journal on Emerging Technologies in Computing Systems10.1145/24916829:3(1-31)Online publication date: 8-Oct-2013
https://dl.acm.org/doi/10.1145/2491682
Kotiyal SThapliyal HRanganathan NRosenstiel WMacii E(2012)Mach-zehnder interferometer based design of all optical reversible binary adderProceedings of the Conference on Design, Automation and Test in Europe10.5555/2492708.2492890(721-726)Online publication date: 12-Mar-2012
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