research-article

Data Cache and Direct Memory Access in Programming Mediaprocessors

Authors:

Donglok Kim,

Ravi Managuli,

Yongmin KimAuthors Info & Claims

IEEE Micro, Volume 21, Issue 4

Pages 33 - 42

https://doi.org/10.1109/40.946678

Published: 01 July 2001 Publication History

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Abstract

Mediaprocessors provide high performance by using both instruction- and data-level parallelism. Because of the increased computing power, transferring data between off- and on-chip memories without slowing down the core processor's performance is challenging. Two methods, data cache and direct memory access, address this problem in different ways.

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Cited By

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Vaquerizo-Hdez DMuñoz PBarrero DR-Moreno M(2021)Continuous energy consumption measure approach using a DMA double-buffering techniqueEURASIP Journal on Wireless Communications and Networking10.1186/s13638-021-02043-w2021:1Online publication date: 28-Aug-2021
https://dl.acm.org/doi/10.1186/s13638-021-02043-w
Kwon KAmid AGholami AWu BAsanovic KKeutzer K(2018)Co-design of deep neural nets and neural net accelerators for embedded vision applicationsProceedings of the 55th Annual Design Automation Conference10.1145/3195970.3199849(1-6)Online publication date: 24-Jun-2018
https://dl.acm.org/doi/10.1145/3195970.3199849
Kwon KAmid AGholami AWu BAsanovic KKeutzer K(2018)Invited: Co-Design of Deep Neural Nets and Neural Net Accelerators for Embedded Vision Applications2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)10.1109/DAC.2018.8465901(1-6)Online publication date: 24-Jun-2018
https://dl.acm.org/doi/10.1109/DAC.2018.8465901
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Index Terms

Data Cache and Direct Memory Access in Programming Mediaprocessors
1. Hardware
  1. Integrated circuits
    1. Semiconductor memory
      1. Dynamic memory

Index terms have been assigned to the content through auto-classification.

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Published In

IEEE Micro Volume 21, Issue 4

July 2001

57 pages

ISSN:0272-1732

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IEEE Computer Society Press

Washington, DC, United States

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Published: 01 July 2001

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Vaquerizo-Hdez DMuñoz PBarrero DR-Moreno M(2021)Continuous energy consumption measure approach using a DMA double-buffering techniqueEURASIP Journal on Wireless Communications and Networking10.1186/s13638-021-02043-w2021:1Online publication date: 28-Aug-2021
https://dl.acm.org/doi/10.1186/s13638-021-02043-w
Kwon KAmid AGholami AWu BAsanovic KKeutzer K(2018)Co-design of deep neural nets and neural net accelerators for embedded vision applicationsProceedings of the 55th Annual Design Automation Conference10.1145/3195970.3199849(1-6)Online publication date: 24-Jun-2018
https://dl.acm.org/doi/10.1145/3195970.3199849
Kwon KAmid AGholami AWu BAsanovic KKeutzer K(2018)Invited: Co-Design of Deep Neural Nets and Neural Net Accelerators for Embedded Vision Applications2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)10.1109/DAC.2018.8465901(1-6)Online publication date: 24-Jun-2018
https://dl.acm.org/doi/10.1109/DAC.2018.8465901
Mancini SLarabi ZMathieu YToczek TPierrefeu L(2012)Exploration of 3D grid caching strategies for ray-shootingJournal of Real-Time Image Processing10.5555/2159285.21593017:1(3-19)Online publication date: 1-Mar-2012
https://dl.acm.org/doi/10.5555/2159285.2159301
Li BFang ZIyer R(2011)Template-based memory access engine for accelerators in SoCsProceedings of the 16th Asia and South Pacific Design Automation Conference10.5555/1950815.1950857(147-153)Online publication date: 25-Jan-2011
https://dl.acm.org/doi/10.5555/1950815.1950857
Apewokin SValentine BWills LWills D(2010)Cat-tail dmaJournal of Mobile Multimedia10.5555/2016968.20169756:2(170-184)Online publication date: 1-Jun-2010
https://dl.acm.org/doi/10.5555/2016968.2016975
Corvino RGamatié ABoulet P(2010)Architecture exploration for efficient data transfer and storage in data-parallel applicationsProceedings of the 16th international Euro-Par conference on Parallel processing: Part I10.5555/1887695.1887708(101-116)Online publication date: 31-Aug-2010
https://dl.acm.org/doi/10.5555/1887695.1887708
Larabi ZMathieu YMancini S(2009)Efficient Data Access Management for FPGA-Based Image Processing SoCsProceedings of the 2009 IEEE/IFIP International Symposium on Rapid System Prototyping10.1109/RSP.2009.20(159-165)Online publication date: 23-Jun-2009
https://dl.acm.org/doi/10.1109/RSP.2009.20
Bartzas APeon-Quiros MMamagkakis SCatthoor FSoudris DMendias JKyung CChoi KHa S(2008)Enabling run-time memory data transfer optimizations at the system level with automated extraction of embedded software metadata informationProceedings of the 2008 Asia and South Pacific Design Automation Conference10.5555/1356802.1356909(434-439)Online publication date: 21-Jan-2008
https://dl.acm.org/doi/10.5555/1356802.1356909
Gelado IKelm JRyoo SLumetta SNavarro NHwu WPapatheodorou TBanerjee UMendelson AGallivan K(2008)CUBAProceedings of the 22nd annual international conference on Supercomputing10.1145/1375527.1375571(299-308)Online publication date: 7-Jun-2008
https://dl.acm.org/doi/10.1145/1375527.1375571
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A cache-based prefetching memory system for mediaprocessors

The Direct-to-Data (D2D) cache: navigating the cache hierarchy with a single lookup

The Direct-to-Data (D2D) cache: navigating the cache hierarchy with a single lookup

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