research-article

A Tutorial on Built-in Self-Test. I. Principles

Authors:

Vishwani D. Agrawal,

Charles R. Kime,

Kewal K. SalujaAuthors Info & Claims

IEEE Design & Test, Volume 10, Issue 1

Pages 73 - 82

https://doi.org/10.1109/54.199807

Published: 01 January 1993 Publication History

Abstract

An overview of built-in self-test (BIST) principles and practices is presented. The issues and economics underlying BIST are discussed, and the related hierarchical test structures are introduced. The fundamental BIST concepts of pattern generation and response analysis are explained. Linear feedback shift register theory is reviewed.

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Cited By

Sharma UAchuthan KBuragohain G(2010)Fault tolerant techniques for reconfigurable platformsProceedings of the 1st Amrita ACM-W Celebration on Women in Computing in India10.1145/1858378.1858438(1-4)Online publication date: 16-Sep-2010
https://dl.acm.org/doi/10.1145/1858378.1858438
Qi DMuzio J(2008)Non-linear test pattern generators for built-in self-testInternational Journal of Communication Networks and Distributed Systems10.1504/IJCNDS.2008.0202591:2(179-194)Online publication date: 1-Sep-2008
https://dl.acm.org/doi/10.1504/IJCNDS.2008.020259
Zhou BYe YWang YZhou HMacii EYan ZMassoud Y(2007)Simultaneous reduction in test data volume and test time for TRC-reseedingProceedings of the 17th ACM Great Lakes symposium on VLSI10.1145/1228784.1228802(49-54)Online publication date: 11-Mar-2007
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Index Terms

A Tutorial on Built-in Self-Test. I. Principles
1. Hardware
  1. Robustness

Index terms have been assigned to the content through auto-classification.

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cover image IEEE Design & Test

IEEE Design & Test Volume 10, Issue 1

January 1993

93 pages

ISSN:0740-7475

Issue’s Table of Contents

Copyright © Copyright © 1993 IEEE. All Rights Reserved.

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IEEE Computer Society Press

Washington, DC, United States

Publication History

Published: 01 January 1993

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Cited By

Sharma UAchuthan KBuragohain G(2010)Fault tolerant techniques for reconfigurable platformsProceedings of the 1st Amrita ACM-W Celebration on Women in Computing in India10.1145/1858378.1858438(1-4)Online publication date: 16-Sep-2010
https://dl.acm.org/doi/10.1145/1858378.1858438
Qi DMuzio J(2008)Non-linear test pattern generators for built-in self-testInternational Journal of Communication Networks and Distributed Systems10.1504/IJCNDS.2008.0202591:2(179-194)Online publication date: 1-Sep-2008
https://dl.acm.org/doi/10.1504/IJCNDS.2008.020259
Zhou BYe YWang YZhou HMacii EYan ZMassoud Y(2007)Simultaneous reduction in test data volume and test time for TRC-reseedingProceedings of the 17th ACM Great Lakes symposium on VLSI10.1145/1228784.1228802(49-54)Online publication date: 11-Mar-2007
https://dl.acm.org/doi/10.1145/1228784.1228802
Xiang DChen MFujiwara H(2007)Using Weighted Scan Enable Signals to Improve Test Effectiveness of Scan-Based BISTIEEE Transactions on Computers10.1109/TC.2007.7076756:12(1619-1628)Online publication date: 1-Dec-2007
https://dl.acm.org/doi/10.1109/TC.2007.70767
Sikdar BRoy SDas D(2005)A Degree-of-Freedom Based Synthesis Scheme for Sequential Machines with Enhanced BIST Quality and Reduced AreaJournal of Electronic Testing: Theory and Applications10.1007/s10836-005-5289-421:1(83-93)Online publication date: 1-Jan-2005
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Song DKang S(2005)Increasing embedding probabilities of RPRPs in RIN based BISTProceedings of the 10th Asia-Pacific conference on Advances in Computer Systems Architecture10.1007/11572961_49(600-613)Online publication date: 24-Oct-2005
https://dl.acm.org/doi/10.1007/11572961_49
Cvetković L(2004)An addition to the methods of test determination for fault detection in combinational circuitsActa Cybernetica10.5555/1052050.105205316:4(545-566)Online publication date: 1-Sep-2004
https://dl.acm.org/doi/10.5555/1052050.1052053
Pomeranz IMalik SFix LKahng A(2004)Scan-BIST based on transition probabilitiesProceedings of the 41st annual Design Automation Conference10.1145/996566.996815(940-943)Online publication date: 7-Jun-2004
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Pomeranz IKundu SReddy S(2004)Masking of Unknown Output Values during Output Response Compression byUsing Comparison UnitsIEEE Transactions on Computers10.1109/TC.2004.125579453:1(83-88)Online publication date: 1-Jan-2004
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Yang LMuzio J(2004)Keynote speechProceedings of the First international conference on Embedded Software and Systems10.1007/11535409_3(15-24)Online publication date: 9-Dec-2004
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