Investigation into micropipeline latch design styles

Standard micropipelines use simple two-phase control circuits. The latches employed on AMULET1 are level sensitive, so two- to four-phase converters are required in each latch controller. To avoid this overhead an investigation has been carried out into ...

This paper explores design of various components that are extensively used in digital circuits namely AND gate, OR gate, NAND gate, NOR gate and Full Adder using GDI Logic. Area and power dissipation of the circuits are one of the main issues ...${\mathrm{}}^{\mathrm{}}$${\mathrm{}}^{\mathrm{}}$${\mathrm{}}^{\mathrm{}}$${\mathrm{}}^{\mathrm{}}$${\mathrm{}}^{\mathrm{}}$${\mathrm{}}^{\mathrm{}}$${\mathrm{}}^{\mathrm{}}$

A novel CMOS ternary D-type edge-triggered flip-flop using a single latch with neuron-MOS literal circuits is presented. In the proposed circuit, data are sampled into the latch during a short transparency period for rising edge of the clock signal by ...