research-article

SpecSyn: an environment supporting the specify-explore-refine paradigm for hardware/software system design

Authors:

Daniel D. Gajski,

Sanjiv Narayan,

Jie GongAuthors Info & Claims

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume 6, Issue 1

Pages 84 - 100

https://doi.org/10.1109/92.661251

Published: 01 March 1998 Publication History

Abstract

System-level design issues are gaining increasing attention, as behavioral synthesis tools and methodologies mature. We present the SpecSyn system-level design environment, which supports the new specify-explore-refine (SER) design paradigm. This three-step approach to design includes precise specification of system functionality, rapid exploration of numerous systemlevel design options, and refinement of the specification into one reflecting the chosen option. A system-level design option consists of an allocation of system components, such as standard and custom processors, memories, and buses, and a partitioning of functionality among those components. After refinement, the functionality assigned to each component can then be synthesized to hardware or compiled to software. We describe the issues and approaches for each part of the SpecSyn environment. The new paradigm and environment are expected to lead to a more than ten times reduction in design time, and our experiments support this expectation.

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cover image IEEE Transactions on Very Large Scale Integration (VLSI) Systems

IEEE Transactions on Very Large Scale Integration (VLSI) Systems Volume 6, Issue 1

March 1998

179 pages

ISSN:1063-8210

Issue’s Table of Contents

Copyright © 1998.

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IEEE Educational Activities Department

United States

Publication History

Published: 01 March 1998

Revised: 03 July 1996

Received: 17 March 1995

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Cited By

Suriano LLima Dde la Torre E(2020)Accelerating a Classic 3D Video Game on Heterogeneous Reconfigurable MPSoCsApplied Reconfigurable Computing. Architectures, Tools, and Applications10.1007/978-3-030-44534-8_11(136-150)Online publication date: 1-Apr-2020
https://dl.acm.org/doi/10.1007/978-3-030-44534-8_11
Qadri MQadri NMcDonald-Maier K(2016)Fuzzy logic based energy and throughput aware design space exploration for MPSoCsMicroprocessors & Microsystems10.1016/j.micpro.2015.08.00140:C(113-123)Online publication date: 1-Feb-2016
https://dl.acm.org/doi/10.1016/j.micpro.2015.08.001
Zhang JSchirner G(2015)Towards closing the specification gap by integrating algorithm-level and system-level designDesign Automation for Embedded Systems10.1007/s10617-015-9161-119:4(389-419)Online publication date: 1-Dec-2015
https://dl.acm.org/doi/10.1007/s10617-015-9161-1
Kritikakou ACatthoor FAthanasiou GKelefouras VGoutis C(2013)Near-Optimal Microprocessor and Accelerators Codesign with Latency and Throughput ConstraintsACM Transactions on Architecture and Code Optimization10.1145/2459316.245931710:2(1-25)Online publication date: 1-May-2013
https://dl.acm.org/doi/10.1145/2459316.2459317
Gamatié ALe Beux SPiel ÉBen Atitallah REtien AMarquet PDekeyser J(2011)A Model-Driven Design Framework for Massively Parallel Embedded SystemsACM Transactions on Embedded Computing Systems10.1145/2043662.204366310:4(1-36)Online publication date: 1-Nov-2011
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Lysecky RVahid F(2009)Design and implementation of a MicroBlaze-based warp processorACM Transactions on Embedded Computing Systems10.1145/1509288.15092948:3(1-22)Online publication date: 22-Apr-2009
https://dl.acm.org/doi/10.1145/1509288.1509294
Saldanha LLysecky R(2009)Float-to-fixed and fixed-to-float hardware converters for rapid hardware/software partitioning of floating point software applications to static and dynamic fixed point coprocessorsDesign Automation for Embedded Systems10.1007/s10617-009-9044-413:3(139-157)Online publication date: 1-Sep-2009
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Lysecky R(2008)Scalability and parallel execution of warp processingInternational Journal of Parallel Programming10.5555/1515858.151586136:5(478-492)Online publication date: 1-Oct-2008
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Saldanha LLysecky RGebotys CMartin G(2008)Hardware/software partitioning of floating point software applications to fixed-pointed coprocessor circuitsProceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis10.1145/1450135.1450148(49-54)Online publication date: 19-Oct-2008
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