research-article

Design space exploration acceleration through operation clustering

Authors:

Benjamin Carrion Schafer and

Kazutoshi WakabayashiAuthors Info & Claims

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume 29, Issue 1

Pages 153 - 157

https://doi.org/10.1109/TCAD.2009.2035579

Published: 01 January 2010 Publication History

Abstract

This paper presents a clustering method called clustering design space exploration (CDS-ExpA) to accelerate the architectural exploration of behavioral descriptions in C and SystemC. The trade-offs between faster exploration versus optimality of results are investigated. Two variations of CDS-ExpA were developed: CDS-ExpA(min) and CDS-ExpA(max). CDS-ExpA(min) builds the smallest possible clusters while CDS-ExpA(max) builds the largest possible ones, reducing further the design space. Results show that CDS-ExpA(min) and CDS-ExpA(max) explore the design space 90% and 92% faster on average than a previously developed annealer-based exploration, method, at the expense of not finding 36% and 47% of the Pareto optimal designs and finding the smallest design that is 7% and 9% on average, larger, and the fastest design 28% and 32% slower, respectively.

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Cited By

Rashid MSchafer B(2023)Fast and Inexpensive High-Level Synthesis Design Space Exploration: Machine Learning to the RescueIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.325834142:11(3939-3950)Online publication date: 1-Nov-2023
https://dl.acm.org/doi/10.1109/TCAD.2023.3258341
Sun QChen TLiu SChen JYu HYu B(2022)Correlated Multi-objective Multi-fidelity Optimization for HLS Directives DesignACM Transactions on Design Automation of Electronic Systems10.1145/350354027:4(1-27)Online publication date: 8-Mar-2022
https://dl.acm.org/doi/10.1145/3503540
Wang ZSchafer B(2022)Learning from the Past: Efficient High-level Synthesis Design Space Exploration for FPGAsACM Transactions on Design Automation of Electronic Systems10.1145/349553127:4(1-23)Online publication date: 12-Feb-2022
https://dl.acm.org/doi/10.1145/3495531
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Index Terms

Design space exploration acceleration through operation clustering
1. Computing methodologies
  1. Machine learning
    1. Learning paradigms
      1. Unsupervised learning
        Cluster analysis

Index terms have been assigned to the content through auto-classification.

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cover image IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Volume 29, Issue 1

January 2010

164 pages

ISSN:0278-0070

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Copyright © 2010.

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IEEE Press

Publication History

Published: 01 January 2010

Revised: 11 August 2009

Received: 04 June 2009

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Cited By

Rashid MSchafer B(2023)Fast and Inexpensive High-Level Synthesis Design Space Exploration: Machine Learning to the RescueIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.325834142:11(3939-3950)Online publication date: 1-Nov-2023
https://dl.acm.org/doi/10.1109/TCAD.2023.3258341
Sun QChen TLiu SChen JYu HYu B(2022)Correlated Multi-objective Multi-fidelity Optimization for HLS Directives DesignACM Transactions on Design Automation of Electronic Systems10.1145/350354027:4(1-27)Online publication date: 8-Mar-2022
https://dl.acm.org/doi/10.1145/3503540
Wang ZSchafer B(2022)Learning from the Past: Efficient High-level Synthesis Design Space Exploration for FPGAsACM Transactions on Design Automation of Electronic Systems10.1145/349553127:4(1-23)Online publication date: 12-Feb-2022
https://dl.acm.org/doi/10.1145/3495531
Reyes Fernandez de Bulnes DMaldonado YTrujillo L(2020)Development of Multiobjective High-Level Synthesis for FPGAsScientific Programming10.1155/2020/70950482020Online publication date: 1-Jan-2020
https://dl.acm.org/doi/10.1155/2020/7095048
Zhao JFeng LSinha SZhang WLiang YHe B(2020)Performance Modeling and Directives Optimization for High-Level Synthesis on FPGAIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2019.291291639:7(1428-1441)Online publication date: 1-Jul-2020
https://dl.acm.org/doi/10.1109/TCAD.2019.2912916
Shafiabadi MPedram HReshadi MReza A(2020)Comprehensive regression-based model to predict performance of general-purpose graphics processing unitCluster Computing10.1007/s10586-019-03011-223:2(1505-1516)Online publication date: 1-Jun-2020
https://dl.acm.org/doi/10.1007/s10586-019-03011-2
Pham NSingh AKumar AKhin MNebel WAtienza D(2015)Exploiting loop-array dependencies to accelerate the design space exploration with high level synthesisProceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition10.5555/2755753.2755788(157-162)Online publication date: 9-Mar-2015
https://dl.acm.org/doi/10.5555/2755753.2755788
Xydis SPalermo GZaccaria VSilvano CMacii E(2013)A meta-model assisted coprocessor synthesis framework for compiler/architecture parameters customizationProceedings of the Conference on Design, Automation and Test in Europe10.5555/2485288.2485450(659-664)Online publication date: 18-Mar-2013
https://dl.acm.org/doi/10.5555/2485288.2485450
Xydis SPekmestzi KSoudris DEconomakos G(2013)Compiler-in-the-loop exploration during datapath synthesis for higher quality delay-area trade-offsACM Transactions on Design Automation of Electronic Systems10.1145/2390191.239020218:1(1-35)Online publication date: 16-Jan-2013
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Liu HPetracca MCarloni LRosenstiel WMacii E(2012)Compositional system-level design exploration with planning of high-level synthesisProceedings of the Conference on Design, Automation and Test in Europe10.5555/2492708.2492870(641-646)Online publication date: 12-Mar-2012
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