Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
skip to main content
10.1145/1345206.1345241acmconferencesArticle/Chapter ViewAbstractPublication PagesppoppConference Proceedingsconference-collections
research-article

Dynamic performance tuning of word-based software transactional memory

Published: 20 February 2008 Publication History

Abstract

The current generation of software transactional memories has the advantage of being simple and efficient. Nevertheless, there are several parameters that affect the performance of a transactional memory, for example the locality of the application and the cache line size of the processor. In this paper, we investigate dynamic tuning mechanisms on a new time-based software transactional memory implementation. We study in extensive measurements the performance of our implementation and exhibit the benefits of dynamic tuning. We compare our results with TL2, which is currently one of the fastest word-based software transactional memories.

References

[1]
Hans Boehm. http://www.hpl.hp.com/research/linux/atomic ops/.
[2]
Chi Cao Minh, Martin Trautmann, JaeWoong Chung, Austen McDonald, Nathan Bronson, Jared Casper, Christos Kozyrakis, and Kunle Olukotun. An Effective Hybrid Transactional Memory System with Strong Isolation Guarantees. In Proceedings of the 34th Annual International Symposium on Computer Architecture (ISCA), pages 69--80. June 2007.
[3]
David Dice, Ori Shalev, and Nir Shavit. Transactional Locking II. In Proceedings of the 20th International Symposium on Distributed Computing (DISC), pages 194--208, September 2006.
[4]
Robert Ennals. Software Transactional Memory Should Not Be Obstruction-Free.
[5]
Pascal Felber, Christof Fetzer, Ulrich Müller, Torvald Riegel, Martin Süßkraut, and Heiko Sturzrehm. Transactifying Applications using an Open Compiler Framework. In 2nd ACM SIGPLAN Workshop on Transactional Computing (TRANSACT), August 2007.
[6]
Jim Gray, Raymond A. Lorie, Gianfranco R. Putzolu, and Irving L. Traiger. Granularity of locks in a large shared data base. In Proceedings of the 1st International Conference on Very Large Data Bases (VLDB), pages 428--451, September 1975.
[7]
Tim Harris and Keir Fraser. Language support for lightweight transactions. In Proceedings of the 18th annual ACM SIGPLAN conference on Object-Oriented Programing, Systems, Languages, and Applications (OOPSLA), pages 388--402, October 2003.
[8]
Tim Harris, Mark Plesko, Avraham Shinnar, and David Tarditi. Optimizing Memory Transactions. In Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), pages 14--25, June 2006.
[9]
Maurice Herlihy, Victor Luchangco, Mark Moir, and William N. Scherer. Software Transactional Memory for Dynamic-sized Data Structures. In Proceedings of the 22nd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing (PODC), pages 92--101, July 2003.
[10]
Torvald Riegel, Pascal Felber, and Christof Fetzer. A Lazy Snapshot Algorithm with Eager Validation. In Proceedings of the 20th International Symposium on Distributed Computing (DISC), 284--298, September 2006.pages
[11]
Torvald Riegel, Christof Fetzer, and Pascal Felber. Snapshot Isolation for Software Transactional Memory. In 1st ACM SIGPLAN Workshop on Transactional Computing (TRANSACT), June 2006.
[12]
Torvald Riegel, Christof Fetzer, and Pascal Felber. Time-based Transactional Memory with Scalable Time Bases. In Proceedings of the 19th ACM Symposium on Parallelism in Algorithms and Architectures (SPAA), pages 221--228, June 2007.
[13]
Bratin Saha, Ali-Reza Adl-Tabatabai, Richard L. Hudson, Chi Cao Minh, and Benjamin Hertzberg. McRT-STM: a high performance software transactional memory system for a multi-core runtime. In Proceedings of the 11th ACM SIGPLAN symposium on Principles and Practice of Parallel Programming (PPoPP), pages 187--197, March 2006.
[14]
Abraham Silberschatz and Zvi Kedem. Consistency in hierarchical database systems. Journal of the ACM, 27(1):72--80, 1980.
[15]
Michael F. Spear, Virendra J. Marathe, William N. Scherer III, and Michael L. Scott. Conflict Detection and Validation Strategies for Software Transactional Memory. In Proceedings of the 20th International Symposium on Distributed Computing (DISC), pages 179--193, September 2006.
[16]
Cheng Wang, Wei-Yu Chen, Youfeng Wu, Bratin Saha, and Ali-Reza Adl-Tabatabai. Code Generation and Optimization for Transactional Memory Constructs in an Unmanaged Language. In Proceedings of the 5th IEEE/ACM International Symposium on Code Generation and Optimization (CGO), March 2007.

Cited By

View all
  • (2024)Scaling Up Transactions with Slower ClocksProceedings of the 29th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming10.1145/3627535.3638472(2-16)Online publication date: 2-Mar-2024
  • (2024)PIM-STM: Software Transactional Memory for Processing-In-Memory SystemsProceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 210.1145/3620665.3640428(897-911)Online publication date: 27-Apr-2024
  • (2023)SpecPMT: Speculative Logging for Resolving Crash Consistency Overhead of Persistent MemoryProceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 210.1145/3575693.3575696(762-777)Online publication date: 27-Jan-2023
  • Show More Cited By

Recommendations

Comments

Information & Contributors

Information

Published In

cover image ACM Conferences
PPoPP '08: Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming
February 2008
308 pages
ISBN:9781595937957
DOI:10.1145/1345206
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Sponsors

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 20 February 2008

Permissions

Request permissions for this article.

Check for updates

Author Tags

  1. dynamic tuning
  2. transactional memory

Qualifiers

  • Research-article

Conference

PPoPP08
Sponsor:

Acceptance Rates

Overall Acceptance Rate 230 of 1,014 submissions, 23%

Contributors

Other Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

  • Downloads (Last 12 months)33
  • Downloads (Last 6 weeks)6
Reflects downloads up to 13 Nov 2024

Other Metrics

Citations

Cited By

View all
  • (2024)Scaling Up Transactions with Slower ClocksProceedings of the 29th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming10.1145/3627535.3638472(2-16)Online publication date: 2-Mar-2024
  • (2024)PIM-STM: Software Transactional Memory for Processing-In-Memory SystemsProceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 210.1145/3620665.3640428(897-911)Online publication date: 27-Apr-2024
  • (2023)SpecPMT: Speculative Logging for Resolving Crash Consistency Overhead of Persistent MemoryProceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 210.1145/3575693.3575696(762-777)Online publication date: 27-Jan-2023
  • (2023)Block-STMProceedings of the 28th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming10.1145/3572848.3577524(232-244)Online publication date: 25-Feb-2023
  • (2023)2PLSFProceedings of the 28th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming10.1145/3572848.3577433(39-51)Online publication date: 25-Feb-2023
  • (2023)On the Effects of Transaction Data Access Patterns on Performance in Lock-Based Concurrency ControlIEEE Transactions on Computers10.1109/TC.2022.322208472:6(1718-1732)Online publication date: 1-Jun-2023
  • (2023)Separating Mechanism from Policy in STM2023 32nd International Conference on Parallel Architectures and Compilation Techniques (PACT)10.1109/PACT58117.2023.00031(279-296)Online publication date: 21-Oct-2023
  • (2023)CATS: A Computation-Aware Transaction Processing System with Proactive Unlocking2023 IEEE/ACM 31st International Symposium on Quality of Service (IWQoS)10.1109/IWQoS57198.2023.10188780(1-10)Online publication date: 19-Jun-2023
  • (2023)CSMV: A highly scalable multi-versioned software transactional memory for GPUsJournal of Parallel and Distributed Computing10.1016/j.jpdc.2023.04.002180(104701)Online publication date: Oct-2023
  • (2022)CSMV: A Highly Scalable Multi-Versioned Software Transactional Memory for GPUs2022 IEEE International Parallel and Distributed Processing Symposium (IPDPS)10.1109/IPDPS53621.2022.00057(526-536)Online publication date: May-2022
  • Show More Cited By

View Options

Get Access

Login options

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Media

Figures

Other

Tables

Share

Share

Share this Publication link

Share on social media