Integration of behavioral synthesis and floorplanning for asynchronous circuits with bundled-data implementation
Pages 157 - 162
Abstract
In this paper, we propose a synthesis method for asynchronous circuits with bundled-data implementation which iteratively applies behavioral synthesis and floorplanning to obtain an optimum circuit in terms of performance under given design constraints. We evaluate the effectiveness of the proposed method through synthesizing several benchmarks. Experimental results show that the proposed method synthesizes faster circuits compared to ones without considering timing constraints. Also, the proposed method is effective to reduce the number of timing violations.
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Index Terms
- Integration of behavioral synthesis and floorplanning for asynchronous circuits with bundled-data implementation
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Published In
May 2011
496 pages
ISBN:9781450306676
DOI:10.1145/1973009
- General Chairs:
- David Atienza,
- Yuan Xie,
- Program Chairs:
- Jose L. Ayala,
- Ken Stevens
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Published: 02 May 2011
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