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Constraint abstraction for vectorless power grid verification

Published: 29 May 2013 Publication History

Abstract

Vectorless power grid verification is a formal approach to analyze power supply noises across the chip without detailed current waveforms. It is typically formulated and solved as linear programs, which demand intensive computational power, especially for large-scale power grids. In this paper, we propose a constraint abstraction technique to reduce the computation cost of vectorless verification. The boundary condition of a subgrid is modeled by boundary constraints, which enable efficient calculation of conservative bounds of power supply noises in a divide-and-conquer manner. Experimental results show that the proposed approach achieves significant speedup over prior art while maintaining good solution quality.

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Cited By

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  • (2016)Generating Current Budgets to Guarantee Power Grid SafetyIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2016.252465935:11(1914-1927)Online publication date: 1-Nov-2016
  • (2015)A Selected Inversion Approach for Locality Driven Vectorless Power Grid VerificationIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2014.236552023:11(2617-2628)Online publication date: Nov-2015
  • (2015)HS3-DPG: Hierarchical Simulation for 3-D P/G NetworkIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2014.235858223:10(2307-2311)Online publication date: Oct-2015
  • Show More Cited By

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    cover image ACM Conferences
    DAC '13: Proceedings of the 50th Annual Design Automation Conference
    May 2013
    1285 pages
    ISBN:9781450320719
    DOI:10.1145/2463209
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Publication History

    Published: 29 May 2013

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    Author Tags

    1. power grid
    2. vectorless verification
    3. voltage drop

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    Cited By

    View all
    • (2016)Generating Current Budgets to Guarantee Power Grid SafetyIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2016.252465935:11(1914-1927)Online publication date: 1-Nov-2016
    • (2015)A Selected Inversion Approach for Locality Driven Vectorless Power Grid VerificationIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2014.236552023:11(2617-2628)Online publication date: Nov-2015
    • (2015)HS3-DPG: Hierarchical Simulation for 3-D P/G NetworkIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2014.235858223:10(2307-2311)Online publication date: Oct-2015
    • (2015)Vectorless transient power grid verification: A case study with IBM benchmarks2015 IEEE Symposium on Electromagnetic Compatibility and Signal Integrity10.1109/EMCSI.2015.7107698(271-276)Online publication date: Mar-2015
    • (2015)Generating circuit current constraints to guarantee power grid safetyThe 20th Asia and South Pacific Design Automation Conference10.1109/ASPDAC.2015.7059031(358-365)Online publication date: Jan-2015
    • (2014)Efficient region-aware P/G TSV planning for 3D ICsFifteenth International Symposium on Quality Electronic Design10.1109/ISQED.2014.6783321(171-178)Online publication date: Mar-2014

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