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Automatic Parallelization of Multirate Block Diagrams of Control Systems on Multicore Platforms

Published: 13 October 2016 Publication History

Abstract

This article addresses the problem of parallelizing model block diagrams for real-time embedded applications on multicore architectures. We describe a Mixed Integer Linear Programming formulation for finding a feasible mapping of the blocks to different CPU cores. For single-rate models, we use an objective function that minimizes the overall worst-case execution time. We introduce a set of heuristics to solve the problem for large models in a reasonable time. For multirate models, we solve the feasibility problem for finding a valid mapping. We study the scalability and efficiency of our approach with synthetic benchmarks and an engine controller from Toyota.

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Cited By

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  • (2020)New Insights Into the Real-Time Performance of a Multicore ProcessorIEEE Access10.1109/ACCESS.2020.30298588(186199-186211)Online publication date: 2020
  • (2018)Optimal Implementation of Simulink Models on Multicore Architectures with Partitioned Fixed Priority Scheduling2018 IEEE Real-Time Systems Symposium (RTSS)10.1109/RTSS.2018.00041(242-253)Online publication date: Dec-2018
  • (2017)Semi-automatic parallelization of simulations with model transformation techniquesProceedings of the Symposium on Model-driven Approaches for Simulation Engineering10.5555/3108244.3108246(1-12)Online publication date: 23-Apr-2017

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  1. Automatic Parallelization of Multirate Block Diagrams of Control Systems on Multicore Platforms

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    Published In

    cover image ACM Transactions on Embedded Computing Systems
    ACM Transactions on Embedded Computing Systems  Volume 16, Issue 1
    Special Issue on VIPES, Special Issue on ICESS2015 and Regular Papers
    February 2017
    602 pages
    ISSN:1539-9087
    EISSN:1558-3465
    DOI:10.1145/3008024
    Issue’s Table of Contents
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Publication History

    Published: 13 October 2016
    Accepted: 01 May 2016
    Revised: 01 February 2016
    Received: 01 October 2015
    Published in TECS Volume 16, Issue 1

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    Author Tags

    1. Multicore platforms
    2. Simulink
    3. embedded control systems
    4. model-based development
    5. multirate
    6. optimization
    7. scheduling
    8. task allocation

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    • NSF
    • NSF I/UCRC Center for Embedded Systems

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    Cited By

    View all
    • (2020)New Insights Into the Real-Time Performance of a Multicore ProcessorIEEE Access10.1109/ACCESS.2020.30298588(186199-186211)Online publication date: 2020
    • (2018)Optimal Implementation of Simulink Models on Multicore Architectures with Partitioned Fixed Priority Scheduling2018 IEEE Real-Time Systems Symposium (RTSS)10.1109/RTSS.2018.00041(242-253)Online publication date: Dec-2018
    • (2017)Semi-automatic parallelization of simulations with model transformation techniquesProceedings of the Symposium on Model-driven Approaches for Simulation Engineering10.5555/3108244.3108246(1-12)Online publication date: 23-Apr-2017

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