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Efficient design space exploration of high performance embedded out-of-order processors

Published: 06 March 2006 Publication History

Abstract

Previous work on efficient customized processor design primarily focused on in-order architectures. However, with the recent introduction of out-of-order processors for high-end high-performance embedded applications, researchers and designers need to address how to automate the design process of customized out-of-order processors. Because of the parallel execution of independent instructions in out-of-order processors, in-order processor design methodologies which subdivide the search space in independent components are unlikely to be effective in terms of accuracy for designing out-of-order processors. In this paper we propose and evaluate various automated single- and multi-objective optimizations for exploring out-of-order processor designs. We conclude that the newly proposed genetic local search algorithm outperforms all other search algorithms in terms of accuracy. In addition, we propose two-phase simulation in which the first phase explores the design space through statistical simulation; a region of interest is then simulated through detailed simulation in the second phase. We show that simulation time speedups can be obtained of a factor 2.2X to 7.3X using two-phase simulation.

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Cited By

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  • (2017)AFECProceedings of the Conference on Design, Automation & Test in Europe10.5555/3130379.3130392(55-60)Online publication date: 27-Mar-2017
  • (2013)Improving simulation speed and accuracy for many-core embedded platforms with ensemble modelsProceedings of the Conference on Design, Automation and Test in Europe10.5555/2485288.2485452(671-676)Online publication date: 18-Mar-2013
  • (2013)Selecting representative benchmark inputs for exploring microprocessor design spacesACM Transactions on Architecture and Code Optimization10.1145/2541228.255529410:4(1-24)Online publication date: 1-Dec-2013
  • Show More Cited By

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Published In

cover image Guide Proceedings
DATE '06: Proceedings of the conference on Design, automation and test in Europe: Proceedings
March 2006
1390 pages
ISBN:3981080106

Sponsors

  • EDAA: European Design Automation Association
  • The EDA Consortium
  • IEEE-CS\DATC: The IEEE Computer Society

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European Design and Automation Association

Leuven, Belgium

Publication History

Published: 06 March 2006

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DATE '06 Paper Acceptance Rate 267 of 834 submissions, 32%;
Overall Acceptance Rate 518 of 1,794 submissions, 29%

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Cited By

View all
  • (2017)AFECProceedings of the Conference on Design, Automation & Test in Europe10.5555/3130379.3130392(55-60)Online publication date: 27-Mar-2017
  • (2013)Improving simulation speed and accuracy for many-core embedded platforms with ensemble modelsProceedings of the Conference on Design, Automation and Test in Europe10.5555/2485288.2485452(671-676)Online publication date: 18-Mar-2013
  • (2013)Selecting representative benchmark inputs for exploring microprocessor design spacesACM Transactions on Architecture and Code Optimization10.1145/2541228.255529410:4(1-24)Online publication date: 1-Dec-2013
  • (2010)Fidelity metrics for estimation modelsProceedings of the International Conference on Computer-Aided Design10.5555/2133429.2133431(1-8)Online publication date: 7-Nov-2010
  • (2010)Automatic microarchitectural pipeliningProceedings of the Conference on Design, Automation and Test in Europe10.5555/1870926.1871160(961-964)Online publication date: 8-Mar-2010
  • (2010)Criticality-driven superscalar design space explorationProceedings of the 19th international conference on Parallel architectures and compilation techniques10.1145/1854273.1854308(261-272)Online publication date: 11-Sep-2010
  • (2010)Applied inferenceACM Transactions on Architecture and Code Optimization10.1145/1839667.18396707:2(1-37)Online publication date: 5-Oct-2010
  • (2008)Distilling the essence of proprietary workloads into miniature benchmarksACM Transactions on Architecture and Code Optimization10.1145/1400112.14001155:2(1-33)Online publication date: 3-Sep-2008
  • (2008)Predictive design space exploration using genetically programmed response surfacesProceedings of the 45th annual Design Automation Conference10.1145/1391469.1391711(960-965)Online publication date: 8-Jun-2008
  • (2008)Dynamic register file resizing and frequency scaling to improve embedded processor performance and energy-delay efficiencyProceedings of the 45th annual Design Automation Conference10.1145/1391469.1391488(68-71)Online publication date: 8-Jun-2008
  • Show More Cited By

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