Article

Balancing design options with Sherpa

Authors:

Timothy Sherwood,

Mark Oskin, and

Brad CalderAuthors Info & Claims

CASES '04: Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems

September 2004

Pages 57 - 68

https://doi.org/10.1145/1023833.1023843

Published: 22 September 2004 Publication History

Abstract

Application specific processors offer the potential of rapidly designed logic specifically constructed to meet the performance and area demands of the task at hand. Recently, there have been several major projects that attempt to automate the process of transforming a predetermined processor configuration into a low level description for fabrication. These projects either leave the specification of the processor to the designer, which can be a significant engineering burden, or handle it in a fully automated fashion, which completely removes the designer from the loop.In this paper we introduce a technique for guiding the design and optimization of application specific processors. The goal of the Sherpa design framework is to automate certain design tasks and provide early feedback to help the designer navigate their way through the architecture design space. Our approach is to decompose the overall problem of choosing an optimal architecture into a set of sub-problems that are, to the first order, independent. For each sub-problem, we create a model that relates performance to area. From this, we build a constraint system that can be solved using integer-linear programming techniques, and arrive at an ideal parameter selection for all architectural components. Our approach only takes a few minutes to explore the design space allowing the designer or compiler to see the potential benefits of optimizations rapidly. We show that the expected performance using our model correlates strongly to detailed pipeline simulations, and present results showing design tradeoffs for several different benchmarks.

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Cited By

Kramer MAkleman E(2020)A Procedural Approach to Creating American Second Empire HousesJournal on Computing and Cultural Heritage 10.1145/334319613:1(1-19)Online publication date: 5-Feb-2020
https://dl.acm.org/doi/10.1145/3343196
Slåtten VKraemer FHerrmann P(2011)Towards automatic generation of formal specifications to validate and verify reliable distributed systemsACM SIGPLAN Notices10.1145/2189751.204788847:3(147-156)Online publication date: 22-Oct-2011
https://dl.acm.org/doi/10.1145/2189751.2047888
Arnoldus Bvan den Brand MSerebrenik A(2011)Less is moreACM SIGPLAN Notices10.1145/2189751.204788747:3(137-146)Online publication date: 22-Oct-2011
https://dl.acm.org/doi/10.1145/2189751.2047887
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Index Terms

Balancing design options with Sherpa
1. Computing methodologies
  1. Modeling and simulation
    1. Model development and analysis
      1. Modeling methodologies

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cover image ACM Conferences

CASES '04: Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems

September 2004

324 pages

ISBN:1581138903

DOI:10.1145/1023833

General Chairs:
Mary Jane Irwin
Pennsylvania State University
,
Wei Zhao
Texas Instruments
,
Program Chairs:
Luciano Lavagno
Politecnico di Torino/Cadence Labs
,
Scott Mahlke
University of Michigan, Ann Arbor, MI

Copyright © 2004 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 22 September 2004

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CASES04: 2004 International Conference on Compilers, Architectures and Synthesis for Embedded Systems

September 22 - 25, 2004

Washington DC, USA

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Overall Acceptance Rate 52 of 230 submissions, 23%

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Cited By

Kramer MAkleman E(2020)A Procedural Approach to Creating American Second Empire HousesJournal on Computing and Cultural Heritage 10.1145/334319613:1(1-19)Online publication date: 5-Feb-2020
https://dl.acm.org/doi/10.1145/3343196
Slåtten VKraemer FHerrmann P(2011)Towards automatic generation of formal specifications to validate and verify reliable distributed systemsACM SIGPLAN Notices10.1145/2189751.204788847:3(147-156)Online publication date: 22-Oct-2011
https://dl.acm.org/doi/10.1145/2189751.2047888
Arnoldus Bvan den Brand MSerebrenik A(2011)Less is moreACM SIGPLAN Notices10.1145/2189751.204788747:3(137-146)Online publication date: 22-Oct-2011
https://dl.acm.org/doi/10.1145/2189751.2047887
Strozek LBrooks D(2009)Energy- and area-efficient architectures through application clustering and architectural heterogeneityACM Transactions on Architecture and Code Optimization10.1145/1509864.15098686:1(1-31)Online publication date: 2-Apr-2009
https://dl.acm.org/doi/10.1145/1509864.1509868
Padmanabhan SCytron RChamberlain RLockwood J(2006)Automatic application-specific microarchitecture reconfigurationProceedings of the 20th international conference on Parallel and distributed processing10.5555/1898953.1899153(200-200)Online publication date: 25-Apr-2006
https://dl.acm.org/doi/10.5555/1898953.1899153
Veale BAntonio JTull MJones S(2006)Selection of instruction set extensions for an FPGA embedded processor coreProceedings of the 20th international conference on Parallel and distributed processing10.5555/1898953.1899151(199-199)Online publication date: 25-Apr-2006
https://dl.acm.org/doi/10.5555/1898953.1899151
Eyerman SEeckhout LDe Bosschere KGielen G(2006)Efficient design space exploration of high performance embedded out-of-order processorsProceedings of the conference on Design, automation and test in Europe: Proceedings10.5555/1131481.1131578(351-356)Online publication date: 6-Mar-2006
https://dl.acm.org/doi/10.5555/1131481.1131578
Sheldon DKumar RLysecky RVahid FTullsen DHassoun S(2006)Application-specific customization of parameterized FPGA soft-core processorsProceedings of the 2006 IEEE/ACM international conference on Computer-aided design10.1145/1233501.1233553(261-268)Online publication date: 5-Nov-2006
https://dl.acm.org/doi/10.1145/1233501.1233553
Yi JEeckhout LLilja DCalder BJohn LSmith J(2006)The Future of SimulationComputer10.1109/MC.2006.40439:11(22-29)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/MC.2006.404
Padmanabhan SCytron RChamberlain RLockwood J(2006)Automatic application-specific microarchitecture reconfigurationProceedings 20th IEEE International Parallel & Distributed Processing Symposium10.1109/IPDPS.2006.1639457(8 pp.)Online publication date: 2006
https://doi.org/10.1109/IPDPS.2006.1639457
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