Using VHDL for datapath synthesis
Authors: 
V. Olive, R. Airiau, J. M. Bergé, A. RobertAuthors Info & Claims
V. Olive, R. Airiau, J. M. Bergé, A. RobertAuthors Info & Claims
References
[1]
"VHDL Du langage a la mod~lisation", Airiau et al., Presses Polytechniques et Universitaires Romandes, CH-105 Lausanne Suisse.
[2]
"Development and Use of Flexible Blocks libraries", Berge et al., in procee~ngs ESSIRC'86, Delft, The Netherlands), pp 28-30
[3]
"Generation of Interactive Programming Environments~, D. Clement, Technique et Science Informatiques, Vol 9, no 2, 1990.
[4]
"FLAMEL : A High Level Hardware~ Compiler", H. Trickey, IEEE Transactions on Computer Aided Design, pp 259-269, March 1987.
[5]
"ASA: An A.I. application dedicated to architectural synthesis of integrated circuits", A. Fonkoua, Thesis of I.N.P.(3. Grenoble 1989.
[6]
"General Purpose High Speed Equalizer", S. Maginot et al., in proceedings IEEE 1990 CICC, PP 25.6.1 - 25.6.4
Index Terms
- Using VHDL for datapath synthesis
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- SIGDA: ACM Special Interest Group on Design Automation
- IEEE-CS: Computer Society
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IEEE Computer Society Press
Washington, DC, United States
Publication History
Published: 01 November 1992
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