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SUBTRACT: a program for the efficient evaluation of substrate parasitics in integrated circuits

Authors:

Nishath K. Verghese,

David J. AllstotAuthors Info & Claims

ICCAD '95: Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design

Pages 194 - 198

Published: 01 December 1995 Publication History

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Abstract

Algorithms for the efficient evaluation of substrate parasitics in mixed-signal integrated circuits have been developed and incorporated in an extraction tool for substrate parasitics, SUBTRACT. Using a preprocessed, polynomial- based boundary element method, SUBTRACT enables the parasitic extraction process to be completely technology independent, allowing for fast evaluation. Additionally, techniques to accelerate the iterative solution of the resulting impedance matrix have been developed and employed to further improve the speed advantages that this method offers. The preprocessed boundary element method is more efficient than finite-difference schemes and orders of magnitude faster than general boundary element methods using a direct evaluation of Green's function. Results of employing SUBTRACT to the design and verification of a mixed-signal A/D converter IC are described.

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Cited By

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Panda RSundareswaran SBlaauw DMacii EDe VIrwin M(2001)On the interaction of power distribution network with substrateProceedings of the 2001 international symposium on Low power electronics and design10.1145/383082.383188(388-393)Online publication date: 6-Aug-2001
https://dl.acm.org/doi/10.1145/383082.383188
Rutenbar RCohn JWiesel MHill D(2000)Layout tools for analog ICs and mixed-signal SoCsProceedings of the 2000 international symposium on Physical design10.1145/332357.332378(76-83)Online publication date: 1-May-2000
https://dl.acm.org/doi/10.1145/332357.332378

Index Terms

SUBTRACT: a program for the efficient evaluation of substrate parasitics in integrated circuits
1. Applied computing
  1. Physical sciences and engineering
2. Hardware
  1. Electronic design automation
    1. Physical design (EDA)

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ICCAD '95: Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design

December 1995

748 pages

ISBN:0818672137

Chairman:
Richard Rudell
Synopsys, Inc., Mountain View, CA

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IEEE Computer Society

United States

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Published: 01 December 1995

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ICCAD '95: International Conference on Computer Aided Design

November 5 - 9, 1995

California, San Jose, USA

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Panda RSundareswaran SBlaauw DMacii EDe VIrwin M(2001)On the interaction of power distribution network with substrateProceedings of the 2001 international symposium on Low power electronics and design10.1145/383082.383188(388-393)Online publication date: 6-Aug-2001
https://dl.acm.org/doi/10.1145/383082.383188
Rutenbar RCohn JWiesel MHill D(2000)Layout tools for analog ICs and mixed-signal SoCsProceedings of the 2000 international symposium on Physical design10.1145/332357.332378(76-83)Online publication date: 1-May-2000
https://dl.acm.org/doi/10.1145/332357.332378

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Analysis of power-performance for ultra-thin-body GeOI logic circuits

Impact of channel length, gate insulator thickness, gate insulator material, and temperature on the performance of nanoscale FETs

Performance estimation of sub-30 nm junctionless tunnel FET (JLTFET)

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Recommendations

Analysis of power-performance for ultra-thin-body GeOI logic circuits

Impact of channel length, gate insulator thickness, gate insulator material, and temperature on the performance of nanoscale FETs

Performance estimation of sub-30 nm junctionless tunnel FET (JLTFET)

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